2026-01-09 01:32:07.904 [INFO] transceiver.py:125 Init transceiver 'BTS@172.18.122.20:5700'
2026-01-09 01:32:07.904 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5702 <-> R:172.18.122.20:5802)
2026-01-09 01:32:07.904 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5701 <-> R:172.18.122.20:5801)
2026-01-09 01:32:07.904 [INFO] transceiver.py:125 Init transceiver 'MS@172.18.122.22:6700'
2026-01-09 01:32:07.904 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:6702 <-> R:172.18.122.22:6802)
2026-01-09 01:32:07.904 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:6701 <-> R:172.18.122.22:6801)
2026-01-09 01:32:07.904 [INFO] transceiver.py:125 Init transceiver 'TRX1@172.18.122.20:5700/1'
2026-01-09 01:32:07.904 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5704 <-> R:172.18.122.20:5804)
2026-01-09 01:32:07.904 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5703 <-> R:172.18.122.20:5803)
2026-01-09 01:32:07.904 [INFO] transceiver.py:125 Init transceiver 'TRX2@172.18.122.20:5700/2'
2026-01-09 01:32:07.904 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5706 <-> R:172.18.122.20:5806)
2026-01-09 01:32:07.904 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5705 <-> R:172.18.122.20:5805)
2026-01-09 01:32:07.904 [INFO] transceiver.py:125 Init transceiver 'TRX3@172.18.122.20:5700/3'
2026-01-09 01:32:07.904 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5708 <-> R:172.18.122.20:5808)
2026-01-09 01:32:07.904 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5707 <-> R:172.18.122.20:5807)
2026-01-09 01:32:07.904 [INFO] fake_trx.py:424 Init complete
2026-01-09 01:32:07.904 [INFO] fake_trx.py:455 Setting real time process scheduler to SCHED_RR, priority 30
2026-01-09 01:32:09.253 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:32:09.254 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:32:09.254 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:32:09.254 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:32:09.254 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:32:09.256 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:32:12.268 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:32:12.268 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:32:12.268 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:32:12.268 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:32:12.268 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 0 -> 1
2026-01-09 01:32:12.270 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 01:32:12.270 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 01:32:12.270 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:32:12.270 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:32:12.271 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:32:12.271 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 01:32:12.271 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:32:12.271 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 0 -> 1
2026-01-09 01:32:12.274 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 01:32:12.274 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 01:32:12.275 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:32:12.275 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:32:12.275 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:32:12.275 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 01:32:12.275 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:32:12.275 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 0 -> 1
2026-01-09 01:32:12.277 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 01:32:12.278 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 01:32:12.278 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:32:12.278 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:32:12.278 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:32:12.278 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 01:32:12.278 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:32:12.278 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 0 -> 1
2026-01-09 01:32:12.280 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 01:32:12.280 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 01:32:12.280 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 01:32:12.280 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 01:32:12.280 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 01:32:12.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 01:32:12.280 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 01:32:12.281 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 01:32:12.281 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 01:32:12.281 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 01:32:12.281 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 01:32:12.281 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 01:32:12.281 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:32:12.281 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 01:32:12.281 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 01:32:12.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 01:32:12.282 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:32:12.282 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:32:12.282 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:32:12.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:32:12.282 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:32:12.282 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:32:12.282 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:32:12.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:32:12.282 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:32:12.282 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:32:12.282 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:32:12.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:32:12.282 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:32:12.282 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:32:12.282 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:32:12.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:32:12.282 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:32:12.282 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:32:12.282 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:32:12.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:32:12.282 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:32:12.282 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:32:12.283 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:32:12.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:32:12.283 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:32:12.283 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:32:12.283 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:32:12.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:32:12.283 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:32:12.283 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:32:12.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:32:12.286 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 01:32:12.769 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 01:32:12.819 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:32:12.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:12.822 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:32:12.823 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 01:32:12.839 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:32:12.839 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:32:12.839 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:32:12.842 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:32:12.843 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:32:12.843 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:32:12.843 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:32:12.843 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:32:12.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:13.041 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:32:13.041 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:32:13.042 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:32:13.042 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:32:13.242 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 01:32:13.285 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:32:13.285 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:32:13.286 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:32:13.290 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:32:13.440 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:32:13.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:13.445 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:32:13.445 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:32:13.455 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:32:13.455 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:32:13.455 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:32:13.456 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:32:13.456 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:32:13.456 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:32:13.456 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:32:13.456 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:32:13.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:13.539 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:32:13.539 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:32:13.539 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:32:13.539 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:32:13.721 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 01:32:13.940 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:32:13.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:13.945 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:32:13.945 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:32:13.964 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:32:13.964 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:32:13.964 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:32:13.965 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:32:13.966 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:32:13.966 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:32:13.966 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:32:13.966 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:32:14.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:14.199 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 01:32:14.236 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:32:14.236 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:32:14.237 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:32:14.238 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:32:14.286 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:32:14.286 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:32:14.286 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:32:14.291 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:32:14.635 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:32:14.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:14.640 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:32:14.640 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:32:14.659 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:32:14.659 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:32:14.660 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:32:14.661 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:32:14.661 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:32:14.661 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:32:14.661 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:32:14.661 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:32:14.679 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 01:32:14.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:14.743 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:32:14.743 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:32:14.744 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:32:14.744 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:32:15.134 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:32:15.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:15.139 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:32:15.139 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:32:15.153 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 01:32:15.160 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:32:15.160 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:32:15.160 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:32:15.161 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:32:15.161 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:32:15.161 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:32:15.162 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:32:15.162 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:32:15.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:15.287 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:32:15.288 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:32:15.288 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:32:15.293 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:32:15.421 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:32:15.422 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:32:15.422 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:32:15.422 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:32:15.627 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 01:32:16.100 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 01:32:16.161 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:32:16.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:16.166 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:32:16.166 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:32:16.184 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:32:16.184 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:32:16.184 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:32:16.185 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:32:16.185 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:32:16.185 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:32:16.186 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:32:16.186 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:32:16.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:16.288 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:32:16.289 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:32:16.289 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:32:16.293 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:32:16.370 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:32:16.370 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:32:16.371 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:32:16.371 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:32:16.572 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 01:32:17.042 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 01:32:17.181 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:32:17.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:17.185 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:32:17.186 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:32:17.204 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:32:17.204 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:32:17.204 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:32:17.205 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:32:17.205 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:32:17.206 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:32:17.206 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:32:17.206 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:32:17.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:17.312 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:32:17.312 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:32:17.312 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:32:17.312 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:32:17.515 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 01:32:17.721 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:32:17.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:17.726 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:32:17.726 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:32:17.739 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:32:17.739 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:32:17.739 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:32:17.741 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:32:17.741 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:32:17.741 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:32:17.741 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:32:17.741 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:32:17.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:32:17.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:17.810 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:32:17.810 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:32:17.810 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:32:17.810 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:32:17.995 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 01:32:18.274 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:32:18.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:18.279 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:32:18.279 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:32:18.297 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:32:18.297 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:32:18.297 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:32:18.299 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:32:18.299 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:32:18.299 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:32:18.299 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:32:18.299 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:32:18.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:18.472 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 01:32:18.509 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:32:18.509 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:32:18.510 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:32:18.510 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:32:18.951 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 01:32:19.309 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:32:19.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:19.314 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:32:19.315 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:32:19.333 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:32:19.333 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:32:19.333 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:32:19.335 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:32:19.335 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:32:19.335 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:32:19.335 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:32:19.335 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:32:19.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:32:19.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:19.430 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 01:32:19.467 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:32:19.467 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:32:19.467 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:32:19.468 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:32:19.903 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 01:32:20.217 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:32:20.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:20.222 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:32:20.222 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:32:20.242 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:32:20.242 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:32:20.242 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:32:20.243 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:32:20.244 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:32:20.244 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:32:20.244 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:32:20.244 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:32:20.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:20.380 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 01:32:20.416 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:32:20.416 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:32:20.417 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:32:20.417 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:32:20.861 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 01:32:21.196 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:32:21.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:21.202 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:32:21.202 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:32:21.221 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:32:21.221 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:32:21.221 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:32:21.222 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:32:21.222 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:32:21.222 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:32:21.222 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:32:21.222 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:32:21.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:21.336 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 01:32:21.368 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:32:21.369 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:32:21.369 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:32:21.369 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:32:21.736 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:32:21.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:21.742 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:32:21.742 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:32:21.761 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:32:21.761 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:32:21.761 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:32:21.762 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:32:21.762 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:32:21.762 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:32:21.762 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:32:21.762 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:32:21.816 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 01:32:21.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:21.880 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:32:21.880 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:32:21.880 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:32:21.880 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:32:21.972 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:32:21.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:21.978 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:32:21.978 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:32:21.996 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:32:21.996 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:32:21.996 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:32:21.998 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:32:21.998 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:32:21.998 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:32:21.998 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:32:21.998 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:32:22.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:22.116 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:32:22.116 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:32:22.116 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:32:22.116 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:32:22.294 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 01:32:22.468 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:32:22.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:22.473 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:32:22.473 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:32:22.493 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:32:22.494 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:32:22.494 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:32:22.495 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:32:22.495 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:32:22.495 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:32:22.495 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:32:22.495 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:32:22.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:22.594 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:32:22.594 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:32:22.594 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:32:22.594 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:32:22.773 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 01:32:22.966 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:32:22.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:22.971 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:32:22.971 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:32:22.980 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:32:22.980 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:32:22.980 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:32:22.982 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:32:22.982 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:32:22.982 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:32:22.982 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:32:22.982 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:32:23.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:23.072 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:32:23.073 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:32:23.073 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:32:23.073 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:32:23.253 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 01:32:23.463 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:32:23.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:23.469 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:32:23.469 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:32:23.478 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:32:23.478 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:32:23.479 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:32:23.480 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:32:23.480 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:32:23.480 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:32:23.480 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:32:23.480 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:32:23.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:23.552 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:32:23.552 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:32:23.553 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:32:23.553 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:32:23.643 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:32:23.645 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:23.649 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:32:23.649 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:32:23.662 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:32:23.662 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:32:23.663 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:32:23.664 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:32:23.664 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:32:23.664 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:32:23.665 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:32:23.665 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:32:23.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:23.726 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 01:32:23.760 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:32:23.761 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:32:23.761 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:32:23.762 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:32:24.132 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:32:24.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:24.134 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:32:24.134 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:32:24.151 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:32:24.151 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:32:24.151 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:32:24.152 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:32:24.152 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:32:24.152 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:32:24.152 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:32:24.152 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:32:24.210 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 01:32:24.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:24.274 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:32:24.274 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:32:24.274 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:32:24.274 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:32:24.638 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:32:24.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:24.644 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:32:24.644 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:32:24.663 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:32:24.663 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:32:24.664 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:32:24.665 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:32:24.665 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:32:24.665 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:32:24.665 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:32:24.665 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:32:24.679 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 01:32:24.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:24.740 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:32:24.741 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:32:24.741 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:32:24.741 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:32:25.122 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:32:25.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:25.127 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:32:25.127 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:32:25.138 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:32:25.138 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:32:25.138 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:32:25.138 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:32:25.139 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:32:25.139 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:32:25.139 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:32:25.139 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:32:25.139 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:32:25.139 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:32:25.139 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 01:32:25.139 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2754 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:32:25.139 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2754 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:32:25.139 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2754 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:32:25.139 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2754 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:32:25.139 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2754 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:32:25.139 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2754 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:32:25.139 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2754 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:32:25.139 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2754 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:32:30.142 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:32:30.142 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:32:30.144 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:32:30.144 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:32:30.145 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:32:30.145 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:32:30.153 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:32:30.154 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:32:30.154 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:32:30.154 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:32:30.154 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 01:32:30.156 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 01:32:30.157 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 01:32:30.157 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:32:30.157 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:32:30.157 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:32:30.157 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 01:32:30.157 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:32:30.157 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 01:32:30.159 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 01:32:30.159 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 01:32:30.159 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:32:30.159 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:32:30.159 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:32:30.160 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 01:32:30.160 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:32:30.160 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 01:32:30.161 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 01:32:30.161 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 01:32:30.161 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:32:30.161 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:32:30.162 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:32:30.162 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 01:32:30.162 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:32:30.162 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 01:32:30.165 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 01:32:30.165 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 01:32:30.165 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 01:32:30.165 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 01:32:30.165 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 01:32:30.165 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 01:32:30.165 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 01:32:30.165 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 01:32:30.165 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 01:32:30.165 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:32:30.165 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:32:30.166 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:32:30.166 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 01:32:30.166 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:32:30.166 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:32:30.166 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:32:30.166 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 01:32:30.166 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 01:32:30.166 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 01:32:30.166 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 01:32:30.166 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:32:30.166 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:32:30.166 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:32:30.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 01:32:30.166 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:32:30.166 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:32:30.167 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:32:30.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:32:30.167 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:32:30.167 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:32:30.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:32:30.167 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:32:30.167 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:32:30.167 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:32:30.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:32:30.167 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:32:30.167 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:32:30.167 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:32:30.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:32:30.167 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:32:30.167 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:32:30.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:32:30.167 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:32:30.167 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:32:30.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:32:30.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:32:30.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:32:30.171 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 01:32:30.655 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 01:32:30.689 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:32:30.691 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:32:30.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:30.693 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 01:32:30.719 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:32:30.719 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:32:30.720 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:32:30.728 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:30.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:30.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:30.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:30.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:30.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:30.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:30.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:30.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:30.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:30.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:30.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:30.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:30.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:30.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:30.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:30.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:30.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:30.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:30.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:30.813 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:30.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:30.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:30.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:30.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:30.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:30.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:30.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:30.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:30.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:30.863 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:30.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:30.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:30.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:30.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:30.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:30.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:30.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:30.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:30.905 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:30.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:30.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:30.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:30.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:30.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:30.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:30.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:30.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:30.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:30.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:30.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:30.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:30.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:30.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:30.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:30.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:30.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:30.983 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:30.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:30.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:30.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:31.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:31.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:31.011 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:31.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:31.019 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:31.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:31.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:31.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:31.035 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:31.039 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:31.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:31.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:31.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:31.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:31.060 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:31.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:31.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:31.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:31.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:31.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
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2026-01-09 01:32:31.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:31.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:31.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:31.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:31.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:31.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:31.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:31.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:31.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:31.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:31.128 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 01:32:31.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:31.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:31.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:31.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:31.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:31.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:31.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:31.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:31.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:31.165 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:31.168 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:32:31.168 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:32:31.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:31.170 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:32:31.171 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:32:31.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:31.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:31.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
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2026-01-09 01:32:31.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:31.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:31.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:31.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:31.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:31.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:31.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:31.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:31.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:31.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:31.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:31.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:31.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:31.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:31.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:31.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:31.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:31.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
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2026-01-09 01:32:31.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:31.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:31.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:31.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:31.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:31.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:31.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:31.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:31.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
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2026-01-09 01:32:31.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:31.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:31.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:31.251 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:31.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:31.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:31.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:31.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:31.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:31.258 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:31.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:31.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:31.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:31.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:31.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:31.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:31.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:31.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:31.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
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2026-01-09 01:32:31.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:31.274 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
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2026-01-09 01:32:31.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
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2026-01-09 01:32:31.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:31.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:31.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:31.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:31.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:31.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:31.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:31.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:31.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:31.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
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2026-01-09 01:32:31.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:31.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:31.301 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:31.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:31.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:31.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:31.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
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2026-01-09 01:32:31.598 [DEBUG] clck_gen.py:113 IND CLOCK 306
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2026-01-09 01:32:32.068 [DEBUG] clck_gen.py:113 IND CLOCK 408
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2026-01-09 01:32:32.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.165 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.169 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:32:32.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.170 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:32:32.170 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:32:32.172 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:32:32.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.195 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.275 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.346 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.463 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.474 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.538 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.539 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 01:32:32.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.569 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
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2026-01-09 01:32:32.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
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2026-01-09 01:32:32.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
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2026-01-09 01:32:32.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
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2026-01-09 01:32:32.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
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2026-01-09 01:32:32.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
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2026-01-09 01:32:32.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
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2026-01-09 01:32:32.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.954 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.954 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.963 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.963 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.983 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.983 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:32.997 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:32:32.997 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:32:32.997 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:32:32.997 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:32:33.002 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:32:33.002 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:32:33.003 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:32:33.003 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:32:33.003 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:32:33.003 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:32:33.003 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 01:32:33.003 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=612 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:32:33.003 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=612 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:32:33.004 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=612 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:32:33.004 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=612 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:32:33.004 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=612 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:32:33.004 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=612 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:32:33.004 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=612 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:32:33.004 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=612 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:32:38.003 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:32:38.003 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:32:38.003 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:32:38.003 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:32:38.003 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:32:38.003 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:32:38.011 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:32:38.013 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:32:38.013 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:32:38.013 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:32:38.013 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 01:32:38.017 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 01:32:38.017 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 01:32:38.017 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:32:38.018 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:32:38.018 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:32:38.018 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 01:32:38.019 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:32:38.019 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 01:32:38.020 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 01:32:38.021 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 01:32:38.021 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:32:38.021 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:32:38.021 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:32:38.021 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 01:32:38.022 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:32:38.022 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 01:32:38.023 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 01:32:38.023 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 01:32:38.023 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:32:38.023 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:32:38.024 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:32:38.024 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 01:32:38.024 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:32:38.024 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 01:32:38.026 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 01:32:38.026 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 01:32:38.026 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 01:32:38.026 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 01:32:38.027 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 01:32:38.027 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 01:32:38.027 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 01:32:38.027 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 01:32:38.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 01:32:38.027 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:32:38.027 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:32:38.027 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:32:38.027 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 01:32:38.027 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:32:38.027 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:32:38.027 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:32:38.027 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 01:32:38.027 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 01:32:38.027 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 01:32:38.027 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 01:32:38.027 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:32:38.027 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:32:38.028 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:32:38.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 01:32:38.028 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:32:38.028 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:32:38.028 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:32:38.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:32:38.028 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:32:38.028 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:32:38.028 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:32:38.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:32:38.028 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:32:38.028 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:32:38.028 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:32:38.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:32:38.028 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:32:38.028 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:32:38.028 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:32:38.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:32:38.028 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:32:38.028 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:32:38.028 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:32:38.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:32:38.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:32:38.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:32:38.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:32:38.032 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 01:32:38.512 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 01:32:38.551 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:32:38.553 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:32:38.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:38.554 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 01:32:38.574 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:32:38.574 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:32:38.575 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:32:38.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:38.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:38.609 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:32:38.609 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:32:38.609 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:32:38.609 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:32:38.618 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:32:38.618 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:32:38.618 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:32:38.618 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:32:38.618 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:32:38.618 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:32:38.618 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 01:32:38.619 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=125 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:32:38.619 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=125 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:32:43.611 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:32:43.611 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:32:43.613 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:32:43.613 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:32:43.613 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:32:43.614 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:32:43.627 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:32:43.628 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:32:43.628 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:32:43.628 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:32:43.628 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 01:32:43.630 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 01:32:43.630 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 01:32:43.631 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:32:43.631 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:32:43.631 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:32:43.631 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 01:32:43.631 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:32:43.631 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 01:32:43.633 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 01:32:43.633 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 01:32:43.633 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:32:43.633 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:32:43.633 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:32:43.633 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 01:32:43.633 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:32:43.633 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 01:32:43.635 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 01:32:43.635 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 01:32:43.635 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:32:43.635 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:32:43.635 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:32:43.635 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 01:32:43.636 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:32:43.636 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 01:32:43.638 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 01:32:43.638 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 01:32:43.638 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 01:32:43.638 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 01:32:43.638 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 01:32:43.638 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 01:32:43.638 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 01:32:43.638 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 01:32:43.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 01:32:43.639 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:32:43.639 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:32:43.639 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:32:43.639 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 01:32:43.639 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:32:43.639 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:32:43.639 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:32:43.639 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 01:32:43.639 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 01:32:43.639 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 01:32:43.639 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 01:32:43.639 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:32:43.639 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:32:43.639 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:32:43.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 01:32:43.639 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:32:43.639 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:32:43.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:32:43.639 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:32:43.639 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:32:43.639 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:32:43.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:32:43.640 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:32:43.640 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:32:43.640 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:32:43.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:32:43.640 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:32:43.640 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:32:43.640 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:32:43.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:32:43.640 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:32:43.640 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:32:43.640 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:32:43.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:32:43.640 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:32:43.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:32:43.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:32:43.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:32:43.644 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 01:32:44.126 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 01:32:44.168 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:32:44.171 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:32:44.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:44.173 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 01:32:44.200 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:32:44.200 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:32:44.201 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:32:44.220 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:32:44.220 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:32:44.220 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:32:44.220 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:32:44.223 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:32:44.223 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:32:44.223 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:32:44.223 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:32:44.223 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:32:44.223 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 01:32:44.223 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:32:44.223 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=124 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:32:44.223 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=124 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:32:44.223 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=124 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:32:44.223 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=124 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:32:44.223 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=124 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:32:44.223 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=124 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:32:44.223 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=124 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:32:44.223 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=124 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:32:49.224 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:32:49.225 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:32:49.226 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:32:49.228 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:32:49.228 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:32:49.229 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:32:49.241 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:32:49.242 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:32:49.242 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:32:49.243 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:32:49.243 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 01:32:49.245 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 01:32:49.246 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 01:32:49.246 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:32:49.246 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:32:49.246 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:32:49.246 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 01:32:49.247 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:32:49.247 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 01:32:49.248 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 01:32:49.249 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 01:32:49.249 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:32:49.249 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:32:49.249 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:32:49.249 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 01:32:49.249 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:32:49.249 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 01:32:49.253 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 01:32:49.253 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 01:32:49.253 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:32:49.253 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:32:49.253 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:32:49.253 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 01:32:49.254 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:32:49.254 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 01:32:49.258 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 01:32:49.258 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 01:32:49.258 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 01:32:49.258 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 01:32:49.258 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 01:32:49.258 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 01:32:49.258 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 01:32:49.258 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 01:32:49.258 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 01:32:49.258 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:32:49.259 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:32:49.259 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:32:49.259 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 01:32:49.259 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:32:49.259 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:32:49.259 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:32:49.259 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 01:32:49.259 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 01:32:49.259 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 01:32:49.259 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 01:32:49.259 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:32:49.259 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:32:49.259 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:32:49.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 01:32:49.259 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:32:49.259 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:32:49.259 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:32:49.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:32:49.259 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:32:49.260 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:32:49.260 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:32:49.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:32:49.260 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:32:49.260 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:32:49.260 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:32:49.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:32:49.260 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:32:49.260 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:32:49.260 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:32:49.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:32:49.260 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:32:49.260 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:32:49.260 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:32:49.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:32:49.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:32:49.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:32:49.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:32:49.264 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 01:32:49.747 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 01:32:49.790 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:32:49.792 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:32:49.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:49.795 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 01:32:49.819 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:32:49.819 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:32:49.819 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:32:49.844 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:32:49.844 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:32:49.844 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:32:49.852 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:32:49.853 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:32:49.853 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:32:49.861 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:32:49.861 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:32:49.862 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:32:49.869 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:32:49.869 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:32:49.869 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:32:49.877 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:32:49.877 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:32:49.877 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:32:49.885 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:32:49.885 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:32:49.885 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:32:49.893 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:32:49.893 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:32:49.893 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:32:49.901 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:32:49.901 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:32:49.901 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:32:49.908 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:32:49.908 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:32:49.908 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:32:49.917 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:32:49.917 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:32:49.917 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:32:49.925 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:32:49.925 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:32:49.925 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:32:49.933 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:32:49.933 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:32:49.933 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:32:49.937 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:32:49.937 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:32:49.937 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:32:49.937 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:32:49.939 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:32:49.939 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:32:49.939 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:32:49.939 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:32:49.939 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 01:32:49.939 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:32:49.939 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:32:49.939 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=145 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:32:49.939 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=145 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:32:49.939 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=145 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:32:49.939 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=145 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:32:49.939 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=145 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:32:49.939 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=145 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:32:49.939 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=145 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:32:54.942 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:32:54.942 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:32:54.944 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:32:54.944 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:32:54.945 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:32:54.945 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:32:54.953 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:32:54.954 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:32:54.954 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:32:54.954 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:32:54.955 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 01:32:54.957 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 01:32:54.957 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 01:32:54.957 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:32:54.957 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:32:54.958 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:32:54.958 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 01:32:54.958 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:32:54.958 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 01:32:54.959 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 01:32:54.959 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 01:32:54.959 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:32:54.959 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:32:54.959 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:32:54.959 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 01:32:54.960 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:32:54.960 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 01:32:54.961 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 01:32:54.961 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 01:32:54.961 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:32:54.961 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:32:54.961 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:32:54.961 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 01:32:54.961 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:32:54.961 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 01:32:54.964 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 01:32:54.964 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 01:32:54.964 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 01:32:54.964 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 01:32:54.964 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 01:32:54.964 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 01:32:54.964 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 01:32:54.964 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 01:32:54.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 01:32:54.964 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:32:54.964 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:32:54.964 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:32:54.964 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 01:32:54.964 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:32:54.964 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:32:54.964 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:32:54.964 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 01:32:54.964 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 01:32:54.964 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 01:32:54.964 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 01:32:54.964 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:32:54.964 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:32:54.964 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:32:54.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 01:32:54.965 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:32:54.965 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:32:54.965 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:32:54.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:32:54.965 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:32:54.965 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:32:54.965 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:32:54.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:32:54.965 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:32:54.965 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:32:54.965 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:32:54.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:32:54.965 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:32:54.965 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:32:54.965 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:32:54.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:32:54.965 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:32:54.965 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:32:54.965 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:32:54.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:32:54.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:32:54.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:32:54.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:32:54.969 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 01:32:55.453 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 01:32:55.489 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:32:55.492 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:32:55.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:55.495 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 01:32:55.518 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:32:55.518 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:32:55.518 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:32:55.522 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:32:55.523 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:32:55.523 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:32:55.523 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:32:55.523 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:32:55.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:55.555 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:32:55.555 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:32:55.556 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:32:55.556 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:32:55.655 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:55.923 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 01:32:55.966 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:32:55.966 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:32:55.967 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:32:55.969 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:32:56.392 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 01:32:56.865 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 01:32:56.967 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:32:56.968 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:32:56.968 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:32:56.969 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:32:57.344 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 01:32:57.822 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 01:32:57.969 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:32:57.969 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:32:57.969 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:32:57.970 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:32:58.300 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 01:32:58.779 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 01:32:58.970 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:32:58.970 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:32:58.970 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:32:58.970 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:32:59.257 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 01:32:59.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:59.660 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:32:59.660 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:32:59.661 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:32:59.681 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:32:59.681 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:32:59.681 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:32:59.683 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:32:59.683 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:32:59.683 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:32:59.683 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:32:59.683 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:32:59.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:59.735 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 01:32:59.736 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:32:59.737 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:32:59.737 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:32:59.738 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:32:59.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:32:59.971 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:32:59.972 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:32:59.972 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:32:59.972 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:33:00.213 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 01:33:00.692 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 01:33:01.170 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 01:33:01.648 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 01:33:02.126 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 01:33:02.604 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 01:33:03.083 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 01:33:03.562 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 01:33:03.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:33:03.960 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:33:03.960 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:33:03.961 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:33:03.975 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:33:03.975 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:33:03.975 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:33:03.977 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:33:03.977 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:33:03.977 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:33:03.977 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:33:03.977 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:33:04.034 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 01:33:04.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:33:04.040 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:33:04.040 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:33:04.040 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:33:04.040 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:33:04.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:33:04.509 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 01:33:04.988 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 01:33:05.466 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 01:33:05.945 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 01:33:06.423 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 01:33:06.902 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 01:33:07.381 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 01:33:07.859 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-09 01:33:08.338 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-09 01:33:08.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:33:08.474 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:33:08.475 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:33:08.475 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:33:08.496 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:33:08.496 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:33:08.496 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:33:08.498 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:33:08.498 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:33:08.498 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:33:08.498 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:33:08.498 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:33:08.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:33:08.529 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:33:08.529 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:33:08.530 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:33:08.530 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:33:08.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:33:08.816 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-09 01:33:09.294 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-09 01:33:09.773 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-09 01:33:10.252 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-09 01:33:10.730 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-09 01:33:11.209 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-09 01:33:11.687 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-09 01:33:12.166 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-09 01:33:12.645 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-09 01:33:12.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:33:12.799 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:33:12.799 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:33:12.800 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:33:12.818 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:33:12.818 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:33:12.818 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:33:12.819 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:33:12.819 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:33:12.819 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:33:12.819 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:33:12.819 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:33:12.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:33:12.827 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:33:12.828 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:33:12.828 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:33:12.828 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:33:13.123 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-09 01:33:13.463 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:33:13.601 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-09 01:33:14.080 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-09 01:33:14.558 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-09 01:33:15.036 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-09 01:33:15.515 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-09 01:33:15.993 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-01-09 01:33:16.471 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-01-09 01:33:16.949 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-01-09 01:33:17.428 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-01-09 01:33:17.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:33:17.469 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:33:17.470 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:33:17.470 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:33:17.488 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:33:17.488 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:33:17.488 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:33:17.489 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:33:17.490 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:33:17.490 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:33:17.490 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:33:17.490 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:33:17.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:33:17.529 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:33:17.529 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:33:17.529 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:33:17.529 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:33:17.905 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-01-09 01:33:17.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:33:18.384 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-01-09 01:33:18.862 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-01-09 01:33:19.341 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-01-09 01:33:19.820 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-01-09 01:33:20.299 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-01-09 01:33:20.778 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-01-09 01:33:21.256 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-01-09 01:33:21.735 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-01-09 01:33:21.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:33:21.924 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:33:21.925 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:33:21.925 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:33:21.942 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:33:21.942 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:33:21.942 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:33:21.943 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:33:21.943 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:33:21.943 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:33:21.943 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:33:21.943 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:33:21.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:33:21.976 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:33:21.977 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:33:21.977 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:33:21.977 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:33:22.213 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-01-09 01:33:22.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:33:22.692 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-01-09 01:33:23.171 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-01-09 01:33:23.648 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-01-09 01:33:24.127 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-01-09 01:33:24.605 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-01-09 01:33:25.084 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-01-09 01:33:25.563 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-01-09 01:33:26.042 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-01-09 01:33:26.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:33:26.374 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:33:26.374 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:33:26.374 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:33:26.392 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:33:26.392 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:33:26.393 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:33:26.394 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:33:26.394 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:33:26.394 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:33:26.394 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:33:26.394 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:33:26.417 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:33:26.417 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:33:26.421 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:33:26.421 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:33:26.422 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:33:26.422 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:33:26.520 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-01-09 01:33:26.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:33:26.998 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-01-09 01:33:27.477 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-01-09 01:33:27.956 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-01-09 01:33:28.435 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-01-09 01:33:28.913 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-01-09 01:33:29.392 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-01-09 01:33:29.871 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-01-09 01:33:30.350 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-01-09 01:33:30.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:33:30.825 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:33:30.826 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:33:30.826 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:33:30.829 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-01-09 01:33:30.848 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:33:30.848 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:33:30.848 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:33:30.849 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:33:30.850 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:33:30.850 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:33:30.850 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:33:30.850 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:33:30.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:33:30.880 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:33:30.880 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:33:30.880 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:33:30.880 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:33:31.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:33:31.308 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-01-09 01:33:31.787 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-01-09 01:33:32.265 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-01-09 01:33:32.744 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-01-09 01:33:33.222 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-01-09 01:33:33.701 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-01-09 01:33:34.179 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-01-09 01:33:34.658 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-01-09 01:33:35.137 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-01-09 01:33:35.274 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:33:35.277 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:33:35.277 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:33:35.277 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:33:35.291 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:33:35.291 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:33:35.291 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:33:35.293 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:33:35.293 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:33:35.293 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:33:35.293 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:33:35.293 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:33:35.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:33:35.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:33:35.330 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:33:35.330 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:33:35.331 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:33:35.332 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:33:35.615 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-01-09 01:33:36.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:33:36.093 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-01-09 01:33:36.572 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-01-09 01:33:37.050 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-01-09 01:33:37.528 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-01-09 01:33:38.007 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-01-09 01:33:38.485 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-01-09 01:33:38.964 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-01-09 01:33:39.443 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-01-09 01:33:39.922 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-01-09 01:33:40.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:33:40.096 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:33:40.097 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:33:40.097 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:33:40.116 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:33:40.116 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:33:40.116 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:33:40.117 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:33:40.117 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:33:40.117 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:33:40.117 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:33:40.118 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:33:40.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:33:40.160 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:33:40.160 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:33:40.160 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:33:40.160 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:33:40.400 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-01-09 01:33:40.879 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-01-09 01:33:40.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:33:41.358 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-01-09 01:33:41.837 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-01-09 01:33:42.315 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-01-09 01:33:42.794 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-01-09 01:33:43.273 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-01-09 01:33:43.751 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-01-09 01:33:44.230 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-01-09 01:33:44.709 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-01-09 01:33:44.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:33:44.982 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:33:44.983 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:33:44.983 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:33:45.002 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:33:45.002 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:33:45.003 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:33:45.004 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:33:45.004 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:33:45.004 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:33:45.005 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:33:45.005 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:33:45.039 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:33:45.045 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:33:45.045 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:33:45.046 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:33:45.047 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:33:45.187 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-01-09 01:33:45.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:33:45.666 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-01-09 01:33:46.145 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-01-09 01:33:46.623 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-01-09 01:33:47.102 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-01-09 01:33:47.581 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-01-09 01:33:48.060 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-01-09 01:33:48.537 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-01-09 01:33:49.016 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-01-09 01:33:49.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:33:49.433 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:33:49.433 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:33:49.433 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:33:49.452 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:33:49.452 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:33:49.452 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:33:49.453 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:33:49.453 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:33:49.453 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:33:49.453 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:33:49.453 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:33:49.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:33:49.494 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-01-09 01:33:49.495 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:33:49.495 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:33:49.495 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:33:49.496 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:33:49.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:33:49.963 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-01-09 01:33:50.432 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-01-09 01:33:50.908 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-01-09 01:33:51.386 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-01-09 01:33:51.864 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-01-09 01:33:52.343 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-01-09 01:33:52.821 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-01-09 01:33:53.299 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-01-09 01:33:53.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:33:53.654 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:33:53.654 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:33:53.655 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:33:53.672 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:33:53.672 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:33:53.672 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:33:53.673 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:33:53.673 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:33:53.673 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:33:53.673 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:33:53.673 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:33:53.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:33:53.726 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:33:53.727 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:33:53.727 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:33:53.727 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:33:53.776 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-01-09 01:33:53.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:33:54.255 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-01-09 01:33:54.734 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-01-09 01:33:55.213 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-01-09 01:33:55.691 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-01-09 01:33:56.170 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-01-09 01:33:56.648 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-01-09 01:33:57.127 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-01-09 01:33:57.606 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-01-09 01:33:57.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:33:57.957 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:33:57.957 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:33:57.957 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:33:57.978 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:33:57.978 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:33:57.978 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:33:57.979 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:33:57.979 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:33:57.980 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:33:57.980 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:33:57.980 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:33:58.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:33:58.035 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:33:58.035 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:33:58.035 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:33:58.036 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:33:58.085 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-01-09 01:33:58.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:33:58.563 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-01-09 01:33:59.041 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-01-09 01:33:59.514 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-01-09 01:33:59.984 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-01-09 01:34:00.460 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-01-09 01:34:00.939 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-01-09 01:34:01.417 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-01-09 01:34:01.895 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-01-09 01:34:02.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:34:02.282 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:02.282 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:34:02.282 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:34:02.299 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:34:02.299 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:34:02.299 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:34:02.301 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:02.301 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:34:02.301 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:34:02.301 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:34:02.301 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:34:02.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:34:02.315 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:34:02.315 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:34:02.315 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:02.315 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:02.373 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-01-09 01:34:02.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:34:02.842 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-01-09 01:34:03.311 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-01-09 01:34:03.787 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-01-09 01:34:04.265 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-01-09 01:34:04.744 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-01-09 01:34:05.222 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-01-09 01:34:05.700 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-01-09 01:34:06.178 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-01-09 01:34:06.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:34:06.588 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:06.588 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:34:06.588 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:34:06.604 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:34:06.604 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:34:06.604 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:34:06.606 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:06.606 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:34:06.606 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:34:06.606 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:34:06.606 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:34:06.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:34:06.656 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-01-09 01:34:06.656 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:34:06.656 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:34:06.657 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:06.658 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:07.047 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:34:07.134 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-01-09 01:34:07.613 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-01-09 01:34:08.092 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-01-09 01:34:08.569 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-01-09 01:34:09.048 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-01-09 01:34:09.527 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-01-09 01:34:10.006 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-01-09 01:34:10.485 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-01-09 01:34:10.964 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-01-09 01:34:11.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:34:11.052 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:11.052 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:34:11.052 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:34:11.071 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:34:11.071 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:34:11.071 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:34:11.072 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:11.072 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:34:11.073 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:34:11.073 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:34:11.073 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:34:11.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:34:11.111 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:34:11.111 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:34:11.111 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:11.111 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:11.374 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:34:11.442 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-01-09 01:34:11.921 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-01-09 01:34:12.400 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-01-09 01:34:12.878 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-01-09 01:34:13.357 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-01-09 01:34:13.835 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-01-09 01:34:14.314 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-01-09 01:34:14.793 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-01-09 01:34:15.271 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-01-09 01:34:15.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:34:15.379 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:15.379 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:34:15.379 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:34:15.379 [WARNING] transceiver.py:250 (MS@172.18.122.22:6700) RX TRXD message (fn=17161 tn=6 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:34:15.380 [WARNING] transceiver.py:250 (MS@172.18.122.22:6700) RX TRXD message (fn=17161 tn=7 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:34:15.399 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:34:15.399 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:34:15.399 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:34:15.400 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:15.400 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:34:15.400 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:34:15.400 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:34:15.400 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:34:15.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:34:15.408 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:34:15.408 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:34:15.408 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:15.408 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:15.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:34:15.746 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-01-09 01:34:16.224 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-01-09 01:34:16.703 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-01-09 01:34:17.181 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2026-01-09 01:34:17.660 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2026-01-09 01:34:18.138 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2026-01-09 01:34:18.616 [DEBUG] clck_gen.py:113 IND CLOCK 17850
2026-01-09 01:34:19.095 [DEBUG] clck_gen.py:113 IND CLOCK 17952
2026-01-09 01:34:19.573 [DEBUG] clck_gen.py:113 IND CLOCK 18054
2026-01-09 01:34:19.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:34:19.705 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:19.706 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:34:19.706 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:34:19.716 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:34:19.716 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:34:19.716 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:34:19.717 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:19.717 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:34:19.717 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:34:19.717 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:34:19.717 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:34:19.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:34:19.766 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:34:19.766 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:34:19.766 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:19.767 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:20.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:34:20.051 [DEBUG] clck_gen.py:113 IND CLOCK 18156
2026-01-09 01:34:20.530 [DEBUG] clck_gen.py:113 IND CLOCK 18258
2026-01-09 01:34:21.008 [DEBUG] clck_gen.py:113 IND CLOCK 18360
2026-01-09 01:34:21.486 [DEBUG] clck_gen.py:113 IND CLOCK 18462
2026-01-09 01:34:21.965 [DEBUG] clck_gen.py:113 IND CLOCK 18564
2026-01-09 01:34:22.444 [DEBUG] clck_gen.py:113 IND CLOCK 18666
2026-01-09 01:34:22.922 [DEBUG] clck_gen.py:113 IND CLOCK 18768
2026-01-09 01:34:23.400 [DEBUG] clck_gen.py:113 IND CLOCK 18870
2026-01-09 01:34:23.878 [DEBUG] clck_gen.py:113 IND CLOCK 18972
2026-01-09 01:34:24.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:34:24.025 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:24.025 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:34:24.025 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:34:24.042 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:34:24.042 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:34:24.042 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:34:24.042 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:34:24.045 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:34:24.045 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:34:24.045 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:34:24.045 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:34:24.045 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:34:24.045 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 01:34:24.045 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:34:24.045 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=19010 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:34:24.045 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=19010 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:34:24.045 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=19010 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:34:24.045 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=19010 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:34:24.045 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=19010 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:34:24.045 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=19010 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:34:24.045 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=19010 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:34:29.045 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:34:29.045 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:34:29.047 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:34:29.047 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:34:29.047 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:34:29.048 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:34:29.056 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:34:29.057 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:34:29.057 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:34:29.057 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:34:29.057 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 01:34:29.059 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 01:34:29.059 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 01:34:29.059 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:34:29.060 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:34:29.060 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:34:29.060 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 01:34:29.060 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:34:29.060 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 01:34:29.061 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 01:34:29.061 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 01:34:29.062 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:34:29.062 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:34:29.062 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:34:29.062 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 01:34:29.062 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:34:29.062 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 01:34:29.063 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 01:34:29.063 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 01:34:29.063 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:34:29.063 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:34:29.063 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:34:29.063 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 01:34:29.063 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:34:29.063 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 01:34:29.065 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 01:34:29.065 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 01:34:29.065 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 01:34:29.065 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 01:34:29.065 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 01:34:29.066 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 01:34:29.066 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 01:34:29.066 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 01:34:29.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 01:34:29.066 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:34:29.066 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:34:29.066 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:34:29.066 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 01:34:29.066 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:34:29.066 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:34:29.066 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:34:29.066 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 01:34:29.066 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 01:34:29.066 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 01:34:29.066 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 01:34:29.066 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:34:29.066 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:34:29.066 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:34:29.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 01:34:29.067 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:34:29.067 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:34:29.067 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:34:29.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:34:29.067 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:34:29.067 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:34:29.067 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:34:29.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:34:29.067 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:34:29.067 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:34:29.067 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:34:29.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:34:29.067 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:34:29.067 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:34:29.067 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:34:29.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:34:29.067 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:34:29.067 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:34:29.067 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:34:29.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:34:29.067 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:34:29.067 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:34:29.067 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:34:29.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:34:29.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:34:29.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:34:29.068 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:34:29.068 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:34:29.068 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:34:29.068 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 01:34:34.072 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:34:34.072 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:34:34.074 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:34:34.076 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:34:34.081 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:34:34.081 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:34:34.090 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:34:34.091 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:34:34.091 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:34:34.092 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:34:34.092 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 01:34:34.094 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 01:34:34.094 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 01:34:34.094 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:34:34.094 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:34:34.095 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:34:34.095 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 01:34:34.095 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:34:34.095 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 01:34:34.096 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 01:34:34.096 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 01:34:34.096 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:34:34.096 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:34:34.097 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:34:34.097 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 01:34:34.097 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:34:34.097 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 01:34:34.098 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 01:34:34.098 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 01:34:34.098 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:34:34.098 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:34:34.098 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:34:34.098 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 01:34:34.098 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:34:34.098 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 01:34:34.100 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 01:34:34.100 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 01:34:34.100 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 01:34:34.100 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 01:34:34.101 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 01:34:34.101 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 01:34:34.101 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 01:34:34.101 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 01:34:34.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 01:34:34.101 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:34:34.101 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:34:34.101 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:34:34.101 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 01:34:34.101 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:34:34.101 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:34:34.101 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:34:34.101 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 01:34:34.101 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 01:34:34.101 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 01:34:34.101 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 01:34:34.101 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:34:34.101 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:34:34.101 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:34:34.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 01:34:34.102 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:34:34.102 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:34:34.102 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:34:34.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:34:34.102 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:34:34.102 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:34:34.102 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:34:34.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:34:34.102 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:34:34.102 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:34:34.102 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:34:34.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:34:34.102 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:34:34.102 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:34:34.102 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:34:34.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:34:34.102 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:34:34.102 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:34:34.102 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:34:34.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:34:34.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:34:34.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:34:34.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:34:34.106 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 01:34:34.588 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 01:34:34.626 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:34:34.628 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:34:34.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:34:34.631 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 01:34:34.656 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:34:34.656 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:34:34.656 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:34:34.663 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:34.663 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:34:34.663 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:34:34.663 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:34:34.663 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:34:34.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:34:34.689 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:34:34.689 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:34:34.689 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:34.689 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:34.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:34:34.794 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:34.795 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:34:34.795 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:34:34.816 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:34:34.816 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:34:34.816 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:34:34.819 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:34.819 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:34:34.819 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:34:34.819 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:34:34.819 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:34:34.862 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:34:34.869 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:34:34.869 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:34:34.870 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:34.870 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:35.062 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 01:34:35.104 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:34:35.104 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:34:35.105 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:34:35.107 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:34:35.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:34:35.284 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:35.284 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:34:35.284 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:34:35.293 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:34:35.293 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:34:35.293 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:34:35.295 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:35.295 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:34:35.295 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:34:35.295 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:34:35.295 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:34:35.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:34:35.347 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:34:35.348 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:34:35.348 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:35.348 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:35.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:34:35.500 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:35.501 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:34:35.501 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:34:35.518 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:34:35.518 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:34:35.519 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:34:35.521 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:35.521 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:34:35.521 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:34:35.521 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:34:35.521 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:34:35.539 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 01:34:35.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:34:35.572 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:34:35.572 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:34:35.573 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:35.573 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:35.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:34:35.998 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:35.998 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:34:35.998 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:34:36.007 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:34:36.007 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:34:36.007 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:34:36.008 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 01:34:36.009 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:36.009 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:34:36.009 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:34:36.009 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:34:36.009 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:34:36.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:34:36.057 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:34:36.057 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:34:36.057 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:36.058 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:36.104 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:34:36.105 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:34:36.106 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:34:36.108 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:34:36.477 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 01:34:36.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:34:36.515 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:36.515 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:34:36.515 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:34:36.533 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:34:36.533 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:34:36.533 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:34:36.535 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:36.535 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:34:36.535 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:34:36.535 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:34:36.535 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:34:36.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:34:36.587 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:34:36.587 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:34:36.588 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:36.588 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:36.949 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 01:34:37.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:34:37.055 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:37.055 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:34:37.055 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:34:37.073 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:34:37.073 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:34:37.073 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:34:37.075 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:37.075 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:34:37.075 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:34:37.075 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:34:37.075 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:34:37.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:34:37.106 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:34:37.106 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:34:37.107 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:34:37.108 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:34:37.111 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:34:37.111 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:34:37.111 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:37.111 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:37.419 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 01:34:37.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:34:37.590 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:37.590 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:34:37.590 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:34:37.599 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:34:37.599 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:34:37.599 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:34:37.601 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:37.601 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:34:37.601 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:34:37.601 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:34:37.601 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:34:37.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:34:37.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:34:37.659 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:34:37.659 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:34:37.659 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:37.659 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:37.896 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 01:34:38.107 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:34:38.107 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:34:38.108 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:34:38.109 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:34:38.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:34:38.142 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:38.143 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:34:38.143 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:34:38.143 [WARNING] transceiver.py:250 (MS@172.18.122.22:6700) RX TRXD message (fn=871 tn=6 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:34:38.159 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:34:38.159 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:34:38.159 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:34:38.161 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:38.161 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:34:38.161 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:34:38.161 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:34:38.161 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:34:38.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:34:38.212 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:34:38.212 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:34:38.212 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:38.213 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:38.371 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 01:34:38.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:34:38.681 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:38.681 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:34:38.681 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:34:38.698 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:34:38.698 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:34:38.699 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:34:38.700 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:38.700 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:34:38.700 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:34:38.700 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:34:38.700 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:34:38.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:34:38.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:34:38.748 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:34:38.749 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:34:38.749 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:38.749 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:38.843 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 01:34:39.108 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:34:39.108 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:34:39.108 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:34:39.111 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:34:39.321 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 01:34:39.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:34:39.596 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:39.596 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:34:39.596 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:34:39.609 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:34:39.609 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:34:39.609 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:34:39.611 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:39.611 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:34:39.611 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:34:39.611 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:34:39.611 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:34:39.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:34:39.664 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:34:39.664 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:34:39.664 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:39.664 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:39.796 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 01:34:40.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:34:40.075 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:40.076 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:34:40.076 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:34:40.094 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:34:40.094 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:34:40.094 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:34:40.096 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:40.096 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:34:40.096 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:34:40.096 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:34:40.096 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:34:40.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:34:40.124 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:34:40.125 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:34:40.125 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:40.125 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:40.265 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 01:34:40.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:34:40.616 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:40.617 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:34:40.617 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:34:40.635 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:34:40.635 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:34:40.635 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:34:40.637 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:40.637 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:34:40.637 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:34:40.637 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:34:40.637 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:34:40.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:34:40.690 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:34:40.690 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:34:40.690 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:40.690 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:40.735 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 01:34:40.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:34:40.894 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:40.894 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:34:40.894 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:34:40.914 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:34:40.914 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:34:40.915 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:34:40.917 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:40.917 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:34:40.917 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:34:40.917 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:34:40.917 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:34:40.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:34:40.975 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:34:40.976 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:34:40.976 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:40.977 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:41.210 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 01:34:41.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:34:41.387 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:41.388 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:34:41.388 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:34:41.404 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:34:41.404 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:34:41.404 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:34:41.406 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:41.406 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:34:41.406 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:34:41.406 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:34:41.406 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:34:41.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:34:41.455 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:34:41.456 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:34:41.456 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:41.457 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:41.688 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 01:34:41.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:34:41.884 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:41.885 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:34:41.885 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:34:41.902 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:34:41.902 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:34:41.902 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:34:41.904 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:41.904 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:34:41.904 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:34:41.904 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:34:41.904 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:34:41.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:34:41.952 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:34:41.952 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:34:41.952 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:41.953 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:42.161 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 01:34:42.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:34:42.374 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:42.375 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:34:42.375 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:34:42.395 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:34:42.395 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:34:42.395 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:34:42.397 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:42.397 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:34:42.397 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:34:42.397 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:34:42.397 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:34:42.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:34:42.448 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:34:42.448 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:34:42.449 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:42.449 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:42.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:34:42.554 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:42.554 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:34:42.554 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:34:42.572 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:34:42.572 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:34:42.572 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:34:42.573 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:42.573 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:34:42.573 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:34:42.574 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:34:42.574 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:34:42.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:34:42.620 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:34:42.621 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:34:42.621 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:42.621 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:42.631 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 01:34:43.040 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:34:43.043 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:43.043 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:34:43.043 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:34:43.063 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:34:43.063 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:34:43.063 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:34:43.065 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:43.065 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:34:43.065 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:34:43.066 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:34:43.066 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:34:43.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:34:43.109 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 01:34:43.113 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:34:43.113 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:34:43.113 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:43.114 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:43.538 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:34:43.541 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:43.541 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:34:43.542 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:34:43.558 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:34:43.558 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:34:43.558 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:34:43.560 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:43.560 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:34:43.560 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:34:43.560 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:34:43.560 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:34:43.587 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 01:34:43.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:34:43.611 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:34:43.612 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:34:43.612 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:43.612 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:44.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:34:44.037 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:44.038 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:34:44.038 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:34:44.050 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:34:44.050 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:34:44.050 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:34:44.051 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:34:44.056 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:34:44.056 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:34:44.056 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:34:44.056 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:34:44.056 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:34:44.056 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:34:44.056 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 01:34:44.057 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2143 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:34:44.057 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2143 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:34:44.057 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2143 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:34:44.057 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2143 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:34:44.057 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2143 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:34:44.058 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2143 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:34:44.058 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2143 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:34:44.058 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2143 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:34:49.056 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:34:49.056 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:34:49.056 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:34:49.056 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:34:49.056 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:34:49.056 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:34:49.064 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:34:49.064 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:34:49.064 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:34:49.064 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:34:49.064 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 01:34:49.068 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 01:34:49.068 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 01:34:49.069 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:34:49.069 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:34:49.069 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:34:49.069 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 01:34:49.069 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:34:49.069 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 01:34:49.072 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 01:34:49.073 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 01:34:49.073 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:34:49.073 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:34:49.073 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:34:49.073 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 01:34:49.073 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:34:49.073 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 01:34:49.076 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 01:34:49.076 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 01:34:49.076 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:34:49.076 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:34:49.076 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:34:49.076 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 01:34:49.077 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:34:49.077 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 01:34:49.080 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 01:34:49.080 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 01:34:49.080 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 01:34:49.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 01:34:49.080 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 01:34:49.081 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 01:34:49.081 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 01:34:49.081 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 01:34:49.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 01:34:49.081 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:34:49.081 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:34:49.081 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:34:49.081 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 01:34:49.081 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:34:49.081 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:34:49.081 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:34:49.081 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 01:34:49.081 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 01:34:49.081 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 01:34:49.082 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 01:34:49.082 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:34:49.082 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:34:49.082 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:34:49.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 01:34:49.082 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:34:49.082 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:34:49.082 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:34:49.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:34:49.082 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:34:49.082 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:34:49.082 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:34:49.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:34:49.082 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:34:49.082 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:34:49.082 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:34:49.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:34:49.083 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:34:49.083 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:34:49.083 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:34:49.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:34:49.083 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:34:49.083 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:34:49.083 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:34:49.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:34:49.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:34:49.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:34:49.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:34:49.086 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 01:34:49.568 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 01:34:49.607 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:34:49.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:34:49.609 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:34:49.611 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 01:34:49.637 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:34:49.637 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:34:49.637 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:34:49.645 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:49.645 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:34:49.645 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:34:49.645 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:34:49.645 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:34:49.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:34:49.669 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:34:49.669 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:34:49.670 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:49.670 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:50.046 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 01:34:50.084 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:34:50.085 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:34:50.085 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:34:50.086 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:34:50.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:34:50.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:34:50.523 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 01:34:50.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:34:50.727 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:50.728 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:34:50.728 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:34:50.738 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:34:50.738 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:34:50.738 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:34:50.739 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:50.739 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:34:50.739 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:34:50.739 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:34:50.739 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:34:50.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:34:50.792 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:34:50.792 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:34:50.793 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:50.793 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:51.001 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 01:34:51.085 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:34:51.086 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:34:51.086 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:34:51.088 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:34:51.479 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 01:34:51.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:34:51.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:34:51.957 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 01:34:52.086 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:34:52.087 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:34:52.087 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:34:52.088 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:34:52.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:34:52.181 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:52.182 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:34:52.182 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:34:52.199 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:34:52.199 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:34:52.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:34:52.201 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:52.201 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:34:52.201 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:34:52.201 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:34:52.201 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:34:52.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:34:52.247 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:34:52.248 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:34:52.248 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:52.249 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:52.435 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 01:34:52.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:34:52.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:34:52.913 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 01:34:53.087 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:34:53.088 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:34:53.088 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:34:53.089 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:34:53.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:34:53.350 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:53.350 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:34:53.351 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:34:53.365 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:34:53.365 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:34:53.365 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:34:53.367 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:53.367 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:34:53.367 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:34:53.367 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:34:53.367 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:34:53.390 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 01:34:53.414 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:34:53.416 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:34:53.416 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:34:53.416 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:53.416 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:53.868 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 01:34:54.089 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:34:54.089 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:34:54.089 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:34:54.089 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:34:54.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:34:54.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:34:54.345 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 01:34:54.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:34:54.803 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:54.803 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:34:54.804 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:34:54.813 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:34:54.813 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:34:54.813 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:34:54.815 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:54.815 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:34:54.815 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:34:54.815 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:34:54.815 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:34:54.823 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 01:34:54.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:34:54.875 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:34:54.875 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:34:54.876 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:54.876 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:55.301 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 01:34:55.779 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 01:34:55.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:34:55.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:34:56.257 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 01:34:56.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:34:56.388 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:56.388 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:34:56.388 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:34:56.407 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:34:56.407 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:34:56.408 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:34:56.409 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:56.409 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:34:56.409 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:34:56.409 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:34:56.409 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:34:56.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:34:56.460 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:34:56.461 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:34:56.461 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:56.462 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:56.735 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 01:34:57.214 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 01:34:57.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:34:57.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:34:57.693 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 01:34:57.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:34:57.913 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:57.914 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:34:57.914 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:34:57.933 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:34:57.933 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:34:57.933 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:34:57.935 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:57.935 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:34:57.935 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:34:57.935 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:34:57.935 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:34:57.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:34:57.988 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:34:57.988 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:34:57.989 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:57.989 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:58.171 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 01:34:58.650 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 01:34:58.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:34:58.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:34:59.128 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 01:34:59.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:34:59.436 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:59.436 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:34:59.436 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:34:59.452 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:34:59.452 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:34:59.452 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:34:59.454 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:59.454 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:34:59.454 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:34:59.454 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:34:59.454 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:34:59.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:34:59.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:34:59.509 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:34:59.509 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:34:59.509 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:59.509 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:34:59.605 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 01:35:00.084 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 01:35:00.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:35:00.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:35:00.562 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 01:35:00.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:35:00.956 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:35:00.956 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:35:00.956 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:35:00.974 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:35:00.974 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:35:00.975 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:35:00.977 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:35:00.977 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:35:00.977 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:35:00.977 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:35:00.977 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:35:01.019 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:35:01.023 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:35:01.024 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:35:01.025 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:35:01.025 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:35:01.040 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 01:35:01.519 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 01:35:01.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:35:01.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:35:01.997 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-09 01:35:02.476 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-09 01:35:02.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:35:02.480 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:35:02.480 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:35:02.480 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:35:02.501 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:35:02.501 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:35:02.501 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:35:02.504 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:35:02.504 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:35:02.504 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:35:02.504 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:35:02.504 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:35:02.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:35:02.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:35:02.556 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:35:02.556 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:35:02.557 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:35:02.557 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:35:02.955 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-09 01:35:03.433 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-09 01:35:03.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:35:03.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:35:03.908 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-09 01:35:04.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:35:04.363 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:35:04.363 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:35:04.363 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:35:04.377 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-09 01:35:04.379 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:35:04.379 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:35:04.379 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:35:04.381 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:35:04.381 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:35:04.381 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:35:04.381 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:35:04.381 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:35:04.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:35:04.427 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:35:04.428 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:35:04.428 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:35:04.428 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:35:04.847 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-09 01:35:05.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:35:05.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:35:05.326 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-09 01:35:05.805 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-09 01:35:05.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:35:05.820 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:35:05.821 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:35:05.821 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:35:05.839 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:35:05.839 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:35:05.839 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:35:05.841 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:35:05.841 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:35:05.841 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:35:05.841 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:35:05.841 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:35:05.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:35:05.892 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:35:05.892 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:35:05.892 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:35:05.892 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:35:06.282 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-09 01:35:06.761 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-09 01:35:06.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:35:06.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:35:07.239 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-09 01:35:07.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:35:07.344 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:35:07.344 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:35:07.345 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:35:07.363 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:35:07.363 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:35:07.363 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:35:07.365 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:35:07.365 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:35:07.365 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:35:07.365 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:35:07.365 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:35:07.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:35:07.416 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:35:07.416 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:35:07.416 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:35:07.417 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:35:07.714 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-09 01:35:08.193 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-09 01:35:08.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:35:08.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:35:08.679 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-09 01:35:08.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:35:08.839 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:35:08.840 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:35:08.840 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:35:08.859 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:35:08.859 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:35:08.860 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:35:08.862 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:35:08.862 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:35:08.862 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:35:08.863 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:35:08.863 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:35:08.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:35:08.922 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:35:08.923 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:35:08.923 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:35:08.923 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:35:09.157 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-09 01:35:09.636 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-09 01:35:09.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:35:09.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:35:10.114 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-01-09 01:35:10.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:35:10.292 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:35:10.292 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:35:10.293 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:35:10.309 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:35:10.309 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:35:10.309 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:35:10.311 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:35:10.311 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:35:10.311 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:35:10.311 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:35:10.311 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:35:10.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:35:10.363 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:35:10.364 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:35:10.365 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:35:10.365 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:35:10.593 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-01-09 01:35:11.071 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-01-09 01:35:11.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:35:11.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:35:11.550 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-01-09 01:35:11.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:35:11.747 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:35:11.748 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:35:11.748 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:35:11.757 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:35:11.757 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:35:11.757 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:35:11.759 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:35:11.759 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:35:11.760 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:35:11.760 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:35:11.760 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:35:11.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:35:11.812 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:35:11.813 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:35:11.813 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:35:11.813 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:35:12.027 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-01-09 01:35:12.505 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-01-09 01:35:12.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:35:12.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:35:12.984 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-01-09 01:35:13.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:35:13.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:35:13.200 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:35:13.200 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:35:13.216 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:35:13.216 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:35:13.216 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:35:13.218 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:35:13.218 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:35:13.218 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:35:13.218 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:35:13.218 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:35:13.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:35:13.272 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:35:13.272 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:35:13.273 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:35:13.273 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:35:13.463 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-01-09 01:35:13.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:35:13.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:35:13.941 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-01-09 01:35:14.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:35:14.337 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:35:14.337 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:35:14.337 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:35:14.347 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:35:14.347 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:35:14.347 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:35:14.348 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:35:14.349 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:35:14.349 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:35:14.349 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:35:14.349 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:35:14.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:35:14.400 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:35:14.400 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:35:14.400 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:35:14.401 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:35:14.418 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-01-09 01:35:14.897 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-01-09 01:35:15.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:35:15.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:35:15.376 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-01-09 01:35:15.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:35:15.789 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:35:15.790 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:35:15.791 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:35:15.808 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:35:15.808 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:35:15.809 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:35:15.811 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:35:15.811 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:35:15.811 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:35:15.811 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:35:15.811 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:35:15.853 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-01-09 01:35:15.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:35:15.863 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:35:15.863 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:35:15.864 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:35:15.864 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:35:16.322 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-01-09 01:35:16.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:35:16.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:35:16.791 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-01-09 01:35:17.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:35:17.221 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:35:17.222 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:35:17.222 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:35:17.240 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:35:17.240 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:35:17.240 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:35:17.242 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:35:17.242 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:35:17.242 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:35:17.243 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:35:17.243 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:35:17.267 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-01-09 01:35:17.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:35:17.296 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:35:17.296 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:35:17.296 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:35:17.297 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:35:17.745 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-01-09 01:35:18.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:35:18.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:35:18.223 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-01-09 01:35:18.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:35:18.674 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:35:18.674 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:35:18.674 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:35:18.687 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:35:18.688 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:35:18.688 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:35:18.688 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:35:18.689 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:35:18.689 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:35:18.689 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:35:18.689 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:35:18.689 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:35:18.689 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:35:18.689 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 01:35:18.689 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=6325 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:35:18.689 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=6325 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:35:18.689 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=6325 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:35:23.691 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:35:23.692 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:35:23.694 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:35:23.695 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:35:23.695 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:35:23.695 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:35:23.703 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:35:23.704 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:35:23.704 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:35:23.704 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:35:23.704 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 01:35:23.706 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 01:35:23.707 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 01:35:23.707 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:35:23.707 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:35:23.707 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:35:23.708 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 01:35:23.708 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:35:23.708 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 01:35:23.709 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 01:35:23.709 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 01:35:23.709 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:35:23.710 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:35:23.710 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:35:23.710 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 01:35:23.710 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:35:23.710 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 01:35:23.711 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 01:35:23.711 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 01:35:23.712 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:35:23.712 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:35:23.712 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:35:23.712 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 01:35:23.712 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:35:23.712 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 01:35:23.714 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 01:35:23.714 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 01:35:23.714 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 01:35:23.714 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 01:35:23.714 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 01:35:23.714 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 01:35:23.714 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 01:35:23.714 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 01:35:23.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 01:35:23.715 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:35:23.715 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:35:23.715 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:35:23.715 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 01:35:23.715 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:35:23.715 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:35:23.715 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:35:23.715 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 01:35:23.715 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 01:35:23.715 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 01:35:23.715 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 01:35:23.715 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:35:23.715 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:35:23.715 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:35:23.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 01:35:23.715 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:35:23.715 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:35:23.715 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:35:23.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:35:23.715 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:35:23.716 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:35:23.716 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:35:23.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:35:23.716 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:35:23.716 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:35:23.716 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:35:23.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:35:23.716 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:35:23.716 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:35:23.716 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:35:23.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:35:23.716 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:35:23.716 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:35:23.716 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:35:23.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:35:23.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:35:23.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:35:23.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:35:23.720 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 01:35:24.203 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 01:35:24.235 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:35:24.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:35:24.238 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:35:24.240 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 01:35:24.250 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:35:24.250 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:35:24.250 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:35:24.255 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:35:24.255 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:35:24.256 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:35:24.256 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:35:24.256 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:35:24.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:35:24.304 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:35:24.304 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:35:24.305 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:35:24.306 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:35:24.681 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 01:35:24.717 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:35:24.717 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:35:24.718 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:35:24.721 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:35:25.159 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 01:35:25.637 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 01:35:25.719 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:35:25.719 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:35:25.719 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:35:25.721 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:35:26.116 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 01:35:26.594 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 01:35:26.720 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:35:26.720 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:35:26.720 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:35:26.723 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:35:27.071 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 01:35:27.550 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 01:35:27.721 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:35:27.721 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:35:27.721 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:35:27.724 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:35:28.028 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 01:35:28.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:35:28.233 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:35:28.233 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:35:28.233 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:35:28.250 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:35:28.250 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:35:28.251 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:35:28.253 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:35:28.253 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:35:28.253 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:35:28.253 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:35:28.253 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:35:28.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:35:28.300 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:35:28.300 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:35:28.300 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:35:28.300 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:35:28.506 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 01:35:28.722 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:35:28.722 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:35:28.722 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:35:28.726 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:35:28.984 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 01:35:29.462 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 01:35:29.941 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 01:35:30.419 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 01:35:30.897 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 01:35:31.375 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 01:35:31.853 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 01:35:32.331 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 01:35:32.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:35:32.554 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:35:32.555 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:35:32.555 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:35:32.572 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:35:32.572 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:35:32.572 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:35:32.574 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:35:32.574 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:35:32.574 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:35:32.574 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:35:32.574 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:35:32.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:35:32.624 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:35:32.624 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:35:32.624 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:35:32.625 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:35:32.808 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 01:35:33.286 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 01:35:33.768 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 01:35:34.245 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 01:35:34.723 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 01:35:35.201 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 01:35:35.680 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 01:35:36.158 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 01:35:36.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:35:36.599 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:35:36.600 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:35:36.600 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:35:36.618 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:35:36.618 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:35:36.618 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:35:36.620 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:35:36.621 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:35:36.621 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:35:36.621 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:35:36.621 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:35:36.636 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-09 01:35:36.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:35:36.668 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:35:36.668 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:35:36.669 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:35:36.669 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:35:37.114 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-09 01:35:37.593 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-09 01:35:38.071 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-09 01:35:38.548 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-09 01:35:39.027 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-09 01:35:39.505 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-09 01:35:39.983 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-09 01:35:40.462 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-09 01:35:40.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:35:40.920 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:35:40.921 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:35:40.921 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:35:40.939 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:35:40.939 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:35:40.939 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:35:40.940 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-09 01:35:40.942 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:35:40.942 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:35:40.942 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:35:40.943 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:35:40.943 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:35:40.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:35:40.992 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:35:40.992 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:35:40.993 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:35:40.993 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:35:41.418 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-09 01:35:41.896 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-09 01:35:42.374 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-09 01:35:42.853 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-09 01:35:43.331 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-09 01:35:43.810 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-09 01:35:44.288 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-09 01:35:44.766 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-01-09 01:35:45.245 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-01-09 01:35:45.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:35:45.652 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:35:45.653 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:35:45.653 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:35:45.669 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:35:45.669 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:35:45.669 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:35:45.671 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:35:45.671 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:35:45.671 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:35:45.671 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:35:45.671 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:35:45.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:35:45.721 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:35:45.722 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:35:45.722 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:35:45.722 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:35:45.723 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-01-09 01:35:46.201 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-01-09 01:35:46.680 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-01-09 01:35:47.158 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-01-09 01:35:47.637 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-01-09 01:35:48.115 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-01-09 01:35:48.593 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-01-09 01:35:49.072 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-01-09 01:35:49.550 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-01-09 01:35:50.029 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-01-09 01:35:50.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:35:50.110 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:35:50.110 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:35:50.110 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:35:50.127 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:35:50.128 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:35:50.128 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:35:50.130 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:35:50.130 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:35:50.130 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:35:50.130 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:35:50.130 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:35:50.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:35:50.183 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:35:50.184 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:35:50.184 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:35:50.184 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:35:50.506 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-01-09 01:35:50.984 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-01-09 01:35:51.462 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-01-09 01:35:51.940 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-01-09 01:35:52.419 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-01-09 01:35:52.898 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-01-09 01:35:53.373 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-01-09 01:35:53.851 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-01-09 01:35:54.329 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-01-09 01:35:54.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:35:54.553 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:35:54.554 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:35:54.554 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:35:54.567 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:35:54.567 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:35:54.567 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:35:54.569 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:35:54.569 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:35:54.570 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:35:54.570 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:35:54.570 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:35:54.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:35:54.616 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:35:54.621 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:35:54.621 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:35:54.622 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:35:54.622 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:35:54.807 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-01-09 01:35:55.285 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-01-09 01:35:55.764 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-01-09 01:35:56.242 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-01-09 01:35:56.721 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-01-09 01:35:57.199 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-01-09 01:35:57.678 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-01-09 01:35:58.157 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-01-09 01:35:58.636 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-01-09 01:35:59.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:35:59.004 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:35:59.004 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:35:59.005 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:35:59.023 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:35:59.023 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:35:59.023 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:35:59.025 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:35:59.025 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:35:59.025 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:35:59.025 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:35:59.025 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:35:59.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:35:59.072 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:35:59.072 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:35:59.073 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:35:59.073 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:35:59.111 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-01-09 01:35:59.580 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-01-09 01:36:00.050 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-01-09 01:36:00.527 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-01-09 01:36:01.006 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-01-09 01:36:01.484 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-01-09 01:36:01.963 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-01-09 01:36:02.441 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-01-09 01:36:02.920 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-01-09 01:36:03.398 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-01-09 01:36:03.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:36:03.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:36:03.438 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:36:03.438 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:36:03.447 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:36:03.447 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:36:03.447 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:36:03.449 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:36:03.449 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:36:03.449 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:36:03.449 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:36:03.449 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:36:03.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:36:03.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:36:03.501 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:36:03.501 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:36:03.502 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:36:03.502 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:36:03.876 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-01-09 01:36:04.355 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-01-09 01:36:04.833 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-01-09 01:36:05.311 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-01-09 01:36:05.789 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-01-09 01:36:06.267 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-01-09 01:36:06.746 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-01-09 01:36:07.224 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-01-09 01:36:07.702 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-01-09 01:36:07.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:36:07.765 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:36:07.766 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:36:07.766 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:36:07.780 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:36:07.780 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:36:07.780 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:36:07.782 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:36:07.782 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:36:07.782 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:36:07.782 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:36:07.782 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:36:07.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:36:07.832 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:36:07.832 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:36:07.833 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:36:07.833 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:36:08.180 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-01-09 01:36:08.652 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-01-09 01:36:09.130 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-01-09 01:36:09.608 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-01-09 01:36:10.087 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-01-09 01:36:10.566 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-01-09 01:36:11.045 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-01-09 01:36:11.524 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-01-09 01:36:12.002 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-01-09 01:36:12.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:36:12.147 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:36:12.148 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:36:12.148 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:36:12.169 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:36:12.169 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:36:12.169 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:36:12.172 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:36:12.172 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:36:12.172 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:36:12.172 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:36:12.172 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:36:12.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:36:12.220 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:36:12.220 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:36:12.221 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:36:12.221 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:36:12.476 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-01-09 01:36:12.955 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-01-09 01:36:13.433 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-01-09 01:36:13.912 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-01-09 01:36:14.390 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-01-09 01:36:14.868 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-01-09 01:36:15.346 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-01-09 01:36:15.825 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-01-09 01:36:16.304 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-01-09 01:36:16.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:36:16.593 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:36:16.593 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:36:16.593 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:36:16.611 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:36:16.611 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:36:16.611 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:36:16.613 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:36:16.614 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:36:16.614 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:36:16.614 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:36:16.614 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:36:16.655 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:36:16.660 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:36:16.661 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:36:16.661 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:36:16.662 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:36:16.782 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-01-09 01:36:17.259 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-01-09 01:36:17.738 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-01-09 01:36:18.216 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-01-09 01:36:18.694 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-01-09 01:36:19.172 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-01-09 01:36:19.651 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-01-09 01:36:20.129 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-01-09 01:36:20.607 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-01-09 01:36:20.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:36:20.766 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:36:20.767 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:36:20.767 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:36:20.783 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:36:20.783 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:36:20.783 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:36:20.785 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:36:20.785 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:36:20.785 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:36:20.785 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:36:20.785 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:36:20.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:36:20.835 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:36:20.835 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:36:20.835 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:36:20.835 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:36:21.079 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-01-09 01:36:21.558 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-01-09 01:36:22.037 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-01-09 01:36:22.515 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-01-09 01:36:22.993 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-01-09 01:36:23.470 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-01-09 01:36:23.949 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-01-09 01:36:24.427 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-01-09 01:36:24.906 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-01-09 01:36:25.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:36:25.084 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:36:25.084 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:36:25.085 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:36:25.103 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:36:25.103 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:36:25.103 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:36:25.105 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:36:25.105 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:36:25.106 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:36:25.106 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:36:25.106 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:36:25.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:36:25.176 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:36:25.176 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:36:25.176 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:36:25.176 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:36:25.384 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-01-09 01:36:25.862 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-01-09 01:36:26.340 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-01-09 01:36:26.818 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-01-09 01:36:27.297 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-01-09 01:36:27.775 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-01-09 01:36:28.253 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-01-09 01:36:28.731 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-01-09 01:36:29.209 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-01-09 01:36:29.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:36:29.406 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:36:29.406 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:36:29.407 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:36:29.426 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:36:29.426 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:36:29.426 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:36:29.428 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:36:29.428 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:36:29.428 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:36:29.428 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:36:29.428 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:36:29.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:36:29.476 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:36:29.477 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:36:29.477 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:36:29.477 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:36:29.687 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-01-09 01:36:30.166 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-01-09 01:36:30.644 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-01-09 01:36:31.122 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-01-09 01:36:31.600 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-01-09 01:36:32.078 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-01-09 01:36:32.556 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-01-09 01:36:33.034 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-01-09 01:36:33.512 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-01-09 01:36:33.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:36:33.728 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:36:33.728 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:36:33.728 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:36:33.749 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:36:33.749 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:36:33.749 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:36:33.752 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:36:33.752 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:36:33.752 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:36:33.752 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:36:33.752 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:36:33.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:36:33.800 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:36:33.800 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:36:33.800 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:36:33.800 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:36:33.990 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-01-09 01:36:34.468 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-01-09 01:36:34.947 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-01-09 01:36:35.426 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-01-09 01:36:35.904 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-01-09 01:36:36.382 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-01-09 01:36:36.861 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-01-09 01:36:37.338 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-01-09 01:36:37.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:36:37.734 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:36:37.734 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:36:37.734 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:36:37.753 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:36:37.753 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:36:37.753 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:36:37.756 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:36:37.756 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:36:37.756 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:36:37.756 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:36:37.756 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:36:37.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:36:37.815 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:36:37.816 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:36:37.816 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:36:37.816 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:36:37.816 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-01-09 01:36:38.295 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-01-09 01:36:38.772 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-01-09 01:36:39.249 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-01-09 01:36:39.727 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-01-09 01:36:40.206 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-01-09 01:36:40.684 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-01-09 01:36:41.163 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-01-09 01:36:41.641 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-01-09 01:36:42.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:36:42.055 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:36:42.055 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:36:42.055 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:36:42.075 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:36:42.075 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:36:42.075 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:36:42.078 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:36:42.078 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:36:42.078 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:36:42.078 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:36:42.078 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:36:42.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:36:42.119 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-01-09 01:36:42.124 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:36:42.125 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:36:42.125 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:36:42.125 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:36:42.597 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-01-09 01:36:43.076 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-01-09 01:36:43.554 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-01-09 01:36:44.032 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-01-09 01:36:44.510 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-01-09 01:36:44.989 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-01-09 01:36:45.467 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-01-09 01:36:45.945 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2026-01-09 01:36:46.374 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:36:46.376 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:36:46.377 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:36:46.377 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:36:46.383 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:36:46.383 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:36:46.383 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:36:46.385 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:36:46.385 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:36:46.385 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:36:46.385 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:36:46.385 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:36:46.423 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2026-01-09 01:36:46.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:36:46.435 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:36:46.436 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:36:46.436 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:36:46.436 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:36:46.901 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2026-01-09 01:36:47.379 [DEBUG] clck_gen.py:113 IND CLOCK 17850
2026-01-09 01:36:47.857 [DEBUG] clck_gen.py:113 IND CLOCK 17952
2026-01-09 01:36:48.335 [DEBUG] clck_gen.py:113 IND CLOCK 18054
2026-01-09 01:36:48.813 [DEBUG] clck_gen.py:113 IND CLOCK 18156
2026-01-09 01:36:49.291 [DEBUG] clck_gen.py:113 IND CLOCK 18258
2026-01-09 01:36:49.769 [DEBUG] clck_gen.py:113 IND CLOCK 18360
2026-01-09 01:36:50.247 [DEBUG] clck_gen.py:113 IND CLOCK 18462
2026-01-09 01:36:50.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:36:50.697 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:36:50.698 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:36:50.698 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:36:50.716 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:36:50.716 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:36:50.716 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:36:50.716 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:36:50.717 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:36:50.718 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:36:50.718 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:36:50.718 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:36:50.718 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:36:50.718 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:36:50.718 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 01:36:50.718 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=18566 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:36:55.720 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:36:55.720 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:36:55.721 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:36:55.721 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:36:55.722 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:36:55.723 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:36:55.727 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:36:55.727 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:36:55.727 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:36:55.727 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:36:55.727 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 01:36:55.728 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 01:36:55.728 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 01:36:55.728 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:36:55.728 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:36:55.729 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:36:55.729 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 01:36:55.729 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:36:55.729 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 01:36:55.730 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 01:36:55.730 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 01:36:55.730 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:36:55.730 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:36:55.730 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:36:55.730 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 01:36:55.730 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:36:55.730 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 01:36:55.731 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 01:36:55.731 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 01:36:55.731 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:36:55.731 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:36:55.731 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:36:55.732 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 01:36:55.732 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:36:55.732 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 01:36:55.733 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 01:36:55.733 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 01:36:55.733 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 01:36:55.734 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 01:36:55.734 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 01:36:55.734 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 01:36:55.734 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 01:36:55.734 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 01:36:55.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 01:36:55.734 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:36:55.734 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:36:55.734 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:36:55.734 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 01:36:55.734 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:36:55.734 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:36:55.734 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:36:55.734 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 01:36:55.734 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 01:36:55.734 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 01:36:55.734 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 01:36:55.734 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:36:55.734 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:36:55.734 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:36:55.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 01:36:55.735 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:36:55.735 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:36:55.735 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:36:55.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:36:55.736 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:36:55.736 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:36:55.736 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:36:55.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:36:55.736 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:36:55.736 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:36:55.736 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:36:55.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:36:55.736 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:36:55.736 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:36:55.736 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:36:55.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:36:55.736 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:36:55.736 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:36:55.736 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:36:55.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:36:55.736 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:36:55.736 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:36:55.736 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:36:55.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:36:55.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:36:55.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:36:55.736 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:36:55.736 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:36:55.736 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:36:55.736 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 01:37:00.742 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:37:00.742 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:37:00.744 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:37:00.744 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:37:00.745 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:37:00.746 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:37:00.750 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:37:00.750 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:37:00.750 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:37:00.750 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:37:00.750 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 01:37:00.752 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 01:37:00.752 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 01:37:00.752 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:37:00.752 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:37:00.752 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:37:00.753 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 01:37:00.753 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:37:00.753 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 01:37:00.754 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 01:37:00.754 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 01:37:00.754 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:37:00.754 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:37:00.754 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:37:00.754 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 01:37:00.754 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:37:00.754 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 01:37:00.755 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 01:37:00.755 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 01:37:00.755 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:37:00.755 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:37:00.756 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:37:00.756 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 01:37:00.756 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:37:00.756 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 01:37:00.757 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 01:37:00.757 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 01:37:00.758 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 01:37:00.758 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 01:37:00.758 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 01:37:00.758 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 01:37:00.758 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 01:37:00.758 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 01:37:00.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 01:37:00.758 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:37:00.758 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:37:00.758 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:37:00.758 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 01:37:00.758 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:37:00.758 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:37:00.758 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:37:00.758 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 01:37:00.758 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 01:37:00.758 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 01:37:00.758 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 01:37:00.758 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:37:00.758 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:37:00.758 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:37:00.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 01:37:00.759 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:37:00.759 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:37:00.759 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:37:00.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:37:00.759 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:37:00.759 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:37:00.759 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:37:00.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:37:00.759 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:37:00.759 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:37:00.759 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:37:00.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:37:00.759 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:37:00.759 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:37:00.759 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:37:00.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:37:00.759 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:37:00.759 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:37:00.759 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:37:00.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:37:00.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:37:00.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:37:00.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:37:00.763 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 01:37:01.247 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 01:37:01.282 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:37:01.284 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:37:01.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:37:01.287 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 01:37:01.308 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:37:01.309 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:37:01.309 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:37:01.316 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:37:01.316 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:37:01.317 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:37:01.317 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:37:01.317 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:37:01.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:37:01.348 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:37:01.349 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:37:01.349 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:37:01.350 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:37:01.725 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 01:37:01.761 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:37:01.762 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:37:01.762 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:37:01.762 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:37:02.203 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 01:37:02.682 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 01:37:02.762 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:37:02.762 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:37:02.762 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:37:02.762 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:37:03.160 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 01:37:03.638 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 01:37:03.763 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:37:03.763 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:37:03.764 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:37:03.764 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:37:04.116 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 01:37:04.594 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 01:37:04.764 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:37:04.765 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:37:04.765 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:37:04.765 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:37:05.071 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 01:37:05.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:37:05.408 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:37:05.409 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:37:05.409 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:37:05.428 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:37:05.428 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:37:05.428 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:37:05.430 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:37:05.430 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:37:05.431 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:37:05.431 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:37:05.431 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:37:05.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:37:05.483 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:37:05.484 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:37:05.484 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:37:05.484 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:37:05.550 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 01:37:05.766 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:37:05.767 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:37:05.767 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:37:05.767 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:37:06.028 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 01:37:06.506 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 01:37:06.984 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 01:37:07.462 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 01:37:07.940 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 01:37:08.418 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 01:37:08.896 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 01:37:09.374 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 01:37:09.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:37:09.730 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:37:09.731 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:37:09.731 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:37:09.751 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:37:09.751 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:37:09.752 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:37:09.754 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:37:09.754 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:37:09.754 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:37:09.754 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:37:09.754 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:37:09.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:37:09.811 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:37:09.812 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:37:09.812 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:37:09.812 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:37:09.852 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 01:37:10.330 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 01:37:10.808 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 01:37:11.286 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 01:37:11.765 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 01:37:12.243 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 01:37:12.720 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 01:37:13.199 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 01:37:13.676 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-09 01:37:14.155 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-09 01:37:14.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:37:14.249 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:37:14.249 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:37:14.249 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:37:14.268 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:37:14.268 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:37:14.268 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:37:14.270 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:37:14.270 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:37:14.271 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:37:14.271 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:37:14.271 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:37:14.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:37:14.320 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:37:14.320 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:37:14.320 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:37:14.321 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:37:14.632 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-09 01:37:15.111 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-09 01:37:15.589 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-09 01:37:16.067 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-09 01:37:16.546 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-09 01:37:17.024 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-09 01:37:17.503 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-09 01:37:17.974 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-09 01:37:18.451 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-09 01:37:18.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:37:18.571 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:37:18.571 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:37:18.571 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:37:18.588 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:37:18.588 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:37:18.588 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:37:18.590 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:37:18.591 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:37:18.591 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:37:18.591 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:37:18.591 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:37:18.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:37:18.642 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:37:18.642 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:37:18.642 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:37:18.642 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:37:18.923 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-09 01:37:19.403 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-09 01:37:19.882 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-09 01:37:20.361 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-09 01:37:20.839 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-09 01:37:21.318 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-09 01:37:21.796 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-01-09 01:37:22.275 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-01-09 01:37:22.753 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-01-09 01:37:23.232 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-01-09 01:37:23.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:37:23.244 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:37:23.245 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:37:23.245 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:37:23.263 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:37:23.263 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:37:23.263 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:37:23.265 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:37:23.265 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:37:23.265 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:37:23.265 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:37:23.265 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:37:23.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:37:23.311 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:37:23.312 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:37:23.312 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:37:23.312 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:37:23.709 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-01-09 01:37:24.187 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-01-09 01:37:24.666 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-01-09 01:37:25.144 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-01-09 01:37:25.622 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-01-09 01:37:26.100 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-01-09 01:37:26.579 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-01-09 01:37:27.057 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-01-09 01:37:27.534 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-01-09 01:37:27.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:37:27.700 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:37:27.701 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:37:27.701 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:37:27.719 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:37:27.719 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:37:27.719 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:37:27.721 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:37:27.721 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:37:27.721 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:37:27.721 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:37:27.721 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:37:27.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:37:27.776 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:37:27.776 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:37:27.776 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:37:27.777 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:37:28.012 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-01-09 01:37:28.490 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-01-09 01:37:28.968 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-01-09 01:37:29.443 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-01-09 01:37:29.922 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-01-09 01:37:30.400 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-01-09 01:37:30.878 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-01-09 01:37:31.356 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-01-09 01:37:31.835 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-01-09 01:37:32.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:37:32.147 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:37:32.148 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:37:32.148 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:37:32.169 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:37:32.169 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:37:32.170 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:37:32.172 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:37:32.172 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:37:32.172 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:37:32.172 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:37:32.172 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:37:32.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:37:32.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:37:32.220 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:37:32.221 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:37:32.221 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:37:32.221 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:37:32.313 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-01-09 01:37:32.791 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-01-09 01:37:33.270 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-01-09 01:37:33.748 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-01-09 01:37:34.228 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-01-09 01:37:34.706 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-01-09 01:37:35.185 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-01-09 01:37:35.663 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-01-09 01:37:36.141 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-01-09 01:37:36.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:37:36.592 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:37:36.593 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:37:36.593 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:37:36.610 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:37:36.610 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:37:36.610 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:37:36.613 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:37:36.613 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:37:36.613 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:37:36.613 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:37:36.613 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:37:36.620 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-01-09 01:37:36.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:37:36.674 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:37:36.674 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:37:36.674 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:37:36.675 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:37:37.098 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-01-09 01:37:37.576 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-01-09 01:37:38.054 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-01-09 01:37:38.532 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-01-09 01:37:39.010 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-01-09 01:37:39.488 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-01-09 01:37:39.967 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-01-09 01:37:40.446 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-01-09 01:37:40.924 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-01-09 01:37:41.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:37:41.040 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:37:41.041 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:37:41.041 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:37:41.059 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:37:41.059 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:37:41.059 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:37:41.061 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:37:41.061 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:37:41.061 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:37:41.061 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:37:41.061 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:37:41.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:37:41.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:37:41.116 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:37:41.117 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:37:41.117 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:37:41.117 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:37:41.401 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-01-09 01:37:41.880 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-01-09 01:37:42.358 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-01-09 01:37:42.836 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-01-09 01:37:43.315 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-01-09 01:37:43.793 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-01-09 01:37:44.272 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-01-09 01:37:44.750 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-01-09 01:37:45.229 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-01-09 01:37:45.707 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-01-09 01:37:46.186 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-01-09 01:37:46.347 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:37:46.350 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:37:46.351 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:37:46.351 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:37:46.368 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:37:46.368 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:37:46.368 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:37:46.370 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:37:46.370 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:37:46.370 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:37:46.370 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:37:46.370 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:37:46.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:37:46.427 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:37:46.428 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:37:46.428 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:37:46.428 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:37:46.664 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-01-09 01:37:47.142 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-01-09 01:37:47.620 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-01-09 01:37:48.099 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-01-09 01:37:48.578 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-01-09 01:37:49.056 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-01-09 01:37:49.535 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-01-09 01:37:50.014 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-01-09 01:37:50.492 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-01-09 01:37:50.971 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-01-09 01:37:51.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:37:51.227 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:37:51.227 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:37:51.227 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:37:51.245 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:37:51.245 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:37:51.245 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:37:51.247 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:37:51.247 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:37:51.247 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:37:51.248 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:37:51.248 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:37:51.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:37:51.300 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:37:51.300 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:37:51.300 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:37:51.300 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:37:51.445 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-01-09 01:37:51.914 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-01-09 01:37:52.386 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-01-09 01:37:52.865 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-01-09 01:37:53.343 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-01-09 01:37:53.813 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-01-09 01:37:54.282 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-01-09 01:37:54.756 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-01-09 01:37:55.234 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-01-09 01:37:55.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:37:55.655 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:37:55.655 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:37:55.655 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:37:55.673 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:37:55.673 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:37:55.673 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:37:55.676 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:37:55.676 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:37:55.676 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:37:55.676 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:37:55.676 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:37:55.712 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-01-09 01:37:55.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:37:55.724 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:37:55.724 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:37:55.725 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:37:55.725 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:37:56.191 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-01-09 01:37:56.670 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-01-09 01:37:57.148 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-01-09 01:37:57.626 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-01-09 01:37:58.103 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-01-09 01:37:58.581 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-01-09 01:37:59.059 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-01-09 01:37:59.538 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-01-09 01:37:59.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:37:59.830 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:37:59.831 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:37:59.831 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:37:59.831 [WARNING] transceiver.py:250 (MS@172.18.122.22:6700) RX TRXD message (fn=12611 tn=5 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:37:59.831 [WARNING] transceiver.py:250 (MS@172.18.122.22:6700) RX TRXD message (fn=12611 tn=6 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:37:59.831 [WARNING] transceiver.py:250 (MS@172.18.122.22:6700) RX TRXD message (fn=12611 tn=7 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:37:59.851 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:37:59.851 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:37:59.851 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:37:59.853 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:37:59.853 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:37:59.853 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:37:59.853 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:37:59.853 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:37:59.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:37:59.901 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:37:59.901 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:37:59.901 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:37:59.901 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:38:00.015 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-01-09 01:38:00.493 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-01-09 01:38:00.971 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-01-09 01:38:01.449 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-01-09 01:38:01.922 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-01-09 01:38:02.397 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-01-09 01:38:02.875 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-01-09 01:38:03.354 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-01-09 01:38:03.832 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-01-09 01:38:04.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:38:04.149 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:38:04.150 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:38:04.150 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:38:04.162 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:38:04.162 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:38:04.162 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:38:04.164 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:38:04.164 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:38:04.164 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:38:04.164 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:38:04.164 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:38:04.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:38:04.212 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:38:04.212 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:38:04.213 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:38:04.213 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:38:04.310 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-01-09 01:38:04.788 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-01-09 01:38:05.266 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-01-09 01:38:05.745 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-01-09 01:38:06.222 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-01-09 01:38:06.701 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-01-09 01:38:07.179 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-01-09 01:38:07.657 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-01-09 01:38:08.135 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-01-09 01:38:08.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:38:08.464 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:38:08.464 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:38:08.464 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:38:08.470 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:38:08.470 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:38:08.470 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:38:08.475 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:38:08.475 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:38:08.475 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:38:08.475 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:38:08.475 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:38:08.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:38:08.523 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:38:08.524 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:38:08.524 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:38:08.525 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:38:08.609 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-01-09 01:38:09.078 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-01-09 01:38:09.553 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-01-09 01:38:10.031 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-01-09 01:38:10.509 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-01-09 01:38:10.987 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-01-09 01:38:11.466 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-01-09 01:38:11.944 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-01-09 01:38:12.422 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-01-09 01:38:12.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:38:12.769 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:38:12.770 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:38:12.770 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:38:12.780 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:38:12.780 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:38:12.780 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:38:12.785 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:38:12.785 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:38:12.785 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:38:12.785 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:38:12.785 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:38:12.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:38:12.836 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:38:12.836 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:38:12.836 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:38:12.836 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:38:12.899 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-01-09 01:38:13.377 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-01-09 01:38:13.856 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-01-09 01:38:14.333 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-01-09 01:38:14.802 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-01-09 01:38:15.271 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-01-09 01:38:15.747 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-01-09 01:38:16.225 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-01-09 01:38:16.703 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-01-09 01:38:17.182 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-01-09 01:38:17.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:38:17.252 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:38:17.253 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:38:17.253 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:38:17.271 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:38:17.271 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:38:17.271 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:38:17.273 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:38:17.274 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:38:17.274 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:38:17.274 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:38:17.274 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:38:17.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:38:17.326 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:38:17.326 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:38:17.327 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:38:17.327 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:38:17.660 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-01-09 01:38:18.138 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-01-09 01:38:18.617 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-01-09 01:38:19.094 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-01-09 01:38:19.573 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-01-09 01:38:20.051 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-01-09 01:38:20.529 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-01-09 01:38:21.008 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-01-09 01:38:21.487 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-01-09 01:38:21.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:38:21.553 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:38:21.554 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:38:21.554 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:38:21.573 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:38:21.573 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:38:21.573 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:38:21.575 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:38:21.575 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:38:21.575 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:38:21.575 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:38:21.575 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:38:21.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:38:21.632 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:38:21.632 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:38:21.632 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:38:21.632 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:38:21.963 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-01-09 01:38:22.441 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-01-09 01:38:22.919 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2026-01-09 01:38:23.396 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2026-01-09 01:38:23.874 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2026-01-09 01:38:24.352 [DEBUG] clck_gen.py:113 IND CLOCK 17850
2026-01-09 01:38:24.831 [DEBUG] clck_gen.py:113 IND CLOCK 17952
2026-01-09 01:38:25.309 [DEBUG] clck_gen.py:113 IND CLOCK 18054
2026-01-09 01:38:25.787 [DEBUG] clck_gen.py:113 IND CLOCK 18156
2026-01-09 01:38:25.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:38:25.873 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:38:25.873 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:38:25.873 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:38:25.891 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:38:25.891 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:38:25.891 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:38:25.894 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:38:25.894 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:38:25.894 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:38:25.894 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:38:25.894 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:38:25.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:38:25.944 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:38:25.944 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:38:25.945 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:38:25.945 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:38:26.265 [DEBUG] clck_gen.py:113 IND CLOCK 18258
2026-01-09 01:38:26.743 [DEBUG] clck_gen.py:113 IND CLOCK 18360
2026-01-09 01:38:27.221 [DEBUG] clck_gen.py:113 IND CLOCK 18462
2026-01-09 01:38:27.699 [DEBUG] clck_gen.py:113 IND CLOCK 18564
2026-01-09 01:38:28.177 [DEBUG] clck_gen.py:113 IND CLOCK 18666
2026-01-09 01:38:28.655 [DEBUG] clck_gen.py:113 IND CLOCK 18768
2026-01-09 01:38:29.133 [DEBUG] clck_gen.py:113 IND CLOCK 18870
2026-01-09 01:38:29.611 [DEBUG] clck_gen.py:113 IND CLOCK 18972
2026-01-09 01:38:30.089 [DEBUG] clck_gen.py:113 IND CLOCK 19074
2026-01-09 01:38:30.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:38:30.195 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:38:30.196 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:38:30.196 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:38:30.205 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:38:30.205 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:38:30.205 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:38:30.205 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:38:30.207 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:38:30.207 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:38:30.207 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:38:30.207 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:38:30.207 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:38:30.207 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 01:38:30.207 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:38:30.207 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=19101 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:38:30.207 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=19101 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:38:30.208 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=19101 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:38:30.208 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=19101 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:38:30.208 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=19101 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:38:30.208 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=19101 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:38:35.210 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:38:35.210 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:38:35.212 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:38:35.212 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:38:35.212 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:38:35.213 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:38:35.221 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:38:35.222 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:38:35.222 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:38:35.223 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:38:35.223 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 01:38:35.225 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 01:38:35.225 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 01:38:35.226 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:38:35.226 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:38:35.226 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:38:35.226 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 01:38:35.226 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:38:35.226 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 01:38:35.228 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 01:38:35.228 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 01:38:35.228 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:38:35.228 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:38:35.228 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:38:35.228 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 01:38:35.229 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:38:35.229 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 01:38:35.230 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 01:38:35.230 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 01:38:35.230 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:38:35.230 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:38:35.231 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:38:35.231 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 01:38:35.231 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:38:35.231 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 01:38:35.233 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 01:38:35.233 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 01:38:35.233 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 01:38:35.233 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 01:38:35.233 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 01:38:35.233 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 01:38:35.233 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 01:38:35.233 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 01:38:35.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 01:38:35.234 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:38:35.234 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:38:35.234 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:38:35.234 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 01:38:35.234 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:38:35.234 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:38:35.234 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:38:35.234 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 01:38:35.234 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 01:38:35.234 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 01:38:35.234 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 01:38:35.234 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:38:35.234 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:38:35.234 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:38:35.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 01:38:35.234 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:38:35.234 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:38:35.234 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:38:35.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:38:35.234 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:38:35.235 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:38:35.235 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:38:35.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:38:35.235 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:38:35.235 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:38:35.235 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:38:35.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:38:35.235 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:38:35.235 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:38:35.235 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:38:35.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:38:35.235 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:38:35.235 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:38:35.235 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:38:35.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:38:35.235 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:38:35.235 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:38:35.235 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:38:35.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:38:35.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:38:35.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:38:35.236 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:38:35.236 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:38:35.236 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:38:35.236 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 01:38:40.240 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:38:40.240 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:38:40.242 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:38:40.242 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:38:40.242 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:38:40.243 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:38:40.252 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:38:40.253 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:38:40.253 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:38:40.253 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:38:40.253 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 01:38:40.256 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 01:38:40.256 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 01:38:40.256 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:38:40.257 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:38:40.257 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:38:40.257 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 01:38:40.257 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:38:40.257 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 01:38:40.258 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 01:38:40.259 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 01:38:40.259 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:38:40.259 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:38:40.259 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:38:40.259 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 01:38:40.259 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:38:40.259 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 01:38:40.261 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 01:38:40.261 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 01:38:40.261 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:38:40.261 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:38:40.261 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:38:40.262 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 01:38:40.262 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:38:40.262 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 01:38:40.264 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 01:38:40.264 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 01:38:40.264 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 01:38:40.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 01:38:40.264 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 01:38:40.264 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 01:38:40.264 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 01:38:40.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 01:38:40.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 01:38:40.265 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:38:40.265 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:38:40.265 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:38:40.265 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 01:38:40.265 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:38:40.265 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:38:40.265 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:38:40.265 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 01:38:40.265 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 01:38:40.265 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 01:38:40.265 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 01:38:40.265 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:38:40.265 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:38:40.265 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:38:40.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 01:38:40.265 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:38:40.265 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:38:40.265 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:38:40.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:38:40.265 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:38:40.265 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:38:40.265 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:38:40.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:38:40.265 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:38:40.265 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:38:40.266 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:38:40.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:38:40.266 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:38:40.266 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:38:40.266 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:38:40.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:38:40.266 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:38:40.266 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:38:40.266 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:38:40.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:38:40.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:38:40.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:38:40.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:38:40.270 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 01:38:40.754 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 01:38:40.792 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:38:40.795 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:38:40.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:38:40.796 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 01:38:40.818 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:38:40.818 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:38:40.819 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:38:40.828 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:38:40.828 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:38:40.829 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:38:40.829 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:38:40.829 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:38:40.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:38:40.856 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:38:40.857 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:38:40.857 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:38:40.857 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:38:41.224 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 01:38:41.267 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:38:41.267 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:38:41.268 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:38:41.270 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:38:41.693 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 01:38:41.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:38:41.895 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:38:41.896 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:38:41.896 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:38:41.905 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:38:41.905 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:38:41.905 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:38:41.907 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:38:41.907 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:38:41.907 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:38:41.907 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:38:41.907 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:38:41.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:38:41.956 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:38:41.956 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:38:41.956 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:38:41.957 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:38:42.165 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 01:38:42.269 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:38:42.269 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:38:42.269 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:38:42.270 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:38:42.644 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 01:38:43.122 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 01:38:43.269 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:38:43.269 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:38:43.270 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:38:43.271 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:38:43.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:38:43.345 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:38:43.345 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:38:43.345 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:38:43.365 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:38:43.365 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:38:43.365 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:38:43.367 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:38:43.367 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:38:43.367 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:38:43.367 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:38:43.367 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:38:43.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:38:43.416 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:38:43.417 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:38:43.417 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:38:43.418 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:38:43.599 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 01:38:44.076 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 01:38:44.270 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:38:44.270 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:38:44.270 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:38:44.271 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:38:44.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:38:44.518 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:38:44.518 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:38:44.519 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:38:44.539 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:38:44.539 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:38:44.539 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:38:44.542 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:38:44.542 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:38:44.542 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:38:44.542 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:38:44.542 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:38:44.554 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 01:38:44.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:38:44.592 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:38:44.593 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:38:44.593 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:38:44.593 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:38:45.033 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 01:38:45.271 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:38:45.271 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:38:45.272 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:38:45.272 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:38:45.511 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 01:38:45.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:38:45.969 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:38:45.970 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:38:45.970 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:38:45.988 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 01:38:45.988 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:38:45.988 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:38:45.989 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:38:45.991 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:38:45.991 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:38:45.991 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:38:45.991 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:38:45.991 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:38:46.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:38:46.041 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:38:46.041 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:38:46.042 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:38:46.042 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:38:46.466 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 01:38:46.944 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 01:38:47.423 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 01:38:47.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:38:47.554 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:38:47.555 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:38:47.555 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:38:47.573 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:38:47.573 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:38:47.573 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:38:47.576 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:38:47.576 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:38:47.576 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:38:47.576 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:38:47.576 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:38:47.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:38:47.624 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:38:47.625 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:38:47.625 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:38:47.626 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:38:47.900 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 01:38:48.379 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 01:38:48.857 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 01:38:49.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:38:49.076 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:38:49.077 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:38:49.077 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:38:49.095 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:38:49.095 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:38:49.095 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:38:49.097 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:38:49.097 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:38:49.097 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:38:49.097 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:38:49.097 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:38:49.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:38:49.147 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:38:49.147 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:38:49.147 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:38:49.147 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:38:49.335 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 01:38:49.813 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 01:38:50.291 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 01:38:50.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:38:50.598 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:38:50.599 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:38:50.599 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:38:50.617 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:38:50.617 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:38:50.617 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:38:50.619 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:38:50.619 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:38:50.619 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:38:50.619 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:38:50.619 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:38:50.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:38:50.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:38:50.672 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:38:50.672 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:38:50.672 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:38:50.673 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:38:50.769 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 01:38:51.248 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 01:38:51.726 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 01:38:52.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:38:52.121 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:38:52.121 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:38:52.122 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:38:52.140 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:38:52.140 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:38:52.140 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:38:52.142 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:38:52.142 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:38:52.143 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:38:52.143 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:38:52.143 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:38:52.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:38:52.203 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:38:52.203 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:38:52.204 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:38:52.204 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 01:38:52.204 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:38:52.682 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 01:38:53.160 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-09 01:38:53.637 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-09 01:38:53.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:38:53.644 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:38:53.644 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:38:53.645 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:38:53.658 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:38:53.658 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:38:53.658 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:38:53.661 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:38:53.661 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:38:53.661 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:38:53.661 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:38:53.661 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:38:53.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:38:53.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:38:53.709 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:38:53.709 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:38:53.709 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:38:53.709 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:38:54.116 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-09 01:38:54.594 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-09 01:38:55.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:38:55.044 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:38:55.045 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:38:55.045 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:38:55.063 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:38:55.063 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:38:55.063 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:38:55.065 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:38:55.065 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:38:55.065 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:38:55.065 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:38:55.065 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:38:55.072 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-09 01:38:55.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:38:55.125 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:38:55.126 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:38:55.126 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:38:55.127 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:38:55.550 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-09 01:38:56.029 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-09 01:38:56.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:38:56.506 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:38:56.507 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:38:56.507 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:38:56.508 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-09 01:38:56.525 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:38:56.525 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:38:56.525 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:38:56.527 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:38:56.527 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:38:56.527 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:38:56.527 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:38:56.527 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:38:56.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:38:56.576 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:38:56.576 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:38:56.576 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:38:56.576 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:38:56.985 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-09 01:38:57.464 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-09 01:38:57.942 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-09 01:38:58.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:38:58.036 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:38:58.037 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:38:58.037 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:38:58.056 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:38:58.056 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:38:58.056 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:38:58.058 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:38:58.059 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:38:58.059 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:38:58.059 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:38:58.059 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:38:58.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:38:58.108 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:38:58.108 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:38:58.109 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:38:58.109 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:38:58.420 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-09 01:38:58.898 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-09 01:38:59.376 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-09 01:38:59.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:38:59.536 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:38:59.537 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:38:59.537 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:38:59.556 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:38:59.556 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:38:59.557 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:38:59.559 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:38:59.559 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:38:59.559 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:38:59.559 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:38:59.559 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:38:59.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:38:59.618 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:38:59.618 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:38:59.619 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:38:59.619 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:38:59.854 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-09 01:39:00.333 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-09 01:39:00.812 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-09 01:39:00.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:39:00.990 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:39:00.990 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:39:00.990 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:39:01.007 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:39:01.007 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:39:01.007 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:39:01.009 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:39:01.009 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:39:01.009 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:39:01.009 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:39:01.009 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:39:01.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:39:01.055 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:39:01.056 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:39:01.056 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:39:01.056 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:39:01.290 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-01-09 01:39:01.768 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-01-09 01:39:02.246 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-01-09 01:39:02.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:39:02.443 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:39:02.444 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:39:02.444 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:39:02.457 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:39:02.457 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:39:02.457 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:39:02.460 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:39:02.460 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:39:02.460 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:39:02.460 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:39:02.460 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:39:02.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:39:02.511 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:39:02.512 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:39:02.512 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:39:02.512 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:39:02.724 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-01-09 01:39:03.203 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-01-09 01:39:03.681 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-01-09 01:39:03.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:39:03.896 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:39:03.897 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:39:03.897 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:39:03.906 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:39:03.906 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:39:03.906 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:39:03.908 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:39:03.908 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:39:03.908 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:39:03.908 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:39:03.908 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:39:03.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:39:03.957 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:39:03.957 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:39:03.957 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:39:03.957 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:39:04.159 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-01-09 01:39:04.638 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-01-09 01:39:05.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:39:05.035 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:39:05.036 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:39:05.036 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:39:05.046 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:39:05.046 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:39:05.046 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:39:05.048 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:39:05.048 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:39:05.048 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:39:05.048 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:39:05.048 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:39:05.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:39:05.096 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:39:05.096 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:39:05.097 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:39:05.097 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:39:05.116 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-01-09 01:39:05.594 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-01-09 01:39:06.072 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-01-09 01:39:06.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:39:06.486 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:39:06.486 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:39:06.487 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:39:06.506 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:39:06.506 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:39:06.506 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:39:06.508 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:39:06.508 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:39:06.509 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:39:06.509 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:39:06.509 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:39:06.550 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-01-09 01:39:06.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:39:06.555 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:39:06.556 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:39:06.556 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:39:06.557 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:39:07.028 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-01-09 01:39:07.506 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-01-09 01:39:07.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:39:07.938 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:39:07.939 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:39:07.939 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:39:07.959 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:39:07.959 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:39:07.959 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:39:07.961 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:39:07.961 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:39:07.961 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:39:07.961 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:39:07.961 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:39:07.984 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-01-09 01:39:08.003 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:39:08.008 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:39:08.009 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:39:08.009 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:39:08.009 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:39:08.462 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-01-09 01:39:08.940 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-01-09 01:39:09.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:39:09.391 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:39:09.392 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:39:09.392 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:39:09.405 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:39:09.405 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:39:09.405 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:39:09.405 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:39:09.409 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:39:09.409 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:39:09.409 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:39:09.409 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:39:09.409 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:39:09.409 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:39:09.409 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 01:39:09.409 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=6222 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:39:09.409 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=6222 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:39:09.409 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=6222 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:39:09.409 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=6223 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:39:09.409 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=6223 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:39:09.409 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=6223 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:39:14.410 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:39:14.410 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:39:14.412 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:39:14.412 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:39:14.412 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:39:14.413 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:39:14.420 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:39:14.421 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:39:14.421 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:39:14.422 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:39:14.422 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 01:39:14.424 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 01:39:14.424 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 01:39:14.425 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:39:14.425 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:39:14.425 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:39:14.425 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 01:39:14.425 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:39:14.425 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 01:39:14.427 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 01:39:14.427 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 01:39:14.427 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:39:14.427 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:39:14.427 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:39:14.427 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 01:39:14.427 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:39:14.427 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 01:39:14.429 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 01:39:14.429 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 01:39:14.429 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:39:14.429 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:39:14.429 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:39:14.429 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 01:39:14.429 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:39:14.429 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 01:39:14.431 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 01:39:14.431 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 01:39:14.431 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 01:39:14.431 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 01:39:14.431 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 01:39:14.432 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 01:39:14.432 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 01:39:14.432 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 01:39:14.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 01:39:14.432 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:39:14.432 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:39:14.432 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:39:14.432 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 01:39:14.432 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:39:14.432 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:39:14.432 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:39:14.432 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 01:39:14.432 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 01:39:14.432 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 01:39:14.432 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 01:39:14.432 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:39:14.432 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:39:14.432 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:39:14.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 01:39:14.432 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:39:14.432 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:39:14.432 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:39:14.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:39:14.433 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:39:14.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:39:14.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:39:14.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:39:14.433 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:39:14.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:39:14.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:39:14.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:39:14.433 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:39:14.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:39:14.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:39:14.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:39:14.433 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:39:14.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:39:14.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:39:14.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:39:14.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:39:14.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:39:14.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:39:14.437 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 01:39:14.921 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 01:39:14.952 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:39:14.953 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:39:14.954 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:39:14.954 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 01:39:14.972 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:39:14.973 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:39:14.973 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:39:14.981 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:39:14.981 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:39:14.982 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:39:14.982 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:39:14.982 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:39:15.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD HANDOVER
2026-01-09 01:39:15.020 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:39:15.020 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:39:15.021 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:39:15.021 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:39:15.391 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 01:39:15.434 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:39:15.435 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:39:15.435 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:39:15.437 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:39:15.865 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 01:39:16.343 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 01:39:16.435 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:39:16.436 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:39:16.436 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:39:16.437 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:39:16.821 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 01:39:17.300 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 01:39:17.436 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:39:17.437 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:39:17.437 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:39:17.438 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:39:17.778 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 01:39:18.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:39:18.256 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 01:39:18.437 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:39:18.438 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:39:18.438 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:39:18.439 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:39:18.734 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 01:39:18.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:39:18.810 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:39:18.810 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:39:18.810 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:39:18.810 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:39:18.811 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:39:18.811 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:39:18.811 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:39:18.812 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:39:18.812 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:39:18.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD HANDOVER
2026-01-09 01:39:18.829 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:39:18.829 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:39:18.830 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:39:18.830 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:39:19.212 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 01:39:19.439 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:39:19.439 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:39:19.439 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:39:19.440 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:39:19.691 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 01:39:20.168 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 01:39:20.647 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 01:39:21.125 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 01:39:21.603 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 01:39:21.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:39:22.081 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 01:39:22.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:39:22.221 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:39:22.222 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:39:22.222 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:39:22.237 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:39:22.237 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:39:22.237 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:39:22.238 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:39:22.239 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:39:22.239 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:39:22.239 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:39:22.239 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:39:22.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD HANDOVER
2026-01-09 01:39:22.287 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:39:22.288 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:39:22.288 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:39:22.288 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:39:22.559 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 01:39:23.037 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 01:39:23.515 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 01:39:23.993 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 01:39:24.472 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 01:39:24.950 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 01:39:25.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:39:25.428 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 01:39:25.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:39:25.874 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:39:25.874 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:39:25.874 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:39:25.874 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:39:25.875 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:39:25.875 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:39:25.875 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:39:25.875 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:39:25.875 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:39:25.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD HANDOVER
2026-01-09 01:39:25.902 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:39:25.902 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:39:25.902 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:39:25.902 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:39:25.906 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 01:39:26.375 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 01:39:26.845 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 01:39:27.318 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-09 01:39:27.796 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-09 01:39:28.274 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-09 01:39:28.753 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-09 01:39:28.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:39:29.231 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-09 01:39:29.710 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-09 01:39:29.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:39:29.759 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:39:29.759 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:39:29.759 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:39:29.778 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:39:29.778 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:39:29.778 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:39:29.780 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:39:29.780 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:39:29.780 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:39:29.780 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:39:29.780 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:39:29.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD HANDOVER
2026-01-09 01:39:29.831 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:39:29.832 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:39:29.832 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:39:29.832 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:39:30.188 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-09 01:39:30.667 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-09 01:39:31.145 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-09 01:39:31.624 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-09 01:39:32.102 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-09 01:39:32.580 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-09 01:39:33.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:39:33.059 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-09 01:39:33.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:39:33.500 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:39:33.500 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:39:33.500 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:39:33.500 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:39:33.501 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:39:33.501 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:39:33.501 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:39:33.501 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:39:33.501 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:39:33.529 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD HANDOVER
2026-01-09 01:39:33.533 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:39:33.533 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:39:33.533 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:39:33.534 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:39:33.537 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-09 01:39:34.015 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-09 01:39:34.494 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-09 01:39:34.972 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-09 01:39:35.450 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-01-09 01:39:35.928 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-01-09 01:39:36.406 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-01-09 01:39:36.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:39:36.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:39:36.846 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:39:36.847 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:39:36.847 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:39:36.864 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:39:36.864 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:39:36.864 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:39:36.866 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:39:36.867 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:39:36.867 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:39:36.867 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:39:36.867 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:39:36.883 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-01-09 01:39:36.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD HANDOVER
2026-01-09 01:39:36.919 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:39:36.919 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:39:36.920 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:39:36.920 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:39:37.362 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-01-09 01:39:37.840 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-01-09 01:39:38.317 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-01-09 01:39:38.795 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-01-09 01:39:39.273 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-01-09 01:39:39.751 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-01-09 01:39:40.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:39:40.229 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-01-09 01:39:40.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:39:40.625 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:39:40.625 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:39:40.625 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:39:40.625 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:39:40.626 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:39:40.626 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:39:40.626 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:39:40.626 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:39:40.626 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:39:40.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD HANDOVER
2026-01-09 01:39:40.652 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:39:40.652 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:39:40.653 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:39:40.653 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:39:40.708 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-01-09 01:39:41.186 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-01-09 01:39:41.664 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-01-09 01:39:42.142 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-01-09 01:39:42.619 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-01-09 01:39:43.098 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-01-09 01:39:43.576 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-01-09 01:39:43.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:39:43.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:39:43.972 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:39:43.973 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:39:43.973 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:39:43.987 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:39:43.987 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:39:43.987 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:39:43.987 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:39:43.997 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:39:43.997 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:39:43.997 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:39:43.997 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:39:43.997 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:39:43.997 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:39:43.997 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 01:39:43.997 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=6312 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:39:43.998 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=6312 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:39:48.993 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:39:48.993 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:39:48.994 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:39:48.994 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:39:48.995 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:39:48.996 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:39:49.001 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:39:49.002 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:39:49.002 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:39:49.002 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:39:49.002 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 01:39:49.004 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 01:39:49.004 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 01:39:49.005 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:39:49.005 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:39:49.005 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:39:49.005 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 01:39:49.005 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:39:49.005 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 01:39:49.006 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 01:39:49.006 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 01:39:49.007 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:39:49.007 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:39:49.007 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:39:49.007 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 01:39:49.007 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:39:49.007 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 01:39:49.008 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 01:39:49.008 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 01:39:49.008 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:39:49.008 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:39:49.009 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:39:49.009 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 01:39:49.009 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:39:49.009 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 01:39:49.010 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 01:39:49.010 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 01:39:49.010 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 01:39:49.010 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 01:39:49.011 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 01:39:49.011 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 01:39:49.011 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 01:39:49.011 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 01:39:49.011 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 01:39:49.011 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:39:49.011 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:39:49.011 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:39:49.011 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 01:39:49.011 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:39:49.011 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:39:49.011 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:39:49.011 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 01:39:49.011 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 01:39:49.011 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 01:39:49.011 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 01:39:49.011 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:39:49.011 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:39:49.011 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:39:49.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 01:39:49.012 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:39:49.012 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:39:49.012 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:39:49.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:39:49.012 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:39:49.012 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:39:49.012 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:39:49.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:39:49.012 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:39:49.012 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:39:49.012 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:39:49.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:39:49.012 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:39:49.012 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:39:49.012 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:39:49.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:39:49.012 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:39:49.012 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:39:49.012 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:39:49.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:39:49.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:39:49.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:39:49.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:39:49.016 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 01:39:49.500 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 01:39:49.534 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:39:49.536 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:39:49.538 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 01:39:49.538 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:39:49.560 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:39:49.561 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:39:49.561 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:39:49.568 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:39:49.569 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:39:49.569 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:39:49.570 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:39:49.570 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:39:49.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD HANDOVER
2026-01-09 01:39:49.603 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:39:49.604 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:39:49.604 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:39:49.605 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:39:49.978 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 01:39:50.014 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:39:50.014 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:39:50.014 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:39:50.016 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:39:50.456 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 01:39:50.935 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 01:39:51.015 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:39:51.015 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:39:51.015 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:39:51.017 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:39:51.413 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 01:39:51.891 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 01:39:52.016 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:39:52.016 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:39:52.016 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:39:52.018 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:39:52.370 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 01:39:52.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:39:52.848 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 01:39:53.016 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:39:53.017 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:39:53.017 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:39:53.018 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:39:53.327 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 01:39:53.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:39:53.401 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:39:53.401 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:39:53.401 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:39:53.401 [WARNING] transceiver.py:250 (MS@172.18.122.22:6700) RX TRXD message (fn=936 tn=2 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:39:53.401 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:39:53.401 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:39:53.401 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:39:53.401 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:39:53.401 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:39:53.401 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:39:53.418 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD HANDOVER
2026-01-09 01:39:53.421 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:39:53.421 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:39:53.421 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:39:53.421 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:39:53.804 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 01:39:54.017 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:39:54.018 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:39:54.018 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:39:54.019 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:39:54.282 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 01:39:54.761 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 01:39:55.240 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 01:39:55.718 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 01:39:56.196 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 01:39:56.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:39:56.674 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 01:39:56.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:39:56.814 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:39:56.815 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:39:56.815 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:39:56.815 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:39:56.816 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:39:56.816 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:39:56.816 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:39:56.816 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:39:56.816 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:39:56.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD HANDOVER
2026-01-09 01:39:56.862 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:39:56.862 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:39:56.863 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:39:56.863 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:39:57.153 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 01:39:57.631 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 01:39:58.109 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 01:39:58.588 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 01:39:59.066 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 01:39:59.545 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 01:39:59.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:40:00.023 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 01:40:00.502 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 01:40:00.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:40:00.717 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:40:00.718 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:40:00.718 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:40:00.718 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:40:00.719 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:40:00.720 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:40:00.720 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:40:00.720 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:40:00.720 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:40:00.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD HANDOVER
2026-01-09 01:40:00.741 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:40:00.741 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:40:00.741 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:40:00.741 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:40:00.976 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 01:40:01.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:40:01.446 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 01:40:01.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:40:01.675 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:40:01.676 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:40:01.676 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:40:01.694 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:40:01.694 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:40:01.694 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:40:01.696 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:40:01.696 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:40:01.696 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:40:01.696 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:40:01.696 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:40:01.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD HANDOVER
2026-01-09 01:40:01.747 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:40:01.748 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:40:01.748 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:40:01.748 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:40:01.916 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-09 01:40:02.394 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-09 01:40:02.873 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-09 01:40:03.352 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-09 01:40:03.830 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-09 01:40:04.309 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-09 01:40:04.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:40:04.788 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-09 01:40:05.266 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-09 01:40:05.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:40:05.353 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:40:05.354 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:40:05.354 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:40:05.354 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:40:05.354 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:40:05.355 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:40:05.355 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:40:05.355 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:40:05.355 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:40:05.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD HANDOVER
2026-01-09 01:40:05.382 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:40:05.382 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:40:05.382 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:40:05.383 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:40:05.765 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-09 01:40:06.244 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-09 01:40:06.722 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-09 01:40:07.200 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-09 01:40:07.679 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-09 01:40:08.157 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-09 01:40:08.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:40:08.634 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-09 01:40:09.112 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-09 01:40:09.251 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:40:09.254 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:40:09.254 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:40:09.255 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:40:09.255 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:40:09.256 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:40:09.256 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:40:09.256 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:40:09.257 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:40:09.257 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:40:09.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD HANDOVER
2026-01-09 01:40:09.300 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:40:09.300 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:40:09.301 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:40:09.301 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:40:09.591 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-09 01:40:10.069 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-01-09 01:40:10.547 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-01-09 01:40:11.026 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-01-09 01:40:11.505 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-01-09 01:40:11.984 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-01-09 01:40:12.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:40:12.462 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-01-09 01:40:12.941 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-01-09 01:40:13.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:40:13.156 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:40:13.156 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:40:13.156 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:40:13.157 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:40:13.157 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:40:13.157 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:40:13.158 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:40:13.158 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:40:13.158 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:40:13.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD HANDOVER
2026-01-09 01:40:13.178 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:40:13.179 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:40:13.179 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:40:13.179 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:40:13.414 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-01-09 01:40:13.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:40:13.884 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-01-09 01:40:14.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:40:14.115 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:40:14.116 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:40:14.116 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:40:14.132 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:40:14.132 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:40:14.132 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:40:14.134 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:40:14.134 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:40:14.134 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:40:14.134 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:40:14.134 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:40:14.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD HANDOVER
2026-01-09 01:40:14.183 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:40:14.184 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:40:14.184 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:40:14.184 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:40:14.362 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-01-09 01:40:14.840 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-01-09 01:40:15.318 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-01-09 01:40:15.797 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-01-09 01:40:16.275 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-01-09 01:40:16.753 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-01-09 01:40:17.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:40:17.231 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-01-09 01:40:17.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:40:17.671 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:40:17.672 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:40:17.672 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:40:17.672 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:40:17.672 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:40:17.672 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:40:17.673 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:40:17.673 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:40:17.673 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:40:17.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD HANDOVER
2026-01-09 01:40:17.704 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:40:17.705 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:40:17.705 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:40:17.706 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:40:17.708 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-01-09 01:40:18.187 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-01-09 01:40:18.665 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-01-09 01:40:19.144 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-01-09 01:40:19.622 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-01-09 01:40:20.101 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-01-09 01:40:20.579 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-01-09 01:40:20.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:40:21.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:40:21.019 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:40:21.020 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:40:21.020 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:40:21.020 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:40:21.020 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:40:21.020 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:40:21.020 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:40:21.021 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:40:21.021 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:40:21.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD HANDOVER
2026-01-09 01:40:21.053 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:40:21.053 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:40:21.053 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:40:21.053 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:40:21.058 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-01-09 01:40:21.536 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-01-09 01:40:22.014 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-01-09 01:40:22.491 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-01-09 01:40:22.970 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-01-09 01:40:23.448 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-01-09 01:40:23.927 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-01-09 01:40:24.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:40:24.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:40:24.368 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:40:24.368 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:40:24.368 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:40:24.369 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:40:24.369 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:40:24.369 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:40:24.369 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:40:24.369 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:40:24.370 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:40:24.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD HANDOVER
2026-01-09 01:40:24.401 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:40:24.402 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:40:24.402 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:40:24.402 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:40:24.405 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-01-09 01:40:24.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:40:24.883 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-01-09 01:40:25.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:40:25.331 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:40:25.332 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:40:25.332 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:40:25.332 [WARNING] transceiver.py:250 (MS@172.18.122.22:6700) RX TRXD message (fn=7749 tn=3 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:40:25.352 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:40:25.352 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:40:25.352 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:40:25.355 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:40:25.355 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:40:25.355 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:40:25.355 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:40:25.355 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:40:25.361 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-01-09 01:40:25.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD HANDOVER
2026-01-09 01:40:25.413 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:40:25.413 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:40:25.414 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:40:25.414 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:40:25.838 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-01-09 01:40:26.317 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-01-09 01:40:26.796 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-01-09 01:40:27.275 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-01-09 01:40:27.752 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-01-09 01:40:28.230 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-01-09 01:40:28.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:40:28.709 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-01-09 01:40:29.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:40:29.104 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:40:29.105 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:40:29.105 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:40:29.105 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:40:29.106 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:40:29.106 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:40:29.107 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:40:29.107 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:40:29.107 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:40:29.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD HANDOVER
2026-01-09 01:40:29.131 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:40:29.131 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:40:29.132 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:40:29.132 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:40:29.187 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-01-09 01:40:29.666 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-01-09 01:40:30.145 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-01-09 01:40:30.623 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-01-09 01:40:31.102 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-01-09 01:40:31.581 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-01-09 01:40:32.059 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-01-09 01:40:32.195 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:40:32.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:40:32.454 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:40:32.454 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:40:32.454 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:40:32.455 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:40:32.455 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:40:32.455 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:40:32.455 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:40:32.455 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:40:32.455 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:40:32.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD HANDOVER
2026-01-09 01:40:32.481 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:40:32.481 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:40:32.482 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:40:32.482 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:40:32.537 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-01-09 01:40:33.016 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-01-09 01:40:33.493 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-01-09 01:40:33.971 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-01-09 01:40:34.450 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-01-09 01:40:34.928 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-01-09 01:40:35.406 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-01-09 01:40:35.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:40:35.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:40:35.800 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:40:35.801 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:40:35.801 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:40:35.801 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:40:35.802 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:40:35.802 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:40:35.802 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:40:35.802 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:40:35.802 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:40:35.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD HANDOVER
2026-01-09 01:40:35.830 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:40:35.831 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:40:35.831 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:40:35.832 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:40:35.885 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-01-09 01:40:36.362 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-01-09 01:40:36.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:40:36.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:40:36.757 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:40:36.757 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:40:36.758 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:40:36.769 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:40:36.770 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:40:36.770 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:40:36.770 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:40:36.771 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:40:36.771 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:40:36.771 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:40:36.771 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:40:36.771 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:40:36.772 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 01:40:36.772 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:40:36.772 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=10188 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:40:36.772 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=10188 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:40:36.772 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=10188 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:40:36.772 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=10188 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:40:36.772 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=10188 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:40:36.772 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=10188 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:40:36.772 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=10188 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:40:36.772 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=10188 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:40:41.775 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:40:41.775 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:40:41.777 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:40:41.778 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:40:41.778 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:40:41.779 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:40:41.786 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:40:41.786 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:40:41.786 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:40:41.786 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:40:41.786 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 01:40:41.788 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 01:40:41.788 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 01:40:41.788 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:40:41.788 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:40:41.788 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:40:41.788 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 01:40:41.788 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:40:41.788 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 01:40:41.790 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 01:40:41.790 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 01:40:41.790 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:40:41.791 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:40:41.791 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:40:41.791 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 01:40:41.791 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:40:41.791 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 01:40:41.793 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 01:40:41.793 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 01:40:41.793 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:40:41.793 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:40:41.793 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:40:41.793 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 01:40:41.793 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:40:41.793 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 01:40:41.796 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 01:40:41.796 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 01:40:41.796 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 01:40:41.796 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 01:40:41.796 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 01:40:41.796 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 01:40:41.796 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 01:40:41.796 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 01:40:41.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 01:40:41.797 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:40:41.797 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:40:41.797 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:40:41.797 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 01:40:41.797 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:40:41.797 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:40:41.797 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:40:41.797 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 01:40:41.797 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 01:40:41.797 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 01:40:41.797 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 01:40:41.797 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:40:41.797 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:40:41.797 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:40:41.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 01:40:41.797 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:40:41.797 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:40:41.797 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:40:41.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:40:41.797 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:40:41.797 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:40:41.797 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:40:41.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:40:41.798 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:40:41.798 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:40:41.798 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:40:41.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:40:41.798 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:40:41.798 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:40:41.798 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:40:41.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:40:41.798 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:40:41.798 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:40:41.798 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:40:41.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:40:41.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:40:41.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:40:41.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:40:41.802 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 01:40:42.285 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 01:40:42.320 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:40:42.320 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:40:42.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:40:42.322 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 01:40:42.328 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:40:42.328 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:40:42.328 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:40:42.329 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:40:42.330 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:40:42.330 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:40:42.330 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:40:42.331 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:40:42.763 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 01:40:42.800 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:40:42.800 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:40:42.800 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:40:42.801 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:40:43.240 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 01:40:43.709 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 01:40:43.801 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:40:43.801 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:40:43.801 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:40:43.803 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:40:44.179 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 01:40:44.649 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 01:40:44.801 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:40:44.802 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:40:44.802 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:40:44.803 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:40:45.122 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 01:40:45.601 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 01:40:45.803 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:40:45.803 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:40:45.803 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:40:45.804 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:40:46.079 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 01:40:46.551 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 01:40:46.804 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:40:46.804 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:40:46.804 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:40:46.804 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:40:47.022 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 01:40:47.493 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 01:40:47.966 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 01:40:48.439 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 01:40:48.911 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 01:40:49.382 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 01:40:49.853 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 01:40:50.323 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 01:40:50.794 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 01:40:51.145 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:40:51.145 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:40:51.153 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:40:51.153 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:40:51.153 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:40:51.153 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:40:51.154 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:40:51.154 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:40:51.154 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:40:51.154 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:40:51.154 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:40:51.154 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:40:51.154 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 01:40:51.154 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2018 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:40:51.154 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2018 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:40:51.155 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2018 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:40:51.155 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2018 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:40:51.155 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2018 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:40:56.156 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:40:56.156 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:40:56.158 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:40:56.160 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:40:56.160 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:40:56.161 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:40:56.173 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:40:56.174 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:40:56.174 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:40:56.174 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:40:56.174 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 01:40:56.176 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 01:40:56.176 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 01:40:56.177 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:40:56.177 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:40:56.177 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:40:56.177 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 01:40:56.177 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:40:56.177 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 01:40:56.179 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 01:40:56.179 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 01:40:56.179 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:40:56.179 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:40:56.179 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:40:56.179 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 01:40:56.179 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:40:56.179 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 01:40:56.181 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 01:40:56.181 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 01:40:56.181 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:40:56.181 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:40:56.181 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:40:56.181 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 01:40:56.181 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:40:56.181 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 01:40:56.183 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 01:40:56.183 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 01:40:56.183 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 01:40:56.183 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 01:40:56.183 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 01:40:56.183 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 01:40:56.183 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 01:40:56.183 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 01:40:56.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 01:40:56.183 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:40:56.183 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:40:56.183 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:40:56.183 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 01:40:56.183 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:40:56.183 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:40:56.183 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:40:56.183 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 01:40:56.183 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 01:40:56.183 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 01:40:56.184 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 01:40:56.184 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:40:56.184 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:40:56.184 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:40:56.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 01:40:56.184 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:40:56.184 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:40:56.184 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:40:56.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:40:56.184 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:40:56.184 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:40:56.184 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:40:56.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:40:56.184 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:40:56.184 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:40:56.184 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:40:56.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:40:56.184 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:40:56.185 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:40:56.185 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:40:56.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:40:56.185 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:40:56.185 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:40:56.185 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:40:56.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:40:56.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:40:56.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:40:56.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:40:56.188 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 01:40:56.671 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 01:40:56.709 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:40:56.712 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:40:56.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:40:56.714 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 01:40:56.718 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:40:56.718 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:40:56.718 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:40:56.719 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:40:56.719 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:40:56.719 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:40:56.720 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:40:56.720 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:40:57.148 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 01:40:57.186 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:40:57.187 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:40:57.188 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:40:57.190 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:40:57.626 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 01:40:58.098 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 01:40:58.187 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:40:58.188 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:40:58.189 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:40:58.191 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:40:58.569 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 01:40:59.041 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 01:40:59.189 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:40:59.189 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:40:59.189 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:40:59.191 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:40:59.511 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 01:40:59.987 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 01:41:00.190 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:41:00.190 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:41:00.191 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:41:00.192 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:41:00.456 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 01:41:00.926 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 01:41:01.191 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:41:01.191 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:41:01.192 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:41:01.192 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:41:01.396 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 01:41:01.866 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 01:41:02.340 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 01:41:02.813 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 01:41:03.283 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 01:41:03.752 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 01:41:04.222 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 01:41:04.694 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 01:41:05.173 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 01:41:05.526 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:41:05.526 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:41:05.537 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:41:05.537 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:41:05.537 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:41:05.537 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:41:05.543 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:41:05.544 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:41:05.544 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:41:05.544 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:41:05.544 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:41:05.544 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:41:05.544 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 01:41:05.544 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2019 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:41:05.544 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2019 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:41:05.544 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2019 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:41:05.544 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2019 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:41:05.544 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2019 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:41:05.544 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2019 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:41:05.544 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2020 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:41:05.544 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2020 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:41:05.544 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2020 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:41:05.544 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2020 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:41:05.544 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2020 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:41:05.544 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2020 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:41:05.544 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2020 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:41:05.544 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2020 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:41:10.540 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:41:10.540 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:41:10.542 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:41:10.544 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:41:10.546 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:41:10.550 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:41:10.560 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:41:10.562 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:41:10.562 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:41:10.562 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:41:10.563 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 01:41:10.565 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 01:41:10.566 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 01:41:10.566 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:41:10.566 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:41:10.566 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:41:10.566 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 01:41:10.567 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:41:10.567 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 01:41:10.569 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 01:41:10.569 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 01:41:10.569 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:41:10.569 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:41:10.569 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:41:10.570 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 01:41:10.570 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:41:10.570 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 01:41:10.572 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 01:41:10.573 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 01:41:10.573 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:41:10.573 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:41:10.573 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:41:10.573 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 01:41:10.573 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:41:10.573 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 01:41:10.576 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 01:41:10.576 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 01:41:10.576 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 01:41:10.576 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 01:41:10.577 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 01:41:10.577 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 01:41:10.577 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 01:41:10.577 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 01:41:10.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 01:41:10.577 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:41:10.577 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:41:10.577 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:41:10.577 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 01:41:10.577 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:41:10.577 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:41:10.577 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:41:10.577 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 01:41:10.577 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 01:41:10.577 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 01:41:10.578 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 01:41:10.578 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:41:10.578 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:41:10.578 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:41:10.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 01:41:10.578 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:41:10.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:41:10.578 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:41:10.578 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:41:10.578 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:41:10.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:41:10.578 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:41:10.578 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:41:10.578 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:41:10.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:41:10.578 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:41:10.578 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:41:10.578 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:41:10.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:41:10.578 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:41:10.579 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:41:10.579 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:41:10.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:41:10.579 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:41:10.579 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:41:10.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:41:10.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:41:10.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:41:10.582 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 01:41:11.063 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 01:41:11.107 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:41:11.110 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:41:11.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:41:11.112 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 01:41:11.115 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:41:11.115 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:41:11.116 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:41:11.542 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 01:41:11.580 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:41:11.580 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:41:11.581 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:41:11.581 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:41:12.020 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 01:41:12.117 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:41:12.117 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:41:12.118 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:41:12.118 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:41:12.118 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:41:12.498 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 01:41:12.581 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:41:12.582 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:41:12.582 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:41:12.582 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:41:12.977 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 01:41:13.454 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 01:41:13.582 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:41:13.583 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:41:13.583 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:41:13.583 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:41:13.933 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 01:41:14.405 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 01:41:14.583 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:41:14.583 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:41:14.583 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:41:14.584 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:41:14.875 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 01:41:15.346 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 01:41:15.585 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:41:15.585 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:41:15.585 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:41:15.585 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:41:15.817 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 01:41:16.288 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 01:41:16.762 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 01:41:17.234 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 01:41:17.703 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 01:41:18.173 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 01:41:18.643 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 01:41:19.114 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 01:41:19.584 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 01:41:20.055 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 01:41:20.526 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 01:41:20.997 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 01:41:21.474 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 01:41:21.952 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 01:41:22.430 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 01:41:22.908 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 01:41:23.386 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-09 01:41:23.863 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-09 01:41:23.944 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:41:23.944 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:41:23.947 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:41:23.947 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:41:23.947 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:41:23.948 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:41:23.949 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:41:23.949 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:41:23.949 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:41:23.949 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:41:23.949 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:41:23.949 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:41:23.949 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 01:41:23.949 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2876 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:41:23.950 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2876 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:41:28.952 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:41:28.952 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:41:28.956 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:41:28.956 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:41:28.956 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:41:28.956 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:41:28.969 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:41:28.969 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:41:28.969 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:41:28.970 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:41:28.970 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 01:41:28.972 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 01:41:28.972 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 01:41:28.972 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:41:28.972 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:41:28.972 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:41:28.973 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 01:41:28.973 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:41:28.973 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 01:41:28.974 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 01:41:28.974 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 01:41:28.974 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:41:28.974 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:41:28.974 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 01:41:28.974 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:41:28.974 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:41:28.974 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 01:41:28.976 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 01:41:28.976 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 01:41:28.976 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:41:28.976 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:41:28.976 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:41:28.976 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 01:41:28.976 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:41:28.976 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 01:41:28.978 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 01:41:28.978 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 01:41:28.978 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 01:41:28.978 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 01:41:28.978 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 01:41:28.979 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 01:41:28.979 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 01:41:28.979 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 01:41:28.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 01:41:28.979 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:41:28.979 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:41:28.979 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:41:28.979 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 01:41:28.979 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:41:28.979 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:41:28.979 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:41:28.979 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 01:41:28.979 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 01:41:28.979 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 01:41:28.979 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 01:41:28.979 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:41:28.980 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:41:28.980 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:41:28.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 01:41:28.980 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:41:28.980 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:41:28.980 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:41:28.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:41:28.980 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:41:28.980 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:41:28.980 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:41:28.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:41:28.980 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:41:28.980 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:41:28.980 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:41:28.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:41:28.980 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:41:28.980 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:41:28.980 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:41:28.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:41:28.981 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:41:28.981 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:41:28.981 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:41:28.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:41:28.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:41:28.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:41:28.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:41:28.984 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 01:41:29.468 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 01:41:29.505 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:41:29.507 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:41:29.509 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 01:41:29.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:41:29.512 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:41:29.512 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:41:29.513 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:41:29.513 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:41:29.514 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:41:29.514 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:41:29.514 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:41:29.514 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:41:29.945 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 01:41:29.983 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:41:29.983 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:41:29.984 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:41:29.988 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:41:30.423 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 01:41:30.558 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:41:30.902 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 01:41:30.984 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:41:30.984 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:41:30.985 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:41:30.990 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:41:31.105 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:41:31.380 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 01:41:31.628 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:41:31.858 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 01:41:31.985 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:41:31.985 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:41:31.986 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:41:31.991 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:41:32.336 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 01:41:32.814 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 01:41:32.986 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:41:32.986 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:41:32.986 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:41:32.992 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:41:33.292 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 01:41:33.651 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:41:33.770 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 01:41:33.987 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:41:33.988 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:41:33.988 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:41:33.993 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:41:34.158 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:41:34.248 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 01:41:34.686 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:41:34.726 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 01:41:35.204 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 01:41:35.217 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:41:35.682 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 01:41:36.160 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 01:41:36.638 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 01:41:37.116 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 01:41:37.240 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:41:37.594 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 01:41:38.072 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 01:41:38.550 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 01:41:39.027 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 01:41:39.252 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:41:39.252 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:41:39.260 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:41:39.260 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:41:39.260 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:41:39.260 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:41:39.266 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:41:39.266 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:41:39.267 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:41:39.267 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:41:39.267 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:41:39.267 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 01:41:39.267 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:41:39.268 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2194 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:41:39.268 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2194 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:41:39.268 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2194 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:41:39.268 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2194 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:41:39.268 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2194 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:41:39.268 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2194 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:41:39.268 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2194 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:41:39.268 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2194 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:41:44.265 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:41:44.265 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:41:44.267 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:41:44.268 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:41:44.268 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:41:44.269 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:41:44.277 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:41:44.277 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:41:44.278 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:41:44.278 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:41:44.278 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 01:41:44.280 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 01:41:44.280 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 01:41:44.280 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:41:44.280 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:41:44.280 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:41:44.281 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 01:41:44.281 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:41:44.281 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 01:41:44.282 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 01:41:44.282 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 01:41:44.282 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:41:44.282 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:41:44.282 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:41:44.282 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 01:41:44.282 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:41:44.282 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 01:41:44.284 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 01:41:44.284 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 01:41:44.284 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:41:44.284 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:41:44.284 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:41:44.284 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 01:41:44.284 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:41:44.284 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 01:41:44.288 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 01:41:44.288 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 01:41:44.288 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 01:41:44.288 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 01:41:44.288 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 01:41:44.288 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 01:41:44.288 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 01:41:44.288 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 01:41:44.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 01:41:44.289 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:41:44.289 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:41:44.289 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:41:44.289 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 01:41:44.289 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:41:44.289 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:41:44.289 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:41:44.289 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 01:41:44.289 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 01:41:44.289 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 01:41:44.289 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 01:41:44.289 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:41:44.289 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:41:44.289 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:41:44.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 01:41:44.290 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:41:44.290 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:41:44.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:41:44.290 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:41:44.290 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:41:44.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:41:44.290 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:41:44.290 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:41:44.290 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:41:44.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:41:44.290 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:41:44.290 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:41:44.290 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:41:44.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:41:44.290 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:41:44.291 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:41:44.291 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:41:44.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:41:44.291 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:41:44.291 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:41:44.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:41:44.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:41:44.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:41:44.294 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 01:41:44.778 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 01:41:44.821 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:41:44.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:41:44.824 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:41:44.828 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 01:41:44.854 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:41:44.854 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:41:44.855 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:41:44.859 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:41:44.860 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:41:44.860 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:41:44.860 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:41:44.860 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:41:44.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD HANDOVER
2026-01-09 01:41:44.879 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:41:44.879 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:41:44.879 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:41:44.880 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:41:44.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:41:44.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:41:44.948 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:41:44.949 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:41:44.949 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:41:44.968 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:41:44.968 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:41:44.968 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:41:44.969 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:41:44.969 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:41:44.969 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:41:44.969 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:41:44.969 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:41:45.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD HANDOVER
2026-01-09 01:41:45.021 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:41:45.021 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:41:45.022 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:41:45.022 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:41:45.195 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:41:45.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:41:45.202 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:41:45.202 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:41:45.203 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:41:45.220 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:41:45.220 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:41:45.221 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:41:45.222 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:41:45.222 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:41:45.222 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:41:45.222 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:41:45.222 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:41:45.251 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD HANDOVER
2026-01-09 01:41:45.252 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 01:41:45.256 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:41:45.256 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:41:45.256 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:41:45.257 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:41:45.292 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:41:45.293 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:41:45.293 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:41:45.296 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:41:45.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:41:45.462 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:41:45.465 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:41:45.465 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:41:45.466 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:41:45.483 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:41:45.483 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:41:45.483 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:41:45.484 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:41:45.484 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:41:45.484 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:41:45.484 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:41:45.484 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:41:45.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD HANDOVER
2026-01-09 01:41:45.539 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:41:45.539 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:41:45.539 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:41:45.539 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:41:45.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:41:45.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:41:45.720 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:41:45.720 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:41:45.721 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:41:45.721 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 01:41:45.737 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:41:45.737 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:41:45.737 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:41:45.738 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:41:45.738 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:41:45.738 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:41:45.738 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:41:45.739 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:41:45.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD HANDOVER
2026-01-09 01:41:45.771 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:41:45.771 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:41:45.772 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:41:45.772 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:41:45.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:41:45.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:41:45.783 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:41:45.784 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:41:45.784 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:41:45.798 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:41:45.798 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:41:45.798 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:41:45.799 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:41:45.799 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:41:45.799 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:41:45.799 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:41:45.799 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:41:45.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD HANDOVER
2026-01-09 01:41:45.811 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:41:45.811 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:41:45.811 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:41:45.811 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:41:45.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:41:45.813 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:41:45.814 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:41:45.814 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:41:45.814 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:41:45.824 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:41:45.824 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:41:45.825 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:41:45.826 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:41:45.826 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:41:45.826 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:41:45.826 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:41:45.826 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:41:45.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD HANDOVER
2026-01-09 01:41:45.866 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:41:45.866 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:41:45.866 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:41:45.866 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:41:45.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:41:45.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:41:45.877 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:41:45.878 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:41:45.878 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:41:45.892 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:41:45.892 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:41:45.892 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:41:45.893 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:41:45.893 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:41:45.893 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:41:45.893 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:41:45.893 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:41:45.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:41:45.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD HANDOVER
2026-01-09 01:41:45.903 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:41:45.903 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:41:45.903 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:41:45.903 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:41:45.905 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:41:45.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:41:45.908 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:41:45.908 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:41:45.908 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:41:45.919 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:41:45.919 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:41:45.919 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:41:45.920 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:41:45.920 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:41:45.920 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:41:45.920 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:41:45.920 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:41:45.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD HANDOVER
2026-01-09 01:41:45.963 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:41:45.963 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:41:45.964 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:41:45.964 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:41:45.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:41:45.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:41:45.979 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:41:45.979 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:41:45.979 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:41:45.979 [WARNING] transceiver.py:250 (MS@172.18.122.22:6700) RX TRXD message (fn=364 tn=3 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:41:45.995 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:41:45.995 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:41:45.995 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:41:45.996 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:41:45.996 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:41:45.996 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:41:45.996 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:41:45.996 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:41:45.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:41:45.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD HANDOVER
2026-01-09 01:41:45.999 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:41:45.999 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:41:45.999 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:41:45.999 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:41:46.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:41:46.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:41:46.003 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:41:46.003 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:41:46.003 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:41:46.008 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:41:46.009 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:41:46.009 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:41:46.009 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:41:46.010 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:41:46.010 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:41:46.010 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:41:46.010 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:41:46.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD HANDOVER
2026-01-09 01:41:46.056 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:41:46.056 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:41:46.056 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:41:46.057 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:41:46.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:41:46.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:41:46.065 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:41:46.065 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:41:46.065 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:41:46.076 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:41:46.076 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:41:46.076 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:41:46.077 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:41:46.077 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:41:46.077 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:41:46.077 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:41:46.077 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:41:46.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD HANDOVER
2026-01-09 01:41:46.093 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:41:46.093 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:41:46.093 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:41:46.093 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:41:46.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:41:46.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:41:46.110 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:41:46.111 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:41:46.111 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:41:46.125 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:41:46.125 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:41:46.125 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:41:46.126 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:41:46.127 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:41:46.127 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:41:46.127 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:41:46.127 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:41:46.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD HANDOVER
2026-01-09 01:41:46.139 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:41:46.139 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:41:46.139 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:41:46.139 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:41:46.191 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 01:41:46.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:41:46.258 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:41:46.261 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:41:46.262 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:41:46.262 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:41:46.281 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:41:46.281 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:41:46.281 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:41:46.282 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:41:46.283 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:41:46.283 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:41:46.283 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:41:46.283 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:41:46.292 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:41:46.294 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:41:46.294 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:41:46.297 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:41:46.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD HANDOVER
2026-01-09 01:41:46.338 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:41:46.339 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:41:46.339 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:41:46.339 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:41:46.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:41:46.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:41:46.515 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:41:46.515 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:41:46.515 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:41:46.535 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:41:46.535 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:41:46.535 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:41:46.536 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:41:46.536 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:41:46.536 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:41:46.536 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:41:46.536 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:41:46.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD HANDOVER
2026-01-09 01:41:46.599 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:41:46.599 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:41:46.599 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:41:46.599 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:41:46.669 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 01:41:46.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:41:46.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:41:46.775 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:41:46.775 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:41:46.775 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:41:46.792 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:41:46.792 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:41:46.792 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:41:46.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:41:46.795 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:41:46.796 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:41:46.796 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:41:46.796 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:41:46.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD HANDOVER
2026-01-09 01:41:46.808 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:41:46.809 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:41:46.809 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:41:46.809 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:41:47.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:41:47.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:41:47.029 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:41:47.030 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:41:47.030 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:41:47.045 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:41:47.045 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:41:47.045 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:41:47.047 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:41:47.047 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:41:47.047 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:41:47.047 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:41:47.047 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:41:47.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD HANDOVER
2026-01-09 01:41:47.099 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:41:47.099 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:41:47.100 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:41:47.100 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:41:47.141 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 01:41:47.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:41:47.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:41:47.284 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:41:47.285 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:41:47.285 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:41:47.293 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:41:47.294 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:41:47.294 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:41:47.297 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:41:47.303 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:41:47.303 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:41:47.303 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:41:47.304 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:41:47.304 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:41:47.304 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:41:47.305 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:41:47.305 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:41:47.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD HANDOVER
2026-01-09 01:41:47.328 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:41:47.328 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:41:47.329 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:41:47.329 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:41:47.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:41:47.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:41:47.537 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:41:47.537 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:41:47.537 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:41:47.555 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:41:47.555 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:41:47.555 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:41:47.556 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:41:47.556 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:41:47.556 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:41:47.557 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:41:47.557 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:41:47.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD HANDOVER
2026-01-09 01:41:47.614 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 01:41:47.615 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:41:47.615 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:41:47.615 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:41:47.615 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:41:47.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:41:47.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:41:47.791 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:41:47.792 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:41:47.792 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:41:47.812 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:41:47.812 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:41:47.812 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:41:47.814 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:41:47.814 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:41:47.814 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:41:47.814 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:41:47.814 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:41:47.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD HANDOVER
2026-01-09 01:41:47.855 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:41:47.855 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:41:47.855 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:41:47.855 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:41:48.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:41:48.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:41:48.046 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:41:48.047 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:41:48.047 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:41:48.059 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:41:48.059 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:41:48.059 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:41:48.059 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:41:48.061 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:41:48.061 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:41:48.061 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:41:48.061 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:41:48.061 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:41:48.061 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:41:48.061 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 01:41:48.061 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=812 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:41:48.061 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=812 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:41:53.063 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:41:53.064 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:41:53.066 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:41:53.068 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:41:53.068 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:41:53.068 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:41:53.076 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:41:53.077 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:41:53.078 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:41:53.078 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:41:53.078 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 01:41:53.082 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 01:41:53.082 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 01:41:53.082 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:41:53.082 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:41:53.082 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:41:53.083 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 01:41:53.083 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:41:53.083 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 01:41:53.084 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 01:41:53.085 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 01:41:53.085 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:41:53.085 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:41:53.085 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:41:53.085 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 01:41:53.085 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:41:53.085 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 01:41:53.087 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 01:41:53.087 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 01:41:53.088 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:41:53.088 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:41:53.088 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:41:53.088 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 01:41:53.088 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:41:53.088 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 01:41:53.090 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 01:41:53.090 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 01:41:53.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 01:41:53.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 01:41:53.090 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 01:41:53.090 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 01:41:53.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 01:41:53.091 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 01:41:53.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 01:41:53.091 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:41:53.091 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:41:53.091 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:41:53.091 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 01:41:53.091 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:41:53.091 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:41:53.091 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:41:53.091 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 01:41:53.091 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 01:41:53.091 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 01:41:53.091 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 01:41:53.091 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:41:53.091 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:41:53.091 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:41:53.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 01:41:53.091 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:41:53.092 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:41:53.092 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:41:53.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:41:53.092 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:41:53.092 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:41:53.092 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:41:53.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:41:53.092 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:41:53.092 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:41:53.092 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:41:53.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:41:53.092 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:41:53.092 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:41:53.092 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:41:53.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:41:53.092 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:41:53.092 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:41:53.092 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:41:53.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:41:53.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:41:53.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:41:53.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:41:53.096 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 01:41:53.574 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 01:41:53.621 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:41:53.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:41:53.625 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:41:53.628 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 01:41:53.650 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:41:53.651 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:41:53.651 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:41:53.656 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:41:53.656 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:41:53.656 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:41:53.656 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:41:53.656 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:41:53.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD HANDOVER
2026-01-09 01:41:53.674 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:41:53.675 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:41:53.675 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:41:53.675 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:41:53.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:41:54.051 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 01:41:54.093 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:41:54.094 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:41:54.094 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:41:54.097 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:41:54.530 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 01:41:55.008 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 01:41:55.095 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:41:55.095 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:41:55.095 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:41:55.097 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:41:55.486 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 01:41:55.735 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:41:55.735 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:41:55.741 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:41:55.741 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:41:55.741 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:41:55.742 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:41:55.744 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:41:55.744 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:41:55.744 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:41:55.744 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:41:55.744 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:41:55.744 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 01:41:55.744 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:41:55.744 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=567 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:41:55.744 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=567 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:41:55.744 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=567 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:41:55.744 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=567 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:41:55.744 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=567 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:41:55.744 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=567 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:41:55.744 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=567 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:41:55.744 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=567 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:42:00.746 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:42:00.746 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:42:00.747 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:42:00.748 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:42:00.748 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:42:00.749 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:42:00.758 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:42:00.759 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:42:00.759 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:42:00.759 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:42:00.759 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 01:42:00.762 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 01:42:00.763 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 01:42:00.763 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:42:00.763 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:42:00.763 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:42:00.763 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 01:42:00.763 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:42:00.763 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 01:42:00.765 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 01:42:00.765 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 01:42:00.765 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:42:00.765 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:42:00.766 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:42:00.766 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 01:42:00.766 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:42:00.766 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 01:42:00.767 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 01:42:00.767 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 01:42:00.767 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:42:00.768 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:42:00.768 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:42:00.768 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 01:42:00.768 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:42:00.768 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 01:42:00.770 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 01:42:00.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 01:42:00.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 01:42:00.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 01:42:00.771 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 01:42:00.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 01:42:00.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 01:42:00.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 01:42:00.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 01:42:00.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:42:00.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:42:00.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:42:00.772 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 01:42:00.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:42:00.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:42:00.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:42:00.772 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 01:42:00.772 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 01:42:00.772 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 01:42:00.772 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 01:42:00.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:42:00.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:42:00.773 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:42:00.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 01:42:00.773 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:42:00.773 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:42:00.773 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:42:00.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:42:00.773 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:42:00.773 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:42:00.773 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:42:00.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:42:00.774 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:42:00.774 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:42:00.774 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:42:00.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:42:00.774 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:42:00.774 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:42:00.774 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:42:00.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:42:00.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:42:00.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:42:00.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:42:00.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:42:00.775 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:42:00.775 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:42:00.775 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:42:00.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:42:00.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:42:00.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:42:00.775 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:42:00.775 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:42:00.775 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:42:00.775 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 01:42:05.779 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:42:05.779 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:42:05.781 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:42:05.782 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:42:05.782 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:42:05.783 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:42:05.791 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:42:05.792 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:42:05.792 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:42:05.792 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:42:05.792 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 01:42:05.795 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 01:42:05.795 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 01:42:05.795 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:42:05.795 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:42:05.795 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:42:05.796 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 01:42:05.796 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:42:05.796 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 01:42:05.797 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 01:42:05.798 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 01:42:05.798 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:42:05.798 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:42:05.798 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:42:05.798 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 01:42:05.798 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:42:05.798 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 01:42:05.800 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 01:42:05.800 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 01:42:05.800 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:42:05.800 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:42:05.800 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:42:05.801 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 01:42:05.801 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:42:05.801 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 01:42:05.803 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 01:42:05.803 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 01:42:05.803 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 01:42:05.804 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 01:42:05.804 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 01:42:05.804 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 01:42:05.804 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 01:42:05.804 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 01:42:05.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 01:42:05.804 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:42:05.804 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:42:05.804 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:42:05.804 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 01:42:05.804 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:42:05.804 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:42:05.804 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:42:05.804 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 01:42:05.804 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 01:42:05.804 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 01:42:05.804 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 01:42:05.805 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:42:05.805 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:42:05.805 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:42:05.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 01:42:05.805 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:42:05.805 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:42:05.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:42:05.805 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:42:05.805 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:42:05.805 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:42:05.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:42:05.805 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:42:05.805 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:42:05.805 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:42:05.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:42:05.805 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:42:05.805 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:42:05.805 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:42:05.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:42:05.805 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:42:05.806 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:42:05.806 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:42:05.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:42:05.806 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:42:05.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:42:05.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:42:05.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:42:05.809 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 01:42:06.294 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 01:42:06.329 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:42:06.331 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:42:06.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:42:06.333 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 01:42:06.763 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 01:42:06.815 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:42:06.815 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:42:06.815 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:42:06.816 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:42:07.236 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 01:42:07.715 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 01:42:07.816 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:42:07.817 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:42:07.817 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:42:07.817 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:42:08.194 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 01:42:08.666 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 01:42:08.818 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:42:08.818 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:42:08.818 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:42:08.819 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:42:09.141 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 01:42:09.620 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 01:42:09.819 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:42:09.819 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:42:09.819 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:42:09.820 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:42:10.099 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 01:42:10.577 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 01:42:10.821 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:42:10.821 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:42:10.821 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:42:10.822 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:42:11.055 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 01:42:11.534 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 01:42:11.852 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:42:11.852 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:42:11.852 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:42:11.852 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:42:11.853 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:42:11.853 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:42:11.853 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:42:11.853 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:42:11.853 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:42:11.853 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:42:11.853 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 01:42:11.853 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1295 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:42:11.853 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1295 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:42:11.853 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1295 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:42:11.853 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1295 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:42:11.853 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1295 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:42:11.853 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1295 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:42:11.853 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1295 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:42:11.853 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1295 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:42:16.857 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:42:16.880 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:42:16.880 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:42:16.880 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:42:16.880 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:42:16.880 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:42:16.884 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:42:16.886 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:42:16.886 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:42:16.886 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:42:16.886 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 01:42:16.887 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 01:42:16.887 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 01:42:16.888 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:42:16.888 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:42:16.889 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:42:16.889 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 01:42:16.890 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:42:16.890 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 01:42:16.892 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 01:42:16.892 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 01:42:16.893 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:42:16.893 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:42:16.893 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:42:16.894 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 01:42:16.894 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:42:16.894 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 01:42:16.896 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 01:42:16.896 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 01:42:16.896 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:42:16.896 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:42:16.897 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:42:16.897 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 01:42:16.897 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:42:16.897 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 01:42:16.901 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 01:42:16.901 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 01:42:16.901 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 01:42:16.901 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 01:42:16.901 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 01:42:16.901 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 01:42:16.901 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 01:42:16.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 01:42:16.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 01:42:16.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:42:16.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:42:16.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:42:16.902 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 01:42:16.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:42:16.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:42:16.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:42:16.902 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 01:42:16.902 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 01:42:16.902 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 01:42:16.902 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 01:42:16.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:42:16.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:42:16.903 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:42:16.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 01:42:16.903 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:42:16.903 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:42:16.903 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:42:16.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:42:16.903 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:42:16.903 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:42:16.903 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:42:16.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:42:16.903 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:42:16.903 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:42:16.903 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:42:16.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:42:16.904 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:42:16.904 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:42:16.904 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:42:16.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:42:16.904 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:42:16.904 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:42:16.904 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:42:16.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:42:16.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:42:16.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:42:16.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:42:16.907 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 01:42:17.390 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 01:42:17.434 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:42:17.436 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:42:17.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:42:17.439 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 01:42:17.860 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 01:42:17.906 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:42:17.906 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:42:17.906 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:42:17.907 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:42:18.328 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 01:42:18.804 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 01:42:18.908 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:42:18.908 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:42:18.908 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:42:18.908 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:42:19.285 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 01:42:19.765 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 01:42:19.909 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:42:19.909 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:42:19.909 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:42:19.909 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:42:20.245 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 01:42:20.723 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 01:42:20.910 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:42:20.911 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:42:20.911 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:42:20.911 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:42:21.202 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 01:42:21.684 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 01:42:21.935 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:42:21.936 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:42:21.936 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:42:21.936 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:42:22.165 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 01:42:22.450 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:42:22.450 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:42:22.450 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:42:22.450 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:42:22.452 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:42:22.452 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:42:22.452 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:42:22.452 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:42:22.452 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:42:22.452 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:42:22.452 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 01:42:22.452 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1186 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:42:27.453 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:42:27.454 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:42:27.455 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:42:27.456 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:42:27.456 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:42:27.457 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:42:27.464 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:42:27.465 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:42:27.465 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:42:27.466 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:42:27.466 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 01:42:27.469 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 01:42:27.469 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 01:42:27.469 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:42:27.469 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:42:27.469 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:42:27.469 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 01:42:27.470 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:42:27.470 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 01:42:27.472 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 01:42:27.472 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 01:42:27.472 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:42:27.472 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:42:27.472 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:42:27.472 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 01:42:27.472 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:42:27.472 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 01:42:27.474 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 01:42:27.475 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 01:42:27.475 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:42:27.475 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:42:27.475 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:42:27.475 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 01:42:27.475 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:42:27.475 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 01:42:27.477 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 01:42:27.477 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 01:42:27.477 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 01:42:27.477 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 01:42:27.477 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 01:42:27.477 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 01:42:27.477 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 01:42:27.478 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 01:42:27.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 01:42:27.478 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:42:27.478 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:42:27.478 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:42:27.478 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 01:42:27.478 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:42:27.478 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:42:27.478 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:42:27.478 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 01:42:27.478 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 01:42:27.478 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 01:42:27.478 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 01:42:27.478 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:42:27.478 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:42:27.478 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:42:27.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 01:42:27.478 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:42:27.478 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:42:27.478 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:42:27.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:42:27.479 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:42:27.479 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:42:27.479 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:42:27.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:42:27.479 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:42:27.479 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:42:27.479 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:42:27.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:42:27.479 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:42:27.479 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:42:27.479 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:42:27.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:42:27.480 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:42:27.480 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:42:27.480 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:42:27.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:42:27.480 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:42:27.480 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:42:27.480 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:42:27.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:42:27.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:42:27.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:42:27.480 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:42:27.480 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:42:27.480 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:42:27.480 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 01:42:32.486 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:42:32.486 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:42:32.486 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:42:32.486 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:42:32.486 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:42:32.486 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:42:32.494 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:42:32.496 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:42:32.496 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:42:32.497 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:42:32.497 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 01:42:32.502 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 01:42:32.502 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 01:42:32.503 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:42:32.503 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:42:32.503 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:42:32.503 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 01:42:32.504 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:42:32.504 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 01:42:32.506 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 01:42:32.506 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 01:42:32.506 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:42:32.506 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:42:32.506 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:42:32.507 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 01:42:32.507 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:42:32.507 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 01:42:32.508 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 01:42:32.509 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 01:42:32.509 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:42:32.509 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:42:32.509 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:42:32.509 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 01:42:32.509 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:42:32.509 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 01:42:32.511 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 01:42:32.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 01:42:32.511 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 01:42:32.511 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 01:42:32.511 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 01:42:32.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 01:42:32.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 01:42:32.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 01:42:32.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 01:42:32.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:42:32.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:42:32.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:42:32.512 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 01:42:32.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:42:32.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:42:32.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:42:32.512 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 01:42:32.512 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 01:42:32.512 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 01:42:32.512 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 01:42:32.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:42:32.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:42:32.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:42:32.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 01:42:32.513 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:42:32.513 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:42:32.513 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:42:32.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:42:32.513 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:42:32.513 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:42:32.513 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:42:32.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:42:32.513 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:42:32.513 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:42:32.513 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:42:32.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:42:32.513 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:42:32.513 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:42:32.513 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:42:32.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:42:32.514 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:42:32.514 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:42:32.514 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:42:32.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:42:32.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:42:32.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:42:32.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:42:32.517 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 01:42:33.000 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 01:42:33.039 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:42:33.041 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:42:33.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:42:33.044 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 01:42:33.047 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:42:33.047 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:42:33.047 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:42:33.478 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 01:42:33.515 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:42:33.515 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:42:33.515 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:42:33.517 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:42:33.957 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 01:42:34.048 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:42:34.049 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:42:34.049 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:42:34.050 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:42:34.050 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:42:34.435 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 01:42:34.516 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:42:34.516 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:42:34.516 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:42:34.519 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:42:34.914 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 01:42:35.386 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 01:42:35.516 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:42:35.517 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:42:35.517 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:42:35.519 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:42:35.857 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 01:42:36.327 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 01:42:36.517 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:42:36.517 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:42:36.517 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:42:36.520 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:42:36.798 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 01:42:37.269 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 01:42:37.518 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:42:37.518 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:42:37.519 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:42:37.520 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:42:37.740 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 01:42:38.211 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 01:42:38.681 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 01:42:39.152 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 01:42:39.623 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 01:42:40.094 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 01:42:40.564 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 01:42:41.035 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 01:42:41.506 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 01:42:41.977 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 01:42:42.447 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 01:42:42.918 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 01:42:43.394 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 01:42:43.872 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 01:42:44.350 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 01:42:44.828 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 01:42:45.306 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-09 01:42:45.784 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-09 01:42:46.262 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-09 01:42:46.741 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-09 01:42:47.219 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-09 01:42:47.697 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-09 01:42:47.894 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:42:47.894 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:42:47.903 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:42:47.903 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:42:47.903 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:42:47.903 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:42:47.904 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:42:47.904 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:42:47.904 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:42:47.904 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:42:47.904 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:42:47.904 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:42:47.904 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 01:42:52.906 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:42:52.906 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:42:52.908 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:42:52.908 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:42:52.909 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:42:52.909 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:42:52.917 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:42:52.918 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:42:52.918 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:42:52.919 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:42:52.919 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 01:42:52.921 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 01:42:52.921 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 01:42:52.922 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:42:52.922 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:42:52.922 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:42:52.922 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 01:42:52.922 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:42:52.923 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 01:42:52.924 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 01:42:52.924 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 01:42:52.924 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:42:52.924 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:42:52.924 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:42:52.924 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 01:42:52.924 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:42:52.925 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 01:42:52.926 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 01:42:52.926 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 01:42:52.927 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:42:52.927 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:42:52.927 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:42:52.927 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 01:42:52.927 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:42:52.927 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 01:42:52.929 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 01:42:52.929 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 01:42:52.929 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 01:42:52.929 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 01:42:52.929 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 01:42:52.930 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 01:42:52.930 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 01:42:52.930 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 01:42:52.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 01:42:52.930 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:42:52.930 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:42:52.930 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:42:52.930 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 01:42:52.930 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:42:52.930 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:42:52.930 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:42:52.930 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 01:42:52.930 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 01:42:52.930 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 01:42:52.930 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 01:42:52.930 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:42:52.931 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:42:52.931 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:42:52.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 01:42:52.931 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:42:52.931 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:42:52.931 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:42:52.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:42:52.931 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:42:52.931 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:42:52.931 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:42:52.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:42:52.931 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:42:52.931 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:42:52.931 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:42:52.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:42:52.931 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:42:52.931 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:42:52.931 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:42:52.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:42:52.931 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:42:52.931 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:42:52.931 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:42:52.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:42:52.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:42:52.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:42:52.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:42:52.935 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 01:42:53.417 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 01:42:53.451 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:42:53.453 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:42:53.454 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 01:42:53.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:42:53.471 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:42:53.472 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:42:53.472 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:42:53.478 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:42:53.478 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:42:53.478 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:42:53.478 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:42:53.478 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:42:53.509 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:42:53.513 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:42:53.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:42:53.528 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:42:53.528 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:42:53.529 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:42:53.529 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:42:53.895 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 01:42:53.933 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:42:53.933 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:42:53.933 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:42:53.934 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:42:54.373 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 01:42:54.396 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:42:54.396 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:42:54.405 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:42:54.406 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:42:54.406 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:42:54.406 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:42:54.416 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:42:54.416 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:42:54.416 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:42:54.417 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:42:54.417 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:42:54.417 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:42:54.417 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 01:42:54.417 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=315 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:42:54.417 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=315 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:42:54.418 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=315 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:42:54.418 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=315 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:42:54.418 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=316 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:42:54.418 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=316 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:42:54.418 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=316 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:42:54.418 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=316 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:42:54.418 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=316 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:42:54.418 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=316 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:42:54.418 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=316 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:42:54.419 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=316 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:42:54.419 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=317 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:42:54.419 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=317 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:42:54.419 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=317 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:42:54.419 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=317 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:42:54.419 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=317 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:42:54.419 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=317 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:42:54.419 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=317 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:42:54.419 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=317 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:42:59.411 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:42:59.411 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:42:59.411 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:42:59.411 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:42:59.411 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:42:59.411 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:42:59.418 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:42:59.420 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:42:59.420 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:42:59.421 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:42:59.421 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 01:42:59.425 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 01:42:59.426 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 01:42:59.426 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:42:59.426 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:42:59.426 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:42:59.427 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 01:42:59.427 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:42:59.427 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 01:42:59.429 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 01:42:59.430 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 01:42:59.430 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:42:59.430 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:42:59.430 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:42:59.430 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 01:42:59.430 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:42:59.430 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 01:42:59.432 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 01:42:59.432 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 01:42:59.433 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:42:59.433 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:42:59.433 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:42:59.433 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 01:42:59.433 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:42:59.433 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 01:42:59.436 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 01:42:59.436 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 01:42:59.436 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 01:42:59.436 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 01:42:59.436 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 01:42:59.436 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 01:42:59.436 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 01:42:59.436 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 01:42:59.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 01:42:59.436 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:42:59.436 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:42:59.436 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:42:59.436 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 01:42:59.436 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:42:59.436 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:42:59.436 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:42:59.436 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 01:42:59.436 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 01:42:59.436 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 01:42:59.437 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 01:42:59.437 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:42:59.437 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:42:59.437 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:42:59.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 01:42:59.437 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:42:59.437 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:42:59.437 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:42:59.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:42:59.437 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:42:59.437 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:42:59.437 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:42:59.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:42:59.437 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:42:59.437 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:42:59.437 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:42:59.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:42:59.437 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:42:59.437 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:42:59.438 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:42:59.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:42:59.438 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:42:59.438 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:42:59.438 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:42:59.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:42:59.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:42:59.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:42:59.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:42:59.441 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 01:42:59.926 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 01:42:59.962 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:42:59.965 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:42:59.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:42:59.967 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 01:42:59.986 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:42:59.986 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:42:59.986 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:42:59.991 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:42:59.991 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:42:59.992 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:42:59.992 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:42:59.992 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:43:00.018 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:43:00.022 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:43:00.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:43:00.035 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:43:00.036 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:43:00.036 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:43:00.036 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:43:00.404 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 01:43:00.440 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:43:00.440 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:43:00.440 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:43:00.443 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:43:00.882 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 01:43:00.905 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:43:00.906 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:43:00.915 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:43:00.915 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:43:00.915 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:43:00.916 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:43:00.925 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:43:00.926 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:43:00.926 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:43:00.926 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:43:00.926 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:43:00.926 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:43:00.926 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 01:43:00.927 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=315 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:43:00.927 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=315 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:43:00.927 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=315 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:43:00.927 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=315 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:43:00.927 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=316 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:43:00.927 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=316 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:43:00.927 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=316 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:43:00.927 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=316 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:43:00.927 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=316 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:43:00.928 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=316 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:43:00.928 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=316 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:43:00.928 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=316 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:43:00.928 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=317 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:43:00.928 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=317 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:43:00.928 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=317 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:43:00.928 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=317 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:43:00.928 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=317 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:43:00.928 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=317 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:43:00.928 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=317 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:43:00.929 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=317 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:43:05.916 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:43:05.916 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:43:05.918 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:43:05.919 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:43:05.919 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:43:05.920 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:43:05.923 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:43:05.923 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:43:05.923 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:43:05.924 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:43:05.924 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 01:43:05.925 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 01:43:05.925 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 01:43:05.925 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:43:05.925 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:43:05.925 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:43:05.925 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 01:43:05.925 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:43:05.925 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 01:43:05.926 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 01:43:05.926 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 01:43:05.926 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:43:05.926 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:43:05.926 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:43:05.926 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 01:43:05.926 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:43:05.926 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 01:43:05.928 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 01:43:05.928 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 01:43:05.928 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:43:05.928 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:43:05.928 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:43:05.928 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 01:43:05.928 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:43:05.928 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 01:43:05.930 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 01:43:05.930 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 01:43:05.930 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 01:43:05.930 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 01:43:05.930 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 01:43:05.930 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 01:43:05.930 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 01:43:05.930 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 01:43:05.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 01:43:05.930 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:43:05.930 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:43:05.930 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:43:05.930 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 01:43:05.930 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:43:05.930 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:43:05.930 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:43:05.930 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 01:43:05.930 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 01:43:05.930 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 01:43:05.931 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 01:43:05.931 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:43:05.931 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:43:05.931 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:43:05.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 01:43:05.931 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:43:05.931 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:43:05.931 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:43:05.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:43:05.931 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:43:05.931 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:43:05.931 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:43:05.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:43:05.931 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:43:05.931 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:43:05.931 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:43:05.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:43:05.931 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:43:05.931 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:43:05.931 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:43:05.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:43:05.931 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:43:05.931 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:43:05.931 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:43:05.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:43:05.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:43:05.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:43:05.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:43:05.935 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 01:43:06.420 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 01:43:06.448 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:43:06.449 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:43:06.450 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 01:43:06.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:43:06.467 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:43:06.467 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:43:06.467 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:43:06.473 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:43:06.474 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:43:06.474 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:43:06.474 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:43:06.475 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:43:06.512 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:43:06.515 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:43:06.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:43:06.527 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:43:06.528 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:43:06.528 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:43:06.528 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:43:06.898 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 01:43:06.933 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:43:06.934 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:43:06.934 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:43:06.935 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:43:07.377 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 01:43:07.856 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 01:43:07.934 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:43:07.935 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:43:07.935 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:43:07.936 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:43:08.335 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 01:43:08.812 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 01:43:08.936 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:43:08.936 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:43:08.936 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:43:08.936 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:43:09.291 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 01:43:09.769 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 01:43:09.937 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:43:09.937 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:43:09.937 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:43:09.937 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:43:10.248 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 01:43:10.726 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 01:43:10.938 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:43:10.938 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:43:10.939 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:43:10.939 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:43:11.204 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 01:43:11.681 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 01:43:12.160 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 01:43:12.639 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 01:43:13.117 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 01:43:13.596 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 01:43:14.074 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 01:43:14.531 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:43:14.534 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:43:14.535 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:43:14.535 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:43:14.551 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:43:14.551 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:43:14.551 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:43:14.553 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:43:14.553 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:43:14.553 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:43:14.553 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:43:14.553 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:43:14.553 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 01:43:14.599 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:43:14.603 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:43:14.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:43:14.615 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:43:14.615 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:43:14.616 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:43:14.616 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:43:15.032 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 01:43:15.510 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 01:43:15.989 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 01:43:16.467 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 01:43:16.946 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 01:43:17.425 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 01:43:17.903 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 01:43:18.382 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 01:43:18.860 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-09 01:43:19.339 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-09 01:43:19.818 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-09 01:43:20.296 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-09 01:43:20.774 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-09 01:43:21.252 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-09 01:43:21.731 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-09 01:43:22.210 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-09 01:43:22.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:43:22.622 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:43:22.622 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:43:22.622 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:43:22.638 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:43:22.638 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:43:22.638 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:43:22.638 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:43:22.647 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:43:22.647 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:43:22.647 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:43:22.647 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:43:22.648 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:43:22.648 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:43:22.648 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 01:43:22.648 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3563 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:43:22.648 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3563 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:43:27.643 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:43:27.644 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:43:27.644 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:43:27.644 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:43:27.644 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:43:27.644 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:43:27.647 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:43:27.648 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:43:27.648 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:43:27.648 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:43:27.648 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 01:43:27.649 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 01:43:27.649 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 01:43:27.649 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:43:27.649 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:43:27.649 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:43:27.650 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 01:43:27.650 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:43:27.650 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 01:43:27.650 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 01:43:27.650 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 01:43:27.651 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:43:27.651 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:43:27.651 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:43:27.651 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 01:43:27.651 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:43:27.651 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 01:43:27.652 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 01:43:27.652 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 01:43:27.652 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:43:27.652 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:43:27.652 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:43:27.652 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 01:43:27.652 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:43:27.652 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 01:43:27.654 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 01:43:27.654 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 01:43:27.654 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 01:43:27.654 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 01:43:27.654 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 01:43:27.654 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 01:43:27.654 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 01:43:27.654 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 01:43:27.655 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 01:43:27.655 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:43:27.655 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:43:27.655 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:43:27.655 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 01:43:27.655 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:43:27.655 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:43:27.655 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:43:27.655 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 01:43:27.655 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 01:43:27.655 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 01:43:27.655 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 01:43:27.655 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:43:27.655 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:43:27.655 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:43:27.655 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 01:43:27.655 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:43:27.655 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:43:27.655 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:43:27.655 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:43:27.655 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:43:27.655 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:43:27.655 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:43:27.655 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:43:27.655 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:43:27.656 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:43:27.656 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:43:27.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:43:27.656 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:43:27.656 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:43:27.656 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:43:27.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:43:27.656 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:43:27.656 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:43:27.656 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:43:27.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:43:27.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:43:27.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:43:27.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:43:27.660 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 01:43:28.144 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 01:43:28.181 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:43:28.184 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:43:28.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:43:28.186 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 01:43:28.209 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:43:28.209 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:43:28.210 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:43:28.216 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:43:28.216 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:43:28.217 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:43:28.217 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:43:28.217 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:43:28.236 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:43:28.240 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:43:28.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:43:28.251 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:43:28.252 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:43:28.252 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:43:28.252 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:43:28.621 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 01:43:28.657 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:43:28.657 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:43:28.658 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:43:28.659 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:43:29.101 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 01:43:29.579 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 01:43:29.658 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:43:29.658 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:43:29.659 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:43:29.660 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:43:30.057 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 01:43:30.536 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 01:43:30.658 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:43:30.659 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:43:30.659 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:43:30.661 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:43:31.014 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 01:43:31.493 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 01:43:31.659 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:43:31.660 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:43:31.660 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:43:31.661 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:43:31.972 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 01:43:32.450 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 01:43:32.661 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:43:32.661 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:43:32.661 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:43:32.662 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:43:32.929 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 01:43:33.407 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 01:43:33.886 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 01:43:34.365 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 01:43:34.844 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 01:43:35.322 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 01:43:35.801 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 01:43:36.255 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:43:36.259 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:43:36.259 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:43:36.259 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:43:36.273 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:43:36.273 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:43:36.273 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:43:36.275 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:43:36.275 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:43:36.275 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:43:36.275 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:43:36.275 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:43:36.279 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 01:43:36.325 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:43:36.327 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:43:36.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:43:36.338 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:43:36.338 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:43:36.338 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:43:36.339 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:43:36.749 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 01:43:37.224 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 01:43:37.702 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 01:43:38.180 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 01:43:38.658 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 01:43:39.136 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 01:43:39.610 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 01:43:40.079 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 01:43:40.555 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-09 01:43:41.033 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-09 01:43:41.512 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-09 01:43:41.990 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-09 01:43:42.468 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-09 01:43:42.947 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-09 01:43:43.425 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-09 01:43:43.903 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-09 01:43:44.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:43:44.343 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:43:44.344 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:43:44.344 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:43:44.355 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:43:44.355 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:43:44.355 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:43:44.355 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:43:44.356 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:43:44.357 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:43:44.357 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:43:44.357 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:43:44.357 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:43:44.357 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:43:44.357 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 01:43:44.357 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3567 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:43:44.357 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3567 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:43:49.359 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:43:49.360 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:43:49.361 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:43:49.362 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:43:49.362 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:43:49.363 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:43:49.375 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:43:49.377 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:43:49.377 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:43:49.377 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:43:49.377 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 01:43:49.380 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 01:43:49.380 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 01:43:49.381 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:43:49.381 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:43:49.381 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:43:49.381 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 01:43:49.381 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:43:49.381 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 01:43:49.383 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 01:43:49.383 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 01:43:49.383 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:43:49.383 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:43:49.384 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:43:49.384 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 01:43:49.384 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:43:49.384 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 01:43:49.386 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 01:43:49.386 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 01:43:49.386 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:43:49.386 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:43:49.386 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:43:49.386 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 01:43:49.386 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:43:49.386 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 01:43:49.389 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 01:43:49.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 01:43:49.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 01:43:49.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 01:43:49.389 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 01:43:49.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 01:43:49.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 01:43:49.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 01:43:49.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 01:43:49.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:43:49.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:43:49.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:43:49.389 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 01:43:49.390 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:43:49.390 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:43:49.390 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:43:49.390 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 01:43:49.390 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 01:43:49.390 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 01:43:49.390 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 01:43:49.390 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:43:49.390 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:43:49.390 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:43:49.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 01:43:49.390 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:43:49.390 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:43:49.390 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:43:49.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:43:49.390 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:43:49.390 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:43:49.390 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:43:49.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:43:49.391 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:43:49.391 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:43:49.391 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:43:49.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:43:49.391 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:43:49.391 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:43:49.391 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:43:49.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:43:49.391 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:43:49.391 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:43:49.391 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:43:49.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:43:49.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:43:49.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:43:49.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:43:49.395 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 01:43:49.877 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 01:43:49.915 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:43:49.916 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:43:49.917 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 01:43:49.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:43:49.934 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:43:49.934 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:43:49.935 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:43:49.940 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:43:49.940 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:43:49.941 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:43:49.941 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:43:49.941 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:43:49.969 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:43:49.972 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:43:49.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:43:49.980 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:43:49.981 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:43:49.981 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:43:49.981 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:43:50.355 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 01:43:50.393 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:43:50.393 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:43:50.394 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:43:50.394 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:43:50.833 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 01:43:51.312 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 01:43:51.393 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:43:51.394 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:43:51.394 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:43:51.395 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:43:51.790 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 01:43:52.269 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 01:43:52.394 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:43:52.395 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:43:52.395 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:43:52.396 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:43:52.748 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 01:43:53.226 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 01:43:53.396 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:43:53.397 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:43:53.397 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:43:53.397 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:43:53.704 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 01:43:54.183 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 01:43:54.397 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:43:54.397 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:43:54.398 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:43:54.398 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:43:54.661 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 01:43:55.140 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 01:43:55.619 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 01:43:56.097 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 01:43:56.575 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 01:43:57.054 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 01:43:57.533 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 01:43:57.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:43:57.987 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:43:57.988 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:43:57.988 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:43:58.007 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:43:58.007 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:43:58.007 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:43:58.009 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:43:58.009 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:43:58.009 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:43:58.009 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:43:58.009 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:43:58.011 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 01:43:58.057 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:43:58.060 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:43:58.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:43:58.072 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:43:58.073 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:43:58.073 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:43:58.073 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:43:58.489 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 01:43:58.967 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 01:43:59.446 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 01:43:59.924 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 01:44:00.402 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 01:44:00.881 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 01:44:01.360 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 01:44:01.838 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 01:44:02.317 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-09 01:44:02.795 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-09 01:44:03.274 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-09 01:44:03.752 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-09 01:44:04.231 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-09 01:44:04.710 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-09 01:44:05.188 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-09 01:44:05.666 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-09 01:44:06.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:44:06.080 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:44:06.080 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:44:06.081 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:44:06.095 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:44:06.095 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:44:06.095 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:44:06.096 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:44:06.103 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:44:06.103 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:44:06.103 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:44:06.103 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:44:06.103 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:44:06.103 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:44:06.103 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 01:44:06.104 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3562 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:44:06.104 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3562 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:44:11.100 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:44:11.100 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:44:11.102 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:44:11.103 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:44:11.103 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:44:11.103 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:44:11.112 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:44:11.113 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:44:11.113 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:44:11.114 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:44:11.114 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 01:44:11.117 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 01:44:11.117 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 01:44:11.117 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:44:11.117 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:44:11.118 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:44:11.118 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 01:44:11.119 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:44:11.119 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 01:44:11.121 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 01:44:11.121 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 01:44:11.121 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:44:11.121 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:44:11.121 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:44:11.122 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 01:44:11.122 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:44:11.122 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 01:44:11.125 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 01:44:11.125 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 01:44:11.125 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:44:11.125 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:44:11.125 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:44:11.125 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 01:44:11.126 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:44:11.126 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 01:44:11.128 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 01:44:11.128 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 01:44:11.128 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 01:44:11.128 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 01:44:11.128 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 01:44:11.128 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 01:44:11.129 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 01:44:11.129 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 01:44:11.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 01:44:11.129 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:44:11.129 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:44:11.129 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:44:11.129 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 01:44:11.129 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:44:11.129 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:44:11.129 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:44:11.129 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 01:44:11.129 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 01:44:11.129 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 01:44:11.129 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 01:44:11.129 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:44:11.129 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:44:11.129 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:44:11.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 01:44:11.130 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:44:11.130 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:44:11.130 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:44:11.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:44:11.130 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:44:11.130 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:44:11.130 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:44:11.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:44:11.130 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:44:11.130 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:44:11.130 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:44:11.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:44:11.130 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:44:11.130 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:44:11.130 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:44:11.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:44:11.131 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:44:11.131 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:44:11.131 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:44:11.131 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:44:11.131 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:44:11.131 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:44:11.131 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:44:11.134 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 01:44:11.617 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 01:44:11.662 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:44:11.664 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:44:11.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:44:11.667 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 01:44:11.701 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:44:11.701 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:44:11.701 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:44:11.709 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:44:11.709 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:44:11.710 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:44:11.710 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:44:11.711 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:44:11.756 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:44:11.760 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:44:11.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:44:11.774 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:44:11.775 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:44:11.776 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:44:11.776 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:44:12.095 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 01:44:12.132 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:44:12.133 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:44:12.133 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:44:12.137 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:44:12.573 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 01:44:13.049 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 01:44:13.133 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:44:13.134 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:44:13.134 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:44:13.138 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:44:13.518 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 01:44:13.988 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 01:44:14.134 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:44:14.135 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:44:14.135 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:44:14.138 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:44:14.458 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 01:44:14.929 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 01:44:15.135 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:44:15.135 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:44:15.136 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:44:15.139 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:44:15.403 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 01:44:15.881 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 01:44:16.136 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:44:16.136 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:44:16.137 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:44:16.140 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:44:16.353 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 01:44:16.824 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 01:44:17.295 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 01:44:17.767 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 01:44:18.246 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 01:44:18.723 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 01:44:19.202 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 01:44:19.680 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 01:44:19.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:44:19.780 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:44:19.780 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:44:19.781 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:44:19.798 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:44:19.798 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:44:19.798 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:44:19.800 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:44:19.800 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:44:19.800 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:44:19.800 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:44:19.800 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:44:19.816 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:44:19.818 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:44:19.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:44:19.827 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:44:19.827 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:44:19.828 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:44:19.828 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:44:20.158 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 01:44:20.636 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 01:44:21.114 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 01:44:21.593 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 01:44:22.071 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 01:44:22.540 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 01:44:23.012 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 01:44:23.490 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 01:44:23.968 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-09 01:44:24.447 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-09 01:44:24.925 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-09 01:44:25.403 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-09 01:44:25.882 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-09 01:44:26.360 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-09 01:44:26.838 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-09 01:44:27.316 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-09 01:44:27.794 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-09 01:44:27.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:44:27.832 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:44:27.833 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:44:27.833 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:44:27.850 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:44:27.850 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:44:27.850 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:44:27.852 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:44:27.852 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:44:27.852 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:44:27.852 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:44:27.852 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:44:27.886 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:44:27.890 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:44:27.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:44:27.901 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:44:27.902 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:44:27.902 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:44:27.902 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:44:28.272 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-09 01:44:28.750 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-09 01:44:29.227 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-09 01:44:29.697 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-09 01:44:30.171 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-09 01:44:30.650 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-09 01:44:31.128 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-09 01:44:31.607 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-09 01:44:32.085 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-01-09 01:44:32.563 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-01-09 01:44:33.042 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-01-09 01:44:33.520 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-01-09 01:44:34.000 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-01-09 01:44:34.478 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-01-09 01:44:34.956 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-01-09 01:44:35.435 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-01-09 01:44:35.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:44:35.908 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:44:35.909 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:44:35.909 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:44:35.912 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-01-09 01:44:35.926 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:44:35.927 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:44:35.927 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:44:35.928 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:44:35.928 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:44:35.928 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:44:35.928 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:44:35.928 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:44:35.958 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:44:35.962 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:44:35.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:44:35.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:44:35.971 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:44:35.971 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:44:35.971 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:44:35.971 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:44:36.382 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-01-09 01:44:36.851 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-01-09 01:44:37.321 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-01-09 01:44:37.792 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-01-09 01:44:38.263 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-01-09 01:44:38.734 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-01-09 01:44:39.207 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-01-09 01:44:39.681 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-01-09 01:44:40.150 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-01-09 01:44:40.620 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-01-09 01:44:41.090 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-01-09 01:44:41.561 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-01-09 01:44:42.035 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-01-09 01:44:42.514 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-01-09 01:44:42.992 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-01-09 01:44:43.470 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-01-09 01:44:43.948 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-01-09 01:44:43.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:44:43.976 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:44:43.977 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:44:43.977 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:44:43.977 [WARNING] transceiver.py:250 (MS@172.18.122.22:6700) RX TRXD message (fn=7046 tn=1 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:44:43.977 [WARNING] transceiver.py:250 (MS@172.18.122.22:6700) RX TRXD message (fn=7046 tn=2 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:44:43.993 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:44:43.994 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:44:43.994 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:44:43.994 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:44:44.003 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:44:44.003 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:44:44.003 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:44:44.003 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:44:44.003 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:44:44.003 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:44:44.003 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 01:44:44.004 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=7050 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:44:44.005 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=7050 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:44:48.995 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:44:48.996 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:44:48.997 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:44:48.998 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:44:48.998 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:44:48.999 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:44:49.010 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:44:49.011 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:44:49.011 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:44:49.011 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:44:49.011 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 01:44:49.013 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 01:44:49.013 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 01:44:49.013 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:44:49.013 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:44:49.013 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:44:49.014 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 01:44:49.014 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:44:49.014 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 01:44:49.015 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 01:44:49.015 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 01:44:49.015 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:44:49.015 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:44:49.016 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:44:49.016 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 01:44:49.016 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:44:49.016 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 01:44:49.017 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 01:44:49.017 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 01:44:49.017 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:44:49.017 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:44:49.017 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:44:49.017 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 01:44:49.018 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:44:49.018 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 01:44:49.020 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 01:44:49.020 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 01:44:49.020 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 01:44:49.020 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 01:44:49.020 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 01:44:49.020 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 01:44:49.020 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 01:44:49.020 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 01:44:49.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 01:44:49.020 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:44:49.020 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:44:49.020 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:44:49.020 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 01:44:49.020 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:44:49.020 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:44:49.020 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:44:49.021 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 01:44:49.021 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 01:44:49.021 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 01:44:49.021 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 01:44:49.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:44:49.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:44:49.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:44:49.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 01:44:49.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:44:49.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:44:49.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:44:49.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:44:49.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:44:49.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:44:49.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:44:49.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:44:49.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:44:49.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:44:49.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:44:49.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:44:49.022 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:44:49.022 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:44:49.022 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:44:49.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:44:49.022 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:44:49.022 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:44:49.022 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:44:49.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:44:49.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:44:49.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:44:49.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:44:49.025 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 01:44:49.510 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 01:44:49.549 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:44:49.552 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:44:49.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:44:49.554 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 01:44:49.578 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:44:49.578 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:44:49.579 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:44:49.585 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:44:49.585 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:44:49.585 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:44:49.585 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:44:49.585 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:44:49.602 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:44:49.606 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:44:49.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:44:49.616 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:44:49.616 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:44:49.616 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:44:49.616 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:44:49.988 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 01:44:50.024 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:44:50.024 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:44:50.024 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:44:50.028 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:44:50.466 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 01:44:50.945 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 01:44:51.025 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:44:51.025 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:44:51.025 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:44:51.029 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:44:51.424 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 01:44:51.902 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 01:44:52.026 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:44:52.026 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:44:52.027 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:44:52.030 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:44:52.380 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 01:44:52.858 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 01:44:53.027 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:44:53.027 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:44:53.028 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:44:53.030 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:44:53.337 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 01:44:53.814 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 01:44:54.028 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:44:54.028 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:44:54.029 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:44:54.031 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:44:54.292 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 01:44:54.770 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 01:44:55.249 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 01:44:55.727 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 01:44:56.206 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 01:44:56.684 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 01:44:57.162 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 01:44:57.618 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:44:57.621 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:44:57.621 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:44:57.621 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:44:57.638 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:44:57.638 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:44:57.638 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:44:57.640 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:44:57.640 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:44:57.640 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:44:57.640 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:44:57.640 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:44:57.641 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 01:44:57.687 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:44:57.691 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:44:57.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:44:57.698 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:44:57.699 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:44:57.699 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:44:57.699 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:44:58.119 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 01:44:58.598 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 01:44:59.076 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 01:44:59.554 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 01:45:00.033 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 01:45:00.518 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 01:45:00.997 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 01:45:01.476 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 01:45:01.954 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-09 01:45:02.426 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-09 01:45:02.897 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-09 01:45:03.373 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-09 01:45:03.851 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-09 01:45:04.329 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-09 01:45:04.807 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-09 01:45:05.286 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-09 01:45:05.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:45:05.704 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:45:05.705 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:45:05.705 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:45:05.716 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:45:05.716 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:45:05.716 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:45:05.717 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:45:05.718 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:45:05.719 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:45:05.719 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:45:05.719 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:45:05.719 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:45:05.719 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:45:05.719 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 01:45:05.719 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3562 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:45:05.719 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3562 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:45:05.719 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3562 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:45:05.719 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3562 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:45:05.719 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3562 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:45:05.719 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3562 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:45:05.719 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3562 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:45:05.719 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3563 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:45:05.719 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3563 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:45:05.719 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3563 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:45:05.719 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3563 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:45:05.719 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3563 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:45:05.719 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3563 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:45:05.719 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3563 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:45:05.719 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3563 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:45:10.721 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:45:10.721 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:45:10.722 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:45:10.723 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:45:10.723 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:45:10.724 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:45:10.732 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:45:10.733 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:45:10.733 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:45:10.734 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:45:10.734 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 01:45:10.736 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 01:45:10.736 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 01:45:10.737 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:45:10.737 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:45:10.737 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:45:10.738 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 01:45:10.738 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:45:10.738 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 01:45:10.740 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 01:45:10.740 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 01:45:10.740 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:45:10.740 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:45:10.740 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:45:10.740 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 01:45:10.740 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:45:10.740 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 01:45:10.743 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 01:45:10.743 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 01:45:10.743 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:45:10.743 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:45:10.743 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:45:10.743 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 01:45:10.743 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:45:10.743 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 01:45:10.746 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 01:45:10.746 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 01:45:10.746 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 01:45:10.746 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 01:45:10.746 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 01:45:10.746 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 01:45:10.746 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 01:45:10.746 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 01:45:10.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 01:45:10.746 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:45:10.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:45:10.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:45:10.747 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 01:45:10.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:45:10.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:45:10.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:45:10.747 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 01:45:10.747 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 01:45:10.747 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 01:45:10.747 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 01:45:10.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:45:10.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:45:10.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:45:10.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 01:45:10.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:45:10.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:45:10.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:45:10.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:45:10.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:45:10.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:45:10.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:45:10.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:45:10.748 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:45:10.748 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:45:10.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:45:10.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:45:10.748 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:45:10.748 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:45:10.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:45:10.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:45:10.748 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:45:10.748 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:45:10.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:45:10.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:45:10.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:45:10.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:45:10.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:45:10.752 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 01:45:11.235 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 01:45:11.272 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:45:11.273 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:45:11.275 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 01:45:11.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:45:11.296 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:45:11.296 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:45:11.296 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:45:11.300 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:45:11.300 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:45:11.300 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:45:11.301 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:45:11.301 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:45:11.328 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:45:11.332 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:45:11.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:45:11.340 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:45:11.340 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:45:11.340 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:45:11.340 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:45:11.712 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 01:45:11.749 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:45:11.750 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:45:11.750 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:45:11.753 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:45:12.189 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 01:45:12.667 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 01:45:12.750 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:45:12.751 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:45:12.751 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:45:12.755 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:45:13.140 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 01:45:13.611 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 01:45:13.752 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:45:13.752 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:45:13.752 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:45:13.756 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:45:14.088 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 01:45:14.557 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 01:45:14.753 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:45:14.753 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:45:14.753 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:45:14.758 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:45:15.027 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 01:45:15.500 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 01:45:15.754 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:45:15.754 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:45:15.754 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:45:15.758 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:45:15.979 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 01:45:16.458 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 01:45:16.927 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 01:45:17.397 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 01:45:17.870 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 01:45:18.349 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 01:45:18.827 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 01:45:19.305 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 01:45:19.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:45:19.346 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:45:19.346 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:45:19.346 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:45:19.364 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:45:19.364 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:45:19.364 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:45:19.365 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:45:19.365 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:45:19.366 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:45:19.366 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:45:19.366 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:45:19.397 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:45:19.400 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:45:19.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:45:19.411 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:45:19.411 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:45:19.412 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:45:19.412 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:45:19.783 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 01:45:20.261 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 01:45:20.739 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 01:45:21.217 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 01:45:21.694 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 01:45:22.173 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 01:45:22.651 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 01:45:23.129 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 01:45:23.603 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-09 01:45:24.080 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-09 01:45:24.558 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-09 01:45:25.031 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-09 01:45:25.509 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-09 01:45:25.988 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-09 01:45:26.466 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-09 01:45:26.943 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-09 01:45:27.412 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-09 01:45:27.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:45:27.416 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:45:27.417 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:45:27.417 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:45:27.436 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:45:27.436 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:45:27.436 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:45:27.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:45:27.438 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:45:27.438 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:45:27.438 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:45:27.438 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:45:27.452 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:45:27.454 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:45:27.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:45:27.463 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:45:27.463 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:45:27.463 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:45:27.463 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:45:27.881 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-09 01:45:28.356 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-09 01:45:28.832 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-09 01:45:29.310 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-09 01:45:29.788 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-09 01:45:30.267 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-09 01:45:30.744 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-09 01:45:31.223 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-09 01:45:31.702 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-01-09 01:45:32.180 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-01-09 01:45:32.658 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-01-09 01:45:33.136 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-01-09 01:45:33.614 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-01-09 01:45:34.092 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-01-09 01:45:34.570 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-01-09 01:45:35.048 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-01-09 01:45:35.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:45:35.469 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:45:35.470 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:45:35.470 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:45:35.487 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:45:35.487 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:45:35.487 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:45:35.489 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:45:35.489 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:45:35.489 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:45:35.489 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:45:35.489 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:45:35.518 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:45:35.522 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:45:35.526 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-01-09 01:45:35.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:45:35.532 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:45:35.532 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:45:35.532 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:45:35.532 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:45:36.004 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-01-09 01:45:36.483 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-01-09 01:45:36.961 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-01-09 01:45:37.439 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-01-09 01:45:37.918 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-01-09 01:45:38.395 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-01-09 01:45:38.873 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-01-09 01:45:39.351 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-01-09 01:45:39.830 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-01-09 01:45:40.308 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-01-09 01:45:40.785 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-01-09 01:45:41.264 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-01-09 01:45:41.742 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-01-09 01:45:42.220 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-01-09 01:45:42.698 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-01-09 01:45:43.177 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-01-09 01:45:43.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:45:43.538 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:45:43.538 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:45:43.539 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:45:43.555 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:45:43.555 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:45:43.555 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:45:43.555 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:45:43.557 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:45:43.557 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:45:43.557 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:45:43.557 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:45:43.557 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:45:43.557 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:45:43.557 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 01:45:43.557 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=7019 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:45:43.557 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=7019 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:45:43.557 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=7019 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:45:43.557 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=7019 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:45:43.557 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=7019 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:45:43.557 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=7019 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:45:43.557 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=7019 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:45:43.558 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=7020 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:45:43.558 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=7020 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:45:43.558 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=7020 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:45:43.558 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=7020 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:45:43.558 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=7020 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:45:43.558 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=7020 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:45:43.558 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=7020 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:45:43.558 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=7020 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:45:48.560 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:45:48.560 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:45:48.562 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:45:48.563 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:45:48.563 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:45:48.564 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:45:48.569 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:45:48.570 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:45:48.570 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:45:48.570 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:45:48.570 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 01:45:48.572 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 01:45:48.572 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 01:45:48.572 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:45:48.572 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:45:48.573 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:45:48.573 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 01:45:48.573 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:45:48.573 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 01:45:48.574 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 01:45:48.574 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 01:45:48.575 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:45:48.575 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:45:48.575 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:45:48.575 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 01:45:48.575 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:45:48.575 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 01:45:48.576 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 01:45:48.576 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 01:45:48.576 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:45:48.576 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:45:48.577 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:45:48.577 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 01:45:48.577 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:45:48.577 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 01:45:48.579 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 01:45:48.579 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 01:45:48.579 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 01:45:48.579 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 01:45:48.579 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 01:45:48.579 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 01:45:48.579 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 01:45:48.579 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 01:45:48.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 01:45:48.579 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:45:48.579 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:45:48.579 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:45:48.579 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 01:45:48.579 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:45:48.579 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:45:48.579 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:45:48.579 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 01:45:48.579 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 01:45:48.579 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 01:45:48.579 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 01:45:48.579 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:45:48.580 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:45:48.580 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:45:48.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 01:45:48.580 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:45:48.580 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:45:48.580 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:45:48.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:45:48.580 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:45:48.580 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:45:48.580 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:45:48.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:45:48.580 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:45:48.580 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:45:48.580 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:45:48.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:45:48.580 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:45:48.580 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:45:48.581 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:45:48.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:45:48.581 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:45:48.581 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:45:48.581 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:45:48.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:45:48.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:45:48.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:45:48.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:45:48.584 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 01:45:49.067 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 01:45:49.106 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:45:49.108 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:45:49.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:45:49.110 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 01:45:49.138 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:45:49.138 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:45:49.138 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:45:49.144 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:45:49.145 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:45:49.145 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:45:49.145 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:45:49.145 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:45:49.159 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:45:49.163 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:45:49.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:45:49.177 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:45:49.177 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:45:49.177 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:45:49.178 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:45:49.543 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 01:45:49.582 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:45:49.582 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:45:49.584 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:45:49.585 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:45:50.022 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 01:45:50.500 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 01:45:50.583 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:45:50.583 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:45:50.585 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:45:50.586 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:45:50.979 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 01:45:51.457 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 01:45:51.584 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:45:51.584 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:45:51.585 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:45:51.587 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:45:51.936 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 01:45:52.414 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 01:45:52.585 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:45:52.585 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:45:52.586 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:45:52.588 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:45:52.892 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 01:45:53.370 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 01:45:53.587 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:45:53.587 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:45:53.587 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:45:53.588 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:45:53.848 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 01:45:54.326 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 01:45:54.805 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 01:45:55.283 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 01:45:55.761 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 01:45:56.240 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 01:45:56.718 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 01:45:57.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:45:57.183 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:45:57.184 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:45:57.184 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:45:57.196 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 01:45:57.204 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:45:57.204 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:45:57.204 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:45:57.206 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:45:57.206 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:45:57.206 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:45:57.206 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:45:57.206 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:45:57.242 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:45:57.246 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:45:57.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:45:57.256 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:45:57.257 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:45:57.257 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:45:57.257 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:45:57.674 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 01:45:58.153 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 01:45:58.631 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 01:45:59.109 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 01:45:59.588 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 01:46:00.067 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 01:46:00.545 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 01:46:01.024 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 01:46:01.519 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-09 01:46:01.998 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-09 01:46:02.476 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-09 01:46:02.953 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-09 01:46:03.431 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-09 01:46:03.910 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-09 01:46:04.388 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-09 01:46:04.867 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-09 01:46:05.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:46:05.262 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:46:05.263 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:46:05.263 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:46:05.280 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:46:05.280 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:46:05.280 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:46:05.282 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:46:05.282 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:46:05.282 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:46:05.282 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:46:05.282 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:46:05.283 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:46:05.284 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:46:05.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:46:05.286 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:46:05.286 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:46:05.286 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:46:05.286 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:46:05.344 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-09 01:46:05.813 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-09 01:46:06.282 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-09 01:46:06.758 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-09 01:46:07.236 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-09 01:46:07.714 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-09 01:46:08.192 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-09 01:46:08.666 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-09 01:46:09.135 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-09 01:46:09.610 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-01-09 01:46:10.088 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-01-09 01:46:10.567 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-01-09 01:46:11.045 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-01-09 01:46:11.523 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-01-09 01:46:12.001 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-01-09 01:46:12.479 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-01-09 01:46:12.957 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-01-09 01:46:13.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:46:13.292 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:46:13.293 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:46:13.293 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:46:13.302 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:46:13.302 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:46:13.302 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:46:13.304 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:46:13.304 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:46:13.304 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:46:13.304 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:46:13.304 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:46:13.330 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:46:13.333 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:46:13.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:46:13.340 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:46:13.341 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:46:13.341 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:46:13.341 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:46:13.434 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-01-09 01:46:13.912 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-01-09 01:46:14.390 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-01-09 01:46:14.868 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-01-09 01:46:15.347 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-01-09 01:46:15.825 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-01-09 01:46:16.303 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-01-09 01:46:16.781 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-01-09 01:46:17.259 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-01-09 01:46:17.737 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-01-09 01:46:18.215 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-01-09 01:46:18.693 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-01-09 01:46:19.171 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-01-09 01:46:19.649 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-01-09 01:46:20.127 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-01-09 01:46:20.605 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-01-09 01:46:21.083 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-01-09 01:46:21.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:46:21.347 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:46:21.348 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:46:21.348 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:46:21.367 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:46:21.367 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:46:21.367 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:46:21.370 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:46:21.370 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:46:21.370 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:46:21.370 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:46:21.370 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:46:21.412 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:46:21.416 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:46:21.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:46:21.425 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:46:21.426 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:46:21.426 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:46:21.426 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:46:21.561 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-01-09 01:46:22.039 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-01-09 01:46:22.517 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-01-09 01:46:22.995 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-01-09 01:46:23.473 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-01-09 01:46:23.951 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-01-09 01:46:24.430 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-01-09 01:46:24.908 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-01-09 01:46:25.386 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-01-09 01:46:25.865 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-01-09 01:46:26.344 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-01-09 01:46:26.821 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-01-09 01:46:27.299 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-01-09 01:46:27.776 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-01-09 01:46:28.253 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-01-09 01:46:28.732 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-01-09 01:46:29.210 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-01-09 01:46:29.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:46:29.430 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:46:29.431 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:46:29.431 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:46:29.448 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:46:29.448 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:46:29.448 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:46:29.450 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:46:29.451 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:46:29.451 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:46:29.451 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:46:29.451 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:46:29.491 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:46:29.495 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:46:29.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:46:29.506 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:46:29.506 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:46:29.507 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:46:29.507 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:46:29.684 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-01-09 01:46:30.153 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-01-09 01:46:30.629 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-01-09 01:46:31.107 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-01-09 01:46:31.586 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-01-09 01:46:32.064 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-01-09 01:46:32.542 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-01-09 01:46:33.021 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-01-09 01:46:33.499 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-01-09 01:46:33.978 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-01-09 01:46:34.456 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-01-09 01:46:34.935 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-01-09 01:46:35.413 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-01-09 01:46:35.891 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-01-09 01:46:36.369 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-01-09 01:46:36.847 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-01-09 01:46:37.324 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-01-09 01:46:37.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:46:37.512 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:46:37.512 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:46:37.513 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:46:37.532 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:46:37.532 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:46:37.533 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:46:37.534 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:46:37.534 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:46:37.534 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:46:37.534 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:46:37.534 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:46:37.559 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:46:37.563 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:46:37.569 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:46:37.572 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:46:37.572 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:46:37.572 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:46:37.572 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:46:37.797 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-01-09 01:46:38.275 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-01-09 01:46:38.747 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-01-09 01:46:39.223 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-01-09 01:46:39.701 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-01-09 01:46:40.179 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-01-09 01:46:40.658 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-01-09 01:46:41.136 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-01-09 01:46:41.614 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-01-09 01:46:42.093 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-01-09 01:46:42.571 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-01-09 01:46:43.048 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-01-09 01:46:43.526 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-01-09 01:46:44.004 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-01-09 01:46:44.483 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-01-09 01:46:44.960 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-01-09 01:46:45.439 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-01-09 01:46:45.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:46:45.578 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:46:45.578 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:46:45.579 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:46:45.592 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:46:45.592 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:46:45.592 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:46:45.594 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:46:45.594 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:46:45.594 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:46:45.594 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:46:45.594 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:46:45.623 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:46:45.627 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:46:45.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:46:45.638 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:46:45.638 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:46:45.638 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:46:45.639 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:46:45.916 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-01-09 01:46:46.394 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-01-09 01:46:46.872 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-01-09 01:46:47.350 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-01-09 01:46:47.829 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-01-09 01:46:48.307 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-01-09 01:46:48.786 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-01-09 01:46:49.264 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-01-09 01:46:49.742 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-01-09 01:46:50.220 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-01-09 01:46:50.699 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-01-09 01:46:51.177 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-01-09 01:46:51.656 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-01-09 01:46:52.133 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-01-09 01:46:52.611 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-01-09 01:46:53.090 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-01-09 01:46:53.568 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-01-09 01:46:53.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:46:53.644 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:46:53.644 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:46:53.645 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:46:53.663 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:46:53.663 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:46:53.663 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:46:53.663 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:46:53.673 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:46:53.673 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:46:53.673 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:46:53.673 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:46:53.673 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:46:53.673 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:46:53.673 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 01:46:53.674 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=13893 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:46:53.674 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=13893 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:46:58.675 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:46:58.675 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:46:58.675 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:46:58.676 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:46:58.676 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:46:58.676 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:46:58.685 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:46:58.685 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:46:58.685 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:46:58.685 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:46:58.685 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 01:46:58.686 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 01:46:58.687 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 01:46:58.687 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:46:58.687 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:46:58.687 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:46:58.687 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 01:46:58.687 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:46:58.687 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 01:46:58.688 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 01:46:58.688 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 01:46:58.688 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:46:58.688 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:46:58.688 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:46:58.688 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 01:46:58.688 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:46:58.688 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 01:46:58.689 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 01:46:58.689 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 01:46:58.689 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:46:58.689 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:46:58.690 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:46:58.690 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 01:46:58.690 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:46:58.690 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 01:46:58.691 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 01:46:58.691 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 01:46:58.691 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 01:46:58.691 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 01:46:58.691 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 01:46:58.692 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 01:46:58.692 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 01:46:58.692 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 01:46:58.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 01:46:58.692 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:46:58.692 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:46:58.692 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:46:58.692 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 01:46:58.692 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:46:58.692 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:46:58.692 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:46:58.692 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 01:46:58.692 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 01:46:58.692 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 01:46:58.692 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 01:46:58.692 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:46:58.692 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:46:58.692 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:46:58.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 01:46:58.692 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:46:58.692 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:46:58.692 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:46:58.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:46:58.693 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:46:58.693 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:46:58.693 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:46:58.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:46:58.693 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:46:58.693 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:46:58.693 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:46:58.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:46:58.693 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:46:58.693 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:46:58.693 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:46:58.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:46:58.693 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:46:58.693 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:46:58.693 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:46:58.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:46:58.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:46:58.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:46:58.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:46:58.697 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 01:46:59.179 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 01:46:59.212 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:46:59.214 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:46:59.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:46:59.216 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 01:46:59.232 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:46:59.232 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:46:59.232 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:46:59.235 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:46:59.235 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:46:59.235 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:46:59.235 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:46:59.235 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:46:59.271 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:46:59.275 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:46:59.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:46:59.288 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:46:59.288 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:46:59.288 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:46:59.288 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:46:59.657 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 01:46:59.694 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:46:59.695 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:46:59.695 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:46:59.695 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:47:00.135 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 01:47:00.613 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 01:47:00.695 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:47:00.695 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:47:00.696 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:47:00.696 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:47:01.092 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 01:47:01.571 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 01:47:01.696 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:47:01.696 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:47:01.696 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:47:01.697 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:47:02.050 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 01:47:02.528 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 01:47:02.696 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:47:02.697 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:47:02.697 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:47:02.697 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:47:03.007 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 01:47:03.485 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 01:47:03.698 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:47:03.699 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:47:03.699 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:47:03.699 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:47:03.963 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 01:47:04.442 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 01:47:04.921 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 01:47:05.399 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 01:47:05.878 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 01:47:06.356 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 01:47:06.834 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 01:47:07.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:47:07.293 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:47:07.294 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:47:07.294 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:47:07.308 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:47:07.308 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:47:07.308 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:47:07.310 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:47:07.310 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:47:07.310 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:47:07.310 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:47:07.310 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:47:07.312 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 01:47:07.358 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:47:07.362 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:47:07.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:47:07.374 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:47:07.374 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:47:07.374 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:47:07.374 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:47:07.790 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 01:47:08.269 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 01:47:08.747 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 01:47:09.227 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 01:47:09.705 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 01:47:10.183 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 01:47:10.662 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 01:47:11.141 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 01:47:11.619 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-09 01:47:12.098 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-09 01:47:12.576 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-09 01:47:13.054 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-09 01:47:13.533 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-09 01:47:14.012 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-09 01:47:14.490 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-09 01:47:14.969 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-09 01:47:15.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:47:15.379 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:47:15.380 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:47:15.381 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:47:15.393 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:47:15.393 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:47:15.393 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:47:15.393 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:47:15.395 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:47:15.395 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:47:15.395 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:47:15.395 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:47:15.395 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:47:15.395 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:47:15.395 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 01:47:15.395 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3562 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:47:15.395 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3562 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:47:15.395 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3562 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:47:15.395 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3562 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:47:15.395 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3562 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:47:15.395 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3562 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:47:20.397 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:47:20.397 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:47:20.399 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:47:20.400 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:47:20.400 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:47:20.401 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:47:20.409 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:47:20.410 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:47:20.410 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:47:20.410 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:47:20.410 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 01:47:20.411 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 01:47:20.412 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 01:47:20.412 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:47:20.412 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:47:20.412 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:47:20.412 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 01:47:20.412 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:47:20.412 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 01:47:20.413 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 01:47:20.413 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 01:47:20.413 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:47:20.413 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:47:20.413 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:47:20.413 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 01:47:20.414 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:47:20.414 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 01:47:20.415 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 01:47:20.415 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 01:47:20.415 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:47:20.415 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:47:20.415 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:47:20.415 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 01:47:20.416 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:47:20.416 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 01:47:20.418 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 01:47:20.418 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 01:47:20.418 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 01:47:20.418 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 01:47:20.418 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 01:47:20.419 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 01:47:20.419 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 01:47:20.419 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 01:47:20.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 01:47:20.419 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:47:20.419 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:47:20.419 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:47:20.419 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 01:47:20.419 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:47:20.419 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:47:20.419 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:47:20.419 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 01:47:20.419 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 01:47:20.419 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 01:47:20.419 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 01:47:20.419 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:47:20.419 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:47:20.419 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:47:20.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 01:47:20.420 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:47:20.420 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:47:20.420 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:47:20.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:47:20.420 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:47:20.420 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:47:20.420 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:47:20.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:47:20.420 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:47:20.420 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:47:20.420 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:47:20.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:47:20.420 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:47:20.420 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:47:20.420 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:47:20.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:47:20.420 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:47:20.420 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:47:20.420 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:47:20.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:47:20.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:47:20.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:47:20.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:47:20.424 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 01:47:20.907 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 01:47:20.944 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:47:20.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:47:20.947 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:47:20.951 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 01:47:20.978 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:47:20.978 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:47:20.978 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:47:20.983 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:47:20.983 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:47:20.983 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:47:20.983 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:47:20.984 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:47:21.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:47:21.010 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:47:21.011 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:47:21.011 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:47:21.011 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:47:21.384 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 01:47:21.422 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:47:21.422 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:47:21.423 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:47:21.426 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:47:21.862 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 01:47:22.340 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 01:47:22.423 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:47:22.423 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:47:22.424 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:47:22.427 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:47:22.819 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 01:47:23.297 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 01:47:23.423 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:47:23.424 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:47:23.424 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:47:23.428 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:47:23.774 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 01:47:24.253 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 01:47:24.424 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:47:24.425 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:47:24.425 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:47:24.429 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:47:24.731 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 01:47:25.210 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 01:47:25.425 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:47:25.426 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:47:25.426 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:47:25.430 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:47:25.689 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 01:47:26.167 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 01:47:26.646 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 01:47:27.124 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 01:47:27.602 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 01:47:28.081 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 01:47:28.559 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 01:47:29.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:47:29.019 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:47:29.021 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:47:29.022 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:47:29.038 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 01:47:29.042 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:47:29.042 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:47:29.043 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:47:29.043 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:47:29.044 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:47:29.044 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:47:29.044 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:47:29.044 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:47:29.044 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:47:29.044 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:47:29.044 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 01:47:34.046 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:47:34.046 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:47:34.048 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:47:34.048 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:47:34.048 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:47:34.048 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:47:34.052 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:47:34.052 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:47:34.053 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:47:34.053 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:47:34.053 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 01:47:34.055 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 01:47:34.055 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 01:47:34.055 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:47:34.055 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:47:34.055 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:47:34.056 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 01:47:34.056 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:47:34.056 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 01:47:34.057 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 01:47:34.057 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 01:47:34.057 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:47:34.057 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:47:34.057 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:47:34.058 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 01:47:34.058 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:47:34.058 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 01:47:34.059 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 01:47:34.059 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 01:47:34.059 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:47:34.059 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:47:34.059 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:47:34.059 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 01:47:34.059 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:47:34.059 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 01:47:34.061 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 01:47:34.061 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 01:47:34.061 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 01:47:34.061 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 01:47:34.061 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 01:47:34.061 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 01:47:34.061 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 01:47:34.062 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 01:47:34.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 01:47:34.062 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:47:34.062 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:47:34.062 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:47:34.062 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 01:47:34.062 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:47:34.062 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:47:34.062 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:47:34.062 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 01:47:34.062 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 01:47:34.062 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 01:47:34.062 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 01:47:34.062 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:47:34.062 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:47:34.062 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:47:34.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 01:47:34.062 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:47:34.062 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:47:34.062 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:47:34.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:47:34.062 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:47:34.063 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:47:34.063 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:47:34.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:47:34.063 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:47:34.063 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:47:34.063 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:47:34.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:47:34.063 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:47:34.063 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:47:34.063 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:47:34.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:47:34.063 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:47:34.063 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:47:34.063 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:47:34.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:47:34.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:47:34.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:47:34.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:47:34.067 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 01:47:34.551 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 01:47:34.583 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:47:34.585 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:47:34.587 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 01:47:34.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:47:34.603 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:47:34.603 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:47:34.603 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:47:34.608 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:47:34.608 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:47:34.609 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:47:34.609 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:47:34.609 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:47:34.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:47:34.654 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:47:34.654 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:47:34.655 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:47:34.655 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:47:35.029 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 01:47:35.064 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:47:35.065 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:47:35.065 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:47:35.066 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:47:35.508 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 01:47:35.987 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 01:47:36.066 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:47:36.066 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:47:36.066 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:47:36.067 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:47:36.465 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 01:47:36.943 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 01:47:37.067 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:47:37.067 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:47:37.067 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:47:37.068 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:47:37.422 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 01:47:37.900 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 01:47:38.068 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:47:38.068 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:47:38.068 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:47:38.068 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:47:38.378 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 01:47:38.856 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 01:47:39.069 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:47:39.070 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:47:39.070 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:47:39.070 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:47:39.335 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 01:47:39.814 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 01:47:40.292 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 01:47:40.771 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 01:47:41.249 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 01:47:41.728 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 01:47:42.206 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 01:47:42.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:47:42.662 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:47:42.664 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:47:42.664 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:47:42.682 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:47:42.683 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:47:42.683 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:47:42.683 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:47:42.684 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 01:47:42.693 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:47:42.693 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:47:42.693 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:47:42.694 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:47:42.694 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:47:42.694 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:47:42.694 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 01:47:42.694 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1839 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:47:42.695 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1839 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:47:42.695 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1839 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:47:42.695 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1839 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:47:42.695 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1839 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:47:42.695 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1839 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:47:42.695 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1840 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:47:42.695 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1840 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:47:42.695 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1840 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:47:42.695 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1840 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:47:42.695 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1840 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:47:42.695 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1840 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:47:42.695 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1840 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:47:42.695 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1840 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:47:42.696 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1841 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:47:42.696 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1841 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:47:42.696 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1841 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:47:42.696 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1841 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:47:42.696 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1841 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:47:42.696 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1841 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:47:42.696 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1841 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:47:42.696 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1841 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:47:47.687 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:47:47.688 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:47:47.689 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:47:47.690 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:47:47.690 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:47:47.691 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:47:47.700 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:47:47.701 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:47:47.701 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:47:47.702 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:47:47.702 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 01:47:47.705 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 01:47:47.705 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 01:47:47.705 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:47:47.705 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:47:47.705 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:47:47.706 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 01:47:47.706 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:47:47.706 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 01:47:47.708 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 01:47:47.708 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 01:47:47.708 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:47:47.708 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:47:47.708 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:47:47.708 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 01:47:47.708 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:47:47.708 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 01:47:47.710 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 01:47:47.710 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 01:47:47.710 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:47:47.711 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:47:47.711 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:47:47.711 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 01:47:47.711 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:47:47.711 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 01:47:47.714 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 01:47:47.714 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 01:47:47.714 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 01:47:47.714 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 01:47:47.714 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 01:47:47.714 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 01:47:47.714 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 01:47:47.714 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 01:47:47.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 01:47:47.714 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:47:47.714 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:47:47.714 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:47:47.714 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 01:47:47.714 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:47:47.714 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:47:47.714 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:47:47.715 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 01:47:47.715 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 01:47:47.715 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 01:47:47.715 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 01:47:47.715 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:47:47.715 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:47:47.715 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:47:47.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 01:47:47.715 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:47:47.715 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:47:47.715 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:47:47.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:47:47.715 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:47:47.715 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:47:47.715 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:47:47.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:47:47.716 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:47:47.716 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:47:47.716 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:47:47.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:47:47.716 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:47:47.716 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:47:47.716 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:47:47.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:47:47.716 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:47:47.716 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:47:47.716 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:47:47.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:47:47.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:47:47.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:47:47.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:47:47.720 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 01:47:48.202 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 01:47:48.241 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:47:48.243 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:47:48.246 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 01:47:48.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:47:48.263 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:47:48.263 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:47:48.263 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:47:48.264 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:47:48.265 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:47:48.265 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:47:48.265 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:47:48.265 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:47:48.680 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 01:47:48.717 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:47:48.718 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:47:48.719 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:47:48.722 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:47:49.158 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 01:47:49.636 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 01:47:49.719 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:47:49.719 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:47:49.720 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:47:49.723 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:47:50.114 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 01:47:50.591 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 01:47:50.720 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:47:50.720 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:47:50.721 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:47:50.724 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:47:51.069 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 01:47:51.547 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 01:47:51.721 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:47:51.721 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:47:51.721 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:47:51.725 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:47:52.025 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 01:47:52.504 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 01:47:52.722 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:47:52.722 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:47:52.722 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:47:52.726 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:47:52.982 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 01:47:53.460 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 01:47:53.938 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 01:47:54.416 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 01:47:54.756 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:47:54.756 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:47:54.764 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:47:54.764 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:47:54.764 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:47:54.764 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:47:54.765 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:47:54.765 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:47:54.765 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:47:54.765 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:47:54.765 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:47:54.765 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 01:47:54.765 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:47:54.765 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1505 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:47:54.765 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1505 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:47:54.766 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1505 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:47:54.766 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1505 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:47:59.769 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:47:59.769 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:47:59.772 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:47:59.772 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:47:59.772 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:47:59.772 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:47:59.781 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:47:59.782 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:47:59.782 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:47:59.782 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:47:59.782 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 01:47:59.786 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 01:47:59.786 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 01:47:59.787 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:47:59.787 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:47:59.787 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:47:59.787 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 01:47:59.788 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:47:59.788 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 01:47:59.789 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 01:47:59.789 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 01:47:59.789 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:47:59.789 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:47:59.790 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:47:59.790 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 01:47:59.790 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:47:59.790 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 01:47:59.792 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 01:47:59.792 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 01:47:59.792 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:47:59.792 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:47:59.792 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:47:59.792 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 01:47:59.793 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:47:59.793 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 01:47:59.795 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 01:47:59.795 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 01:47:59.795 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 01:47:59.795 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 01:47:59.795 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 01:47:59.795 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 01:47:59.795 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 01:47:59.795 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 01:47:59.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 01:47:59.796 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:47:59.796 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:47:59.796 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:47:59.796 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 01:47:59.796 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:47:59.796 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:47:59.796 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:47:59.796 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 01:47:59.796 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 01:47:59.796 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 01:47:59.796 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 01:47:59.796 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:47:59.796 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:47:59.796 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:47:59.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 01:47:59.796 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:47:59.796 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:47:59.796 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:47:59.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:47:59.797 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:47:59.797 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:47:59.797 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:47:59.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:47:59.797 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:47:59.797 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:47:59.797 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:47:59.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:47:59.797 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:47:59.797 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:47:59.797 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:47:59.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:47:59.797 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:47:59.797 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:47:59.797 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:47:59.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:47:59.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:47:59.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:47:59.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:47:59.801 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 01:48:00.283 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 01:48:00.311 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:48:00.311 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:48:00.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:48:00.312 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 01:48:00.317 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:48:00.317 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:48:00.317 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:48:00.320 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:48:00.320 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:48:00.320 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:48:00.320 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:48:00.320 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:48:00.752 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 01:48:00.799 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:48:00.799 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:48:00.799 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:48:00.800 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:48:01.221 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 01:48:01.697 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 01:48:01.799 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:48:01.800 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:48:01.800 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:48:01.802 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:48:02.175 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 01:48:02.653 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 01:48:02.800 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:48:02.800 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:48:02.801 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:48:02.802 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:48:03.131 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 01:48:03.609 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 01:48:03.801 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:48:03.802 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:48:03.802 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:48:03.803 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:48:04.087 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 01:48:04.565 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 01:48:04.802 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:48:04.802 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:48:04.803 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:48:04.804 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:48:05.044 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 01:48:05.068 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:48:05.068 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:48:05.068 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:48:05.068 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:48:05.073 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:48:05.073 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:48:05.073 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:48:05.073 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:48:05.073 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:48:05.073 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:48:05.073 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1129 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:48:05.073 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1129 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:48:05.073 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1129 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:48:05.074 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1129 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:48:05.074 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1129 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:48:05.074 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1129 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:48:05.074 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1130 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:48:05.074 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1130 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:48:05.074 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1130 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:48:05.074 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1130 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:48:05.074 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1130 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:48:05.074 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1130 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:48:05.074 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1130 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:48:05.074 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1130 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:48:05.528 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 01:48:06.011 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 01:48:06.497 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 01:48:06.982 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 01:48:07.468 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 01:48:07.954 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 01:48:08.439 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 01:48:08.924 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 01:48:09.409 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 01:48:09.893 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 01:48:10.071 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:48:10.072 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:48:10.072 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 01:48:10.073 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:48:10.073 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:48:10.075 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:48:10.075 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:48:10.076 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:48:10.077 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:48:10.080 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:48:10.081 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:48:10.081 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:48:10.081 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:48:10.081 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 01:48:10.083 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 01:48:10.083 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 01:48:10.083 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:48:10.083 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:48:10.083 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:48:10.083 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 01:48:10.083 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:48:10.083 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 01:48:10.086 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 01:48:10.086 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 01:48:10.086 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:48:10.086 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:48:10.086 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:48:10.086 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 01:48:10.086 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:48:10.086 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 01:48:10.088 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 01:48:10.088 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 01:48:10.089 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:48:10.089 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:48:10.089 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:48:10.089 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 01:48:10.089 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:48:10.089 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 01:48:10.092 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 01:48:10.092 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 01:48:10.093 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 01:48:10.093 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 01:48:10.093 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 01:48:10.093 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 01:48:10.093 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 01:48:10.093 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 01:48:10.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 01:48:10.093 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:48:10.093 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:48:10.093 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:48:10.093 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 01:48:10.093 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:48:10.093 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:48:10.093 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:48:10.093 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 01:48:10.093 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 01:48:10.093 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 01:48:10.093 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 01:48:10.094 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:48:10.094 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:48:10.094 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:48:10.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 01:48:10.094 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:48:10.094 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:48:10.094 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:48:10.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:48:10.094 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:48:10.094 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:48:10.094 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:48:10.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:48:10.094 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:48:10.094 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:48:10.094 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:48:10.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:48:10.094 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:48:10.094 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:48:10.094 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:48:10.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:48:10.094 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:48:10.094 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:48:10.094 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:48:10.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:48:10.096 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:48:10.096 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:48:10.096 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:48:10.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:48:10.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:48:10.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:48:10.096 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:48:10.096 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:48:10.096 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:48:10.096 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 01:48:15.103 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:48:15.103 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:48:15.103 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:48:15.103 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:48:15.103 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:48:15.103 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:48:15.111 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:48:15.112 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:48:15.112 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:48:15.113 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:48:15.113 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 01:48:15.118 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 01:48:15.118 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 01:48:15.118 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:48:15.118 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:48:15.119 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:48:15.119 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 01:48:15.119 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:48:15.119 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 01:48:15.122 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 01:48:15.122 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 01:48:15.122 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:48:15.122 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:48:15.122 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:48:15.122 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 01:48:15.123 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:48:15.123 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 01:48:15.125 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 01:48:15.125 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 01:48:15.125 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:48:15.125 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:48:15.125 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:48:15.125 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 01:48:15.125 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:48:15.125 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 01:48:15.128 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 01:48:15.128 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 01:48:15.128 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 01:48:15.128 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 01:48:15.128 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 01:48:15.128 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 01:48:15.128 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 01:48:15.128 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 01:48:15.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 01:48:15.128 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:48:15.128 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:48:15.128 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:48:15.128 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 01:48:15.128 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:48:15.128 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:48:15.128 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:48:15.128 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 01:48:15.128 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 01:48:15.128 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 01:48:15.129 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 01:48:15.129 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:48:15.129 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:48:15.129 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:48:15.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 01:48:15.129 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:48:15.129 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:48:15.129 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:48:15.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:48:15.129 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:48:15.129 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:48:15.129 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:48:15.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:48:15.129 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:48:15.129 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:48:15.129 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:48:15.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:48:15.130 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:48:15.130 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:48:15.130 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:48:15.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:48:15.130 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:48:15.130 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:48:15.130 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:48:15.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:48:15.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:48:15.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:48:15.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:48:15.133 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 01:48:15.618 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 01:48:15.654 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:48:15.657 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:48:15.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:48:15.660 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 01:48:15.681 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:48:15.681 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:48:15.682 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:48:15.690 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:48:15.690 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:48:15.690 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:48:15.690 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:48:15.690 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:48:16.094 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 01:48:16.132 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:48:16.132 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:48:16.133 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:48:16.134 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:48:16.573 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 01:48:17.051 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 01:48:17.133 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:48:17.134 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:48:17.134 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:48:17.134 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:48:17.529 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 01:48:18.007 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 01:48:18.134 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:48:18.135 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:48:18.135 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:48:18.135 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:48:18.485 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 01:48:18.963 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 01:48:19.135 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:48:19.136 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:48:19.136 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:48:19.136 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:48:19.441 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 01:48:19.920 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 01:48:20.137 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:48:20.137 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:48:20.138 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:48:20.138 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:48:20.398 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 01:48:20.876 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 01:48:21.176 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:48:21.355 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 01:48:21.832 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 01:48:22.177 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:48:22.311 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 01:48:22.809 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 01:48:23.178 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:48:23.287 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 01:48:23.765 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 01:48:24.179 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:48:24.244 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 01:48:24.722 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 01:48:25.180 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:48:25.181 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:48:25.199 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 01:48:25.678 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 01:48:26.156 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 01:48:26.635 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 01:48:27.115 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 01:48:27.595 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 01:48:28.076 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-09 01:48:28.263 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:48:28.555 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-09 01:48:29.034 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-09 01:48:29.264 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:48:29.512 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-09 01:48:29.990 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-09 01:48:30.265 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:48:30.468 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-09 01:48:30.946 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-09 01:48:31.266 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:48:31.424 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-09 01:48:31.902 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-09 01:48:32.267 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:48:32.381 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-09 01:48:32.859 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-09 01:48:33.268 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:48:33.337 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-09 01:48:33.815 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-09 01:48:34.293 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-09 01:48:34.772 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-09 01:48:35.250 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-09 01:48:35.354 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:48:35.354 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:48:35.365 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:48:35.366 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:48:35.366 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:48:35.366 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:48:35.375 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:48:35.375 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:48:35.375 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:48:35.375 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:48:35.376 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:48:35.376 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:48:35.376 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 01:48:35.376 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4310 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:48:35.377 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4310 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:48:40.370 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:48:40.370 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:48:40.372 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:48:40.372 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:48:40.372 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:48:40.372 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:48:40.381 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:48:40.383 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:48:40.383 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:48:40.384 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:48:40.384 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 01:48:40.388 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 01:48:40.388 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 01:48:40.388 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:48:40.388 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:48:40.388 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:48:40.389 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 01:48:40.389 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:48:40.389 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 01:48:40.391 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 01:48:40.392 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 01:48:40.392 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:48:40.392 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:48:40.392 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:48:40.392 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 01:48:40.392 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:48:40.392 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 01:48:40.394 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 01:48:40.394 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 01:48:40.394 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:48:40.395 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:48:40.395 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:48:40.395 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 01:48:40.395 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:48:40.395 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 01:48:40.397 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 01:48:40.398 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 01:48:40.398 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 01:48:40.398 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 01:48:40.398 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 01:48:40.398 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 01:48:40.398 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 01:48:40.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 01:48:40.398 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 01:48:40.398 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:48:40.398 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:48:40.398 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 01:48:40.398 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:48:40.398 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:48:40.398 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:48:40.398 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 01:48:40.398 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 01:48:40.398 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 01:48:40.398 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 01:48:40.399 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:48:40.399 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:48:40.399 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:48:40.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 01:48:40.399 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:48:40.399 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:48:40.399 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:48:40.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:48:40.399 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:48:40.399 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:48:40.399 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:48:40.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:48:40.399 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:48:40.399 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:48:40.399 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:48:40.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:48:40.399 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:48:40.399 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:48:40.399 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:48:40.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:48:40.399 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:48:40.399 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:48:40.399 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:48:40.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:48:40.400 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:48:40.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:48:40.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:48:40.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:48:40.403 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 01:48:40.885 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 01:48:40.932 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:48:40.934 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:48:40.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:48:40.936 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 01:48:40.958 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:48:40.958 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:48:40.959 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:48:40.965 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:48:40.965 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:48:40.965 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:48:40.965 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:48:40.965 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:48:40.977 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:48:40.980 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:48:40.986 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD NOHANDOVER
2026-01-09 01:48:40.990 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:48:40.990 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:48:40.990 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:48:40.991 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:48:41.005 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=130 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:41.010 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=131 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:41.015 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=132 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:41.019 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=133 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:41.024 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=134 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:41.029 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=135 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:41.033 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=136 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:41.038 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=137 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:41.043 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=138 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:41.047 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=139 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:41.052 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=140 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:41.056 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=141 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:41.066 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=143 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:41.070 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=144 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:41.075 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=145 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:41.079 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=146 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:41.084 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=147 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:41.089 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=148 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:41.093 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=149 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:41.098 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=150 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:41.103 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=151 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:41.107 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=152 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:41.112 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=153 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:41.116 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=154 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:41.126 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=156 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:41.130 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=157 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:41.135 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=158 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:41.139 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=159 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:41.144 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=160 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:41.149 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=161 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:41.153 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=162 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:41.158 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=163 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:41.162 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=164 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:41.167 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=165 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:41.172 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=166 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:41.176 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=167 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:41.186 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=169 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:41.191 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=170 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:41.195 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=171 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:41.199 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=172 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:41.204 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=173 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:41.209 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=174 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:41.213 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=175 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:41.217 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=176 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:41.222 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=177 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:41.227 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=178 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:41.232 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=179 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:41.236 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=180 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:41.245 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=182 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:41.250 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=183 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:41.255 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=184 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:41.259 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=185 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:41.264 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=186 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:41.269 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=187 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:41.273 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=188 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:41.278 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=189 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:41.282 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=190 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:41.287 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=191 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:41.292 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=192 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:41.296 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=193 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:41.305 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=195 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:41.310 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=196 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:41.315 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=197 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:41.319 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=198 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:41.324 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=199 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:41.328 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=200 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:41.333 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=201 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:41.338 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=202 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:41.343 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=203 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:41.347 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=204 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:41.352 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=205 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:41.356 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=206 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:41.363 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 01:48:41.373 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=208 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:41.378 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=209 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:41.383 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=210 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:41.387 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=211 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:41.392 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=212 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:41.397 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=213 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:41.401 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=214 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:41.401 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:48:41.402 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:48:41.402 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:48:41.405 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:48:41.798 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD NOHANDOVER
2026-01-09 01:48:41.800 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:48:41.801 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:48:41.801 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:48:41.806 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:48:41.806 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:48:41.806 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:48:41.806 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:48:41.813 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:48:41.813 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:48:41.813 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:48:41.814 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:48:41.814 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:48:41.814 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:48:41.814 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 01:48:41.814 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=302 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:48:41.815 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=302 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:48:46.811 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:48:46.811 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:48:46.813 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:48:46.820 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:48:46.820 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:48:46.821 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:48:46.834 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:48:46.835 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:48:46.835 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:48:46.836 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:48:46.836 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 01:48:46.838 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 01:48:46.838 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 01:48:46.838 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:48:46.838 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:48:46.838 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:48:46.839 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 01:48:46.839 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:48:46.839 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 01:48:46.840 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 01:48:46.840 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 01:48:46.840 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:48:46.840 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:48:46.840 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 01:48:46.840 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:48:46.840 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:48:46.840 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 01:48:46.842 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 01:48:46.842 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 01:48:46.842 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:48:46.842 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:48:46.842 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:48:46.842 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 01:48:46.842 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:48:46.842 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 01:48:46.844 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 01:48:46.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 01:48:46.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 01:48:46.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 01:48:46.844 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 01:48:46.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 01:48:46.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 01:48:46.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 01:48:46.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 01:48:46.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:48:46.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:48:46.844 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 01:48:46.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:48:46.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:48:46.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:48:46.845 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 01:48:46.845 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 01:48:46.845 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 01:48:46.845 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 01:48:46.845 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:48:46.845 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:48:46.845 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:48:46.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 01:48:46.845 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:48:46.845 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:48:46.845 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:48:46.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:48:46.845 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:48:46.845 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:48:46.845 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:48:46.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:48:46.845 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:48:46.845 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:48:46.845 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:48:46.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:48:46.845 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:48:46.845 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:48:46.845 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:48:46.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:48:46.845 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:48:46.845 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:48:46.845 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:48:46.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:48:46.845 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:48:46.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:48:46.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:48:46.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:48:46.849 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 01:48:47.333 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 01:48:47.368 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:48:47.370 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:48:47.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:48:47.373 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 01:48:47.391 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:48:47.392 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:48:47.392 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:48:47.395 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:48:47.395 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:48:47.395 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:48:47.395 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:48:47.395 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:48:47.425 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:48:47.429 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:48:47.436 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD NOHANDOVER
2026-01-09 01:48:47.440 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:48:47.440 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:48:47.441 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:48:47.441 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:48:47.454 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=130 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:47.458 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=131 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:47.463 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=132 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:47.468 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=133 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:47.472 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=134 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:47.477 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=135 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:47.481 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=136 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:47.486 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=137 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:47.491 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=138 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:47.495 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=139 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:47.500 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=140 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:47.505 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=141 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:47.514 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=143 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:47.519 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=144 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:47.523 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=145 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:47.528 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=146 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:47.532 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=147 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:47.537 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=148 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:47.542 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=149 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:47.546 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=150 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:47.551 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=151 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:47.556 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=152 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:47.560 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=153 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:47.565 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=154 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:47.574 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=156 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:47.579 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=157 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:47.583 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=158 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:47.588 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=159 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:47.592 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=160 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:47.597 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=161 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:47.602 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=162 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:47.607 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=163 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:47.611 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=164 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:47.616 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=165 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:47.620 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=166 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:47.625 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=167 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:47.634 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=169 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:47.639 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=170 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:47.643 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=171 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:47.648 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=172 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:47.652 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=173 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:47.657 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=174 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:47.662 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=175 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:47.667 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=176 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:47.671 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=177 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:47.676 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=178 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:47.680 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=179 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:47.685 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=180 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:47.694 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=182 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:47.699 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=183 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:47.703 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=184 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:47.708 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=185 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:47.712 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=186 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:47.717 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=187 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:47.722 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=188 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:47.726 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=189 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:47.731 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=190 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:47.736 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=191 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:47.740 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=192 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:47.745 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=193 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:47.754 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=195 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:47.759 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=196 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:47.763 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=197 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:47.768 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=198 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:47.772 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=199 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:47.777 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=200 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:47.782 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=201 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:47.786 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=202 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:47.791 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=203 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:47.796 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=204 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:47.800 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=205 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:47.805 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=206 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:47.809 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 01:48:47.819 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=208 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:47.824 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=209 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:47.829 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=210 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:47.833 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=211 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:47.838 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=212 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:47.843 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=213 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 01:48:47.847 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:48:47.847 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:48:47.848 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:48:47.848 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:48:48.244 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD NOHANDOVER
2026-01-09 01:48:48.247 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:48:48.247 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:48:48.248 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:48:48.259 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:48:48.259 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:48:48.259 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:48:48.259 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:48:48.266 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:48:48.266 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:48:48.266 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:48:48.266 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:48:48.266 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:48:48.266 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:48:48.266 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 01:48:48.267 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=304 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:48:48.267 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=304 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:48:48.267 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=304 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:48:48.267 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=304 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:48:48.267 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=304 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:48:48.267 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=304 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:48:48.267 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=304 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:48:48.268 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=304 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:48:48.268 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=305 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:48:53.262 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:48:53.262 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:48:53.263 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:48:53.264 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:48:53.264 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:48:53.265 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:48:53.273 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:48:53.274 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:48:53.274 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:48:53.274 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:48:53.274 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 01:48:53.276 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 01:48:53.276 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 01:48:53.276 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:48:53.276 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:48:53.277 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:48:53.277 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 01:48:53.277 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:48:53.277 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 01:48:53.278 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 01:48:53.279 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 01:48:53.279 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:48:53.279 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:48:53.279 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:48:53.279 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 01:48:53.279 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:48:53.279 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 01:48:53.281 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 01:48:53.281 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 01:48:53.281 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:48:53.281 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:48:53.281 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:48:53.281 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 01:48:53.281 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:48:53.281 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 01:48:53.283 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 01:48:53.283 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 01:48:53.283 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 01:48:53.283 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 01:48:53.283 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 01:48:53.283 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 01:48:53.284 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 01:48:53.284 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 01:48:53.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 01:48:53.284 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:48:53.284 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:48:53.284 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:48:53.284 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 01:48:53.284 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:48:53.284 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:48:53.284 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:48:53.284 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 01:48:53.284 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 01:48:53.284 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 01:48:53.284 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 01:48:53.284 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:48:53.284 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:48:53.284 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:48:53.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 01:48:53.285 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:48:53.285 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:48:53.285 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:48:53.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:48:53.285 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:48:53.285 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:48:53.285 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:48:53.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:48:53.285 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:48:53.285 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:48:53.285 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:48:53.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:48:53.285 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:48:53.285 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:48:53.285 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:48:53.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:48:53.285 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:48:53.285 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:48:53.285 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:48:53.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:48:53.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:48:53.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:48:53.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:48:53.289 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 01:48:53.770 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 01:48:53.809 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:48:53.812 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:48:53.813 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:48:53.814 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 01:48:53.835 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:48:53.835 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:48:53.836 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:48:53.840 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:48:53.841 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:48:53.841 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:48:53.842 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:48:53.842 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:48:53.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:48:53.872 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:48:53.872 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:48:53.873 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:48:53.873 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:48:54.248 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 01:48:54.250 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:48:54.250 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:48:54.255 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:48:54.255 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:48:54.255 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:48:54.255 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:48:54.256 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:48:54.257 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:48:54.257 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:48:54.257 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:48:54.257 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:48:54.257 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:48:54.257 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 01:48:59.259 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:48:59.260 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:48:59.262 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:48:59.264 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:48:59.264 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:48:59.265 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:48:59.269 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:48:59.269 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:48:59.269 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:48:59.270 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:48:59.270 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 01:48:59.271 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 01:48:59.272 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 01:48:59.272 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:48:59.272 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:48:59.272 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:48:59.272 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 01:48:59.272 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:48:59.272 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 01:48:59.274 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 01:48:59.274 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 01:48:59.274 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:48:59.274 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:48:59.274 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:48:59.274 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 01:48:59.274 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:48:59.274 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 01:48:59.276 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 01:48:59.276 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 01:48:59.276 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:48:59.276 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:48:59.276 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:48:59.276 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 01:48:59.276 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:48:59.276 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 01:48:59.279 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 01:48:59.279 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 01:48:59.279 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 01:48:59.279 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 01:48:59.279 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 01:48:59.279 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 01:48:59.279 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 01:48:59.279 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 01:48:59.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 01:48:59.279 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:48:59.279 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:48:59.279 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:48:59.279 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 01:48:59.280 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:48:59.280 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:48:59.280 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:48:59.280 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 01:48:59.280 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 01:48:59.280 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 01:48:59.280 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 01:48:59.280 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:48:59.280 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:48:59.280 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:48:59.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 01:48:59.280 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:48:59.280 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:48:59.280 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:48:59.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:48:59.280 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:48:59.280 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:48:59.280 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:48:59.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:48:59.280 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:48:59.280 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:48:59.281 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:48:59.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:48:59.281 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:48:59.281 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:48:59.281 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:48:59.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:48:59.281 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:48:59.281 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:48:59.281 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:48:59.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:48:59.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:48:59.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:48:59.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:48:59.285 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 01:48:59.769 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 01:48:59.806 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:48:59.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:48:59.810 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:48:59.812 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 01:48:59.849 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:48:59.849 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:48:59.849 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:48:59.856 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:48:59.859 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:48:59.859 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:48:59.859 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:48:59.859 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:48:59.859 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:48:59.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:48:59.919 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:48:59.919 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:48:59.919 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:48:59.920 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:49:00.246 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 01:49:00.282 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:49:00.283 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:49:00.284 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:49:00.284 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:49:00.724 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 01:49:01.202 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 01:49:01.284 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:49:01.284 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:49:01.284 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:49:01.285 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:49:01.681 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 01:49:02.160 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 01:49:02.285 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:49:02.286 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:49:02.286 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:49:02.286 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:49:02.639 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 01:49:03.118 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 01:49:03.286 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:49:03.286 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:49:03.287 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:49:03.288 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:49:03.595 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 01:49:04.074 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 01:49:04.287 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:49:04.301 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:49:04.301 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:49:04.301 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:49:04.552 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 01:49:05.030 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 01:49:05.509 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 01:49:05.987 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 01:49:06.465 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 01:49:06.944 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 01:49:07.422 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 01:49:07.900 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 01:49:08.378 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 01:49:08.856 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 01:49:09.334 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 01:49:09.812 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 01:49:10.290 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 01:49:10.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:49:10.747 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:49:10.748 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:49:10.748 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:49:10.758 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:49:10.758 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:49:10.758 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:49:10.758 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:49:10.760 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:49:10.760 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:49:10.760 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:49:10.760 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:49:10.760 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:49:10.760 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:49:10.760 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 01:49:10.760 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2449 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:49:10.760 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2449 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:49:15.761 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:49:15.761 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:49:15.765 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:49:15.765 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:49:15.765 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:49:15.766 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:49:15.776 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:49:15.777 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:49:15.777 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:49:15.778 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:49:15.778 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 01:49:15.780 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 01:49:15.780 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 01:49:15.781 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:49:15.781 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:49:15.781 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:49:15.781 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 01:49:15.782 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:49:15.782 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 01:49:15.783 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 01:49:15.783 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 01:49:15.784 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:49:15.784 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:49:15.784 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:49:15.784 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 01:49:15.784 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:49:15.784 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 01:49:15.786 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 01:49:15.786 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 01:49:15.786 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:49:15.786 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:49:15.786 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:49:15.786 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 01:49:15.786 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:49:15.786 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 01:49:15.788 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 01:49:15.788 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 01:49:15.788 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 01:49:15.788 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 01:49:15.788 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 01:49:15.789 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 01:49:15.789 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 01:49:15.789 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 01:49:15.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 01:49:15.789 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:49:15.789 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:49:15.789 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:49:15.789 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 01:49:15.789 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:49:15.789 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:49:15.789 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:49:15.789 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 01:49:15.789 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 01:49:15.789 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 01:49:15.789 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 01:49:15.789 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:49:15.789 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:49:15.789 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:49:15.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 01:49:15.789 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:49:15.789 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:49:15.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:49:15.790 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:49:15.790 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:49:15.790 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:49:15.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:49:15.790 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:49:15.790 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:49:15.790 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:49:15.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:49:15.790 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:49:15.790 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:49:15.790 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:49:15.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:49:15.790 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:49:15.790 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:49:15.790 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:49:15.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:49:15.790 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:49:15.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:49:15.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:49:15.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:49:15.794 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 01:49:16.278 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 01:49:16.315 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:49:16.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:49:16.318 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:49:16.319 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 01:49:16.341 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:49:16.341 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:49:16.341 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:49:16.348 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:49:16.352 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:49:16.352 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:49:16.352 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:49:16.352 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:49:16.353 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:49:16.374 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:49:16.380 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:49:16.381 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:49:16.381 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:49:16.382 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:49:16.756 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 01:49:16.792 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:49:16.793 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:49:16.793 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:49:16.796 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:49:17.234 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 01:49:17.712 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 01:49:17.794 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:49:17.794 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:49:17.794 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:49:17.797 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:49:18.191 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 01:49:18.669 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 01:49:18.795 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:49:18.795 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:49:18.796 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:49:18.798 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:49:19.148 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 01:49:19.625 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 01:49:19.796 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:49:19.796 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:49:19.796 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:49:19.798 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:49:20.103 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 01:49:20.582 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 01:49:20.797 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:49:20.797 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:49:20.798 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:49:20.799 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:49:21.059 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 01:49:21.537 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 01:49:22.016 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 01:49:22.494 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 01:49:22.972 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 01:49:23.450 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 01:49:23.928 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 01:49:24.406 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 01:49:24.884 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 01:49:25.362 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 01:49:25.841 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 01:49:26.319 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 01:49:26.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:49:26.762 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:49:26.763 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:49:26.763 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:49:26.780 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:49:26.781 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:49:26.781 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:49:26.781 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:49:26.783 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:49:26.783 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:49:26.783 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:49:26.783 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:49:26.783 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:49:26.783 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:49:26.783 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 01:49:26.783 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2345 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:49:31.785 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:49:31.786 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:49:31.793 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:49:31.794 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:49:31.794 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:49:31.794 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:49:31.801 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:49:31.802 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:49:31.802 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:49:31.802 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:49:31.803 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 01:49:31.805 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 01:49:31.805 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 01:49:31.806 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:49:31.806 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:49:31.806 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:49:31.806 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 01:49:31.806 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:49:31.806 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 01:49:31.808 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 01:49:31.809 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 01:49:31.809 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:49:31.809 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:49:31.809 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:49:31.809 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 01:49:31.809 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:49:31.809 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 01:49:31.811 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 01:49:31.811 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 01:49:31.812 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:49:31.812 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:49:31.812 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:49:31.812 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 01:49:31.812 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:49:31.812 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 01:49:31.815 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 01:49:31.815 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 01:49:31.815 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 01:49:31.815 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 01:49:31.815 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 01:49:31.815 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 01:49:31.816 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 01:49:31.816 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 01:49:31.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 01:49:31.816 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:49:31.816 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:49:31.816 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:49:31.816 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 01:49:31.816 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:49:31.816 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:49:31.816 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:49:31.816 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 01:49:31.816 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 01:49:31.816 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 01:49:31.816 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 01:49:31.816 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:49:31.816 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:49:31.816 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:49:31.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 01:49:31.817 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:49:31.817 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:49:31.817 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:49:31.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:49:31.817 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:49:31.817 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:49:31.817 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:49:31.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:49:31.817 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:49:31.818 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:49:31.818 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:49:31.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:49:31.818 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:49:31.818 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:49:31.818 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:49:31.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:49:31.818 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:49:31.818 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:49:31.818 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:49:31.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:49:31.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:49:31.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:49:31.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:49:31.821 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 01:49:32.305 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 01:49:32.342 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:49:32.344 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:49:32.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:49:32.346 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 01:49:32.365 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:49:32.365 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:49:32.365 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:49:32.370 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:49:32.372 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:49:32.372 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:49:32.372 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:49:32.372 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:49:32.372 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:49:32.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:49:32.403 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:49:32.404 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:49:32.404 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:49:32.404 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:49:32.782 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 01:49:32.820 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:49:32.820 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:49:32.821 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:49:32.823 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:49:33.261 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 01:49:33.277 [DEBUG] fake_trx.py:264 (MS@172.18.122.22:6700) Recv SETTA cmd
2026-01-09 01:49:33.739 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 01:49:33.822 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:49:33.822 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:49:33.822 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:49:33.825 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:49:34.217 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 01:49:34.696 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 01:49:34.823 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:49:34.824 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:49:34.824 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:49:34.825 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:49:35.174 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 01:49:35.653 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 01:49:35.824 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:49:35.825 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:49:35.825 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:49:35.826 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:49:36.131 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 01:49:36.610 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 01:49:36.825 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:49:36.825 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:49:36.826 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:49:36.827 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:49:37.088 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 01:49:37.566 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 01:49:38.045 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 01:49:38.522 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 01:49:39.000 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 01:49:39.479 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 01:49:39.957 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 01:49:40.435 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 01:49:40.914 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 01:49:41.392 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 01:49:41.871 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 01:49:42.349 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 01:49:42.827 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 01:49:43.305 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 01:49:43.784 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 01:49:44.262 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 01:49:44.741 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-09 01:49:45.219 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-09 01:49:45.698 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-09 01:49:46.176 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-09 01:49:46.650 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-09 01:49:47.120 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-09 01:49:47.590 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-09 01:49:48.069 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-09 01:49:48.547 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-09 01:49:49.025 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-09 01:49:49.503 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-09 01:49:49.981 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-09 01:49:50.459 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-09 01:49:50.938 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-09 01:49:51.416 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-09 01:49:51.895 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-09 01:49:51.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:49:51.994 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:49:51.995 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:49:51.995 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:49:52.008 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:49:52.008 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:49:52.008 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:49:52.009 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:49:52.018 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:49:52.018 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:49:52.018 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:49:52.019 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:49:52.019 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:49:52.019 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:49:52.019 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 01:49:52.019 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4309 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:49:52.020 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4309 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:49:57.013 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:49:57.013 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:49:57.022 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:49:57.022 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:49:57.022 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:49:57.023 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:49:57.032 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:49:57.033 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:49:57.033 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:49:57.034 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:49:57.034 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 01:49:57.036 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 01:49:57.037 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 01:49:57.037 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:49:57.037 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:49:57.037 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:49:57.037 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 01:49:57.037 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:49:57.037 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 01:49:57.039 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 01:49:57.039 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 01:49:57.039 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:49:57.039 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:49:57.040 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:49:57.040 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 01:49:57.040 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:49:57.040 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 01:49:57.041 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 01:49:57.042 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 01:49:57.042 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:49:57.042 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:49:57.042 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:49:57.042 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 01:49:57.042 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:49:57.042 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 01:49:57.044 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 01:49:57.044 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 01:49:57.044 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 01:49:57.044 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 01:49:57.044 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 01:49:57.044 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 01:49:57.045 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 01:49:57.045 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 01:49:57.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 01:49:57.045 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:49:57.045 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:49:57.045 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:49:57.045 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 01:49:57.045 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:49:57.045 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:49:57.045 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:49:57.045 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 01:49:57.045 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 01:49:57.045 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 01:49:57.045 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 01:49:57.045 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:49:57.045 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:49:57.045 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:49:57.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 01:49:57.045 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:49:57.045 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:49:57.046 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:49:57.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:49:57.046 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:49:57.046 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:49:57.046 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:49:57.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:49:57.046 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:49:57.046 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:49:57.046 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:49:57.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:49:57.046 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:49:57.046 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:49:57.046 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:49:57.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:49:57.046 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:49:57.046 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:49:57.046 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:49:57.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:49:57.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:49:57.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:49:57.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:49:57.050 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 01:49:57.534 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 01:49:57.573 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:49:57.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:49:57.577 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:49:57.579 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 01:49:57.617 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:49:57.617 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:49:57.618 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:49:57.624 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:49:57.626 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:49:57.626 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:49:57.626 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:49:57.627 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:49:57.627 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:49:57.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:49:57.684 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:49:57.685 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:49:57.685 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:49:57.686 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:49:58.011 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 01:49:58.048 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:49:58.048 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:49:58.048 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:49:58.050 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:49:58.486 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 01:49:58.965 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 01:49:59.049 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:49:59.049 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:49:59.049 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:49:59.050 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:49:59.443 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 01:49:59.921 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 01:50:00.050 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:50:00.050 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:50:00.050 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:50:00.050 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:50:00.400 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 01:50:00.878 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 01:50:01.050 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:50:01.051 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:50:01.051 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:50:01.051 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:50:01.356 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 01:50:01.834 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 01:50:02.051 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:50:02.052 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:50:02.052 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:50:02.052 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:50:02.312 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 01:50:02.790 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 01:50:03.269 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 01:50:03.747 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 01:50:04.226 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 01:50:04.704 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 01:50:05.183 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 01:50:05.661 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 01:50:06.140 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 01:50:06.613 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 01:50:07.083 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 01:50:07.554 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 01:50:08.026 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 01:50:08.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:50:08.504 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 01:50:08.505 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:50:08.505 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:50:08.505 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:50:08.513 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:50:08.513 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:50:08.513 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:50:08.513 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:50:08.514 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:50:08.514 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:50:08.514 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:50:08.514 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:50:08.514 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:50:08.514 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:50:08.514 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 01:50:13.518 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:50:13.518 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:50:13.521 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:50:13.521 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:50:13.521 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:50:13.521 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:50:13.534 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:50:13.534 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:50:13.534 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:50:13.535 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:50:13.535 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 01:50:13.536 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 01:50:13.537 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 01:50:13.537 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:50:13.537 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:50:13.537 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:50:13.537 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 01:50:13.537 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:50:13.537 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 01:50:13.538 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 01:50:13.538 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 01:50:13.538 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:50:13.539 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:50:13.539 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:50:13.539 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 01:50:13.539 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:50:13.539 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 01:50:13.540 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 01:50:13.540 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 01:50:13.540 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:50:13.540 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:50:13.540 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:50:13.540 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 01:50:13.540 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:50:13.540 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 01:50:13.542 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 01:50:13.542 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 01:50:13.542 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 01:50:13.542 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 01:50:13.542 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 01:50:13.542 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 01:50:13.542 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 01:50:13.542 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 01:50:13.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 01:50:13.542 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:50:13.542 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:50:13.542 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:50:13.542 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 01:50:13.542 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:50:13.543 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:50:13.543 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:50:13.543 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 01:50:13.543 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 01:50:13.543 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 01:50:13.543 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 01:50:13.543 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:50:13.543 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:50:13.543 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:50:13.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 01:50:13.543 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:50:13.543 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:50:13.543 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:50:13.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:50:13.543 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:50:13.543 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:50:13.543 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:50:13.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:50:13.543 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:50:13.543 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:50:13.543 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:50:13.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:50:13.543 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:50:13.543 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:50:13.543 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:50:13.544 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:50:13.544 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:50:13.544 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:50:13.544 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:50:13.544 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:50:13.544 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:50:13.544 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:50:13.544 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:50:13.547 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 01:50:14.032 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 01:50:14.065 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:50:14.065 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:50:14.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:50:14.067 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 01:50:14.094 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:50:14.094 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:50:14.095 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:50:14.101 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:50:14.104 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:50:14.104 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:50:14.104 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:50:14.104 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:50:14.104 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:50:14.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:50:14.136 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:50:14.137 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:50:14.137 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:50:14.137 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:50:14.138 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:50:14.509 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 01:50:14.545 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:50:14.546 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:50:14.546 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:50:14.548 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:50:14.988 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 01:50:15.004 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:50:15.466 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 01:50:15.546 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:50:15.547 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:50:15.547 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:50:15.550 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:50:15.945 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 01:50:16.423 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 01:50:16.548 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:50:16.548 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:50:16.548 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:50:16.551 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:50:16.900 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 01:50:17.378 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 01:50:17.549 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:50:17.549 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:50:17.549 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:50:17.552 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:50:17.857 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 01:50:18.334 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 01:50:18.550 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:50:18.550 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:50:18.551 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:50:18.554 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:50:18.804 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 01:50:19.273 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 01:50:19.752 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 01:50:20.231 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 01:50:20.709 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 01:50:20.839 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:50:20.842 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:50:20.843 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:50:20.843 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:50:20.858 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:50:20.858 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:50:20.858 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:50:20.858 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:50:20.860 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:50:20.860 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:50:20.860 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:50:20.860 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:50:20.860 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:50:20.860 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 01:50:20.860 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:50:20.860 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1563 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:50:20.860 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1563 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:50:25.890 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:50:25.890 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:50:25.892 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:50:25.892 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:50:25.892 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:50:25.892 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:50:25.896 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:50:25.896 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:50:25.896 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:50:25.897 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:50:25.897 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 01:50:25.899 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 01:50:25.899 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 01:50:25.899 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:50:25.899 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:50:25.899 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:50:25.899 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 01:50:25.899 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:50:25.899 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 01:50:25.901 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 01:50:25.901 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 01:50:25.901 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:50:25.901 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:50:25.901 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:50:25.901 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 01:50:25.902 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:50:25.902 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 01:50:25.903 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 01:50:25.903 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 01:50:25.903 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:50:25.903 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:50:25.903 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:50:25.903 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 01:50:25.903 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:50:25.903 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 01:50:25.905 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 01:50:25.905 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 01:50:25.905 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 01:50:25.905 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 01:50:25.905 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 01:50:25.905 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 01:50:25.905 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 01:50:25.906 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 01:50:25.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 01:50:25.906 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:50:25.906 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:50:25.906 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:50:25.906 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 01:50:25.906 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:50:25.906 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:50:25.906 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:50:25.906 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 01:50:25.906 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 01:50:25.906 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 01:50:25.906 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 01:50:25.906 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:50:25.906 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:50:25.906 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:50:25.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 01:50:25.906 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:50:25.906 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:50:25.906 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:50:25.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:50:25.907 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:50:25.907 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:50:25.907 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:50:25.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:50:25.907 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:50:25.907 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:50:25.907 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:50:25.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:50:25.907 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:50:25.907 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:50:25.907 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:50:25.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:50:25.907 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:50:25.907 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:50:25.907 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:50:25.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:50:25.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:50:25.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:50:25.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:50:25.911 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 01:50:26.396 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 01:50:26.423 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:50:26.424 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:50:26.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:50:26.426 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 01:50:26.444 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:50:26.444 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:50:26.444 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:50:26.450 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:50:26.452 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:50:26.452 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:50:26.453 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:50:26.453 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:50:26.453 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:50:26.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:50:26.497 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:50:26.497 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:50:26.497 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:50:26.497 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:50:26.874 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 01:50:26.908 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:50:26.908 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:50:26.909 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:50:26.910 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:50:27.352 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 01:50:27.830 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 01:50:27.909 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:50:27.910 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:50:27.910 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:50:27.910 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:50:28.309 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 01:50:28.787 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 01:50:28.910 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:50:28.910 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:50:28.911 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:50:28.911 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:50:29.266 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 01:50:29.744 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 01:50:29.911 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:50:29.912 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:50:29.912 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:50:29.912 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:50:30.222 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 01:50:30.701 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 01:50:30.913 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:50:30.913 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:50:30.913 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:50:30.913 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:50:31.179 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 01:50:31.658 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 01:50:32.137 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 01:50:32.614 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 01:50:33.093 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 01:50:33.571 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 01:50:34.049 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 01:50:34.528 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 01:50:35.006 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 01:50:35.484 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 01:50:35.962 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 01:50:36.441 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 01:50:36.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:50:36.502 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:50:36.503 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:50:36.503 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:50:36.515 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:50:36.516 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:50:36.516 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:50:36.516 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:50:36.518 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:50:36.518 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:50:36.518 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:50:36.518 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:50:36.518 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:50:36.518 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:50:36.518 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 01:50:36.518 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2262 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:50:36.518 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2262 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:50:36.518 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2262 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:50:36.518 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2262 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:50:36.518 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2262 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:50:41.520 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:50:41.520 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:50:41.522 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:50:41.523 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:50:41.523 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:50:41.523 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:50:41.533 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:50:41.534 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:50:41.534 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:50:41.534 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:50:41.534 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 01:50:41.537 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 01:50:41.537 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 01:50:41.538 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:50:41.538 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:50:41.538 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:50:41.538 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 01:50:41.539 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:50:41.539 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 01:50:41.540 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 01:50:41.540 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 01:50:41.540 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:50:41.541 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:50:41.541 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:50:41.541 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 01:50:41.541 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:50:41.541 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 01:50:41.542 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 01:50:41.542 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 01:50:41.543 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:50:41.543 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:50:41.543 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:50:41.543 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 01:50:41.543 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:50:41.543 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 01:50:41.545 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 01:50:41.545 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 01:50:41.545 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 01:50:41.545 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 01:50:41.545 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 01:50:41.545 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 01:50:41.545 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 01:50:41.545 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 01:50:41.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 01:50:41.546 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:50:41.546 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:50:41.546 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:50:41.546 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 01:50:41.546 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:50:41.546 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:50:41.546 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:50:41.546 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 01:50:41.546 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 01:50:41.546 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 01:50:41.546 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 01:50:41.546 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:50:41.546 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:50:41.546 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:50:41.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 01:50:41.546 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:50:41.546 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:50:41.546 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:50:41.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:50:41.546 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:50:41.546 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:50:41.546 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:50:41.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:50:41.547 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:50:41.547 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:50:41.547 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:50:41.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:50:41.547 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:50:41.547 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:50:41.547 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:50:41.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:50:41.547 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:50:41.547 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:50:41.547 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:50:41.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:50:41.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:50:41.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:50:41.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:50:41.551 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 01:50:42.036 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 01:50:42.070 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:50:42.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:50:42.072 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:50:42.074 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 01:50:42.098 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:50:42.098 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:50:42.098 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:50:42.102 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:50:42.103 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:50:42.103 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:50:42.103 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:50:42.103 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:50:42.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:50:42.139 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:50:42.139 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:50:42.140 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:50:42.140 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:50:42.506 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 01:50:42.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:50:42.514 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:50:42.515 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:50:42.515 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:50:42.532 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:50:42.532 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:50:42.532 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:50:42.534 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:50:42.534 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:50:42.534 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:50:42.534 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:50:42.534 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:50:42.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:50:42.548 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:50:42.548 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:50:42.548 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:50:42.548 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:50:42.548 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:50:42.548 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:50:42.548 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:50:42.549 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:50:42.975 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 01:50:43.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:50:43.234 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:50:43.235 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:50:43.235 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:50:43.254 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:50:43.254 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:50:43.255 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:50:43.256 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:50:43.256 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:50:43.256 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:50:43.256 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:50:43.256 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:50:43.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:50:43.299 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:50:43.299 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:50:43.299 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:50:43.299 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:50:43.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:50:43.414 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:50:43.415 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:50:43.415 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:50:43.433 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:50:43.433 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:50:43.433 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:50:43.434 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:50:43.434 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:50:43.434 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:50:43.434 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:50:43.434 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:50:43.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:50:43.442 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:50:43.442 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:50:43.442 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:50:43.442 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:50:43.450 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 01:50:43.549 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:50:43.550 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:50:43.550 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:50:43.550 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:50:43.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:50:43.846 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:50:43.848 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:50:43.848 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:50:43.861 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:50:43.861 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:50:43.862 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:50:43.862 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:50:43.871 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:50:43.871 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:50:43.871 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:50:43.872 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:50:43.872 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:50:43.872 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:50:43.872 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 01:50:43.872 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=499 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:50:43.872 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=499 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:50:43.872 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=499 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:50:43.872 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=500 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:50:43.872 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=500 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:50:43.873 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=500 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:50:43.873 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=500 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:50:43.873 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=500 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:50:43.873 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=500 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:50:43.873 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=500 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:50:43.873 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=500 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:50:43.873 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=501 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:50:43.873 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=501 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:50:43.873 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=501 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:50:43.873 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=501 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:50:43.873 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=501 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:50:43.873 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=501 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:50:43.874 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=501 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:50:43.874 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=501 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:50:48.863 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:50:48.863 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:50:48.864 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:50:48.865 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:50:48.865 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:50:48.866 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:50:48.875 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:50:48.876 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:50:48.876 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:50:48.876 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:50:48.876 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 01:50:48.878 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 01:50:48.879 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 01:50:48.879 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:50:48.879 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:50:48.879 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:50:48.880 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 01:50:48.880 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:50:48.880 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 01:50:48.881 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 01:50:48.881 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 01:50:48.881 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:50:48.881 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:50:48.881 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:50:48.881 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 01:50:48.881 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:50:48.881 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 01:50:48.883 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 01:50:48.883 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 01:50:48.883 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:50:48.883 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:50:48.883 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:50:48.883 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 01:50:48.883 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:50:48.883 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 01:50:48.886 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 01:50:48.886 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 01:50:48.886 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 01:50:48.886 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 01:50:48.886 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 01:50:48.886 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 01:50:48.886 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 01:50:48.886 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 01:50:48.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 01:50:48.886 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:50:48.886 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:50:48.886 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:50:48.886 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 01:50:48.886 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:50:48.886 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:50:48.886 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:50:48.886 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 01:50:48.886 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 01:50:48.886 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 01:50:48.886 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 01:50:48.886 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:50:48.886 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:50:48.886 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:50:48.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 01:50:48.887 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:50:48.887 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:50:48.887 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:50:48.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:50:48.887 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:50:48.887 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:50:48.887 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:50:48.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:50:48.887 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:50:48.887 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:50:48.887 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:50:48.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:50:48.887 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:50:48.887 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:50:48.887 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:50:48.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:50:48.887 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:50:48.887 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:50:48.887 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:50:48.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:50:48.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:50:48.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:50:48.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:50:48.891 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 01:50:49.375 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 01:50:49.416 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:50:49.419 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:50:49.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:50:49.421 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 01:50:49.444 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:50:49.444 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:50:49.445 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:50:49.451 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:50:49.451 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:50:49.451 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:50:49.452 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:50:49.452 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:50:49.467 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:50:49.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:50:49.479 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:50:49.479 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:50:49.479 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:50:49.480 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:50:49.853 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 01:50:49.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:50:49.858 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:50:49.859 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:50:49.859 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:50:49.870 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:50:49.870 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:50:49.871 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:50:49.871 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:50:49.879 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:50:49.879 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:50:49.879 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:50:49.880 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:50:49.880 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:50:49.880 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:50:49.880 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 01:50:49.880 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=210 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:50:49.881 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=210 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:50:54.873 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:50:54.873 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:50:54.876 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:50:54.876 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:50:54.877 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:50:54.878 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:50:54.881 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:50:54.882 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:50:54.882 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:50:54.882 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:50:54.882 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 01:50:54.883 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 01:50:54.884 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 01:50:54.884 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:50:54.884 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:50:54.884 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:50:54.884 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 01:50:54.884 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:50:54.884 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 01:50:54.885 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 01:50:54.885 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 01:50:54.885 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:50:54.885 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:50:54.885 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:50:54.885 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 01:50:54.885 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:50:54.885 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 01:50:54.887 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 01:50:54.887 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 01:50:54.887 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:50:54.887 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:50:54.887 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:50:54.887 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 01:50:54.887 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:50:54.887 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 01:50:54.888 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 01:50:54.889 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 01:50:54.889 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 01:50:54.889 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 01:50:54.889 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 01:50:54.889 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 01:50:54.889 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 01:50:54.889 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 01:50:54.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 01:50:54.889 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:50:54.889 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:50:54.889 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:50:54.889 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 01:50:54.889 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:50:54.889 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:50:54.889 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:50:54.889 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 01:50:54.889 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 01:50:54.889 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 01:50:54.889 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 01:50:54.890 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:50:54.890 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:50:54.890 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:50:54.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 01:50:54.890 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:50:54.890 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:50:54.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:50:54.890 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:50:54.890 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:50:54.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:50:54.890 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:50:54.890 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:50:54.890 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:50:54.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:50:54.890 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:50:54.890 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:50:54.890 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:50:54.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:50:54.890 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:50:54.890 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:50:54.890 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:50:54.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:50:54.890 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:50:54.890 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:50:54.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:50:54.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:50:54.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:50:54.894 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 01:50:55.375 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 01:50:55.415 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:50:55.417 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:50:55.418 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 01:50:55.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:50:55.433 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:50:55.434 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:50:55.434 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:50:55.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:50:55.438 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:50:55.438 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:50:55.438 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:50:55.438 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:50:55.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:50:55.479 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:50:55.479 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:50:55.479 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:50:55.480 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:50:55.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:50:55.853 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 01:50:55.892 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:50:55.892 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:50:55.892 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:50:55.894 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:50:56.331 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 01:50:56.809 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 01:50:56.893 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:50:56.893 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:50:56.893 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:50:56.894 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:50:57.287 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 01:50:57.765 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 01:50:57.894 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:50:57.894 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:50:57.894 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:50:57.895 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:50:58.244 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 01:50:58.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:50:58.603 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:50:58.605 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:50:58.605 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:50:58.625 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:50:58.625 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:50:58.626 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:50:58.627 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:50:58.627 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:50:58.627 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:50:58.627 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:50:58.627 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:50:58.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:50:58.668 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:50:58.668 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:50:58.668 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:50:58.668 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:50:58.722 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 01:50:58.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:50:58.894 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:50:58.895 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:50:58.895 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:50:58.896 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:50:59.201 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 01:50:59.679 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 01:50:59.895 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:50:59.896 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:50:59.896 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:50:59.897 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:51:00.158 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 01:51:00.636 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 01:51:01.115 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 01:51:01.593 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 01:51:01.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:51:01.854 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:51:01.857 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:51:01.857 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:51:01.884 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:51:01.884 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:51:01.884 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:51:01.886 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:51:01.886 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:51:01.886 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:51:01.886 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:51:01.886 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:51:01.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:51:01.926 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:51:01.927 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:51:01.927 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:51:01.927 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:51:02.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:51:02.070 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 01:51:02.548 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 01:51:03.026 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 01:51:03.504 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 01:51:03.982 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 01:51:04.460 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 01:51:04.938 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 01:51:05.060 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:51:05.064 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:51:05.065 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:51:05.065 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:51:05.085 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:51:05.085 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:51:05.085 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:51:05.086 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:51:05.086 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:51:05.086 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:51:05.086 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:51:05.086 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:51:05.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:51:05.131 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:51:05.132 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:51:05.133 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:51:05.133 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:51:05.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:51:05.416 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 01:51:05.894 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 01:51:06.372 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 01:51:06.845 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 01:51:07.315 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 01:51:07.791 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-09 01:51:08.268 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-09 01:51:08.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:51:08.334 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:51:08.334 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:51:08.334 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:51:08.340 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:51:08.340 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:51:08.340 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:51:08.340 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:51:08.341 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:51:08.341 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:51:08.341 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:51:08.341 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:51:08.341 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:51:08.341 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 01:51:08.341 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:51:13.343 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:51:13.343 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:51:13.345 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:51:13.346 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:51:13.347 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:51:13.347 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:51:13.355 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:51:13.357 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:51:13.357 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:51:13.357 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:51:13.357 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 01:51:13.359 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 01:51:13.360 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 01:51:13.360 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:51:13.360 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:51:13.360 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:51:13.360 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 01:51:13.361 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:51:13.361 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 01:51:13.362 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 01:51:13.362 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 01:51:13.362 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:51:13.362 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:51:13.362 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:51:13.362 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 01:51:13.362 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:51:13.362 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 01:51:13.364 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 01:51:13.364 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 01:51:13.365 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:51:13.365 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:51:13.365 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:51:13.365 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 01:51:13.365 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:51:13.365 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 01:51:13.367 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 01:51:13.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 01:51:13.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 01:51:13.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 01:51:13.367 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 01:51:13.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 01:51:13.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 01:51:13.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 01:51:13.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 01:51:13.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:51:13.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:51:13.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:51:13.368 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 01:51:13.368 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:51:13.368 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:51:13.368 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:51:13.368 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 01:51:13.368 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 01:51:13.368 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 01:51:13.368 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 01:51:13.368 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:51:13.368 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:51:13.368 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:51:13.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 01:51:13.368 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:51:13.368 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:51:13.368 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:51:13.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:51:13.368 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:51:13.368 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:51:13.368 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:51:13.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:51:13.368 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:51:13.368 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:51:13.368 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:51:13.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:51:13.368 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:51:13.368 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:51:13.368 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:51:13.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:51:13.368 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:51:13.368 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:51:13.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:51:13.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:51:13.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:51:13.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:51:13.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:51:13.372 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 01:51:13.856 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 01:51:13.889 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:51:13.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:51:13.892 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:51:13.894 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 01:51:13.898 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:51:13.898 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:51:13.898 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:51:13.899 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:51:13.899 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:51:13.900 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:51:13.900 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:51:13.900 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:51:14.334 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 01:51:14.370 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:51:14.371 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:51:14.371 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:51:14.372 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:51:14.812 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 01:51:15.290 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 01:51:15.372 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:51:15.372 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:51:15.372 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:51:15.374 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:51:15.769 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 01:51:16.247 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 01:51:16.372 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:51:16.373 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:51:16.373 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:51:16.375 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:51:16.725 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 01:51:17.202 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 01:51:17.373 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:51:17.374 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:51:17.374 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:51:17.376 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:51:17.680 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 01:51:18.158 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 01:51:18.374 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:51:18.375 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:51:18.375 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:51:18.378 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:51:18.636 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 01:51:19.115 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 01:51:19.593 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 01:51:20.071 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 01:51:20.549 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 01:51:21.027 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 01:51:21.505 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 01:51:21.983 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 01:51:22.461 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 01:51:22.939 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 01:51:23.417 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 01:51:23.894 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 01:51:24.372 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 01:51:24.850 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 01:51:25.328 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 01:51:25.806 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 01:51:26.284 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-09 01:51:26.762 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-09 01:51:27.257 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-09 01:51:27.735 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-09 01:51:28.020 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:51:28.021 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:51:28.034 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:51:28.035 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:51:28.035 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:51:28.035 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:51:28.046 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:51:28.046 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:51:28.047 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:51:28.047 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:51:28.047 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:51:28.047 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:51:28.047 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 01:51:28.047 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3126 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:51:28.047 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3126 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:51:28.048 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3126 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:51:28.048 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3126 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:51:28.048 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3126 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:51:28.048 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3127 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:51:28.048 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3127 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:51:28.048 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3127 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:51:28.048 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3127 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:51:28.048 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3127 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:51:28.048 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3127 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:51:28.048 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3127 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:51:28.048 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3127 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:51:28.048 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3128 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:51:28.048 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3128 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:51:28.048 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3128 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:51:28.048 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3128 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:51:28.048 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3128 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:51:28.049 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3128 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:51:28.049 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3128 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:51:28.049 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3128 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:51:28.049 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3129 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:51:28.049 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3129 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:51:28.049 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3129 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:51:28.049 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3129 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:51:28.049 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3129 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:51:28.049 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3129 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:51:28.049 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3129 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:51:28.049 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3129 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:51:33.040 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:51:33.040 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:51:33.042 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:51:33.044 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:51:33.044 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:51:33.044 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:51:33.052 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:51:33.053 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:51:33.053 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:51:33.053 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:51:33.054 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 01:51:33.056 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 01:51:33.056 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 01:51:33.056 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:51:33.056 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:51:33.057 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:51:33.057 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 01:51:33.057 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:51:33.057 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 01:51:33.059 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 01:51:33.059 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 01:51:33.059 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:51:33.059 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:51:33.059 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:51:33.059 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 01:51:33.059 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:51:33.060 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 01:51:33.061 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 01:51:33.061 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 01:51:33.061 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:51:33.061 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:51:33.061 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:51:33.061 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 01:51:33.062 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:51:33.062 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 01:51:33.064 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 01:51:33.064 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 01:51:33.064 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 01:51:33.064 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 01:51:33.064 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 01:51:33.064 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 01:51:33.064 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 01:51:33.064 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 01:51:33.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 01:51:33.064 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:51:33.064 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:51:33.064 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:51:33.065 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 01:51:33.065 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:51:33.065 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:51:33.065 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:51:33.065 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 01:51:33.065 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 01:51:33.065 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 01:51:33.065 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 01:51:33.065 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:51:33.065 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:51:33.065 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:51:33.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 01:51:33.065 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:51:33.065 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:51:33.065 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:51:33.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:51:33.065 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:51:33.065 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:51:33.065 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:51:33.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:51:33.065 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:51:33.065 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:51:33.065 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:51:33.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:51:33.066 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:51:33.066 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:51:33.066 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:51:33.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:51:33.066 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:51:33.066 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:51:33.066 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:51:33.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:51:33.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:51:33.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:51:33.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:51:33.070 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 01:51:33.554 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 01:51:33.587 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:51:33.588 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:51:33.590 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 01:51:33.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:51:33.611 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:51:33.612 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:51:33.612 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:51:33.617 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:51:33.617 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:51:33.618 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:51:33.618 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:51:33.618 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:51:33.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:51:33.657 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:51:33.658 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:51:33.658 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:51:33.658 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:51:34.032 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 01:51:34.067 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:51:34.068 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:51:34.068 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:51:34.068 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:51:34.510 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 01:51:34.988 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 01:51:35.069 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:51:35.069 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:51:35.070 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:51:35.070 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:51:35.466 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 01:51:35.658 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:51:35.658 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:51:35.658 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:51:35.658 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:51:35.662 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:51:35.662 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:51:35.662 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:51:35.662 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:51:35.662 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:51:35.943 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 01:51:36.070 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:51:36.070 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:51:36.070 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:51:36.070 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:51:36.421 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 01:51:36.899 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 01:51:37.071 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:51:37.071 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:51:37.071 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:51:37.071 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:51:37.377 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 01:51:37.855 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 01:51:38.072 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:51:38.073 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:51:38.073 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:51:38.073 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:51:38.333 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 01:51:38.811 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 01:51:39.289 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 01:51:39.767 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 01:51:40.245 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 01:51:40.724 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 01:51:41.201 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 01:51:41.680 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 01:51:42.158 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 01:51:42.636 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 01:51:43.114 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 01:51:43.592 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 01:51:44.070 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 01:51:44.548 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 01:51:45.026 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 01:51:45.504 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 01:51:45.982 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-09 01:51:46.460 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-09 01:51:46.938 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-09 01:51:47.441 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-09 01:51:47.919 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-09 01:51:48.398 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-09 01:51:48.876 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-09 01:51:49.353 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-09 01:51:49.831 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-09 01:51:50.309 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-09 01:51:50.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:51:50.596 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:51:50.596 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:51:50.612 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:51:50.612 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:51:50.612 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:51:50.612 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:51:50.614 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:51:50.614 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:51:50.614 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:51:50.614 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:51:50.614 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:51:50.614 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:51:50.614 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 01:51:50.614 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3739 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:51:50.614 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3739 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:51:55.618 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:51:55.618 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:51:55.619 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:51:55.620 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:51:55.620 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:51:55.621 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:51:55.625 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:51:55.625 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:51:55.626 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:51:55.626 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:51:55.626 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 01:51:55.627 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 01:51:55.628 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 01:51:55.628 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:51:55.628 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:51:55.628 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:51:55.628 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 01:51:55.628 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:51:55.628 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 01:51:55.629 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 01:51:55.629 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 01:51:55.629 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:51:55.629 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:51:55.629 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:51:55.629 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 01:51:55.629 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:51:55.629 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 01:51:55.631 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 01:51:55.631 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 01:51:55.631 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:51:55.631 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:51:55.631 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:51:55.631 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 01:51:55.631 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:51:55.631 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 01:51:55.633 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 01:51:55.633 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 01:51:55.633 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 01:51:55.633 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 01:51:55.633 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 01:51:55.633 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 01:51:55.633 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 01:51:55.633 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 01:51:55.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 01:51:55.633 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:51:55.633 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:51:55.633 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:51:55.633 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 01:51:55.633 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:51:55.633 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:51:55.633 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:51:55.634 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 01:51:55.634 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 01:51:55.634 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 01:51:55.634 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 01:51:55.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:51:55.634 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:51:55.634 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:51:55.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 01:51:55.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:51:55.634 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:51:55.634 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:51:55.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:51:55.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:51:55.634 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:51:55.634 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:51:55.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:51:55.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:51:55.634 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:51:55.634 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:51:55.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:51:55.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:51:55.634 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:51:55.634 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:51:55.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:51:55.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:51:55.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:51:55.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:51:55.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:51:55.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:51:55.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:51:55.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:51:55.638 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 01:51:56.123 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 01:51:56.148 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:51:56.149 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:51:56.150 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 01:51:56.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:51:56.152 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:51:56.152 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:51:56.152 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:51:56.153 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:51:56.153 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:51:56.153 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:51:56.153 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:51:56.153 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:51:56.592 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 01:51:56.636 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:51:56.636 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:51:56.637 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:51:56.639 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:51:57.061 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 01:51:57.536 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 01:51:57.637 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:51:57.637 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:51:57.637 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:51:57.639 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:51:58.014 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 01:51:58.491 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 01:51:58.638 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:51:58.639 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:51:58.639 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:51:58.640 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:51:58.970 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 01:51:59.447 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 01:51:59.639 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:51:59.640 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:51:59.640 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:51:59.640 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:51:59.925 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 01:52:00.404 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 01:52:00.640 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:52:00.641 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:52:00.641 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:52:00.641 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:52:00.883 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 01:52:01.361 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 01:52:01.839 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 01:52:02.317 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 01:52:02.795 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 01:52:03.272 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 01:52:03.750 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 01:52:04.229 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 01:52:04.707 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 01:52:05.185 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 01:52:05.664 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 01:52:06.142 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 01:52:06.620 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 01:52:07.098 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 01:52:07.576 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 01:52:08.055 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 01:52:08.532 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-09 01:52:09.010 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-09 01:52:09.488 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-09 01:52:09.966 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-09 01:52:10.444 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-09 01:52:10.922 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-09 01:52:11.400 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-09 01:52:11.878 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-09 01:52:12.357 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-09 01:52:12.835 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-09 01:52:13.313 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-09 01:52:13.791 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-09 01:52:14.269 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-09 01:52:14.747 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-09 01:52:15.225 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-09 01:52:15.704 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-09 01:52:16.182 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-09 01:52:16.661 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-01-09 01:52:17.138 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-01-09 01:52:17.617 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-01-09 01:52:17.652 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:52:17.652 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:52:17.659 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:52:17.660 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:52:17.660 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:52:17.660 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:52:17.666 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:52:17.667 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:52:17.667 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:52:17.667 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:52:17.667 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:52:17.667 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:52:17.667 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 01:52:17.668 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4702 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:52:17.668 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4702 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:52:22.663 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:52:22.664 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:52:22.666 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:52:22.668 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:52:22.668 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:52:22.668 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:52:22.676 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:52:22.678 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:52:22.678 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:52:22.678 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:52:22.678 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 01:52:22.683 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 01:52:22.683 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 01:52:22.683 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:52:22.683 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:52:22.684 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:52:22.684 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 01:52:22.684 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:52:22.684 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 01:52:22.686 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 01:52:22.687 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 01:52:22.687 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:52:22.687 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:52:22.687 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:52:22.687 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 01:52:22.687 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:52:22.687 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 01:52:22.689 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 01:52:22.689 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 01:52:22.689 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:52:22.689 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:52:22.690 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:52:22.690 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 01:52:22.690 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:52:22.690 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 01:52:22.692 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 01:52:22.693 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 01:52:22.693 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 01:52:22.693 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 01:52:22.693 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 01:52:22.693 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 01:52:22.693 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 01:52:22.693 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 01:52:22.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 01:52:22.693 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:52:22.693 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:52:22.693 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:52:22.693 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 01:52:22.693 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:52:22.693 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:52:22.693 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:52:22.693 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 01:52:22.693 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 01:52:22.693 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 01:52:22.694 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 01:52:22.694 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:52:22.694 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:52:22.694 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:52:22.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 01:52:22.694 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:52:22.694 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:52:22.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:52:22.694 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:52:22.694 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:52:22.694 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:52:22.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:52:22.694 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:52:22.694 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:52:22.694 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:52:22.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:52:22.694 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:52:22.694 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:52:22.694 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:52:22.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:52:22.694 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:52:22.695 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:52:22.695 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:52:22.695 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:52:22.695 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:52:22.695 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:52:22.695 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:52:22.695 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:52:22.698 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 01:52:23.182 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 01:52:23.219 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:52:23.222 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:52:23.224 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 01:52:23.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:52:23.228 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:52:23.228 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:52:23.228 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:52:23.228 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:52:23.228 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:52:23.229 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:52:23.229 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:52:23.229 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:52:23.659 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 01:52:23.696 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:52:23.697 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:52:23.697 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:52:23.700 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:52:24.137 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 01:52:24.615 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 01:52:24.698 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:52:24.698 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:52:24.698 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:52:24.701 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:52:25.093 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 01:52:25.572 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 01:52:25.698 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:52:25.698 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:52:25.699 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:52:25.702 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:52:26.050 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 01:52:26.528 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 01:52:26.699 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:52:26.700 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:52:26.700 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:52:26.703 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:52:27.006 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 01:52:27.484 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 01:52:27.700 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:52:27.701 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:52:27.701 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:52:27.704 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:52:27.962 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 01:52:28.440 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 01:52:28.918 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 01:52:29.396 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 01:52:29.874 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 01:52:30.352 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 01:52:30.830 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 01:52:31.308 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 01:52:31.786 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 01:52:32.265 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 01:52:32.743 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 01:52:33.221 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 01:52:33.699 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 01:52:34.177 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 01:52:34.655 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 01:52:35.133 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 01:52:35.611 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-09 01:52:36.089 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-09 01:52:36.567 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-09 01:52:37.045 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-09 01:52:37.522 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-09 01:52:38.000 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-09 01:52:38.477 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-09 01:52:38.955 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-09 01:52:39.433 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-09 01:52:39.911 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-09 01:52:40.389 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-09 01:52:40.867 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-09 01:52:41.345 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-09 01:52:41.823 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-09 01:52:42.301 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-09 01:52:42.779 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-09 01:52:43.258 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-09 01:52:43.736 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-01-09 01:52:44.214 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-01-09 01:52:44.692 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-01-09 01:52:44.711 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:52:44.712 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:52:44.714 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:52:44.714 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:52:44.714 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:52:44.714 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:52:44.720 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:52:44.720 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:52:44.720 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:52:44.720 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:52:44.720 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:52:44.720 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:52:44.720 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 01:52:44.720 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4699 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:52:44.720 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4699 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:52:49.719 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:52:49.719 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:52:49.721 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:52:49.722 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:52:49.723 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:52:49.723 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:52:49.735 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:52:49.736 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:52:49.736 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:52:49.736 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:52:49.736 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 01:52:49.738 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 01:52:49.739 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 01:52:49.739 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:52:49.739 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:52:49.739 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:52:49.739 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 01:52:49.740 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:52:49.740 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 01:52:49.741 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 01:52:49.741 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 01:52:49.741 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:52:49.741 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:52:49.742 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:52:49.742 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 01:52:49.742 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:52:49.742 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 01:52:49.743 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 01:52:49.744 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 01:52:49.744 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:52:49.744 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:52:49.744 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:52:49.744 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 01:52:49.744 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:52:49.744 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 01:52:49.746 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 01:52:49.746 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 01:52:49.746 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 01:52:49.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 01:52:49.747 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 01:52:49.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 01:52:49.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 01:52:49.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 01:52:49.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 01:52:49.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:52:49.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:52:49.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:52:49.747 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 01:52:49.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:52:49.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:52:49.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:52:49.747 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 01:52:49.747 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 01:52:49.747 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 01:52:49.747 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 01:52:49.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:52:49.748 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:52:49.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:52:49.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 01:52:49.748 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:52:49.748 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:52:49.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:52:49.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:52:49.748 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:52:49.748 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:52:49.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:52:49.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:52:49.748 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:52:49.748 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:52:49.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:52:49.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:52:49.748 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:52:49.748 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:52:49.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:52:49.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:52:49.748 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:52:49.748 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:52:49.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:52:49.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:52:49.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:52:49.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:52:49.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:52:49.752 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 01:52:50.236 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 01:52:50.268 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:52:50.270 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:52:50.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:52:50.272 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 01:52:50.275 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:52:50.276 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:52:50.276 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:52:50.277 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:52:50.277 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:52:50.277 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:52:50.277 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:52:50.277 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:52:50.713 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 01:52:50.750 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:52:50.750 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:52:50.751 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:52:50.753 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:52:51.192 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 01:52:51.670 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 01:52:51.751 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:52:51.751 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:52:51.752 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:52:51.754 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:52:52.148 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 01:52:52.626 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 01:52:52.752 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:52:52.753 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:52:52.753 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:52:52.755 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:52:53.105 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 01:52:53.582 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 01:52:53.753 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:52:53.754 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:52:53.754 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:52:53.756 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:52:54.060 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 01:52:54.538 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 01:52:54.754 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:52:54.755 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:52:54.755 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:52:54.758 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:52:55.017 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 01:52:55.494 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 01:52:55.972 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 01:52:56.450 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 01:52:56.928 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 01:52:57.406 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 01:52:57.884 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 01:52:58.362 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 01:52:58.840 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 01:52:59.318 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 01:52:59.796 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 01:53:00.275 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 01:53:00.753 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 01:53:01.231 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 01:53:01.710 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 01:53:02.188 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 01:53:02.666 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-09 01:53:03.144 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-09 01:53:03.622 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-09 01:53:04.096 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-09 01:53:04.573 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-09 01:53:05.051 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-09 01:53:05.529 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-09 01:53:06.007 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-09 01:53:06.485 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-09 01:53:06.964 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-09 01:53:07.442 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-09 01:53:07.920 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-09 01:53:08.397 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-09 01:53:08.875 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-09 01:53:09.354 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-09 01:53:09.832 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-09 01:53:10.310 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-09 01:53:10.788 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-01-09 01:53:11.266 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-01-09 01:53:11.744 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-01-09 01:53:12.222 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-01-09 01:53:12.700 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-01-09 01:53:13.178 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-01-09 01:53:13.656 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-01-09 01:53:14.134 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-01-09 01:53:14.611 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-01-09 01:53:15.089 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-01-09 01:53:15.567 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-01-09 01:53:16.045 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-01-09 01:53:16.523 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-01-09 01:53:17.001 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-01-09 01:53:17.479 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-01-09 01:53:17.957 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-01-09 01:53:18.435 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-01-09 01:53:18.913 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-01-09 01:53:19.391 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-01-09 01:53:19.869 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-01-09 01:53:20.347 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-01-09 01:53:20.825 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-01-09 01:53:21.303 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-01-09 01:53:21.780 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-01-09 01:53:22.258 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-01-09 01:53:22.736 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-01-09 01:53:23.214 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-01-09 01:53:23.692 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-01-09 01:53:23.769 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:53:23.770 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:53:23.777 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:53:23.778 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:53:23.778 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:53:23.778 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:53:23.786 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:53:23.786 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:53:23.787 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:53:23.787 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:53:23.787 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:53:23.787 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:53:23.787 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 01:53:23.787 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=7261 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:53:23.788 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=7261 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:53:28.783 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:53:28.783 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:53:28.785 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:53:28.785 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:53:28.786 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:53:28.787 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:53:28.790 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:53:28.791 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:53:28.791 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:53:28.791 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:53:28.791 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 01:53:28.793 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 01:53:28.793 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 01:53:28.793 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:53:28.793 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:53:28.793 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:53:28.793 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 01:53:28.793 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:53:28.793 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 01:53:28.795 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 01:53:28.795 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 01:53:28.795 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:53:28.795 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:53:28.795 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:53:28.795 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 01:53:28.795 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:53:28.795 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 01:53:28.796 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 01:53:28.796 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 01:53:28.796 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:53:28.796 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:53:28.796 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:53:28.797 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 01:53:28.797 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:53:28.797 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 01:53:28.798 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 01:53:28.798 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 01:53:28.798 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 01:53:28.799 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 01:53:28.799 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 01:53:28.799 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 01:53:28.799 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 01:53:28.799 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 01:53:28.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 01:53:28.799 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:53:28.799 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:53:28.799 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:53:28.799 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 01:53:28.799 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:53:28.799 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:53:28.799 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:53:28.799 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 01:53:28.799 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 01:53:28.799 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 01:53:28.799 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 01:53:28.799 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:53:28.799 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:53:28.799 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:53:28.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 01:53:28.800 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:53:28.800 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:53:28.800 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:53:28.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:53:28.800 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:53:28.800 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:53:28.800 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:53:28.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:53:28.800 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:53:28.800 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:53:28.800 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:53:28.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:53:28.800 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:53:28.800 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:53:28.800 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:53:28.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:53:28.800 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:53:28.800 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:53:28.800 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:53:28.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:53:28.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:53:28.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:53:28.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:53:28.804 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 01:53:29.287 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 01:53:29.322 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:53:29.324 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:53:29.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:53:29.327 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 01:53:29.330 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:53:29.330 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:53:29.330 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:53:29.331 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:53:29.331 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:53:29.332 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:53:29.332 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:53:29.332 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:53:29.765 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 01:53:29.802 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:53:29.802 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:53:29.803 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:53:29.803 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:53:30.242 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 01:53:30.721 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 01:53:30.803 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:53:30.804 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:53:30.804 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:53:30.804 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:53:31.199 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 01:53:31.677 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 01:53:31.805 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:53:31.805 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:53:31.805 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:53:31.805 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:53:32.155 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 01:53:32.634 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 01:53:32.805 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:53:32.806 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:53:32.806 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:53:32.806 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:53:33.112 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 01:53:33.590 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 01:53:33.807 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:53:33.807 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:53:33.807 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:53:33.807 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:53:34.069 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 01:53:34.547 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 01:53:35.019 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 01:53:35.491 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 01:53:35.970 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 01:53:36.448 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 01:53:36.926 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 01:53:37.404 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 01:53:37.882 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 01:53:38.360 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 01:53:38.838 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 01:53:39.316 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 01:53:39.794 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 01:53:40.273 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 01:53:40.751 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 01:53:41.229 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 01:53:41.706 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-09 01:53:42.184 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-09 01:53:42.662 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-09 01:53:43.141 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-09 01:53:43.618 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-09 01:53:44.096 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-09 01:53:44.574 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-09 01:53:45.052 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-09 01:53:45.531 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-09 01:53:46.009 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-09 01:53:46.487 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-09 01:53:46.965 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-09 01:53:47.443 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-09 01:53:47.920 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-09 01:53:48.398 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-09 01:53:48.876 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-09 01:53:49.355 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-09 01:53:49.833 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-01-09 01:53:50.311 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-01-09 01:53:50.789 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-01-09 01:53:51.267 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-01-09 01:53:51.745 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-01-09 01:53:52.224 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-01-09 01:53:52.701 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-01-09 01:53:53.180 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-01-09 01:53:53.657 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-01-09 01:53:54.135 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-01-09 01:53:54.613 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-01-09 01:53:55.091 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-01-09 01:53:55.569 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-01-09 01:53:56.047 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-01-09 01:53:56.525 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-01-09 01:53:56.818 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:53:56.818 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:53:56.824 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:53:56.824 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:53:56.825 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:53:56.825 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:53:56.826 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:53:56.826 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:53:56.826 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:53:56.826 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:53:56.826 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:53:56.826 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:53:56.826 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 01:53:56.826 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=5982 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:53:56.826 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=5982 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:54:01.829 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:54:01.829 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:54:01.831 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:54:01.831 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:54:01.831 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:54:01.832 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:54:01.845 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:54:01.846 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:54:01.846 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:54:01.846 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:54:01.847 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 01:54:01.849 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 01:54:01.849 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 01:54:01.850 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:54:01.850 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:54:01.850 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:54:01.850 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 01:54:01.851 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:54:01.851 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 01:54:01.852 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 01:54:01.852 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 01:54:01.852 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:54:01.852 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:54:01.852 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:54:01.852 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 01:54:01.853 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:54:01.853 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 01:54:01.854 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 01:54:01.854 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 01:54:01.855 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:54:01.855 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:54:01.855 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:54:01.855 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 01:54:01.855 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:54:01.855 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 01:54:01.857 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 01:54:01.857 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 01:54:01.857 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 01:54:01.857 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 01:54:01.857 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 01:54:01.857 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 01:54:01.857 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 01:54:01.858 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 01:54:01.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 01:54:01.858 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:54:01.858 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:54:01.858 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:54:01.858 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 01:54:01.858 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:54:01.858 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:54:01.858 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:54:01.858 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 01:54:01.858 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 01:54:01.858 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 01:54:01.858 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 01:54:01.858 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:54:01.858 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:54:01.858 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:54:01.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 01:54:01.858 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:54:01.858 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:54:01.858 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:54:01.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:54:01.859 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:54:01.859 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:54:01.859 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:54:01.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:54:01.859 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:54:01.859 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:54:01.859 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:54:01.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:54:01.859 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:54:01.859 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:54:01.859 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:54:01.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:54:01.859 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:54:01.859 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:54:01.859 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:54:01.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:54:01.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:54:01.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:54:01.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:54:01.863 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 01:54:02.347 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 01:54:02.382 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:54:02.384 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:54:02.386 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 01:54:02.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:54:02.401 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:54:02.402 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:54:02.402 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:54:02.402 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:54:02.410 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:54:02.411 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:54:02.411 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:54:02.411 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:54:02.411 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:54:02.411 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:54:02.411 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 01:54:02.412 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=115 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:54:02.412 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=115 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:54:07.406 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:54:07.407 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:54:07.409 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:54:07.410 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:54:07.410 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:54:07.411 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:54:07.421 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:54:07.422 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:54:07.422 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:54:07.422 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:54:07.422 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 01:54:07.424 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 01:54:07.424 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 01:54:07.425 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:54:07.425 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:54:07.425 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:54:07.425 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 01:54:07.425 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:54:07.425 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 01:54:07.427 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 01:54:07.427 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 01:54:07.427 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:54:07.427 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:54:07.427 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:54:07.427 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 01:54:07.427 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:54:07.427 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 01:54:07.429 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 01:54:07.429 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 01:54:07.429 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:54:07.429 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:54:07.430 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:54:07.430 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 01:54:07.430 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:54:07.430 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 01:54:07.432 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 01:54:07.432 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 01:54:07.432 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 01:54:07.432 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 01:54:07.432 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 01:54:07.432 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 01:54:07.432 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 01:54:07.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 01:54:07.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 01:54:07.433 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:54:07.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:54:07.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:54:07.433 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 01:54:07.433 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:54:07.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:54:07.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:54:07.433 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 01:54:07.433 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 01:54:07.433 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 01:54:07.433 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 01:54:07.433 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:54:07.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:54:07.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:54:07.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 01:54:07.433 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:54:07.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:54:07.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:54:07.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:54:07.433 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:54:07.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:54:07.434 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:54:07.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:54:07.434 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:54:07.434 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:54:07.434 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:54:07.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:54:07.434 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:54:07.434 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:54:07.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:54:07.434 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:54:07.434 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:54:07.434 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:54:07.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:54:07.434 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:54:07.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:54:07.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:54:07.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:54:07.438 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 01:54:07.920 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 01:54:07.962 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:54:07.963 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:54:07.965 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 01:54:07.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:54:07.979 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:54:07.979 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:54:07.979 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:54:07.979 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:54:07.985 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:54:07.985 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:54:07.985 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:54:07.986 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:54:07.986 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:54:07.986 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 01:54:07.986 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:54:07.986 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=116 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:54:12.984 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:54:12.984 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:54:12.986 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:54:12.987 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:54:12.988 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:54:12.988 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:54:12.997 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:54:12.997 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:54:12.998 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:54:12.998 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:54:12.998 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 01:54:13.000 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 01:54:13.000 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 01:54:13.000 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:54:13.001 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:54:13.001 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:54:13.001 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 01:54:13.001 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:54:13.001 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 01:54:13.002 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 01:54:13.003 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 01:54:13.003 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:54:13.003 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:54:13.003 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:54:13.003 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 01:54:13.003 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:54:13.003 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 01:54:13.004 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 01:54:13.004 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 01:54:13.005 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:54:13.005 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:54:13.005 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:54:13.005 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 01:54:13.005 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:54:13.005 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 01:54:13.007 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 01:54:13.007 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 01:54:13.007 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 01:54:13.007 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 01:54:13.007 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 01:54:13.007 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 01:54:13.007 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 01:54:13.007 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 01:54:13.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 01:54:13.007 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:54:13.007 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:54:13.007 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:54:13.007 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 01:54:13.007 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:54:13.007 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:54:13.007 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:54:13.007 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 01:54:13.007 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 01:54:13.007 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 01:54:13.008 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 01:54:13.008 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:54:13.008 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:54:13.008 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:54:13.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 01:54:13.008 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:54:13.008 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:54:13.008 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:54:13.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:54:13.008 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:54:13.008 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:54:13.008 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:54:13.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:54:13.008 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:54:13.008 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:54:13.008 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:54:13.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:54:13.008 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:54:13.008 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:54:13.008 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:54:13.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:54:13.008 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:54:13.008 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:54:13.008 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:54:13.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:54:13.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:54:13.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:54:13.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:54:13.012 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 01:54:13.495 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 01:54:13.532 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:54:13.535 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:54:13.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:54:13.537 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 01:54:13.550 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:54:13.551 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:54:13.551 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:54:13.551 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:54:13.553 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:54:13.553 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:54:13.553 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:54:13.553 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:54:13.553 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:54:13.553 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 01:54:13.553 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:54:13.553 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=115 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:54:13.553 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=115 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:54:18.556 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:54:18.556 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:54:18.557 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:54:18.558 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:54:18.558 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:54:18.559 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:54:18.563 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:54:18.563 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:54:18.563 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:54:18.564 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:54:18.564 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 01:54:18.565 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 01:54:18.565 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 01:54:18.566 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:54:18.566 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:54:18.566 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:54:18.566 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 01:54:18.566 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:54:18.566 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 01:54:18.567 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 01:54:18.567 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 01:54:18.568 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:54:18.568 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:54:18.568 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:54:18.568 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 01:54:18.568 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:54:18.568 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 01:54:18.569 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 01:54:18.569 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 01:54:18.570 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:54:18.570 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:54:18.570 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:54:18.570 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 01:54:18.570 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:54:18.570 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 01:54:18.572 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 01:54:18.572 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 01:54:18.572 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 01:54:18.572 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 01:54:18.572 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 01:54:18.572 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 01:54:18.572 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 01:54:18.572 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 01:54:18.572 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 01:54:18.572 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:54:18.572 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:54:18.572 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:54:18.572 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 01:54:18.572 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:54:18.572 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:54:18.572 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:54:18.572 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 01:54:18.572 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 01:54:18.572 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 01:54:18.573 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 01:54:18.573 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:54:18.573 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:54:18.573 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:54:18.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 01:54:18.573 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:54:18.573 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:54:18.573 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:54:18.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:54:18.573 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:54:18.573 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:54:18.573 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:54:18.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:54:18.573 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:54:18.573 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:54:18.573 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:54:18.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:54:18.573 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:54:18.573 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:54:18.573 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:54:18.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:54:18.573 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:54:18.574 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:54:18.574 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:54:18.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:54:18.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:54:18.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:54:18.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:54:18.577 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 01:54:19.062 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 01:54:19.088 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:54:19.089 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:54:19.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:54:19.090 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 01:54:19.092 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:54:19.092 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:54:19.092 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:54:19.092 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:54:19.092 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:54:19.093 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:54:19.093 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:54:19.093 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:54:19.538 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 01:54:19.575 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:54:19.576 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:54:19.576 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:54:19.576 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:54:20.016 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 01:54:20.494 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 01:54:20.576 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:54:20.576 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:54:20.577 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:54:20.577 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:54:20.973 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 01:54:21.451 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 01:54:21.577 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:54:21.577 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:54:21.577 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:54:21.578 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:54:21.929 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 01:54:22.408 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 01:54:22.578 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:54:22.578 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:54:22.578 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:54:22.578 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:54:22.886 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 01:54:23.364 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 01:54:23.578 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:54:23.579 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:54:23.579 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:54:23.579 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:54:23.842 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 01:54:24.320 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 01:54:24.798 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 01:54:25.276 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 01:54:25.754 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 01:54:26.231 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 01:54:26.709 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 01:54:27.116 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:54:27.116 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:54:27.122 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:54:27.122 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:54:27.122 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:54:27.122 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:54:27.129 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:54:27.129 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:54:27.129 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:54:27.129 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:54:27.129 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:54:27.129 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:54:27.129 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 01:54:27.130 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1825 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:54:27.130 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1825 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:54:27.130 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1825 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:54:27.130 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1825 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:54:27.130 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1825 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:54:27.130 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1825 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:54:27.131 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1826 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:54:27.131 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1826 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:54:27.131 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1826 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:54:27.131 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1826 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:54:27.131 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1826 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:54:27.131 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1826 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:54:27.131 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1826 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:54:27.131 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1826 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:54:27.131 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1827 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:54:27.131 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1827 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:54:27.131 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1827 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:54:27.132 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1827 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:54:27.132 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1827 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:54:27.132 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1827 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:54:27.132 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1827 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:54:27.132 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1827 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:54:32.127 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:54:32.127 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:54:32.129 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:54:32.129 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:54:32.130 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:54:32.130 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:54:32.139 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:54:32.141 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:54:32.141 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:54:32.141 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:54:32.141 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 01:54:32.146 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 01:54:32.147 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 01:54:32.147 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:54:32.147 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:54:32.147 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:54:32.148 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 01:54:32.148 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:54:32.148 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 01:54:32.149 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 01:54:32.150 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 01:54:32.150 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:54:32.150 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:54:32.150 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:54:32.150 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 01:54:32.150 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:54:32.151 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 01:54:32.152 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 01:54:32.153 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 01:54:32.153 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:54:32.153 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:54:32.153 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:54:32.153 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 01:54:32.153 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:54:32.153 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 01:54:32.155 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 01:54:32.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 01:54:32.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 01:54:32.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 01:54:32.155 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 01:54:32.156 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 01:54:32.156 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 01:54:32.156 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 01:54:32.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 01:54:32.156 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:54:32.156 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:54:32.156 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:54:32.156 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 01:54:32.156 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:54:32.156 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:54:32.156 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:54:32.156 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 01:54:32.156 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 01:54:32.156 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 01:54:32.157 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 01:54:32.157 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:54:32.157 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:54:32.157 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:54:32.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 01:54:32.157 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:54:32.157 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:54:32.157 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:54:32.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:54:32.157 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:54:32.157 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:54:32.157 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:54:32.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:54:32.157 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:54:32.157 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:54:32.157 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:54:32.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:54:32.157 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:54:32.157 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:54:32.157 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:54:32.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:54:32.157 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:54:32.157 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:54:32.157 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:54:32.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:54:32.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:54:32.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:54:32.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:54:32.161 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 01:54:32.645 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 01:54:32.679 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:54:32.680 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:54:32.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:54:32.682 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 01:54:32.685 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:54:32.685 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:54:32.686 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:54:32.686 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:54:32.687 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:54:32.687 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:54:32.687 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:54:32.687 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:54:33.123 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 01:54:33.159 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:54:33.160 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:54:33.160 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:54:33.162 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:54:33.601 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 01:54:34.079 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 01:54:34.161 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:54:34.161 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:54:34.161 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:54:34.163 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:54:34.558 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 01:54:35.036 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 01:54:35.161 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:54:35.162 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:54:35.162 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:54:35.164 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:54:35.514 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 01:54:35.992 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 01:54:36.163 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:54:36.163 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:54:36.163 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:54:36.164 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:54:36.470 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 01:54:36.948 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 01:54:37.164 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:54:37.164 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:54:37.164 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:54:37.165 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:54:37.426 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 01:54:37.904 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 01:54:38.382 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 01:54:38.860 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 01:54:39.338 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 01:54:39.816 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 01:54:40.295 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 01:54:40.695 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:54:40.695 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:54:40.698 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:54:40.701 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:54:40.701 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:54:40.701 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:54:40.701 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:54:40.701 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:54:40.701 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:54:40.701 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:54:40.701 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:54:40.701 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:54:40.701 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 01:54:40.702 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1823 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:54:40.702 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1823 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:54:40.702 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1823 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:54:40.702 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1823 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:54:40.702 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1823 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:54:40.702 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1824 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:54:40.702 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1824 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:54:40.702 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1824 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:54:40.702 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1824 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:54:40.702 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1824 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:54:40.702 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1824 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:54:40.702 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1824 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:54:40.702 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1824 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:54:45.703 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:54:45.703 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:54:45.705 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:54:45.706 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:54:45.706 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:54:45.707 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:54:45.715 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:54:45.716 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:54:45.716 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:54:45.716 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:54:45.716 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 01:54:45.718 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 01:54:45.718 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 01:54:45.718 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:54:45.718 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:54:45.718 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:54:45.719 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 01:54:45.719 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:54:45.719 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 01:54:45.720 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 01:54:45.720 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 01:54:45.720 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:54:45.721 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:54:45.721 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:54:45.721 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 01:54:45.721 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:54:45.721 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 01:54:45.723 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 01:54:45.723 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 01:54:45.723 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:54:45.723 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:54:45.723 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:54:45.724 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 01:54:45.724 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:54:45.724 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 01:54:45.727 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 01:54:45.727 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 01:54:45.727 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 01:54:45.727 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 01:54:45.727 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 01:54:45.727 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 01:54:45.727 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 01:54:45.727 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 01:54:45.728 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 01:54:45.728 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:54:45.728 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:54:45.728 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:54:45.728 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 01:54:45.728 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:54:45.728 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:54:45.728 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:54:45.728 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 01:54:45.728 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 01:54:45.728 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 01:54:45.728 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 01:54:45.728 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:54:45.728 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:54:45.728 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:54:45.728 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 01:54:45.729 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:54:45.729 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:54:45.729 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:54:45.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:54:45.729 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:54:45.729 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:54:45.729 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:54:45.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:54:45.729 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:54:45.729 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:54:45.729 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:54:45.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:54:45.729 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:54:45.729 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:54:45.729 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:54:45.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:54:45.729 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:54:45.729 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:54:45.729 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:54:45.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:54:45.730 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:54:45.730 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:54:45.730 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:54:45.733 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 01:54:46.216 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 01:54:46.252 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:54:46.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:54:46.255 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:54:46.259 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 01:54:46.263 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:54:46.263 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:54:46.263 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:54:46.265 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:54:46.265 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:54:46.265 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:54:46.265 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:54:46.266 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:54:46.694 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 01:54:46.731 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:54:46.732 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:54:46.732 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:54:46.735 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:54:47.172 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 01:54:47.650 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 01:54:47.732 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:54:47.733 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:54:47.733 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:54:47.737 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:54:48.128 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 01:54:48.607 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 01:54:48.733 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:54:48.734 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:54:48.734 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:54:48.738 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:54:49.085 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 01:54:49.563 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 01:54:49.734 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:54:49.735 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:54:49.735 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:54:49.738 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:54:50.041 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 01:54:50.519 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 01:54:50.735 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:54:50.735 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:54:50.736 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:54:50.740 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:54:50.997 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 01:54:51.475 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 01:54:51.953 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 01:54:52.431 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 01:54:52.909 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 01:54:53.386 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 01:54:53.864 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 01:54:54.315 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:54:54.316 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:54:54.321 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:54:54.322 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:54:54.322 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:54:54.322 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:54:54.328 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:54:54.328 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:54:54.328 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:54:54.328 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:54:54.328 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:54:54.328 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:54:54.328 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 01:54:54.329 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1834 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:54:54.329 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1834 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:54:59.327 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:54:59.327 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:54:59.329 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:54:59.329 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:54:59.329 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:54:59.330 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:54:59.338 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:54:59.339 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:54:59.339 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:54:59.339 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:54:59.339 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 01:54:59.341 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 01:54:59.342 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 01:54:59.342 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:54:59.342 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:54:59.342 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:54:59.342 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 01:54:59.342 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:54:59.342 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 01:54:59.344 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 01:54:59.344 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 01:54:59.344 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:54:59.344 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:54:59.344 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:54:59.344 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 01:54:59.344 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:54:59.344 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 01:54:59.346 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 01:54:59.346 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 01:54:59.346 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:54:59.346 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:54:59.346 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:54:59.346 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 01:54:59.346 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:54:59.346 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 01:54:59.348 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 01:54:59.348 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 01:54:59.348 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 01:54:59.348 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 01:54:59.348 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 01:54:59.348 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 01:54:59.349 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 01:54:59.349 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 01:54:59.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 01:54:59.349 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:54:59.349 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:54:59.349 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:54:59.349 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 01:54:59.349 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:54:59.349 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:54:59.349 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:54:59.349 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 01:54:59.349 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 01:54:59.349 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 01:54:59.349 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 01:54:59.349 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:54:59.349 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:54:59.349 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:54:59.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 01:54:59.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:54:59.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:54:59.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:54:59.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:54:59.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:54:59.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:54:59.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:54:59.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:54:59.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:54:59.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:54:59.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:54:59.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:54:59.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:54:59.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:54:59.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:54:59.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:54:59.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:54:59.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:54:59.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:54:59.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:54:59.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:54:59.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:54:59.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:54:59.354 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 01:54:59.838 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 01:54:59.878 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:54:59.880 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:54:59.882 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 01:54:59.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:54:59.886 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:54:59.886 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:54:59.887 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:54:59.887 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:54:59.888 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:54:59.888 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:54:59.888 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:54:59.888 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:55:00.315 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 01:55:00.352 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:55:00.352 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:55:00.353 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:55:00.356 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:55:00.793 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 01:55:01.271 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 01:55:01.353 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:55:01.353 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:55:01.353 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:55:01.356 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:55:01.750 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 01:55:02.228 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 01:55:02.354 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:55:02.354 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:55:02.354 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:55:02.357 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:55:02.706 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 01:55:03.184 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 01:55:03.355 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:55:03.355 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:55:03.356 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:55:03.358 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:55:03.662 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 01:55:04.140 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 01:55:04.356 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:55:04.357 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:55:04.357 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:55:04.359 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:55:04.618 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 01:55:05.096 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 01:55:05.575 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 01:55:06.052 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 01:55:06.530 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 01:55:07.007 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 01:55:07.485 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 01:55:07.938 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:55:07.938 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:55:07.945 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:55:07.945 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:55:07.945 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:55:07.946 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:55:07.954 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:55:07.955 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:55:07.955 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:55:07.955 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:55:07.955 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 01:55:07.955 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:55:07.956 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:55:07.956 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1835 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:55:07.956 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1835 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:55:07.956 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1835 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:55:07.956 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1835 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:55:07.956 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1835 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:55:07.956 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1835 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:55:07.956 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1835 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:55:07.956 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1836 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:55:07.956 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1836 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:55:07.956 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1836 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:55:07.956 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1836 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:55:07.956 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1836 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:55:07.956 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1836 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:55:07.956 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1836 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:55:07.956 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1836 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:55:07.956 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1837 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:55:07.956 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1837 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:55:07.956 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1837 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:55:07.956 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1837 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:55:07.956 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1837 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:55:07.956 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1837 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:55:07.956 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1837 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:55:07.956 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1837 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:55:07.956 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1838 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:55:07.956 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1838 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:55:12.953 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:55:12.954 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:55:12.954 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:55:12.954 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:55:12.954 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:55:12.954 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:55:12.957 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:55:12.958 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:55:12.958 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:55:12.958 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:55:12.958 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 01:55:12.960 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 01:55:12.961 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 01:55:12.961 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:55:12.961 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:55:12.961 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:55:12.961 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 01:55:12.962 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:55:12.962 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 01:55:12.963 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 01:55:12.963 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 01:55:12.963 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:55:12.963 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:55:12.963 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:55:12.963 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 01:55:12.963 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:55:12.963 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 01:55:12.965 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 01:55:12.965 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 01:55:12.965 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:55:12.965 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:55:12.965 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:55:12.965 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 01:55:12.965 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:55:12.965 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 01:55:12.967 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 01:55:12.967 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 01:55:12.967 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 01:55:12.967 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 01:55:12.967 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 01:55:12.967 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 01:55:12.967 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 01:55:12.967 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 01:55:12.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 01:55:12.967 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:55:12.967 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:55:12.967 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:55:12.967 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 01:55:12.967 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:55:12.968 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:55:12.968 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:55:12.968 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 01:55:12.968 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 01:55:12.968 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 01:55:12.968 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 01:55:12.968 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:55:12.968 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:55:12.968 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:55:12.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 01:55:12.968 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:55:12.968 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:55:12.968 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:55:12.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:55:12.968 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:55:12.968 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:55:12.968 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:55:12.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:55:12.968 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:55:12.968 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:55:12.968 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:55:12.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:55:12.969 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:55:12.969 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:55:12.969 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:55:12.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:55:12.969 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:55:12.969 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:55:12.969 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:55:12.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:55:12.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:55:12.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:55:12.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:55:12.972 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 01:55:13.456 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 01:55:13.493 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:55:13.495 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:55:13.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:55:13.497 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 01:55:13.499 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:55:13.499 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:55:13.500 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:55:13.500 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:55:13.500 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:55:13.500 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:55:13.500 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:55:13.500 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:55:13.933 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 01:55:13.970 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:55:13.970 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:55:13.971 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:55:13.972 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:55:14.411 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 01:55:14.889 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 01:55:14.971 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:55:14.971 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:55:14.971 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:55:14.972 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:55:15.367 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 01:55:15.845 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 01:55:15.972 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:55:15.973 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:55:15.973 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:55:15.973 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:55:16.323 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 01:55:16.801 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 01:55:16.973 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:55:16.973 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:55:16.974 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:55:16.974 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:55:17.279 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 01:55:17.757 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 01:55:17.974 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:55:17.975 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:55:17.975 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:55:17.975 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:55:18.234 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 01:55:18.712 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 01:55:19.190 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 01:55:19.668 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 01:55:20.146 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 01:55:20.624 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 01:55:21.102 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 01:55:21.552 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:55:21.552 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:55:21.557 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:55:21.557 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:55:21.557 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:55:21.557 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:55:21.559 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:55:21.559 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:55:21.559 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:55:21.559 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:55:21.559 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:55:21.559 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:55:21.559 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 01:55:21.559 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1834 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:55:21.559 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1834 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:55:26.562 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:55:26.562 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:55:26.564 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:55:26.564 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:55:26.564 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:55:26.565 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:55:26.574 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:55:26.575 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:55:26.575 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:55:26.576 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:55:26.576 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 01:55:26.581 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 01:55:26.581 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 01:55:26.581 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:55:26.581 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:55:26.582 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:55:26.582 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 01:55:26.582 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:55:26.582 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 01:55:26.584 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 01:55:26.584 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 01:55:26.584 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:55:26.584 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:55:26.584 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:55:26.584 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 01:55:26.585 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:55:26.585 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 01:55:26.587 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 01:55:26.587 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 01:55:26.587 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:55:26.587 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:55:26.587 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:55:26.587 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 01:55:26.587 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:55:26.587 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 01:55:26.590 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 01:55:26.590 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 01:55:26.590 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 01:55:26.590 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 01:55:26.590 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 01:55:26.590 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 01:55:26.590 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 01:55:26.590 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 01:55:26.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 01:55:26.590 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:55:26.590 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:55:26.590 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:55:26.590 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 01:55:26.590 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:55:26.590 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:55:26.590 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:55:26.590 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 01:55:26.590 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 01:55:26.590 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 01:55:26.590 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 01:55:26.591 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:55:26.591 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:55:26.591 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:55:26.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 01:55:26.591 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:55:26.591 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:55:26.591 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:55:26.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:55:26.591 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:55:26.591 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:55:26.591 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:55:26.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:55:26.591 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:55:26.591 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:55:26.591 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:55:26.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:55:26.591 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:55:26.591 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:55:26.591 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:55:26.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:55:26.591 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:55:26.591 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:55:26.591 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:55:26.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:55:26.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:55:26.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:55:26.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:55:26.595 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 01:55:27.078 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 01:55:27.114 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:55:27.117 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:55:27.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:55:27.119 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 01:55:27.122 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:55:27.122 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:55:27.122 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:55:27.122 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:55:27.123 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:55:27.123 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:55:27.123 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:55:27.123 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:55:27.556 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 01:55:27.593 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:55:27.602 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:55:27.602 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:55:27.602 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:55:28.034 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 01:55:28.512 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 01:55:28.603 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:55:28.604 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:55:28.605 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:55:28.605 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:55:28.990 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 01:55:29.468 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 01:55:29.603 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:55:29.605 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:55:29.606 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:55:29.606 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:55:29.946 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 01:55:30.424 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 01:55:30.605 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:55:30.606 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:55:30.606 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:55:30.606 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:55:30.902 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 01:55:31.380 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 01:55:31.606 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:55:31.606 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:55:31.607 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:55:31.607 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:55:31.859 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 01:55:32.337 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 01:55:32.815 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 01:55:33.293 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 01:55:33.771 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 01:55:34.249 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 01:55:34.727 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 01:55:35.205 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 01:55:35.683 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 01:55:36.161 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 01:55:36.639 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 01:55:37.117 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 01:55:37.595 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 01:55:38.099 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 01:55:38.576 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 01:55:39.054 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 01:55:39.532 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-09 01:55:40.010 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-09 01:55:40.488 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-09 01:55:40.966 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-09 01:55:41.444 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-09 01:55:41.922 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-09 01:55:42.400 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-09 01:55:42.878 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-09 01:55:43.185 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:55:43.185 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:55:43.188 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:55:43.188 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:55:43.188 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:55:43.188 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:55:43.194 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:55:43.194 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:55:43.194 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:55:43.194 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:55:43.195 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:55:43.195 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:55:43.195 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 01:55:43.195 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3534 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:55:43.195 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3534 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:55:48.193 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:55:48.194 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:55:48.196 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:55:48.196 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:55:48.197 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:55:48.198 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:55:48.202 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:55:48.202 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:55:48.202 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:55:48.202 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:55:48.202 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 01:55:48.204 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 01:55:48.205 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 01:55:48.205 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:55:48.205 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:55:48.205 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:55:48.205 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 01:55:48.205 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:55:48.205 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 01:55:48.206 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 01:55:48.207 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 01:55:48.207 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:55:48.207 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:55:48.207 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:55:48.207 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 01:55:48.207 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:55:48.207 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 01:55:48.208 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 01:55:48.208 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 01:55:48.208 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:55:48.208 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:55:48.208 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:55:48.208 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 01:55:48.208 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:55:48.208 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 01:55:48.210 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 01:55:48.210 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 01:55:48.210 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 01:55:48.210 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 01:55:48.210 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 01:55:48.211 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 01:55:48.211 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 01:55:48.211 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 01:55:48.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 01:55:48.211 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:55:48.211 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:55:48.211 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:55:48.211 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 01:55:48.211 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:55:48.211 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:55:48.211 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:55:48.211 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 01:55:48.211 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 01:55:48.211 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 01:55:48.211 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 01:55:48.211 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:55:48.211 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:55:48.211 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:55:48.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 01:55:48.212 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:55:48.212 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:55:48.212 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:55:48.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:55:48.212 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:55:48.212 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:55:48.212 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:55:48.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:55:48.212 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:55:48.212 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:55:48.212 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:55:48.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:55:48.212 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:55:48.212 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:55:48.212 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:55:48.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:55:48.212 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:55:48.212 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:55:48.212 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:55:48.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:55:48.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:55:48.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:55:48.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:55:48.216 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 01:55:48.699 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 01:55:48.738 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:55:48.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:55:48.742 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:55:48.744 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 01:55:48.758 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:55:48.758 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:55:48.758 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:55:48.758 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:55:48.758 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:55:48.759 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:55:48.759 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:55:48.759 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:55:49.176 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 01:55:49.214 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:55:49.214 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:55:49.214 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:55:49.215 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:55:49.655 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 01:55:50.133 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 01:55:50.214 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:55:50.215 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:55:50.215 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:55:50.215 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:55:50.611 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 01:55:51.089 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 01:55:51.215 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:55:51.216 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:55:51.216 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:55:51.216 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:55:51.567 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 01:55:52.045 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 01:55:52.216 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:55:52.217 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:55:52.217 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:55:52.217 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:55:52.523 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 01:55:53.001 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 01:55:53.217 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:55:53.217 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:55:53.218 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:55:53.218 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:55:53.478 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 01:55:53.956 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 01:55:54.434 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 01:55:54.912 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 01:55:55.390 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 01:55:55.868 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 01:55:56.346 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 01:55:56.795 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:55:56.795 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:55:56.808 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:55:56.808 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:55:56.808 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:55:56.808 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:55:56.809 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:55:56.809 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:55:56.809 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:55:56.809 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:55:56.809 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:55:56.809 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:55:56.809 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 01:56:01.812 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:56:01.812 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:56:01.814 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:56:01.815 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:56:01.815 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:56:01.816 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:56:01.824 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:56:01.824 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:56:01.824 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:56:01.825 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:56:01.825 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 01:56:01.826 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 01:56:01.826 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 01:56:01.827 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:56:01.827 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:56:01.827 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:56:01.827 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 01:56:01.828 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:56:01.828 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 01:56:01.828 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 01:56:01.829 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 01:56:01.829 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:56:01.829 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:56:01.829 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:56:01.829 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 01:56:01.829 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:56:01.829 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 01:56:01.830 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 01:56:01.830 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 01:56:01.830 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:56:01.830 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:56:01.831 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:56:01.831 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 01:56:01.831 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:56:01.831 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 01:56:01.832 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 01:56:01.833 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 01:56:01.833 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 01:56:01.833 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 01:56:01.833 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 01:56:01.833 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 01:56:01.833 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 01:56:01.833 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 01:56:01.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 01:56:01.833 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:56:01.833 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:56:01.833 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:56:01.833 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 01:56:01.833 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:56:01.833 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:56:01.833 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:56:01.833 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 01:56:01.833 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 01:56:01.833 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 01:56:01.833 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 01:56:01.833 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:56:01.833 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:56:01.833 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:56:01.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 01:56:01.833 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:56:01.834 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:56:01.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:56:01.834 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:56:01.834 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:56:01.834 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:56:01.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:56:01.834 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:56:01.834 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:56:01.834 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:56:01.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:56:01.834 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:56:01.834 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:56:01.834 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:56:01.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:56:01.834 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:56:01.834 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:56:01.834 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:56:01.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:56:01.834 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:56:01.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:56:01.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:56:01.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:56:01.838 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 01:56:02.322 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 01:56:02.357 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:56:02.359 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:56:02.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:56:02.361 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 01:56:02.366 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:56:02.366 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:56:02.366 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:56:02.367 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:56:02.367 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:56:02.367 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:56:02.367 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:56:02.367 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:56:02.799 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 01:56:02.836 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:56:02.837 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:56:02.837 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:56:02.838 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:56:03.276 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 01:56:03.754 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 01:56:03.838 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:56:03.838 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:56:03.838 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:56:03.839 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:56:04.232 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 01:56:04.710 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 01:56:04.839 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:56:04.840 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:56:04.840 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:56:04.840 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:56:05.188 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 01:56:05.666 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 01:56:05.840 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:56:05.841 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:56:05.841 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:56:05.841 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:56:06.144 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 01:56:06.622 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 01:56:06.842 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:56:06.842 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:56:06.842 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:56:06.842 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:56:07.100 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 01:56:07.578 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 01:56:08.056 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 01:56:08.534 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 01:56:09.011 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 01:56:09.489 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 01:56:09.966 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 01:56:10.444 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 01:56:10.922 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 01:56:11.400 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 01:56:11.878 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 01:56:12.356 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 01:56:12.834 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 01:56:13.324 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 01:56:13.802 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 01:56:14.279 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 01:56:14.758 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-09 01:56:15.236 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-09 01:56:15.714 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-09 01:56:16.192 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-09 01:56:16.670 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-09 01:56:17.148 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-09 01:56:17.626 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-09 01:56:18.105 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-09 01:56:18.430 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:56:18.430 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:56:18.448 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:56:18.449 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:56:18.449 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:56:18.449 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:56:18.454 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:56:18.454 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:56:18.454 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:56:18.454 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:56:18.454 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:56:18.454 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:56:18.454 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 01:56:18.455 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3545 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:56:18.455 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3545 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:56:18.455 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3545 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:56:18.455 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3545 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:56:18.455 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3545 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:56:18.455 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3545 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:56:18.455 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3545 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:56:18.455 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3545 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:56:23.458 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:56:23.458 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:56:23.458 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:56:23.458 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:56:23.458 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:56:23.458 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:56:23.467 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:56:23.469 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:56:23.469 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:56:23.469 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:56:23.469 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 01:56:23.473 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 01:56:23.473 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 01:56:23.473 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:56:23.473 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:56:23.473 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:56:23.473 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 01:56:23.473 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:56:23.473 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 01:56:23.476 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 01:56:23.476 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 01:56:23.476 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:56:23.476 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:56:23.476 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:56:23.476 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 01:56:23.476 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:56:23.476 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 01:56:23.478 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 01:56:23.478 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 01:56:23.478 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:56:23.478 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:56:23.479 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:56:23.479 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 01:56:23.479 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:56:23.479 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 01:56:23.481 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 01:56:23.481 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 01:56:23.481 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 01:56:23.481 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 01:56:23.481 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 01:56:23.481 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 01:56:23.482 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 01:56:23.482 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 01:56:23.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 01:56:23.482 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:56:23.482 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:56:23.482 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:56:23.482 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 01:56:23.482 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:56:23.482 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:56:23.482 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:56:23.482 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 01:56:23.482 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 01:56:23.482 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 01:56:23.482 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 01:56:23.482 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:56:23.482 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:56:23.482 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:56:23.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 01:56:23.482 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:56:23.482 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:56:23.483 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:56:23.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:56:23.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:56:23.483 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:56:23.483 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:56:23.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:56:23.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:56:23.483 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:56:23.483 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:56:23.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:56:23.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:56:23.483 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:56:23.483 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:56:23.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:56:23.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:56:23.483 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:56:23.483 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:56:23.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:56:23.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:56:23.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:56:23.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:56:23.487 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 01:56:23.971 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 01:56:24.010 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:56:24.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:56:24.013 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:56:24.016 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 01:56:24.043 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:56:24.044 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:56:24.044 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:56:24.066 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:56:24.066 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:56:24.067 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:56:24.067 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:56:24.075 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:56:24.076 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:56:24.076 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:56:24.076 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:56:24.076 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:56:24.076 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:56:24.076 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 01:56:24.076 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=125 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:56:24.076 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=125 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:56:24.076 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=125 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:56:24.076 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=125 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:56:24.076 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=125 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:56:24.076 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=125 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:56:24.076 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=126 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:56:24.076 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=126 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:56:24.076 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=126 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:56:24.076 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=126 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:56:24.077 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=126 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:56:24.077 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=126 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:56:24.077 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=126 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:56:24.077 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=126 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:56:29.069 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:56:29.069 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:56:29.071 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:56:29.071 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:56:29.071 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:56:29.072 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:56:29.081 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:56:29.082 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:56:29.082 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:56:29.082 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:56:29.082 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 01:56:29.084 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 01:56:29.084 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 01:56:29.085 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:56:29.085 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:56:29.085 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:56:29.085 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 01:56:29.085 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:56:29.085 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 01:56:29.087 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 01:56:29.087 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 01:56:29.087 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:56:29.087 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:56:29.087 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:56:29.087 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 01:56:29.087 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:56:29.087 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 01:56:29.089 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 01:56:29.089 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 01:56:29.089 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:56:29.090 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:56:29.090 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:56:29.090 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 01:56:29.090 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:56:29.090 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 01:56:29.092 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 01:56:29.092 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 01:56:29.092 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 01:56:29.092 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 01:56:29.093 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 01:56:29.093 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 01:56:29.093 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 01:56:29.093 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 01:56:29.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 01:56:29.093 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:56:29.093 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:56:29.093 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:56:29.093 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 01:56:29.093 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:56:29.093 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:56:29.093 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:56:29.093 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 01:56:29.093 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 01:56:29.093 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 01:56:29.093 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 01:56:29.093 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:56:29.094 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:56:29.094 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:56:29.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 01:56:29.094 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:56:29.094 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:56:29.094 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:56:29.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:56:29.094 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:56:29.094 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:56:29.094 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:56:29.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:56:29.094 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:56:29.094 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:56:29.094 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:56:29.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:56:29.094 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:56:29.094 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:56:29.094 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:56:29.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:56:29.094 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:56:29.095 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:56:29.095 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:56:29.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:56:29.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:56:29.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:56:29.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:56:29.098 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 01:56:29.580 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 01:56:29.621 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:56:29.623 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:56:29.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:56:29.626 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 01:56:29.653 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:56:29.653 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:56:29.653 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:56:29.687 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:56:29.688 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:56:29.688 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:56:29.688 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:56:29.690 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:56:29.690 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:56:29.690 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:56:29.690 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:56:29.690 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:56:29.690 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:56:29.690 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 01:56:29.690 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=126 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:56:29.690 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=126 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:56:34.694 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:56:34.694 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:56:34.694 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:56:34.694 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:56:34.694 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:56:34.694 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:56:34.698 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:56:34.698 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:56:34.698 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:56:34.698 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:56:34.699 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 01:56:34.700 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 01:56:34.700 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 01:56:34.701 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:56:34.701 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:56:34.701 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:56:34.701 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 01:56:34.701 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:56:34.701 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 01:56:34.703 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 01:56:34.703 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 01:56:34.703 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:56:34.703 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:56:34.703 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:56:34.703 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 01:56:34.703 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:56:34.703 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 01:56:34.705 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 01:56:34.705 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 01:56:34.705 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:56:34.705 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:56:34.705 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:56:34.705 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 01:56:34.705 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:56:34.705 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 01:56:34.707 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 01:56:34.707 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 01:56:34.707 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 01:56:34.707 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 01:56:34.707 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 01:56:34.707 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 01:56:34.707 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 01:56:34.708 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 01:56:34.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 01:56:34.708 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:56:34.708 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:56:34.708 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:56:34.708 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 01:56:34.708 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:56:34.708 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:56:34.708 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:56:34.708 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 01:56:34.708 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 01:56:34.708 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 01:56:34.708 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 01:56:34.708 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:56:34.708 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:56:34.708 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:56:34.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 01:56:34.708 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:56:34.708 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:56:34.708 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:56:34.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:56:34.708 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:56:34.708 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:56:34.708 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:56:34.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:56:34.708 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:56:34.709 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:56:34.709 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:56:34.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:56:34.709 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:56:34.709 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:56:34.709 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:56:34.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:56:34.709 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:56:34.709 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:56:34.709 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:56:34.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:56:34.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:56:34.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:56:34.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:56:34.713 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 01:56:35.196 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 01:56:35.233 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:56:35.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:56:35.237 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:56:35.241 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 01:56:35.264 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:56:35.264 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:56:35.264 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:56:35.309 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:56:35.309 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:56:35.309 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:56:35.309 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:56:35.310 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:56:35.310 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:56:35.311 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:56:35.311 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:56:35.311 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:56:35.311 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:56:35.311 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 01:56:35.311 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=128 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:56:35.311 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=128 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:56:35.311 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=128 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:56:35.311 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=128 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:56:35.311 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=128 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:56:35.311 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=128 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:56:35.311 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=128 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:56:35.311 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=128 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:56:40.313 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:56:40.314 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:56:40.315 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:56:40.316 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:56:40.316 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:56:40.317 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:56:40.325 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:56:40.326 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:56:40.326 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:56:40.326 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:56:40.326 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 01:56:40.329 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 01:56:40.329 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 01:56:40.330 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:56:40.330 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:56:40.330 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:56:40.330 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 01:56:40.330 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:56:40.330 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 01:56:40.332 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 01:56:40.332 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 01:56:40.332 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:56:40.332 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:56:40.332 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:56:40.332 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 01:56:40.332 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:56:40.332 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 01:56:40.334 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 01:56:40.334 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 01:56:40.334 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:56:40.334 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:56:40.334 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:56:40.334 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 01:56:40.334 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:56:40.334 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 01:56:40.336 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 01:56:40.336 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 01:56:40.336 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 01:56:40.336 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 01:56:40.336 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 01:56:40.336 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 01:56:40.337 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 01:56:40.337 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 01:56:40.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 01:56:40.337 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:56:40.337 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:56:40.337 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:56:40.337 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 01:56:40.337 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:56:40.337 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:56:40.337 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:56:40.337 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 01:56:40.337 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 01:56:40.337 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 01:56:40.337 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 01:56:40.337 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:56:40.337 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:56:40.337 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:56:40.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 01:56:40.337 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:56:40.337 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:56:40.337 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:56:40.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:56:40.337 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:56:40.337 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:56:40.337 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:56:40.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:56:40.338 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:56:40.338 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:56:40.338 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:56:40.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:56:40.338 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:56:40.338 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:56:40.338 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:56:40.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:56:40.338 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:56:40.338 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:56:40.338 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:56:40.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:56:40.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:56:40.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:56:40.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:56:40.342 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 01:56:40.826 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 01:56:40.861 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:56:40.862 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:56:40.863 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:56:40.863 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 01:56:40.885 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:56:40.885 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:56:40.885 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:56:40.923 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:56:40.923 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:56:40.924 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:56:40.924 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:56:40.926 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:56:40.926 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:56:40.926 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:56:40.926 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:56:40.926 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:56:40.926 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:56:40.926 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 01:56:40.926 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=125 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:56:40.926 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=125 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:56:40.926 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=125 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:56:45.926 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:56:45.926 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:56:45.928 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:56:45.929 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:56:45.929 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:56:45.930 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:56:45.939 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:56:45.941 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:56:45.941 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:56:45.941 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:56:45.942 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 01:56:45.945 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 01:56:45.946 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 01:56:45.946 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:56:45.946 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:56:45.947 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:56:45.947 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 01:56:45.948 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:56:45.948 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 01:56:45.950 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 01:56:45.950 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 01:56:45.951 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:56:45.951 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:56:45.951 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:56:45.951 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 01:56:45.951 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:56:45.951 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 01:56:45.954 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 01:56:45.955 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 01:56:45.955 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:56:45.955 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:56:45.955 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:56:45.955 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 01:56:45.955 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:56:45.955 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 01:56:45.959 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 01:56:45.959 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 01:56:45.959 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 01:56:45.959 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 01:56:45.959 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 01:56:45.960 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 01:56:45.960 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 01:56:45.960 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 01:56:45.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 01:56:45.960 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:56:45.960 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:56:45.960 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:56:45.960 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 01:56:45.960 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:56:45.960 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:56:45.960 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:56:45.960 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 01:56:45.960 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 01:56:45.960 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 01:56:45.961 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 01:56:45.961 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:56:45.961 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:56:45.961 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:56:45.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 01:56:45.961 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:56:45.961 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:56:45.961 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:56:45.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:56:45.961 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:56:45.961 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:56:45.961 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:56:45.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:56:45.962 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:56:45.962 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:56:45.962 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:56:45.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:56:45.962 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:56:45.962 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:56:45.962 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:56:45.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:56:45.962 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:56:45.962 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:56:45.962 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:56:45.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:56:45.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:56:45.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:56:45.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:56:45.965 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 01:56:46.450 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 01:56:46.491 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:56:46.493 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:56:46.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:56:46.497 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 01:56:46.523 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:56:46.523 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:56:46.523 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:56:46.542 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:56:46.542 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:56:46.542 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:56:46.546 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:56:46.546 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:56:46.546 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:56:46.546 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:56:46.549 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:56:46.549 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:56:46.549 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:56:46.549 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:56:46.549 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:56:46.549 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:56:46.549 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 01:56:46.549 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=125 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:56:46.549 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=125 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:56:51.554 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:56:51.554 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:56:51.554 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:56:51.554 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:56:51.554 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:56:51.554 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:56:51.562 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:56:51.563 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:56:51.563 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:56:51.563 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:56:51.563 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 01:56:51.567 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 01:56:51.567 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 01:56:51.567 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:56:51.567 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:56:51.568 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:56:51.568 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 01:56:51.568 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:56:51.568 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 01:56:51.571 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 01:56:51.571 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 01:56:51.571 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:56:51.571 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:56:51.571 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:56:51.571 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 01:56:51.572 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:56:51.572 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 01:56:51.574 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 01:56:51.574 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 01:56:51.574 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:56:51.574 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:56:51.575 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:56:51.575 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 01:56:51.575 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:56:51.575 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 01:56:51.578 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 01:56:51.578 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 01:56:51.578 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 01:56:51.578 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 01:56:51.578 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 01:56:51.578 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 01:56:51.579 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 01:56:51.579 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 01:56:51.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 01:56:51.579 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:56:51.579 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:56:51.579 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:56:51.579 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 01:56:51.579 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:56:51.579 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:56:51.579 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:56:51.579 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 01:56:51.579 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 01:56:51.579 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 01:56:51.580 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 01:56:51.580 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:56:51.580 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:56:51.580 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:56:51.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 01:56:51.580 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:56:51.580 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:56:51.580 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:56:51.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:56:51.581 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:56:51.581 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:56:51.581 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:56:51.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:56:51.581 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:56:51.581 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:56:51.581 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:56:51.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:56:51.581 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:56:51.581 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:56:51.581 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:56:51.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:56:51.581 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:56:51.581 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:56:51.582 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:56:51.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:56:51.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:56:51.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:56:51.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:56:51.584 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 01:56:52.069 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 01:56:52.108 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:56:52.111 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:56:52.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:56:52.113 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 01:56:52.134 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:56:52.134 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:56:52.134 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:56:52.159 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:56:52.159 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:56:52.159 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:56:52.164 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:56:52.164 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:56:52.164 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:56:52.164 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:56:52.166 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:56:52.166 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:56:52.166 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:56:52.166 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:56:52.166 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:56:52.166 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:56:52.166 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 01:56:52.167 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=125 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:56:52.167 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=125 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:56:57.169 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:56:57.169 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:56:57.173 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:56:57.173 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:56:57.173 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:56:57.173 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:56:57.186 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:56:57.187 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:56:57.187 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:56:57.187 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:56:57.187 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 01:56:57.189 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 01:56:57.189 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 01:56:57.190 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:56:57.190 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:56:57.190 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 01:56:57.190 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:56:57.190 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:56:57.190 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 01:56:57.191 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 01:56:57.191 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 01:56:57.191 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:56:57.191 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:56:57.191 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 01:56:57.191 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:56:57.191 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:56:57.191 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 01:56:57.193 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 01:56:57.193 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 01:56:57.194 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:56:57.194 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:56:57.194 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 01:56:57.194 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:56:57.194 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:56:57.194 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 01:56:57.197 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 01:56:57.197 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 01:56:57.197 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 01:56:57.197 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 01:56:57.197 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 01:56:57.197 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 01:56:57.197 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 01:56:57.197 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 01:56:57.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 01:56:57.197 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:56:57.198 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:56:57.198 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:56:57.198 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 01:56:57.198 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:56:57.198 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:56:57.198 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:56:57.198 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 01:56:57.198 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 01:56:57.198 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 01:56:57.198 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 01:56:57.198 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:56:57.198 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:56:57.198 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:56:57.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 01:56:57.199 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:56:57.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:56:57.199 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:56:57.199 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:56:57.199 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:56:57.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:56:57.199 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:56:57.199 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:56:57.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:56:57.199 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:56:57.199 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:56:57.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:56:57.200 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:56:57.200 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:56:57.200 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:56:57.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:56:57.200 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:56:57.200 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:56:57.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:56:57.200 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:56:57.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:56:57.200 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:56:57.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:56:57.203 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 01:56:57.687 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 01:56:57.728 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:56:57.732 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:56:57.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:56:57.734 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 01:56:57.742 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:56:57.742 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:56:57.743 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:56:57.743 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:56:57.743 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:56:57.744 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:56:57.744 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:56:57.744 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:56:58.165 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 01:56:58.202 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:56:58.203 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:56:58.205 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:56:58.207 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:56:58.643 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 01:56:59.121 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 01:56:59.203 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:56:59.204 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:56:59.206 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:56:59.208 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:56:59.599 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 01:57:00.077 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 01:57:00.204 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:57:00.205 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:57:00.206 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:57:00.209 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:57:00.555 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 01:57:01.033 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 01:57:01.205 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:57:01.206 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:57:01.208 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:57:01.210 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:57:01.512 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 01:57:01.990 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 01:57:02.206 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:57:02.207 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:57:02.208 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:57:02.211 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:57:02.468 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 01:57:02.947 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 01:57:03.425 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 01:57:03.903 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 01:57:04.382 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 01:57:04.860 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 01:57:05.332 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 01:57:05.802 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 01:57:06.278 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 01:57:06.756 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 01:57:07.234 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 01:57:07.712 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 01:57:08.190 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 01:57:08.668 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 01:57:09.145 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 01:57:09.624 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 01:57:10.102 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-09 01:57:10.580 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-09 01:57:11.057 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-09 01:57:11.534 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-09 01:57:12.012 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-09 01:57:12.491 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-09 01:57:12.969 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-09 01:57:13.447 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-09 01:57:13.925 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-09 01:57:14.403 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-09 01:57:14.882 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-09 01:57:15.360 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-09 01:57:15.838 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-09 01:57:16.316 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-09 01:57:16.794 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-09 01:57:17.272 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-09 01:57:17.750 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-09 01:57:18.229 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-01-09 01:57:18.707 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-01-09 01:57:19.185 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-01-09 01:57:19.664 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-01-09 01:57:20.142 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-01-09 01:57:20.620 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-01-09 01:57:21.098 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-01-09 01:57:21.576 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-01-09 01:57:22.054 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-01-09 01:57:22.532 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-01-09 01:57:23.010 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-01-09 01:57:23.488 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-01-09 01:57:23.966 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-01-09 01:57:24.444 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-01-09 01:57:24.922 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-01-09 01:57:25.401 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-01-09 01:57:25.879 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-01-09 01:57:26.357 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-01-09 01:57:26.835 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-01-09 01:57:27.314 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-01-09 01:57:27.792 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-01-09 01:57:28.290 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-01-09 01:57:28.769 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-01-09 01:57:29.247 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-01-09 01:57:29.725 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-01-09 01:57:30.203 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-01-09 01:57:30.681 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-01-09 01:57:31.159 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-01-09 01:57:31.219 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:57:31.219 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:57:31.223 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:57:31.223 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:57:31.223 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:57:31.223 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:57:31.224 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:57:31.224 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:57:31.224 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:57:31.224 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:57:31.224 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:57:31.224 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 01:57:31.224 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:57:31.224 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=7257 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:57:31.224 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=7257 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:57:31.224 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=7257 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:57:31.224 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=7258 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:57:31.224 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=7258 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:57:31.224 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=7258 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:57:31.224 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=7258 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:57:31.224 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=7258 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:57:31.224 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=7258 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:57:31.224 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=7258 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:57:31.224 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=7258 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:57:36.228 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:57:36.228 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:57:36.230 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:57:36.230 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:57:36.230 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:57:36.231 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:57:36.234 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:57:36.235 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:57:36.235 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:57:36.235 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:57:36.235 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 01:57:36.236 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 01:57:36.236 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 01:57:36.236 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:57:36.236 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:57:36.236 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:57:36.236 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 01:57:36.236 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:57:36.236 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 01:57:36.237 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 01:57:36.237 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 01:57:36.238 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:57:36.238 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:57:36.238 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:57:36.238 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 01:57:36.238 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:57:36.238 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 01:57:36.239 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 01:57:36.239 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 01:57:36.239 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:57:36.239 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:57:36.239 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:57:36.239 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 01:57:36.239 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:57:36.239 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 01:57:36.241 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 01:57:36.241 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 01:57:36.241 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 01:57:36.241 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 01:57:36.241 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 01:57:36.241 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 01:57:36.241 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 01:57:36.242 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 01:57:36.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 01:57:36.242 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:57:36.242 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:57:36.242 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:57:36.242 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 01:57:36.242 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:57:36.242 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:57:36.242 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:57:36.242 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 01:57:36.242 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 01:57:36.242 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 01:57:36.242 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 01:57:36.242 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:57:36.242 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:57:36.242 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:57:36.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 01:57:36.242 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:57:36.242 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:57:36.242 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:57:36.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:57:36.242 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:57:36.242 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:57:36.242 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:57:36.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:57:36.242 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:57:36.242 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:57:36.242 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:57:36.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:57:36.243 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:57:36.243 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:57:36.243 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:57:36.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:57:36.243 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:57:36.243 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:57:36.243 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:57:36.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:57:36.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:57:36.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:57:36.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:57:36.247 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 01:57:36.730 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 01:57:36.768 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:57:36.771 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:57:36.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:57:36.773 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 01:57:37.209 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 01:57:37.244 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:57:37.244 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:57:37.245 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:57:37.245 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:57:37.691 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 01:57:38.170 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 01:57:38.245 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:57:38.245 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:57:38.245 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:57:38.246 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:57:38.648 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 01:57:39.127 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 01:57:39.246 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:57:39.247 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:57:39.247 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:57:39.247 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:57:39.606 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 01:57:39.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:57:39.796 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:57:39.796 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:57:39.796 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:57:39.796 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:57:39.797 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:57:39.797 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:57:39.797 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:57:39.797 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:57:39.797 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:57:39.797 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:57:39.797 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 01:57:39.798 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=756 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:57:39.798 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=756 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:57:44.800 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:57:44.800 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:57:44.802 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:57:44.804 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:57:44.804 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:57:44.804 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:57:44.807 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:57:44.808 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:57:44.808 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:57:44.808 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:57:44.808 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 01:57:44.809 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 01:57:44.809 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 01:57:44.809 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:57:44.809 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:57:44.809 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:57:44.809 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 01:57:44.810 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:57:44.810 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 01:57:44.810 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 01:57:44.810 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 01:57:44.810 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:57:44.811 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:57:44.811 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:57:44.811 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 01:57:44.811 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:57:44.811 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 01:57:44.812 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 01:57:44.812 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 01:57:44.812 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:57:44.812 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:57:44.812 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:57:44.812 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 01:57:44.812 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:57:44.812 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 01:57:44.814 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 01:57:44.814 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 01:57:44.814 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 01:57:44.814 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 01:57:44.814 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 01:57:44.814 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 01:57:44.814 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 01:57:44.814 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 01:57:44.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 01:57:44.814 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:57:44.814 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:57:44.814 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:57:44.814 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 01:57:44.815 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:57:44.815 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:57:44.815 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:57:44.815 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 01:57:44.815 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 01:57:44.815 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 01:57:44.815 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 01:57:44.815 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:57:44.815 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:57:44.815 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:57:44.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 01:57:44.815 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:57:44.815 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:57:44.815 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:57:44.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:57:44.815 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:57:44.815 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:57:44.815 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:57:44.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:57:44.815 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:57:44.815 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:57:44.815 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:57:44.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:57:44.815 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:57:44.815 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:57:44.815 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:57:44.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:57:44.815 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:57:44.816 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:57:44.816 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:57:44.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:57:44.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:57:44.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:57:44.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:57:44.819 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 01:57:45.302 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 01:57:45.327 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:57:45.328 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:57:45.328 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 01:57:45.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:57:45.780 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 01:57:45.817 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:57:45.818 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:57:45.818 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:57:45.820 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:57:46.259 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 01:57:46.738 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 01:57:46.818 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:57:46.819 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:57:46.819 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:57:46.821 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:57:47.219 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 01:57:47.698 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 01:57:47.819 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:57:47.820 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:57:47.820 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:57:47.823 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:57:48.177 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 01:57:48.658 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 01:57:48.821 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:57:48.821 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:57:48.821 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:57:48.824 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:57:49.138 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 01:57:49.618 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 01:57:49.822 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:57:49.822 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:57:49.822 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:57:49.826 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:57:50.096 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 01:57:50.575 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 01:57:51.055 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 01:57:51.339 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:57:51.339 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:57:51.339 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:57:51.339 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:57:51.340 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:57:51.340 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:57:51.340 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:57:51.341 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:57:51.341 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:57:51.341 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:57:51.341 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 01:57:56.363 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:57:56.363 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:57:56.365 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:57:56.367 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:57:56.367 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:57:56.367 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:57:56.370 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:57:56.371 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:57:56.371 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:57:56.371 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:57:56.371 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 01:57:56.372 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 01:57:56.372 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 01:57:56.372 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:57:56.372 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:57:56.372 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:57:56.372 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 01:57:56.372 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:57:56.372 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 01:57:56.373 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 01:57:56.374 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 01:57:56.374 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:57:56.374 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:57:56.374 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:57:56.374 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 01:57:56.374 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:57:56.374 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 01:57:56.375 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 01:57:56.375 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 01:57:56.375 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:57:56.375 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:57:56.375 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:57:56.375 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 01:57:56.375 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:57:56.375 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 01:57:56.377 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 01:57:56.377 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 01:57:56.377 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 01:57:56.377 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 01:57:56.377 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 01:57:56.377 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 01:57:56.377 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 01:57:56.378 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 01:57:56.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 01:57:56.378 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:57:56.378 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:57:56.378 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:57:56.378 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 01:57:56.378 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:57:56.378 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:57:56.378 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:57:56.378 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 01:57:56.378 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 01:57:56.378 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 01:57:56.378 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 01:57:56.378 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:57:56.378 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:57:56.378 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:57:56.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 01:57:56.378 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:57:56.378 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:57:56.378 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:57:56.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:57:56.378 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:57:56.378 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:57:56.378 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:57:56.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:57:56.378 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:57:56.378 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:57:56.378 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:57:56.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:57:56.379 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:57:56.379 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:57:56.379 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:57:56.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:57:56.379 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:57:56.379 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:57:56.379 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:57:56.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:57:56.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:57:56.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:57:56.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:57:56.383 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 01:57:56.866 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 01:57:56.897 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:57:56.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:57:56.899 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:57:56.900 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 01:57:57.339 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 01:57:57.380 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:57:57.381 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:57:57.381 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:57:57.383 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:57:57.818 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 01:57:58.299 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 01:57:58.381 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:57:58.382 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:57:58.382 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:57:58.385 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:57:58.781 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 01:57:59.261 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 01:57:59.382 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:57:59.383 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:57:59.383 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:57:59.386 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:57:59.738 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 01:58:00.219 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 01:58:00.384 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:58:00.384 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:58:00.385 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:58:00.388 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:58:00.700 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 01:58:01.179 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 01:58:01.385 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:58:01.386 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:58:01.386 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:58:01.389 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:58:01.660 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 01:58:02.139 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 01:58:02.614 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 01:58:02.911 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:58:02.911 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:58:02.912 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:58:02.912 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:58:02.913 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:58:02.913 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:58:02.913 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:58:02.913 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:58:02.913 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:58:02.913 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:58:02.913 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 01:58:02.914 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1392 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:58:02.914 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1392 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:58:07.916 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:58:07.916 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:58:07.919 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:58:07.919 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:58:07.919 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:58:07.919 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:58:07.932 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:58:07.933 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:58:07.933 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:58:07.933 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:58:07.933 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 01:58:07.935 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 01:58:07.935 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 01:58:07.935 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:58:07.935 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:58:07.936 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:58:07.936 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 01:58:07.936 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:58:07.936 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 01:58:07.937 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 01:58:07.937 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 01:58:07.938 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:58:07.938 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:58:07.938 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:58:07.938 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 01:58:07.938 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:58:07.938 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 01:58:07.939 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 01:58:07.940 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 01:58:07.940 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:58:07.940 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:58:07.940 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 01:58:07.940 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:58:07.940 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:58:07.940 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 01:58:07.943 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 01:58:07.943 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 01:58:07.943 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 01:58:07.943 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 01:58:07.943 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 01:58:07.943 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 01:58:07.943 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 01:58:07.943 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 01:58:07.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 01:58:07.943 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:58:07.943 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:58:07.943 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:58:07.943 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 01:58:07.943 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:58:07.943 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:58:07.943 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:58:07.943 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 01:58:07.943 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 01:58:07.943 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 01:58:07.943 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 01:58:07.944 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:58:07.944 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:58:07.944 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:58:07.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 01:58:07.944 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:58:07.944 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:58:07.944 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:58:07.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:58:07.944 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:58:07.944 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:58:07.944 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:58:07.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:58:07.944 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:58:07.944 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:58:07.944 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:58:07.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:58:07.944 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:58:07.944 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:58:07.944 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:58:07.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:58:07.944 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:58:07.944 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:58:07.944 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:58:07.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:58:07.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:58:07.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:58:07.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:58:07.948 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 01:58:08.430 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 01:58:08.466 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:58:08.467 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:58:08.469 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 01:58:08.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:58:08.899 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 01:58:08.946 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:58:08.947 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:58:08.947 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:58:08.947 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:58:09.368 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 01:58:09.842 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 01:58:09.948 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:58:09.948 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:58:09.948 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:58:09.948 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:58:10.322 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 01:58:10.802 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 01:58:10.949 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:58:10.950 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:58:10.950 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:58:10.950 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:58:11.274 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 01:58:11.743 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 01:58:11.951 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:58:11.951 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:58:11.951 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:58:11.951 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:58:12.211 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 01:58:12.680 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 01:58:12.952 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:58:12.952 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:58:12.952 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:58:12.952 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:58:13.149 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 01:58:13.618 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 01:58:14.089 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 01:58:14.487 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:58:14.487 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:58:14.487 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:58:14.487 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:58:14.492 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:58:14.492 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:58:14.492 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:58:14.492 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:58:14.493 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:58:14.493 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:58:14.493 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 01:58:14.493 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1415 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:58:14.493 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1415 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:58:14.493 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1415 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:58:14.493 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1415 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:58:19.491 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:58:19.491 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:58:19.493 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:58:19.495 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:58:19.495 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:58:19.495 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:58:19.502 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:58:19.502 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:58:19.502 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:58:19.502 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:58:19.503 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 01:58:19.504 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 01:58:19.504 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 01:58:19.504 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:58:19.504 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:58:19.505 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:58:19.505 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 01:58:19.505 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:58:19.505 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 01:58:19.506 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 01:58:19.506 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 01:58:19.506 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:58:19.506 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:58:19.506 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:58:19.506 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 01:58:19.507 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:58:19.507 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 01:58:19.508 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 01:58:19.508 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 01:58:19.508 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:58:19.508 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:58:19.508 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:58:19.508 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 01:58:19.508 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:58:19.508 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 01:58:19.510 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 01:58:19.510 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 01:58:19.510 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 01:58:19.510 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 01:58:19.510 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 01:58:19.510 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 01:58:19.510 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 01:58:19.510 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 01:58:19.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 01:58:19.510 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:58:19.510 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:58:19.510 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:58:19.510 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 01:58:19.510 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:58:19.510 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:58:19.510 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:58:19.510 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 01:58:19.510 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 01:58:19.510 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 01:58:19.511 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 01:58:19.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:58:19.511 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:58:19.511 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:58:19.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 01:58:19.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:58:19.511 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:58:19.511 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:58:19.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:58:19.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:58:19.511 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:58:19.511 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:58:19.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:58:19.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:58:19.511 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:58:19.511 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:58:19.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:58:19.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:58:19.511 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:58:19.511 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:58:19.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:58:19.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:58:19.511 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:58:19.511 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:58:19.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:58:19.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:58:19.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:58:19.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:58:19.515 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 01:58:19.999 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 01:58:20.032 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:58:20.035 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:58:20.036 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:58:20.038 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 01:58:20.469 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 01:58:20.513 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:58:20.513 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:58:20.513 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:58:20.517 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:58:20.937 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 01:58:21.411 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 01:58:21.514 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:58:21.514 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:58:21.514 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:58:21.518 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:58:21.890 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 01:58:22.368 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 01:58:22.515 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:58:22.516 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:58:22.516 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:58:22.520 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:58:22.847 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 01:58:23.326 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 01:58:23.516 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:58:23.516 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:58:23.517 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:58:23.521 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:58:23.796 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 01:58:24.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:58:24.264 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 01:58:24.518 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:58:24.518 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:58:24.518 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:58:24.522 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:58:24.740 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 01:58:25.219 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 01:58:25.697 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 01:58:26.176 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 01:58:26.657 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 01:58:27.137 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 01:58:27.610 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 01:58:28.081 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:58:28.081 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:58:28.082 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:58:28.082 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:58:28.083 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:58:28.083 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:58:28.083 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:58:28.083 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:58:28.083 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:58:28.083 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:58:28.083 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 01:58:28.083 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1838 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:58:28.083 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1838 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:58:28.083 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1838 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:58:28.083 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1838 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:58:28.083 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1838 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:58:28.083 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1838 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:58:28.083 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1838 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:58:33.086 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:58:33.086 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:58:33.090 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:58:33.090 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:58:33.090 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:58:33.090 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:58:33.098 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:58:33.099 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:58:33.100 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:58:33.100 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:58:33.100 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 01:58:33.104 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 01:58:33.104 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 01:58:33.104 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:58:33.104 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:58:33.105 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:58:33.105 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 01:58:33.105 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:58:33.105 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 01:58:33.108 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 01:58:33.108 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 01:58:33.108 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:58:33.108 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:58:33.108 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:58:33.108 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 01:58:33.108 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:58:33.108 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 01:58:33.111 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 01:58:33.111 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 01:58:33.111 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:58:33.111 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:58:33.111 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:58:33.111 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 01:58:33.111 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:58:33.111 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 01:58:33.113 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 01:58:33.113 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 01:58:33.113 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 01:58:33.113 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 01:58:33.113 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 01:58:33.113 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 01:58:33.114 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 01:58:33.114 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 01:58:33.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 01:58:33.114 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:58:33.114 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:58:33.114 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:58:33.114 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 01:58:33.114 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:58:33.114 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:58:33.114 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:58:33.114 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 01:58:33.114 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 01:58:33.114 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 01:58:33.114 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 01:58:33.114 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:58:33.114 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:58:33.114 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:58:33.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 01:58:33.115 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:58:33.115 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:58:33.115 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:58:33.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:58:33.115 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:58:33.115 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:58:33.115 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:58:33.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:58:33.115 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:58:33.115 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:58:33.115 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:58:33.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:58:33.115 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:58:33.115 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:58:33.115 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:58:33.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:58:33.115 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:58:33.115 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:58:33.115 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:58:33.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:58:33.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:58:33.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:58:33.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:58:33.119 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 01:58:33.603 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 01:58:33.644 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:58:33.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:58:33.647 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:58:33.649 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 01:58:34.080 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 01:58:34.117 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:58:34.117 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:58:34.118 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:58:34.121 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:58:34.558 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 01:58:35.039 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 01:58:35.118 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:58:35.119 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:58:35.119 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:58:35.122 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:58:35.519 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 01:58:36.000 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 01:58:36.120 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:58:36.120 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:58:36.120 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:58:36.124 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:58:36.479 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 01:58:36.958 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 01:58:37.121 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:58:37.121 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:58:37.121 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:58:37.125 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:58:37.437 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 01:58:37.664 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:58:37.664 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:58:37.664 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:58:37.664 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:58:37.666 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:58:37.666 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:58:37.666 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:58:37.666 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:58:37.666 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:58:37.666 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 01:58:37.666 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:58:37.666 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=969 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:58:37.666 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=969 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:58:37.666 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=969 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:58:37.666 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=969 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:58:37.666 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=969 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:58:37.666 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=969 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:58:37.666 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=969 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:58:42.668 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:58:42.668 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:58:42.670 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:58:42.671 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:58:42.671 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:58:42.672 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:58:42.681 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:58:42.682 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:58:42.682 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:58:42.682 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:58:42.682 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 01:58:42.685 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 01:58:42.685 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 01:58:42.685 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:58:42.685 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:58:42.686 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:58:42.686 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 01:58:42.686 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:58:42.686 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 01:58:42.687 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 01:58:42.687 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 01:58:42.687 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:58:42.687 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:58:42.687 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:58:42.688 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 01:58:42.688 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:58:42.688 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 01:58:42.689 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 01:58:42.689 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 01:58:42.689 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:58:42.689 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:58:42.689 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:58:42.689 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 01:58:42.690 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:58:42.690 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 01:58:42.692 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 01:58:42.692 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 01:58:42.692 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 01:58:42.692 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 01:58:42.692 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 01:58:42.692 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 01:58:42.692 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 01:58:42.692 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 01:58:42.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 01:58:42.692 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:58:42.692 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:58:42.692 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:58:42.692 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 01:58:42.692 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:58:42.692 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:58:42.692 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:58:42.692 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 01:58:42.692 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 01:58:42.692 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 01:58:42.692 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 01:58:42.692 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:58:42.692 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:58:42.693 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:58:42.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 01:58:42.693 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:58:42.693 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:58:42.693 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:58:42.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:58:42.693 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:58:42.693 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:58:42.693 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:58:42.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:58:42.693 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:58:42.693 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:58:42.693 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:58:42.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:58:42.693 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:58:42.693 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:58:42.693 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:58:42.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:58:42.693 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:58:42.693 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:58:42.693 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:58:42.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:58:42.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:58:42.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:58:42.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:58:42.697 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 01:58:43.180 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 01:58:43.218 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:58:43.220 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:58:43.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:58:43.222 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 01:58:43.239 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:58:43.239 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:58:43.239 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:58:43.239 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:58:43.241 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:58:43.241 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:58:43.241 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:58:43.241 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:58:43.241 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:58:43.241 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:58:43.241 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 01:58:43.241 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=117 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:58:43.241 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=117 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:58:48.241 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:58:48.241 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:58:48.243 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:58:48.243 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:58:48.244 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:58:48.244 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:58:48.252 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:58:48.253 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:58:48.254 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:58:48.254 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:58:48.254 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 01:58:48.257 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 01:58:48.257 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 01:58:48.257 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:58:48.257 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:58:48.257 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:58:48.258 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 01:58:48.258 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:58:48.258 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 01:58:48.260 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 01:58:48.260 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 01:58:48.260 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:58:48.260 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:58:48.260 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:58:48.260 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 01:58:48.260 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:58:48.260 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 01:58:48.263 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 01:58:48.263 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 01:58:48.263 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:58:48.263 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:58:48.263 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:58:48.263 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 01:58:48.263 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:58:48.263 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 01:58:48.265 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 01:58:48.265 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 01:58:48.265 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 01:58:48.265 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 01:58:48.265 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 01:58:48.266 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 01:58:48.266 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 01:58:48.266 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 01:58:48.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 01:58:48.266 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:58:48.266 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:58:48.266 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:58:48.266 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 01:58:48.266 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:58:48.266 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:58:48.266 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:58:48.266 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 01:58:48.266 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 01:58:48.266 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 01:58:48.266 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 01:58:48.266 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:58:48.266 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:58:48.267 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:58:48.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 01:58:48.267 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:58:48.267 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:58:48.267 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:58:48.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:58:48.267 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:58:48.267 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:58:48.267 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:58:48.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:58:48.267 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:58:48.267 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:58:48.267 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:58:48.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:58:48.267 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:58:48.267 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:58:48.267 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:58:48.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:58:48.267 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:58:48.267 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:58:48.267 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:58:48.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:58:48.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:58:48.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:58:48.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:58:48.271 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 01:58:48.755 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 01:58:48.789 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:58:48.790 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:58:48.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:58:48.792 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 01:58:48.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:58:48.805 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:58:48.806 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:58:48.806 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:58:48.806 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:58:48.813 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:58:48.813 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:58:48.813 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:58:48.813 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:58:48.813 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:58:48.813 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:58:48.813 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 01:58:48.813 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=114 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:58:53.812 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:58:53.812 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:58:53.813 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:58:53.814 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:58:53.815 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:58:53.815 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:58:53.818 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:58:53.819 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:58:53.819 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:58:53.819 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:58:53.819 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 01:58:53.820 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 01:58:53.820 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 01:58:53.820 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:58:53.820 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:58:53.820 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:58:53.820 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 01:58:53.820 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:58:53.820 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 01:58:53.821 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 01:58:53.821 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 01:58:53.821 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:58:53.821 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:58:53.821 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:58:53.822 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 01:58:53.822 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:58:53.822 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 01:58:53.823 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 01:58:53.823 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 01:58:53.823 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:58:53.823 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:58:53.823 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 01:58:53.823 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:58:53.823 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:58:53.823 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 01:58:53.825 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 01:58:53.825 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 01:58:53.825 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 01:58:53.825 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 01:58:53.825 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 01:58:53.825 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 01:58:53.825 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 01:58:53.825 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 01:58:53.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 01:58:53.825 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:58:53.825 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:58:53.825 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:58:53.825 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 01:58:53.826 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:58:53.826 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:58:53.826 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:58:53.826 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 01:58:53.826 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 01:58:53.826 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 01:58:53.826 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 01:58:53.826 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:58:53.826 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:58:53.826 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:58:53.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 01:58:53.826 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:58:53.826 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:58:53.826 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:58:53.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:58:53.826 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:58:53.826 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:58:53.826 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:58:53.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:58:53.826 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:58:53.826 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:58:53.826 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:58:53.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:58:53.826 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:58:53.826 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:58:53.826 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:58:53.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:58:53.826 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:58:53.827 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:58:53.827 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:58:53.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:58:53.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:58:53.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:58:53.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:58:53.830 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 01:58:54.315 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 01:58:54.349 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:58:54.351 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:58:54.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:58:54.354 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 01:58:54.369 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:58:54.370 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:58:54.370 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:58:54.370 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:58:54.380 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:58:54.380 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:58:54.380 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:58:54.380 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:58:54.381 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:58:54.381 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:58:54.381 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 01:58:54.381 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=115 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:58:54.381 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=115 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:58:54.382 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=115 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:58:54.382 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=115 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:58:54.382 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=116 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:58:54.382 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=116 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:58:54.382 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=116 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:58:54.382 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=116 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:58:54.382 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=116 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:58:54.382 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=116 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:58:54.382 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=116 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:58:54.382 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=116 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:58:54.382 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=117 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:58:54.382 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=117 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:58:54.382 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=117 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:58:54.382 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=117 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:58:54.382 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=117 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:58:54.382 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=117 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:58:54.382 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=117 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:58:54.383 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=117 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:58:54.383 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=118 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:58:54.383 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=118 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:58:54.383 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=118 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:58:54.383 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=118 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:58:54.383 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=118 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:58:54.383 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=118 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:58:54.383 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=118 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:58:54.383 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=118 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:58:59.376 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:58:59.376 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:58:59.377 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:58:59.377 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:58:59.378 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:58:59.379 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:58:59.383 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:58:59.383 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:58:59.383 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:58:59.383 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:58:59.383 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 01:58:59.386 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 01:58:59.386 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 01:58:59.386 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:58:59.386 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:58:59.386 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:58:59.386 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 01:58:59.386 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:58:59.386 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 01:58:59.388 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 01:58:59.388 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 01:58:59.388 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:58:59.388 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:58:59.388 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:58:59.388 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 01:58:59.388 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:58:59.388 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 01:58:59.389 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 01:58:59.390 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 01:58:59.390 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:58:59.390 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:58:59.390 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:58:59.390 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 01:58:59.390 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:58:59.390 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 01:58:59.392 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 01:58:59.392 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 01:58:59.392 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 01:58:59.392 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 01:58:59.392 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 01:58:59.392 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 01:58:59.392 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 01:58:59.392 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 01:58:59.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 01:58:59.392 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:58:59.392 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:58:59.392 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:58:59.392 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 01:58:59.392 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:58:59.392 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:58:59.392 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:58:59.392 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 01:58:59.392 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 01:58:59.393 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 01:58:59.393 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 01:58:59.393 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:58:59.393 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:58:59.393 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:58:59.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 01:58:59.393 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:58:59.393 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:58:59.393 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:58:59.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:58:59.393 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:58:59.393 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:58:59.393 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:58:59.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:58:59.393 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:58:59.393 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:58:59.393 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:58:59.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:58:59.393 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:58:59.393 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:58:59.393 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:58:59.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:58:59.393 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:58:59.393 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:58:59.393 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:58:59.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:58:59.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:58:59.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:58:59.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:58:59.397 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 01:58:59.881 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 01:58:59.914 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:58:59.915 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:58:59.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:58:59.918 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 01:58:59.927 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:58:59.928 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:58:59.928 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:58:59.928 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:58:59.929 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:58:59.929 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:58:59.929 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:58:59.930 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:59:00.359 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 01:59:00.395 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:59:00.395 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:59:00.395 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:59:00.396 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:59:00.836 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 01:59:01.305 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 01:59:01.395 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:59:01.396 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:59:01.396 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:59:01.396 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:59:01.775 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 01:59:02.250 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 01:59:02.396 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:59:02.397 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:59:02.397 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:59:02.397 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:59:02.729 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 01:59:02.990 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:59:02.990 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:59:02.991 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:59:02.991 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:59:03.041 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:59:03.041 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:59:03.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:59:03.053 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:59:03.053 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:59:03.053 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:59:03.054 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:59:03.055 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:59:03.055 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:59:03.055 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:59:03.055 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:59:03.055 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:59:03.055 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:59:03.055 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 01:59:08.054 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:59:08.055 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:59:08.056 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:59:08.057 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:59:08.057 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:59:08.058 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:59:08.067 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:59:08.068 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:59:08.068 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:59:08.069 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:59:08.069 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 01:59:08.073 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 01:59:08.074 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 01:59:08.074 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:59:08.074 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:59:08.075 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:59:08.075 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 01:59:08.076 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:59:08.076 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 01:59:08.078 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 01:59:08.079 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 01:59:08.079 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:59:08.079 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:59:08.080 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:59:08.080 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 01:59:08.080 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:59:08.080 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 01:59:08.082 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 01:59:08.083 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 01:59:08.083 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:59:08.083 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:59:08.083 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:59:08.083 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 01:59:08.083 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:59:08.083 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 01:59:08.087 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 01:59:08.087 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 01:59:08.087 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 01:59:08.087 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 01:59:08.087 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 01:59:08.087 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 01:59:08.087 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 01:59:08.088 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 01:59:08.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 01:59:08.088 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:59:08.088 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:59:08.088 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:59:08.088 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 01:59:08.088 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:59:08.088 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:59:08.088 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:59:08.088 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 01:59:08.088 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 01:59:08.088 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 01:59:08.088 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 01:59:08.088 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:59:08.088 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:59:08.088 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:59:08.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 01:59:08.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:59:08.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:59:08.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:59:08.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:59:08.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:59:08.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:59:08.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:59:08.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:59:08.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:59:08.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:59:08.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:59:08.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:59:08.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:59:08.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:59:08.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:59:08.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:59:08.090 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:59:08.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:59:08.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:59:08.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:59:08.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:59:08.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:59:08.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:59:08.093 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 01:59:08.574 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 01:59:08.616 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:59:08.619 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:59:08.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:59:08.619 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 01:59:08.627 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:59:08.627 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:59:08.627 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:59:08.628 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:59:08.628 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:59:08.628 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:59:08.628 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:59:08.628 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:59:09.052 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 01:59:09.091 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:59:09.091 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:59:09.093 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:59:09.096 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:59:09.530 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 01:59:10.008 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 01:59:10.092 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:59:10.092 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:59:10.095 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:59:10.097 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:59:10.486 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 01:59:10.965 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 01:59:11.093 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:59:11.093 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:59:11.095 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:59:11.098 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:59:11.443 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 01:59:11.685 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:59:11.685 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:59:11.686 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:59:11.686 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:59:11.921 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 01:59:12.095 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:59:12.095 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:59:12.096 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:59:12.099 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:59:12.398 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 01:59:12.411 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:59:12.411 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:59:12.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:59:12.419 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:59:12.420 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:59:12.420 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:59:12.420 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:59:12.424 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:59:12.424 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:59:12.424 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:59:12.424 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:59:12.424 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 01:59:12.424 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:59:12.424 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:59:12.424 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=924 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:59:12.424 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=924 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:59:12.424 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=924 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:59:12.424 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=924 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:59:12.424 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=924 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:59:12.424 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=924 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:59:12.424 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=924 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:59:12.424 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=925 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:59:12.424 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=925 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:59:12.424 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=925 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:59:12.424 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=925 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:59:12.424 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=925 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:59:12.424 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=925 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:59:12.424 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=925 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:59:12.424 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=925 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:59:17.425 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:59:17.425 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:59:17.426 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:59:17.427 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:59:17.427 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:59:17.428 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:59:17.442 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:59:17.444 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:59:17.444 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:59:17.445 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:59:17.445 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 01:59:17.448 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 01:59:17.449 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 01:59:17.449 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:59:17.449 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:59:17.449 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:59:17.450 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 01:59:17.450 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:59:17.450 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 01:59:17.452 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 01:59:17.452 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 01:59:17.452 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:59:17.452 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:59:17.452 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:59:17.453 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 01:59:17.453 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:59:17.453 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 01:59:17.455 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 01:59:17.455 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 01:59:17.455 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:59:17.455 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:59:17.455 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:59:17.455 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 01:59:17.455 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:59:17.455 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 01:59:17.458 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 01:59:17.458 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 01:59:17.458 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 01:59:17.458 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 01:59:17.458 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 01:59:17.458 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 01:59:17.458 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 01:59:17.458 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 01:59:17.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 01:59:17.458 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:59:17.458 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:59:17.458 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:59:17.459 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 01:59:17.459 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:59:17.459 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:59:17.459 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:59:17.459 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 01:59:17.459 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 01:59:17.459 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 01:59:17.459 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 01:59:17.459 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:59:17.459 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:59:17.459 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:59:17.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 01:59:17.459 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:59:17.459 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:59:17.459 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:59:17.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:59:17.459 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:59:17.459 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:59:17.459 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:59:17.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:59:17.459 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:59:17.459 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:59:17.459 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:59:17.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:59:17.460 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:59:17.460 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:59:17.460 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:59:17.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:59:17.460 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:59:17.460 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:59:17.460 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:59:17.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:59:17.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:59:17.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:59:17.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:59:17.464 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 01:59:17.948 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 01:59:17.984 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:59:17.987 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:59:17.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:59:17.989 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 01:59:17.995 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:59:17.995 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:59:17.995 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:59:17.996 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:59:17.996 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:59:17.996 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:59:17.996 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:59:17.996 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:59:18.425 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 01:59:18.461 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:59:18.462 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:59:18.462 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:59:18.464 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:59:18.903 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 01:59:19.381 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 01:59:19.462 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:59:19.463 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:59:19.463 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:59:19.464 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:59:19.859 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 01:59:20.337 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 01:59:20.463 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:59:20.464 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:59:20.464 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:59:20.466 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:59:20.814 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 01:59:21.057 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:59:21.057 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:59:21.057 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:59:21.057 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:59:21.292 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 01:59:21.464 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:59:21.465 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:59:21.465 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:59:21.467 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:59:21.771 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 01:59:22.249 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 01:59:22.466 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:59:22.466 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:59:22.466 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:59:22.467 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:59:22.727 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 01:59:23.204 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 01:59:23.682 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 01:59:24.160 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 01:59:24.638 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 01:59:25.116 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 01:59:25.595 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 01:59:26.060 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:59:26.060 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:59:26.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:59:26.073 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 01:59:26.080 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:59:26.080 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:59:26.080 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:59:26.080 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:59:26.083 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:59:26.083 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:59:26.083 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:59:26.083 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:59:26.083 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 01:59:26.083 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:59:26.083 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:59:26.083 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1840 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:59:26.083 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1840 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:59:26.083 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1840 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:59:26.083 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1840 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:59:26.083 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1840 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:59:26.083 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1840 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:59:26.083 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1840 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:59:31.084 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:59:31.084 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:59:31.086 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:59:31.088 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:59:31.088 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:59:31.089 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:59:31.097 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:59:31.098 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:59:31.098 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:59:31.098 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:59:31.098 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 01:59:31.100 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 01:59:31.100 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 01:59:31.100 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:59:31.100 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:59:31.101 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:59:31.101 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 01:59:31.101 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:59:31.101 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 01:59:31.102 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 01:59:31.102 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 01:59:31.103 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:59:31.103 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:59:31.103 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:59:31.103 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 01:59:31.103 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:59:31.103 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 01:59:31.104 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 01:59:31.104 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 01:59:31.104 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:59:31.104 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:59:31.105 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:59:31.105 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 01:59:31.105 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:59:31.105 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 01:59:31.107 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 01:59:31.107 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 01:59:31.107 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 01:59:31.107 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 01:59:31.107 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 01:59:31.107 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 01:59:31.107 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 01:59:31.107 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 01:59:31.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 01:59:31.107 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:59:31.107 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:59:31.107 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:59:31.107 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 01:59:31.107 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:59:31.107 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:59:31.107 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:59:31.107 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 01:59:31.107 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 01:59:31.107 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 01:59:31.107 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 01:59:31.107 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:59:31.107 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:59:31.107 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:59:31.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 01:59:31.108 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:59:31.108 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:59:31.108 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:59:31.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:59:31.108 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:59:31.108 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:59:31.108 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:59:31.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:59:31.108 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:59:31.108 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:59:31.108 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:59:31.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:59:31.108 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:59:31.108 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:59:31.108 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:59:31.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:59:31.108 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:59:31.108 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:59:31.108 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:59:31.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:59:31.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:59:31.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:59:31.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:59:31.112 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 01:59:31.597 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 01:59:31.634 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:59:31.637 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:59:31.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:59:31.639 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 01:59:31.647 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:59:31.647 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:59:31.647 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:59:31.648 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:59:31.648 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:59:31.648 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:59:31.648 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:59:31.648 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:59:32.074 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 01:59:32.110 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:59:32.110 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:59:32.110 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:59:32.112 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:59:32.552 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 01:59:33.031 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 01:59:33.111 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:59:33.111 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:59:33.111 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:59:33.113 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:59:33.509 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 01:59:33.987 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 01:59:34.112 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:59:34.112 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:59:34.112 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:59:34.113 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:59:34.465 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 01:59:34.707 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:59:34.708 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:59:34.708 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:59:34.708 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:59:34.943 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 01:59:35.113 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:59:35.114 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:59:35.114 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:59:35.114 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:59:35.421 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 01:59:35.899 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 01:59:36.114 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:59:36.114 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:59:36.115 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:59:36.115 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:59:36.377 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 01:59:36.855 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 01:59:37.333 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 01:59:37.811 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 01:59:38.290 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 01:59:38.768 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 01:59:39.246 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 01:59:39.711 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:59:39.711 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:59:39.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:59:39.724 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 01:59:39.731 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:59:39.731 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:59:39.731 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:59:39.731 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:59:39.733 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:59:39.733 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:59:39.733 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:59:39.733 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:59:39.733 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:59:39.733 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 01:59:39.733 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:59:39.733 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1840 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:59:39.733 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1840 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:59:39.733 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1840 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:59:39.733 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1840 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:59:39.734 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1840 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:59:39.734 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1840 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:59:39.734 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1840 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:59:39.734 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1840 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:59:44.738 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:59:44.738 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:59:44.738 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:59:44.738 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:59:44.738 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:59:44.738 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:59:44.742 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:59:44.743 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:59:44.743 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:59:44.743 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:59:44.743 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 01:59:44.744 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 01:59:44.744 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 01:59:44.744 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:59:44.744 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:59:44.744 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:59:44.744 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 01:59:44.745 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:59:44.745 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 01:59:44.745 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 01:59:44.745 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 01:59:44.745 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:59:44.746 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:59:44.746 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:59:44.746 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 01:59:44.746 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:59:44.746 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 01:59:44.747 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 01:59:44.747 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 01:59:44.747 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:59:44.747 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:59:44.747 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:59:44.747 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 01:59:44.747 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:59:44.747 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 01:59:44.749 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 01:59:44.749 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 01:59:44.749 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 01:59:44.749 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 01:59:44.749 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 01:59:44.749 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 01:59:44.749 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 01:59:44.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 01:59:44.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 01:59:44.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:59:44.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:59:44.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:59:44.750 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 01:59:44.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:59:44.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:59:44.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:59:44.750 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 01:59:44.750 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 01:59:44.750 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 01:59:44.750 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 01:59:44.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:59:44.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:59:44.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:59:44.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 01:59:44.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:59:44.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:59:44.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:59:44.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:59:44.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:59:44.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:59:44.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:59:44.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:59:44.751 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:59:44.751 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:59:44.751 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:59:44.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:59:44.751 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:59:44.751 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:59:44.751 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:59:44.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:59:44.751 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:59:44.751 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:59:44.751 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:59:44.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:59:44.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:59:44.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:59:44.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:59:44.755 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 01:59:45.237 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 01:59:45.273 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:59:45.275 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:59:45.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:59:45.277 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 01:59:45.287 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:59:45.287 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:59:45.287 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:59:45.288 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:59:45.288 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:59:45.288 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:59:45.288 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:59:45.288 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:59:45.714 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 01:59:45.752 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:59:45.752 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:59:45.753 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:59:45.753 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:59:46.192 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 01:59:46.670 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 01:59:46.753 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:59:46.754 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:59:46.754 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:59:46.754 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:59:47.148 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 01:59:47.626 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 01:59:47.755 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:59:47.755 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:59:47.755 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:59:47.755 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:59:48.104 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 01:59:48.347 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:59:48.347 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:59:48.347 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:59:48.347 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:59:48.582 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 01:59:48.756 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:59:48.756 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:59:48.756 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:59:48.756 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:59:49.060 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 01:59:49.538 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 01:59:49.756 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:59:49.757 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:59:49.757 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:59:49.757 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:59:50.016 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 01:59:50.494 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 01:59:50.972 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 01:59:51.450 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 01:59:51.928 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 01:59:52.406 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 01:59:52.885 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 01:59:53.349 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:59:53.349 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:59:53.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:59:53.363 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 01:59:53.365 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:59:53.365 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:59:53.365 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:59:53.366 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:59:53.367 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:59:53.367 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:59:53.367 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:59:53.367 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:59:53.367 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:59:53.367 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:59:53.367 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 01:59:53.367 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1839 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:59:53.367 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1839 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:59:53.367 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1839 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:59:53.367 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1839 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 01:59:58.370 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 01:59:58.370 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 01:59:58.372 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:59:58.374 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:59:58.376 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:59:58.380 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:59:58.394 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 01:59:58.396 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:59:58.396 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:59:58.396 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 01:59:58.396 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 01:59:58.401 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 01:59:58.402 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 01:59:58.402 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:59:58.403 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:59:58.403 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 01:59:58.403 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 01:59:58.404 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 01:59:58.404 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 01:59:58.406 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 01:59:58.407 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 01:59:58.407 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:59:58.407 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:59:58.407 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 01:59:58.407 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 01:59:58.408 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 01:59:58.408 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 01:59:58.410 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 01:59:58.410 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 01:59:58.410 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:59:58.410 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 01:59:58.410 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 01:59:58.410 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 01:59:58.411 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 01:59:58.411 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 01:59:58.414 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 01:59:58.414 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 01:59:58.414 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 01:59:58.414 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 01:59:58.414 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 01:59:58.414 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 01:59:58.414 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 01:59:58.414 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 01:59:58.414 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 01:59:58.414 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:59:58.414 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:59:58.414 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:59:58.414 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 01:59:58.414 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:59:58.414 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:59:58.414 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:59:58.415 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 01:59:58.415 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 01:59:58.415 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 01:59:58.415 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 01:59:58.415 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:59:58.415 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:59:58.415 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:59:58.415 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 01:59:58.415 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:59:58.415 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:59:58.415 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:59:58.415 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:59:58.415 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:59:58.415 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:59:58.415 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:59:58.415 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:59:58.415 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:59:58.415 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:59:58.416 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:59:58.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:59:58.416 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:59:58.416 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:59:58.416 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:59:58.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:59:58.416 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 01:59:58.416 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 01:59:58.416 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 01:59:58.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:59:58.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:59:58.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:59:58.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 01:59:58.419 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 01:59:58.903 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 01:59:58.945 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 01:59:58.948 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 01:59:58.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 01:59:58.950 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 01:59:58.957 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 01:59:58.958 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 01:59:58.958 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 01:59:58.958 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:59:58.958 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:59:58.958 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:59:58.959 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 01:59:58.959 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 01:59:58.994 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 01:59:58.994 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 01:59:58.994 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:59:58.994 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 01:59:59.380 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 01:59:59.418 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 01:59:59.419 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 01:59:59.420 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 01:59:59.422 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 01:59:59.858 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:00:00.336 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:00:00.419 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:00:00.419 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:00:00.421 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:00:00.423 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:00:00.814 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:00:01.292 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:00:01.420 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:00:01.420 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:00:01.422 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:00:01.423 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:00:01.770 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:00:02.249 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:00:02.421 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:00:02.421 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:00:02.423 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:00:02.425 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:00:02.727 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:00:03.205 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 02:00:03.422 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:00:03.423 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:00:03.424 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:00:03.425 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:00:03.683 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 02:00:03.996 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:00:03.996 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:00:04.010 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:00:04.010 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:00:04.010 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:00:04.011 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:00:04.016 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:00:04.016 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:00:04.016 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:00:04.016 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:00:04.017 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:00:04.017 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:00:04.017 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:00:04.017 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1194 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:00:04.017 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1194 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:00:04.017 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1194 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:00:04.017 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1194 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:00:04.017 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1194 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:00:04.017 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1195 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:00:04.017 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1195 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:00:04.017 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1195 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:00:04.017 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1195 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:00:04.017 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1195 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:00:04.017 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1195 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:00:04.017 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1195 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:00:04.018 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1195 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:00:04.018 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1196 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:00:04.018 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1196 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:00:04.018 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1196 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:00:04.018 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1196 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:00:04.018 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1196 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:00:04.018 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1196 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:00:04.018 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1196 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:00:04.018 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1196 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:00:09.015 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:00:09.015 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:00:09.017 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:00:09.018 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:00:09.018 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:00:09.019 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:00:09.026 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:00:09.027 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:00:09.027 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:00:09.027 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:00:09.027 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:00:09.029 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:00:09.029 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:00:09.030 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:00:09.030 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:00:09.030 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:00:09.030 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:00:09.031 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:00:09.031 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:00:09.032 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:00:09.032 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:00:09.032 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:00:09.032 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:00:09.032 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:00:09.032 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:00:09.033 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:00:09.033 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:00:09.034 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:00:09.034 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:00:09.034 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:00:09.034 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:00:09.034 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:00:09.034 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:00:09.034 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:00:09.034 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:00:09.036 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:00:09.036 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:00:09.036 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:00:09.036 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:00:09.036 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:00:09.036 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:00:09.037 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:00:09.037 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:00:09.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:00:09.037 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:00:09.037 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:00:09.037 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:00:09.037 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:00:09.037 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:00:09.037 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:00:09.037 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:00:09.037 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:00:09.037 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:00:09.037 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:00:09.037 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:00:09.037 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:00:09.037 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:00:09.037 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:00:09.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:00:09.037 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:00:09.037 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:00:09.038 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:00:09.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:00:09.038 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:00:09.038 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:00:09.038 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:00:09.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:00:09.038 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:00:09.038 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:00:09.038 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:00:09.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:00:09.038 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:00:09.038 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:00:09.038 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:00:09.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:00:09.038 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:00:09.038 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:00:09.038 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:00:09.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:00:09.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:00:09.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:00:09.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:00:09.042 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:00:09.525 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:00:09.556 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:00:09.557 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:00:09.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:00:09.559 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:00:09.565 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:00:09.565 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:00:09.565 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:00:09.567 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:00:09.567 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:00:09.567 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:00:09.568 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:00:09.568 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:00:10.003 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:00:10.040 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:00:10.040 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:00:10.041 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:00:10.042 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:00:10.480 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:00:10.958 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:00:11.041 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:00:11.041 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:00:11.041 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:00:11.042 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:00:11.436 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:00:11.915 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:00:12.042 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:00:12.043 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:00:12.043 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:00:12.043 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:00:12.393 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:00:12.654 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:00:12.654 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:00:12.654 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:00:12.654 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:00:12.871 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:00:13.043 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:00:13.043 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:00:13.043 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:00:13.044 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:00:13.349 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:00:13.828 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 02:00:14.044 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:00:14.044 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:00:14.045 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:00:14.045 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:00:14.306 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 02:00:14.784 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 02:00:15.262 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 02:00:15.312 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:00:15.312 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:00:15.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:00:15.321 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:00:15.321 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:00:15.321 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:00:15.321 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:00:15.321 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:00:15.322 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:00:15.322 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:00:15.322 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:00:15.322 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:00:15.322 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:00:15.322 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:00:20.325 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:00:20.325 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:00:20.327 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:00:20.328 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:00:20.328 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:00:20.329 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:00:20.337 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:00:20.338 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:00:20.338 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:00:20.339 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:00:20.339 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:00:20.341 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:00:20.341 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:00:20.342 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:00:20.342 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:00:20.342 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:00:20.342 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:00:20.342 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:00:20.342 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:00:20.344 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:00:20.344 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:00:20.344 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:00:20.344 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:00:20.344 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:00:20.344 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:00:20.345 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:00:20.345 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:00:20.346 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:00:20.346 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:00:20.346 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:00:20.346 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:00:20.347 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:00:20.347 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:00:20.347 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:00:20.347 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:00:20.349 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:00:20.349 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:00:20.349 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:00:20.349 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:00:20.349 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:00:20.349 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:00:20.349 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:00:20.349 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:00:20.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:00:20.349 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:00:20.349 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:00:20.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:00:20.350 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:00:20.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:00:20.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:00:20.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:00:20.350 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:00:20.350 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:00:20.350 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:00:20.350 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:00:20.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:00:20.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:00:20.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:00:20.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:00:20.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:00:20.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:00:20.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:00:20.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:00:20.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:00:20.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:00:20.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:00:20.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:00:20.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:00:20.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:00:20.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:00:20.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:00:20.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:00:20.351 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:00:20.351 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:00:20.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:00:20.351 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:00:20.351 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:00:20.351 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:00:20.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:00:20.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:00:20.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:00:20.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:00:20.355 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:00:20.838 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:00:20.871 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:00:20.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:00:20.872 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:00:20.874 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:00:20.881 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:00:20.881 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:00:20.881 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:00:20.882 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:00:20.882 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:00:20.882 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:00:20.883 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:00:20.883 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:00:21.307 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:00:21.353 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:00:21.353 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:00:21.353 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:00:21.353 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:00:21.776 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:00:22.244 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:00:22.354 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:00:22.354 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:00:22.355 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:00:22.355 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:00:22.713 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:00:23.188 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:00:23.355 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:00:23.356 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:00:23.356 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:00:23.356 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:00:23.666 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:00:23.982 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:00:23.982 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:00:23.983 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:00:23.992 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:00:23.992 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:00:23.992 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:00:23.992 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:00:23.994 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:00:23.994 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:00:23.994 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:00:23.994 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:00:23.994 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:00:23.994 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:00:23.994 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:00:23.994 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=785 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:00:23.994 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=785 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:00:28.996 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:00:28.996 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:00:28.998 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:00:28.999 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:00:29.000 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:00:29.000 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:00:29.009 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:00:29.010 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:00:29.010 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:00:29.010 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:00:29.010 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:00:29.012 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:00:29.013 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:00:29.013 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:00:29.013 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:00:29.013 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:00:29.013 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:00:29.013 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:00:29.013 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:00:29.015 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:00:29.015 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:00:29.015 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:00:29.015 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:00:29.015 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:00:29.015 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:00:29.016 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:00:29.016 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:00:29.017 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:00:29.017 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:00:29.017 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:00:29.017 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:00:29.017 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:00:29.017 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:00:29.017 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:00:29.017 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:00:29.019 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:00:29.019 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:00:29.019 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:00:29.019 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:00:29.020 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:00:29.020 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:00:29.020 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:00:29.020 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:00:29.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:00:29.020 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:00:29.020 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:00:29.020 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:00:29.020 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:00:29.020 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:00:29.020 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:00:29.020 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:00:29.020 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:00:29.020 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:00:29.020 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:00:29.020 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:00:29.020 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:00:29.020 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:00:29.020 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:00:29.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:00:29.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:00:29.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:00:29.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:00:29.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:00:29.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:00:29.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:00:29.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:00:29.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:00:29.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:00:29.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:00:29.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:00:29.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:00:29.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:00:29.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:00:29.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:00:29.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:00:29.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:00:29.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:00:29.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:00:29.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:00:29.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:00:29.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:00:29.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:00:29.025 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:00:29.508 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:00:29.546 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:00:29.548 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:00:29.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:00:29.549 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:00:29.557 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:00:29.557 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:00:29.557 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:00:29.558 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:00:29.558 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:00:29.559 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:00:29.559 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:00:29.559 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:00:29.986 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:00:30.023 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:00:30.024 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:00:30.024 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:00:30.027 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:00:30.463 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:00:30.941 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:00:31.024 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:00:31.024 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:00:31.025 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:00:31.028 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:00:31.420 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:00:31.898 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:00:32.025 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:00:32.025 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:00:32.026 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:00:32.030 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:00:32.376 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:00:32.692 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:00:32.692 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:00:32.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:00:32.702 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:00:32.702 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:00:32.703 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:00:32.703 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:00:32.708 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:00:32.708 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:00:32.708 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:00:32.708 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:00:32.708 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:00:32.708 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:00:32.709 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:00:32.709 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=785 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:00:32.709 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=786 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:00:32.709 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=786 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:00:37.709 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:00:37.709 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:00:37.711 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:00:37.711 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:00:37.712 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:00:37.713 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:00:37.717 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:00:37.717 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:00:37.717 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:00:37.717 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:00:37.717 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:00:37.719 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:00:37.719 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:00:37.719 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:00:37.719 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:00:37.719 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:00:37.720 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:00:37.720 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:00:37.720 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:00:37.721 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:00:37.721 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:00:37.721 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:00:37.721 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:00:37.721 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:00:37.721 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:00:37.721 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:00:37.721 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:00:37.722 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:00:37.722 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:00:37.723 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:00:37.723 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:00:37.723 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:00:37.723 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:00:37.723 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:00:37.723 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:00:37.725 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:00:37.725 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:00:37.725 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:00:37.725 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:00:37.725 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:00:37.725 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:00:37.725 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:00:37.725 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:00:37.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:00:37.725 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:00:37.725 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:00:37.725 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:00:37.725 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:00:37.725 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:00:37.725 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:00:37.725 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:00:37.725 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:00:37.725 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:00:37.725 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:00:37.725 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:00:37.726 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:00:37.726 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:00:37.726 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:00:37.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:00:37.726 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:00:37.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:00:37.726 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:00:37.726 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:00:37.726 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:00:37.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:00:37.726 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:00:37.726 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:00:37.726 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:00:37.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:00:37.726 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:00:37.726 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:00:37.726 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:00:37.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:00:37.727 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:00:37.727 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:00:37.727 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:00:37.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:00:37.727 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:00:37.727 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:00:37.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:00:37.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:00:37.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:00:37.730 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:00:38.214 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:00:38.249 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:00:38.252 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:00:38.254 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:00:38.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:00:38.261 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:00:38.261 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:00:38.261 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:00:38.262 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:00:38.262 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:00:38.262 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:00:38.262 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:00:38.262 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:00:38.530 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:00:38.530 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:00:38.540 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:00:38.540 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:00:38.540 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:00:38.540 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:00:38.541 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:00:38.542 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:00:38.542 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:00:38.542 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:00:38.542 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:00:38.542 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:00:38.542 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:00:38.542 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=173 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:00:38.542 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=173 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:00:43.545 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:00:43.545 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:00:43.547 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:00:43.547 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:00:43.547 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:00:43.548 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:00:43.556 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:00:43.557 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:00:43.557 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:00:43.558 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:00:43.558 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:00:43.561 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:00:43.561 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:00:43.561 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:00:43.561 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:00:43.561 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:00:43.562 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:00:43.562 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:00:43.562 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:00:43.564 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:00:43.565 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:00:43.565 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:00:43.565 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:00:43.565 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:00:43.565 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:00:43.565 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:00:43.565 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:00:43.567 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:00:43.567 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:00:43.568 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:00:43.568 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:00:43.568 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:00:43.568 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:00:43.568 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:00:43.568 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:00:43.571 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:00:43.571 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:00:43.571 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:00:43.571 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:00:43.571 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:00:43.571 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:00:43.571 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:00:43.571 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:00:43.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:00:43.571 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:00:43.571 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:00:43.571 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:00:43.572 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:00:43.572 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:00:43.572 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:00:43.572 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:00:43.572 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:00:43.572 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:00:43.572 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:00:43.572 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:00:43.572 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:00:43.572 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:00:43.572 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:00:43.572 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:00:43.572 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:00:43.572 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:00:43.572 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:00:43.572 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:00:43.572 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:00:43.573 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:00:43.573 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:00:43.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:00:43.573 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:00:43.573 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:00:43.573 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:00:43.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:00:43.573 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:00:43.573 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:00:43.573 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:00:43.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:00:43.573 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:00:43.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:00:43.573 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:00:43.573 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:00:43.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:00:43.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:00:43.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:00:43.577 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:00:44.060 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:00:44.106 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:00:44.108 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:00:44.110 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:00:44.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:00:44.120 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:00:44.120 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:00:44.120 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:00:44.121 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:00:44.121 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:00:44.122 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:00:44.122 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:00:44.122 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:00:44.330 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:00:44.330 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:00:44.337 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:00:44.337 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:00:44.337 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:00:44.337 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:00:44.338 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:00:44.338 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:00:44.338 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:00:44.338 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:00:44.338 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:00:44.338 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:00:44.338 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:00:44.338 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=163 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:00:44.338 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=163 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:00:44.338 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=163 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:00:44.338 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=163 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:00:44.338 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=163 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:00:44.338 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=163 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:00:44.338 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=163 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:00:44.338 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=164 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:00:44.338 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=164 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:00:44.338 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=164 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:00:44.338 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=164 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:00:44.338 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=164 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:00:44.338 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=164 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:00:44.338 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=164 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:00:44.338 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=164 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:00:49.342 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:00:49.342 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:00:49.345 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:00:49.345 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:00:49.345 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:00:49.345 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:00:49.353 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:00:49.355 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:00:49.355 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:00:49.356 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:00:49.356 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:00:49.359 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:00:49.360 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:00:49.360 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:00:49.360 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:00:49.361 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:00:49.361 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:00:49.361 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:00:49.362 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:00:49.363 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:00:49.364 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:00:49.364 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:00:49.364 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:00:49.364 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:00:49.364 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:00:49.364 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:00:49.364 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:00:49.367 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:00:49.367 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:00:49.367 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:00:49.367 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:00:49.367 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:00:49.367 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:00:49.368 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:00:49.368 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:00:49.370 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:00:49.370 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:00:49.370 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:00:49.370 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:00:49.370 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:00:49.371 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:00:49.371 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:00:49.371 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:00:49.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:00:49.371 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:00:49.371 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:00:49.371 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:00:49.371 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:00:49.371 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:00:49.371 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:00:49.371 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:00:49.371 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:00:49.371 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:00:49.371 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:00:49.371 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:00:49.372 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:00:49.372 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:00:49.372 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:00:49.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:00:49.372 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:00:49.372 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:00:49.372 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:00:49.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:00:49.372 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:00:49.372 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:00:49.372 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:00:49.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:00:49.372 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:00:49.372 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:00:49.372 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:00:49.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:00:49.372 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:00:49.372 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:00:49.372 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:00:49.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:00:49.373 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:00:49.373 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:00:49.373 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:00:49.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:00:49.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:00:49.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:00:49.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:00:49.376 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:00:49.860 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:00:49.893 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:00:49.894 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:00:49.895 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:00:49.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:00:49.900 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:00:49.900 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:00:49.900 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:00:49.901 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:00:49.902 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:00:49.902 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:00:49.902 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:00:49.902 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:00:50.330 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:00:50.374 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:00:50.374 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:00:50.375 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:00:50.376 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:00:50.803 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:00:51.281 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:00:51.374 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:00:51.375 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:00:51.375 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:00:51.377 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:00:51.759 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:00:52.237 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:00:52.375 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:00:52.376 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:00:52.376 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:00:52.378 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:00:52.716 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:00:53.195 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:00:53.376 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:00:53.377 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:00:53.377 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:00:53.379 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:00:53.673 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:00:54.150 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 02:00:54.377 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:00:54.378 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:00:54.378 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:00:54.380 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:00:54.628 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 02:00:55.106 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 02:00:55.585 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 02:00:56.063 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 02:00:56.541 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 02:00:57.019 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 02:00:57.497 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 02:00:57.975 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 02:00:58.453 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 02:00:58.779 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:00:58.780 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:00:58.787 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:00:58.787 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:00:58.787 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:00:58.787 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:00:58.788 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:00:58.788 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:00:58.788 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:00:58.788 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:00:58.788 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:00:58.788 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:00:58.788 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:01:03.788 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:01:03.788 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:01:03.788 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:01:03.789 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:01:03.790 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:01:03.791 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:01:03.795 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:01:03.795 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:01:03.795 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:01:03.795 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:01:03.795 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:01:03.796 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:01:03.796 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:01:03.796 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:01:03.796 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:01:03.797 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:01:03.797 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:01:03.797 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:01:03.797 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:01:03.798 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:01:03.798 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:01:03.798 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:01:03.798 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:01:03.798 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:01:03.798 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:01:03.798 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:01:03.798 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:01:03.799 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:01:03.799 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:01:03.799 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:01:03.799 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:01:03.799 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:01:03.799 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:01:03.800 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:01:03.800 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:01:03.801 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:01:03.801 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:01:03.801 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:01:03.801 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:01:03.802 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:01:03.802 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:01:03.802 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:01:03.802 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:01:03.802 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:01:03.802 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:01:03.802 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:01:03.802 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:01:03.802 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:01:03.802 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:01:03.802 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:01:03.802 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:01:03.802 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:01:03.802 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:01:03.802 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:01:03.802 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:01:03.802 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:01:03.802 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:01:03.802 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:01:03.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:01:03.803 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:01:03.803 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:01:03.803 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:01:03.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:01:03.803 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:01:03.803 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:01:03.803 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:01:03.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:01:03.803 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:01:03.803 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:01:03.803 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:01:03.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:01:03.803 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:01:03.803 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:01:03.803 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:01:03.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:01:03.803 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:01:03.803 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:01:03.803 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:01:03.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:01:03.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:01:03.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:01:03.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:01:03.807 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:01:04.278 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:01:04.315 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:01:04.316 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:01:04.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:01:04.316 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:01:04.318 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:01:04.318 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:01:04.318 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:01:04.318 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:01:04.318 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:01:04.318 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:01:04.318 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:01:04.318 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:01:04.745 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:01:04.804 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:01:04.805 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:01:04.805 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:01:04.807 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:01:05.215 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:01:05.684 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:01:05.805 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:01:05.805 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:01:05.806 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:01:05.808 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:01:06.153 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:01:06.624 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:01:06.806 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:01:06.806 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:01:06.806 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:01:06.809 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:01:07.096 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:01:07.566 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:01:07.807 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:01:07.807 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:01:07.807 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:01:07.810 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:01:08.039 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:01:08.508 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 02:01:08.808 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:01:08.808 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:01:08.808 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:01:08.810 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:01:08.977 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 02:01:09.444 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 02:01:09.913 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 02:01:10.381 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 02:01:10.849 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 02:01:11.316 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 02:01:11.786 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 02:01:12.253 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 02:01:12.721 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 02:01:13.066 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:01:13.066 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:01:13.068 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:01:13.068 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:01:13.068 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:01:13.068 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:01:13.069 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:01:13.069 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:01:13.069 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:01:13.069 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:01:13.069 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:01:13.069 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:01:13.069 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:01:18.069 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:01:18.069 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:01:18.070 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:01:18.071 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:01:18.071 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:01:18.071 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:01:18.074 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:01:18.075 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:01:18.075 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:01:18.075 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:01:18.075 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:01:18.076 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:01:18.076 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:01:18.076 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:01:18.076 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:01:18.076 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:01:18.076 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:01:18.076 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:01:18.076 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:01:18.077 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:01:18.077 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:01:18.078 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:01:18.078 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:01:18.078 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:01:18.078 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:01:18.078 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:01:18.078 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:01:18.079 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:01:18.079 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:01:18.079 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:01:18.079 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:01:18.079 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:01:18.079 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:01:18.079 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:01:18.079 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:01:18.081 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:01:18.081 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:01:18.081 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:01:18.081 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:01:18.081 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:01:18.081 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:01:18.081 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:01:18.081 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:01:18.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:01:18.082 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:01:18.082 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:01:18.082 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:01:18.082 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:01:18.082 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:01:18.082 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:01:18.082 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:01:18.082 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:01:18.082 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:01:18.082 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:01:18.082 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:01:18.082 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:01:18.082 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:01:18.082 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:01:18.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:01:18.082 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:01:18.082 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:01:18.082 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:01:18.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:01:18.082 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:01:18.082 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:01:18.082 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:01:18.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:01:18.082 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:01:18.082 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:01:18.082 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:01:18.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:01:18.082 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:01:18.082 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:01:18.083 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:01:18.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:01:18.083 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:01:18.083 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:01:18.083 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:01:18.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:01:18.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:01:18.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:01:18.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:01:18.087 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:01:18.554 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:01:18.596 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:01:18.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:01:18.597 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:01:18.598 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:01:18.599 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:01:18.599 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:01:18.599 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:01:18.600 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:01:18.600 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:01:18.600 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:01:18.600 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:01:18.600 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:01:19.022 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:01:19.085 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:01:19.085 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:01:19.086 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:01:19.088 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:01:19.489 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:01:19.956 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:01:20.085 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:01:20.085 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:01:20.087 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:01:20.089 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:01:20.423 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:01:20.890 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:01:21.086 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:01:21.086 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:01:21.087 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:01:21.089 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:01:21.358 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:01:21.656 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:01:21.656 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:01:21.656 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:01:21.656 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:01:21.656 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:01:21.703 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:01:21.744 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:01:21.786 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:01:21.823 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:01:21.825 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:01:21.859 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:01:21.901 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:01:21.938 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:01:21.979 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:01:22.021 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:01:22.058 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:01:22.086 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:01:22.086 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:01:22.087 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:01:22.089 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:01:22.099 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:01:22.141 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:01:22.178 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:01:22.178 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:01:22.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:01:22.180 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:01:22.180 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:01:22.180 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:01:22.180 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:01:22.181 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:01:22.181 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:01:22.181 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:01:22.181 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:01:22.181 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:01:22.181 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:01:22.181 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:01:27.181 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:01:27.181 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:01:27.182 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:01:27.183 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:01:27.184 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:01:27.184 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:01:27.187 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:01:27.188 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:01:27.188 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:01:27.188 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:01:27.188 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:01:27.189 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:01:27.189 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:01:27.189 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:01:27.189 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:01:27.190 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:01:27.190 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:01:27.190 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:01:27.190 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:01:27.191 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:01:27.191 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:01:27.191 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:01:27.191 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:01:27.191 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:01:27.191 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:01:27.191 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:01:27.191 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:01:27.192 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:01:27.192 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:01:27.192 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:01:27.192 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:01:27.192 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:01:27.192 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:01:27.192 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:01:27.192 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:01:27.194 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:01:27.194 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:01:27.194 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:01:27.194 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:01:27.195 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:01:27.195 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:01:27.195 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:01:27.195 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:01:27.195 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:01:27.195 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:01:27.195 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:01:27.195 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:01:27.195 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:01:27.195 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:01:27.195 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:01:27.195 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:01:27.195 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:01:27.195 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:01:27.195 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:01:27.195 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:01:27.195 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:01:27.195 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:01:27.195 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:01:27.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:01:27.196 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:01:27.196 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:01:27.196 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:01:27.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:01:27.196 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:01:27.196 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:01:27.196 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:01:27.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:01:27.196 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:01:27.196 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:01:27.196 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:01:27.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:01:27.196 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:01:27.196 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:01:27.196 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:01:27.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:01:27.197 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:01:27.197 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:01:27.197 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:01:27.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:01:27.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:01:27.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:01:27.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:01:27.200 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:01:27.671 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:01:27.709 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:01:27.709 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:01:27.709 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:01:27.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:01:27.748 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:01:27.749 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:01:27.749 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:01:27.749 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:01:27.750 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:01:27.751 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:01:27.751 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:01:27.751 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:01:27.751 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:01:27.751 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:01:27.751 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:01:27.751 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=121 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:01:27.751 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=121 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:01:27.751 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=121 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:01:27.751 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=121 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:01:27.751 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=121 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:01:27.751 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=121 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:01:32.750 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:01:32.750 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:01:32.751 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:01:32.751 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:01:32.752 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:01:32.752 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:01:32.756 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:01:32.757 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:01:32.757 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:01:32.757 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:01:32.757 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:01:32.758 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:01:32.758 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:01:32.758 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:01:32.758 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:01:32.758 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:01:32.758 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:01:32.758 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:01:32.758 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:01:32.759 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:01:32.759 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:01:32.759 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:01:32.759 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:01:32.759 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:01:32.759 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:01:32.759 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:01:32.759 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:01:32.760 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:01:32.760 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:01:32.760 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:01:32.760 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:01:32.760 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:01:32.760 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:01:32.760 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:01:32.760 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:01:32.762 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:01:32.762 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:01:32.762 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:01:32.762 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:01:32.762 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:01:32.762 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:01:32.762 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:01:32.762 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:01:32.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:01:32.762 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:01:32.762 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:01:32.762 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:01:32.762 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:01:32.762 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:01:32.762 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:01:32.763 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:01:32.763 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:01:32.763 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:01:32.763 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:01:32.763 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:01:32.763 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:01:32.763 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:01:32.763 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:01:32.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:01:32.763 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:01:32.763 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:01:32.763 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:01:32.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:01:32.763 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:01:32.763 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:01:32.763 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:01:32.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:01:32.763 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:01:32.763 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:01:32.763 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:01:32.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:01:32.763 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:01:32.763 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:01:32.763 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:01:32.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:01:32.763 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:01:32.763 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:01:32.763 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:01:32.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:01:32.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:01:32.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:01:32.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:01:32.767 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:01:33.239 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:01:33.276 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:01:33.276 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:01:33.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:01:33.277 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:01:33.710 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:01:33.765 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:01:33.765 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:01:33.766 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:01:33.767 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:01:34.180 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:01:34.651 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:01:34.765 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:01:34.765 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:01:34.766 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:01:34.769 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:01:35.122 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:01:35.593 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:01:35.766 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:01:35.766 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:01:35.767 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:01:35.769 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:01:36.063 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:01:36.534 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:01:36.766 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:01:36.766 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:01:36.767 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:01:36.770 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:01:37.005 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:01:37.476 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 02:01:37.767 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:01:37.767 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:01:37.768 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:01:37.770 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:01:37.947 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 02:01:38.417 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 02:01:38.884 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 02:01:39.351 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 02:01:39.818 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 02:01:40.286 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 02:01:40.753 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 02:01:41.220 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 02:01:41.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:01:41.287 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:01:41.287 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:01:41.287 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:01:41.287 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:01:41.288 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:01:41.288 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:01:41.288 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:01:41.288 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:01:41.288 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:01:41.288 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:01:41.289 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:01:41.289 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1853 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:01:41.289 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1853 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:01:41.289 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1853 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:01:41.289 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1853 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:01:41.289 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1853 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:01:41.289 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1853 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:01:41.289 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1853 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:01:41.289 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1853 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:01:46.289 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:01:46.289 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:01:46.289 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:01:46.290 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:01:46.290 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:01:46.291 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:01:46.300 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:01:46.300 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:01:46.300 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:01:46.301 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:01:46.301 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:01:46.302 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:01:46.302 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:01:46.302 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:01:46.302 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:01:46.302 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:01:46.302 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:01:46.302 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:01:46.302 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:01:46.304 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:01:46.304 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:01:46.304 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:01:46.304 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:01:46.304 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:01:46.304 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:01:46.304 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:01:46.304 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:01:46.306 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:01:46.306 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:01:46.307 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:01:46.307 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:01:46.307 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:01:46.307 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:01:46.307 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:01:46.307 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:01:46.310 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:01:46.310 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:01:46.310 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:01:46.310 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:01:46.310 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:01:46.310 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:01:46.310 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:01:46.310 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:01:46.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:01:46.310 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:01:46.310 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:01:46.310 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:01:46.310 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:01:46.310 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:01:46.310 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:01:46.310 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:01:46.310 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:01:46.310 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:01:46.310 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:01:46.310 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:01:46.311 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:01:46.311 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:01:46.311 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:01:46.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:01:46.311 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:01:46.311 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:01:46.311 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:01:46.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:01:46.311 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:01:46.311 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:01:46.311 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:01:46.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:01:46.311 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:01:46.311 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:01:46.311 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:01:46.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:01:46.311 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:01:46.311 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:01:46.311 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:01:46.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:01:46.311 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:01:46.311 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:01:46.311 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:01:46.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:01:46.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:01:46.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:01:46.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:01:46.315 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:01:46.787 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:01:46.824 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:01:46.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:01:46.825 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:01:46.825 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:01:47.254 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:01:47.312 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:01:47.313 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:01:47.313 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:01:47.314 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:01:47.723 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:01:48.191 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:01:48.313 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:01:48.313 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:01:48.313 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:01:48.314 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:01:48.658 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:01:49.125 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:01:49.314 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:01:49.314 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:01:49.314 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:01:49.315 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:01:49.593 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:01:50.060 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:01:50.314 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:01:50.314 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:01:50.314 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:01:50.315 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:01:50.528 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:01:50.995 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 02:01:51.314 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:01:51.315 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:01:51.315 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:01:51.316 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:01:51.463 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 02:01:51.931 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 02:01:52.399 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 02:01:52.866 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 02:01:53.334 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 02:01:53.802 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 02:01:54.270 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 02:01:54.738 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 02:01:54.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:01:54.835 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:01:54.835 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:01:54.835 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:01:54.836 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:01:54.837 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:01:54.837 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:01:54.837 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:01:54.837 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:01:54.837 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:01:54.837 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:01:54.837 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:01:54.837 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1860 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:01:54.837 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1860 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:01:59.837 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:01:59.837 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:01:59.837 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:01:59.838 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:01:59.839 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:01:59.839 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:01:59.844 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:01:59.844 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:01:59.844 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:01:59.844 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:01:59.844 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:01:59.845 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:01:59.845 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:01:59.846 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:01:59.846 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:01:59.846 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:01:59.846 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:01:59.846 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:01:59.846 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:01:59.846 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:01:59.847 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:01:59.847 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:01:59.847 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:01:59.847 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:01:59.847 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:01:59.847 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:01:59.847 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:01:59.848 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:01:59.848 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:01:59.848 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:01:59.848 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:01:59.848 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:01:59.848 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:01:59.848 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:01:59.848 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:01:59.850 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:01:59.850 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:01:59.850 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:01:59.850 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:01:59.850 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:01:59.850 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:01:59.851 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:01:59.851 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:01:59.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:01:59.851 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:01:59.851 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:01:59.851 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:01:59.851 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:01:59.851 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:01:59.851 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:01:59.851 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:01:59.851 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:01:59.851 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:01:59.851 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:01:59.851 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:01:59.851 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:01:59.851 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:01:59.851 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:01:59.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:01:59.851 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:01:59.852 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:01:59.852 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:01:59.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:01:59.852 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:01:59.852 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:01:59.852 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:01:59.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:01:59.852 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:01:59.852 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:01:59.852 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:01:59.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:01:59.852 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:01:59.852 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:01:59.852 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:01:59.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:01:59.852 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:01:59.852 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:01:59.852 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:01:59.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:01:59.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:01:59.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:01:59.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:01:59.856 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:02:00.327 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:02:00.363 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:02:00.364 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:02:00.364 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:02:00.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:02:00.795 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:02:00.853 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:02:00.853 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:02:00.855 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:02:00.855 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:02:01.266 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:02:01.738 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:02:01.854 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:02:01.854 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:02:01.855 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:02:01.855 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:02:02.210 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:02:02.677 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:02:02.854 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:02:02.854 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:02:02.856 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:02:02.856 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:02:03.144 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:02:03.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:02:03.392 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:02:03.392 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:02:03.392 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:02:03.392 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:02:03.393 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:02:03.394 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:02:03.394 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:02:03.394 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:02:03.394 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:02:03.394 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:02:03.394 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:02:03.394 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=770 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:02:03.394 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=770 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:02:03.394 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=770 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:02:03.394 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=770 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:02:03.394 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=770 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:02:03.394 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=770 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:02:03.394 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=770 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:02:03.394 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=770 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:02:08.394 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:02:08.394 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:02:08.395 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:02:08.395 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:02:08.395 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:02:08.395 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:02:08.403 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:02:08.403 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:02:08.403 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:02:08.403 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:02:08.403 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:02:08.404 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:02:08.404 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:02:08.404 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:02:08.404 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:02:08.404 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:02:08.404 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:02:08.405 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:02:08.405 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:02:08.406 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:02:08.406 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:02:08.406 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:02:08.406 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:02:08.406 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:02:08.406 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:02:08.406 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:02:08.406 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:02:08.407 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:02:08.407 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:02:08.407 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:02:08.408 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:02:08.408 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:02:08.408 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:02:08.408 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:02:08.408 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:02:08.410 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:02:08.410 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:02:08.410 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:02:08.410 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:02:08.410 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:02:08.410 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:02:08.410 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:02:08.410 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:02:08.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:02:08.410 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:02:08.410 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:02:08.410 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:02:08.410 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:02:08.410 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:02:08.410 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:02:08.410 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:02:08.410 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:02:08.410 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:02:08.410 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:02:08.411 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:02:08.411 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:02:08.411 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:02:08.411 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:02:08.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:02:08.411 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:02:08.411 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:02:08.411 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:02:08.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:02:08.411 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:02:08.411 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:02:08.411 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:02:08.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:02:08.411 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:02:08.411 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:02:08.411 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:02:08.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:02:08.411 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:02:08.411 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:02:08.411 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:02:08.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:02:08.411 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:02:08.411 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:02:08.411 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:02:08.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:02:08.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:02:08.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:02:08.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:02:08.415 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:02:08.887 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:02:08.928 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:02:08.930 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:02:08.931 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:02:08.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:02:08.952 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:02:08.952 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:02:08.953 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:02:08.961 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:02:08.961 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:02:08.961 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:02:08.961 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:02:08.961 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:02:08.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:02:08.987 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:02:08.987 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:02:08.987 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:02:08.987 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:02:09.356 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:02:09.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:02:09.365 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:02:09.366 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:02:09.366 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:02:09.375 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:02:09.375 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:02:09.375 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:02:09.375 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:02:09.377 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:02:09.377 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:02:09.377 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:02:09.377 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:02:09.377 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:02:09.377 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:02:09.377 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:02:09.377 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=210 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:02:14.380 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:02:14.380 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:02:14.381 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:02:14.382 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:02:14.382 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:02:14.383 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:02:14.388 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:02:14.389 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:02:14.389 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:02:14.389 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:02:14.389 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:02:14.391 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:02:14.391 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:02:14.392 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:02:14.392 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:02:14.392 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:02:14.392 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:02:14.392 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:02:14.392 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:02:14.394 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:02:14.394 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:02:14.394 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:02:14.394 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:02:14.394 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:02:14.394 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:02:14.394 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:02:14.394 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:02:14.396 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:02:14.396 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:02:14.396 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:02:14.396 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:02:14.396 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:02:14.396 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:02:14.396 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:02:14.396 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:02:14.398 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:02:14.398 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:02:14.398 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:02:14.398 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:02:14.398 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:02:14.398 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:02:14.399 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:02:14.399 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:02:14.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:02:14.399 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:02:14.399 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:02:14.399 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:02:14.399 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:02:14.399 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:02:14.399 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:02:14.399 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:02:14.399 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:02:14.399 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:02:14.399 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:02:14.399 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:02:14.399 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:02:14.399 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:02:14.399 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:02:14.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:02:14.399 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:02:14.399 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:02:14.399 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:02:14.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:02:14.400 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:02:14.400 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:02:14.400 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:02:14.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:02:14.400 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:02:14.400 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:02:14.400 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:02:14.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:02:14.400 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:02:14.400 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:02:14.400 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:02:14.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:02:14.400 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:02:14.400 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:02:14.400 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:02:14.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:02:14.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:02:14.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:02:14.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:02:14.404 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:02:14.887 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:02:14.920 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:02:14.921 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:02:14.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:02:14.922 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:02:14.932 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:02:14.932 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:02:14.932 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:02:14.932 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:02:14.936 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:02:14.936 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:02:14.936 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:02:14.936 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:02:14.936 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:02:14.936 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:02:14.936 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:02:14.937 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=114 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:02:14.937 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=114 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:02:14.937 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=114 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:02:14.937 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=114 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:02:14.937 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=114 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:02:14.937 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=114 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:02:19.935 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:02:19.936 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:02:19.937 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:02:19.938 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:02:19.938 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:02:19.939 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:02:19.948 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:02:19.949 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:02:19.949 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:02:19.950 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:02:19.950 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:02:19.953 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:02:19.953 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:02:19.953 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:02:19.954 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:02:19.954 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:02:19.955 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:02:19.955 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:02:19.955 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:02:19.957 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:02:19.958 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:02:19.958 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:02:19.958 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:02:19.959 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:02:19.959 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:02:19.959 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:02:19.959 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:02:19.961 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:02:19.961 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:02:19.961 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:02:19.961 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:02:19.962 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:02:19.962 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:02:19.962 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:02:19.962 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:02:19.965 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:02:19.965 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:02:19.965 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:02:19.966 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:02:19.966 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:02:19.966 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:02:19.966 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:02:19.966 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:02:19.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:02:19.966 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:02:19.966 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:02:19.966 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:02:19.966 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:02:19.966 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:02:19.966 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:02:19.966 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:02:19.967 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:02:19.967 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:02:19.967 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:02:19.967 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:02:19.967 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:02:19.967 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:02:19.967 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:02:19.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:02:19.967 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:02:19.967 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:02:19.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:02:19.967 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:02:19.967 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:02:19.967 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:02:19.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:02:19.968 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:02:19.968 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:02:19.968 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:02:19.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:02:19.968 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:02:19.968 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:02:19.968 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:02:19.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:02:19.968 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:02:19.968 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:02:19.968 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:02:19.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:02:19.968 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:02:19.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:02:19.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:02:19.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:02:19.972 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:02:20.451 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:02:20.485 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:02:20.485 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:02:20.486 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:02:20.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:02:20.924 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:02:20.970 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:02:20.971 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:02:20.973 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:02:20.977 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:02:21.402 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:02:21.877 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:02:21.971 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:02:21.971 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:02:21.973 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:02:21.977 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:02:22.346 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:02:22.498 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:02:22.499 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:02:22.499 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:02:22.499 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:02:22.500 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:02:22.500 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:02:22.500 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:02:22.500 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:02:22.500 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:02:22.500 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:02:22.500 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:02:22.500 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=545 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:02:22.500 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=545 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:02:22.500 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=545 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:02:22.500 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=545 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:02:22.500 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=545 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:02:22.500 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=545 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:02:22.500 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=545 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:02:22.500 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=545 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:02:27.505 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:02:27.505 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:02:27.506 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:02:27.507 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:02:27.507 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:02:27.508 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:02:27.511 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:02:27.512 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:02:27.512 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:02:27.512 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:02:27.512 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:02:27.513 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:02:27.513 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:02:27.513 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:02:27.513 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:02:27.513 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:02:27.513 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:02:27.514 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:02:27.514 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:02:27.514 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:02:27.514 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:02:27.514 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:02:27.514 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:02:27.514 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:02:27.514 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:02:27.514 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:02:27.514 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:02:27.516 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:02:27.516 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:02:27.516 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:02:27.516 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:02:27.516 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:02:27.516 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:02:27.516 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:02:27.516 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:02:27.518 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:02:27.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:02:27.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:02:27.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:02:27.518 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:02:27.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:02:27.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:02:27.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:02:27.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:02:27.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:02:27.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:02:27.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:02:27.518 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:02:27.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:02:27.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:02:27.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:02:27.518 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:02:27.518 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:02:27.519 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:02:27.519 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:02:27.519 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:02:27.519 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:02:27.519 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:02:27.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:02:27.519 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:02:27.519 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:02:27.519 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:02:27.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:02:27.519 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:02:27.519 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:02:27.519 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:02:27.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:02:27.519 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:02:27.519 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:02:27.519 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:02:27.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:02:27.519 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:02:27.519 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:02:27.519 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:02:27.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:02:27.519 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:02:27.519 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:02:27.519 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:02:27.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:02:27.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:02:27.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:02:27.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:02:27.523 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:02:28.001 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:02:28.033 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:02:28.033 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:02:28.033 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:02:28.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:02:28.034 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:02:28.034 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:02:28.034 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:02:28.034 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:02:28.034 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:02:28.034 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:02:28.034 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:02:28.034 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:02:28.475 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:02:28.521 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:02:28.521 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:02:28.521 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:02:28.522 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:02:28.950 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:02:29.418 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:02:29.522 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:02:29.522 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:02:29.522 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:02:29.522 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:02:29.891 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:02:30.366 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:02:30.523 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:02:30.523 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:02:30.523 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:02:30.523 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:02:30.841 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:02:30.853 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:02:30.853 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:02:30.854 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:02:30.855 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:02:30.855 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:02:30.855 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:02:30.856 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:02:30.856 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:02:30.856 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:02:30.856 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:02:30.856 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:02:30.856 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:02:30.856 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:02:30.857 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=720 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:02:30.857 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=720 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:02:35.856 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:02:35.856 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:02:35.856 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:02:35.857 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:02:35.858 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:02:35.859 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:02:35.862 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:02:35.863 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:02:35.863 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:02:35.863 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:02:35.863 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:02:35.864 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:02:35.864 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:02:35.864 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:02:35.864 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:02:35.864 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:02:35.864 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:02:35.864 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:02:35.864 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:02:35.866 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:02:35.866 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:02:35.866 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:02:35.866 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:02:35.866 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:02:35.866 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:02:35.866 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:02:35.866 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:02:35.867 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:02:35.867 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:02:35.867 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:02:35.867 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:02:35.867 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:02:35.868 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:02:35.868 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:02:35.868 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:02:35.869 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:02:35.870 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:02:35.870 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:02:35.870 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:02:35.870 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:02:35.870 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:02:35.870 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:02:35.870 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:02:35.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:02:35.870 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:02:35.870 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:02:35.870 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:02:35.870 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:02:35.870 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:02:35.870 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:02:35.870 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:02:35.870 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:02:35.870 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:02:35.870 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:02:35.870 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:02:35.870 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:02:35.870 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:02:35.870 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:02:35.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:02:35.870 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:02:35.870 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:02:35.871 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:02:35.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:02:35.871 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:02:35.871 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:02:35.871 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:02:35.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:02:35.871 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:02:35.871 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:02:35.871 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:02:35.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:02:35.871 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:02:35.871 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:02:35.871 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:02:35.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:02:35.871 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:02:35.871 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:02:35.871 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:02:35.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:02:35.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:02:35.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:02:35.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:02:35.875 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:02:36.353 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:02:36.383 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:02:36.383 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:02:36.384 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:02:36.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:02:36.384 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:02:36.384 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:02:36.384 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:02:36.385 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:02:36.385 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:02:36.385 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:02:36.385 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:02:36.385 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:02:36.828 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:02:36.873 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:02:36.873 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:02:36.874 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:02:36.875 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:02:37.296 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:02:37.764 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:02:37.873 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:02:37.873 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:02:37.875 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:02:37.876 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:02:38.232 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:02:38.478 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:02:38.478 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:02:38.480 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:02:38.480 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:02:38.480 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:02:38.480 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:02:38.482 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:02:38.482 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:02:38.482 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:02:38.482 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:02:38.482 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:02:38.482 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:02:38.482 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:02:38.482 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=567 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:02:38.482 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=567 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:02:43.485 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:02:43.485 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:02:43.487 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:02:43.489 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:02:43.491 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:02:43.494 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:02:43.503 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:02:43.504 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:02:43.504 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:02:43.504 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:02:43.504 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:02:43.506 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:02:43.506 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:02:43.507 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:02:43.507 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:02:43.507 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:02:43.507 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:02:43.507 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:02:43.507 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:02:43.508 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:02:43.508 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:02:43.508 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:02:43.508 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:02:43.509 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:02:43.509 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:02:43.509 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:02:43.509 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:02:43.510 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:02:43.510 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:02:43.510 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:02:43.510 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:02:43.510 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:02:43.510 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:02:43.510 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:02:43.510 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:02:43.512 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:02:43.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:02:43.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:02:43.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:02:43.512 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:02:43.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:02:43.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:02:43.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:02:43.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:02:43.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:02:43.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:02:43.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:02:43.512 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:02:43.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:02:43.513 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:02:43.513 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:02:43.513 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:02:43.513 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:02:43.513 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:02:43.513 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:02:43.513 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:02:43.513 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:02:43.513 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:02:43.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:02:43.513 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:02:43.513 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:02:43.513 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:02:43.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:02:43.513 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:02:43.513 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:02:43.513 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:02:43.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:02:43.513 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:02:43.513 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:02:43.513 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:02:43.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:02:43.513 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:02:43.513 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:02:43.513 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:02:43.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:02:43.513 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:02:43.513 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:02:43.513 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:02:43.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:02:43.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:02:43.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:02:43.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:02:43.517 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:02:43.996 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:02:44.027 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:02:44.027 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:02:44.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:02:44.028 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:02:44.030 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:02:44.030 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:02:44.031 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:02:44.031 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:02:44.031 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:02:44.031 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:02:44.031 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:02:44.031 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:02:44.464 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:02:44.514 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:02:44.515 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:02:44.516 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:02:44.517 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:02:44.934 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:02:45.409 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:02:45.515 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:02:45.515 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:02:45.516 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:02:45.517 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:02:45.879 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:02:46.349 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:02:46.516 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:02:46.516 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:02:46.517 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:02:46.518 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:02:46.819 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:02:46.836 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:02:46.836 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:02:46.846 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:02:46.846 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:02:46.846 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:02:46.846 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:02:46.848 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:02:46.848 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:02:46.848 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:02:46.848 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:02:46.848 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:02:46.848 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:02:46.848 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:02:51.846 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:02:51.847 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:02:51.847 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:02:51.847 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:02:51.848 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:02:51.848 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:02:51.852 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:02:51.852 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:02:51.852 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:02:51.852 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:02:51.852 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:02:51.853 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:02:51.853 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:02:51.853 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:02:51.854 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:02:51.854 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:02:51.854 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:02:51.854 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:02:51.854 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:02:51.855 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:02:51.855 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:02:51.855 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:02:51.855 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:02:51.855 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:02:51.855 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:02:51.855 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:02:51.855 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:02:51.857 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:02:51.857 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:02:51.857 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:02:51.857 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:02:51.857 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:02:51.857 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:02:51.857 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:02:51.857 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:02:51.859 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:02:51.859 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:02:51.859 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:02:51.859 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:02:51.859 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:02:51.859 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:02:51.859 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:02:51.859 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:02:51.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:02:51.859 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:02:51.859 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:02:51.859 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:02:51.859 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:02:51.859 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:02:51.859 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:02:51.859 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:02:51.859 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:02:51.860 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:02:51.860 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:02:51.860 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:02:51.860 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:02:51.860 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:02:51.860 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:02:51.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:02:51.860 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:02:51.860 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:02:51.860 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:02:51.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:02:51.860 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:02:51.860 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:02:51.860 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:02:51.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:02:51.860 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:02:51.860 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:02:51.860 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:02:51.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:02:51.860 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:02:51.860 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:02:51.860 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:02:51.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:02:51.860 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:02:51.860 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:02:51.861 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:02:51.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:02:51.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:02:51.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:02:51.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:02:51.864 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:02:52.343 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:02:52.371 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:02:52.372 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:02:52.372 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:02:52.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:02:52.374 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:02:52.374 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:02:52.374 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:02:52.374 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:02:52.374 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:02:52.374 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:02:52.374 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:02:52.374 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:02:52.811 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:02:52.862 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:02:52.862 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:02:52.862 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:02:52.864 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:02:53.284 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:02:53.759 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:02:53.862 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:02:53.863 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:02:53.863 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:02:53.865 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:02:54.235 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:02:54.485 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:02:54.485 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:02:54.491 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:02:54.491 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:02:54.491 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:02:54.491 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:02:54.493 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:02:54.493 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:02:54.493 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:02:54.493 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:02:54.493 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:02:54.493 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:02:54.493 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:02:59.492 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:02:59.492 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:02:59.492 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:02:59.493 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:02:59.493 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:02:59.494 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:02:59.498 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:02:59.498 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:02:59.498 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:02:59.498 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:02:59.498 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:02:59.499 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:02:59.499 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:02:59.499 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:02:59.499 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:02:59.500 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:02:59.500 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:02:59.500 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:02:59.500 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:02:59.501 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:02:59.501 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:02:59.501 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:02:59.501 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:02:59.501 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:02:59.501 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:02:59.501 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:02:59.501 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:02:59.502 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:02:59.502 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:02:59.502 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:02:59.502 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:02:59.502 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:02:59.502 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:02:59.503 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:02:59.503 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:02:59.504 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:02:59.504 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:02:59.504 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:02:59.504 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:02:59.505 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:02:59.505 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:02:59.505 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:02:59.505 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:02:59.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:02:59.505 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:02:59.505 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:02:59.505 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:02:59.505 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:02:59.505 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:02:59.505 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:02:59.505 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:02:59.505 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:02:59.505 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:02:59.505 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:02:59.505 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:02:59.505 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:02:59.505 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:02:59.505 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:02:59.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:02:59.505 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:02:59.505 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:02:59.505 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:02:59.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:02:59.506 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:02:59.506 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:02:59.506 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:02:59.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:02:59.506 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:02:59.506 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:02:59.506 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:02:59.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:02:59.506 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:02:59.506 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:02:59.506 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:02:59.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:02:59.506 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:02:59.506 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:02:59.506 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:02:59.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:02:59.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:02:59.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:02:59.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:02:59.510 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:02:59.987 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:03:00.021 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:03:00.022 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:03:00.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:03:00.023 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:03:00.028 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:03:00.028 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:03:00.028 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:03:00.029 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:03:00.029 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:03:00.030 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:03:00.030 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:03:00.030 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:03:00.462 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:03:00.507 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:03:00.508 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:03:00.508 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:03:00.510 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:03:00.937 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:03:01.412 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:03:01.508 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:03:01.509 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:03:01.509 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:03:01.510 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:03:01.885 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:03:02.360 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:03:02.508 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:03:02.510 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:03:02.510 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:03:02.510 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:03:02.833 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:03:03.303 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:03:03.510 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:03:03.511 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:03:03.511 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:03:03.511 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:03:03.779 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:03:03.795 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:03:03.795 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:03:03.799 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:03:03.799 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:03:03.799 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:03:03.799 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:03:03.800 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:03:03.800 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:03:03.801 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:03:03.801 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:03:03.801 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:03:03.801 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:03:03.801 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:03:08.803 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:03:08.803 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:03:08.805 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:03:08.809 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:03:08.809 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:03:08.810 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:03:08.815 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:03:08.816 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:03:08.816 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:03:08.816 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:03:08.816 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:03:08.817 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:03:08.817 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:03:08.817 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:03:08.817 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:03:08.817 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:03:08.817 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:03:08.817 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:03:08.817 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:03:08.819 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:03:08.819 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:03:08.819 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:03:08.819 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:03:08.819 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:03:08.819 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:03:08.819 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:03:08.819 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:03:08.820 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:03:08.820 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:03:08.820 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:03:08.820 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:03:08.820 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:03:08.820 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:03:08.821 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:03:08.821 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:03:08.822 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:03:08.822 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:03:08.822 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:03:08.822 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:03:08.823 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:03:08.823 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:03:08.823 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:03:08.823 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:03:08.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:03:08.823 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:03:08.823 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:03:08.823 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:03:08.823 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:03:08.823 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:03:08.823 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:03:08.823 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:03:08.823 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:03:08.823 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:03:08.823 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:03:08.823 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:03:08.823 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:03:08.823 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:03:08.823 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:03:08.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:03:08.824 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:03:08.824 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:03:08.824 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:03:08.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:03:08.824 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:03:08.824 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:03:08.824 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:03:08.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:03:08.824 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:03:08.824 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:03:08.824 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:03:08.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:03:08.824 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:03:08.824 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:03:08.824 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:03:08.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:03:08.824 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:03:08.824 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:03:08.824 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:03:08.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:03:08.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:03:08.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:03:08.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:03:08.828 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:03:09.306 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:03:09.339 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:03:09.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:03:09.340 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:03:09.342 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:03:09.345 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:03:09.345 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:03:09.345 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:03:09.345 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:03:09.346 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:03:09.346 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:03:09.346 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:03:09.346 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:03:09.775 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:03:09.826 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:03:09.826 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:03:09.826 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:03:09.828 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:03:10.248 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:03:10.725 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:03:10.826 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:03:10.827 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:03:10.827 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:03:10.828 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:03:11.201 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:03:11.678 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:03:11.828 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:03:11.828 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:03:11.828 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:03:11.829 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:03:12.151 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:03:12.402 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:03:12.402 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:03:12.414 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:03:12.414 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:03:12.414 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:03:12.414 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:03:12.420 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:03:12.420 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:03:12.420 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:03:12.420 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:03:12.420 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:03:12.420 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:03:12.420 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:03:12.420 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=774 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:03:12.420 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=774 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:03:12.420 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=774 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:03:12.420 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=774 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:03:12.420 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=774 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:03:12.421 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=774 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:03:17.417 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:03:17.418 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:03:17.420 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:03:17.420 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:03:17.421 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:03:17.422 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:03:17.426 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:03:17.426 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:03:17.426 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:03:17.426 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:03:17.426 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:03:17.427 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:03:17.427 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:03:17.427 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:03:17.428 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:03:17.428 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:03:17.428 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:03:17.428 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:03:17.428 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:03:17.429 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:03:17.429 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:03:17.429 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:03:17.429 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:03:17.429 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:03:17.429 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:03:17.429 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:03:17.429 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:03:17.430 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:03:17.430 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:03:17.431 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:03:17.431 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:03:17.431 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:03:17.431 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:03:17.431 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:03:17.431 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:03:17.433 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:03:17.433 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:03:17.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:03:17.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:03:17.433 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:03:17.433 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:03:17.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:03:17.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:03:17.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:03:17.433 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:03:17.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:03:17.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:03:17.433 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:03:17.433 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:03:17.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:03:17.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:03:17.433 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:03:17.433 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:03:17.433 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:03:17.434 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:03:17.434 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:03:17.434 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:03:17.434 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:03:17.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:03:17.434 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:03:17.434 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:03:17.434 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:03:17.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:03:17.434 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:03:17.434 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:03:17.434 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:03:17.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:03:17.434 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:03:17.434 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:03:17.434 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:03:17.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:03:17.434 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:03:17.434 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:03:17.434 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:03:17.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:03:17.435 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:03:17.435 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:03:17.435 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:03:17.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:03:17.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:03:17.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:03:17.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:03:17.438 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:03:17.920 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:03:17.952 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:03:17.954 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:03:17.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:03:17.955 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:03:18.389 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:03:18.436 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:03:18.436 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:03:18.436 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:03:18.438 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:03:18.858 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:03:19.334 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:03:19.437 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:03:19.437 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:03:19.437 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:03:19.439 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:03:19.813 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:03:19.969 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:03:19.969 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:03:19.969 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:03:19.970 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:03:19.971 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:03:19.971 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:03:19.971 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:03:19.971 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:03:19.971 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:03:19.971 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:03:19.971 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:03:19.971 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=545 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:03:19.971 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=545 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:03:19.971 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=545 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:03:19.971 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=545 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:03:19.971 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=546 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:03:19.971 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=546 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:03:19.971 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=546 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:03:19.971 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=546 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:03:24.974 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:03:24.974 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:03:24.976 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:03:24.976 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:03:24.976 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:03:24.977 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:03:24.986 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:03:24.987 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:03:24.987 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:03:24.987 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:03:24.988 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:03:24.990 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:03:24.990 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:03:24.990 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:03:24.990 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:03:24.991 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:03:24.991 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:03:24.991 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:03:24.991 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:03:24.992 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:03:24.993 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:03:24.993 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:03:24.993 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:03:24.993 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:03:24.993 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:03:24.993 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:03:24.993 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:03:24.994 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:03:24.994 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:03:24.995 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:03:24.995 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:03:24.995 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:03:24.995 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:03:24.995 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:03:24.995 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:03:24.997 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:03:24.997 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:03:24.997 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:03:24.997 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:03:24.997 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:03:24.997 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:03:24.997 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:03:24.997 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:03:24.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:03:24.997 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:03:24.997 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:03:24.997 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:03:24.997 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:03:24.997 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:03:24.997 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:03:24.997 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:03:24.998 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:03:24.998 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:03:24.998 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:03:24.998 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:03:24.998 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:03:24.998 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:03:24.998 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:03:24.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:03:24.998 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:03:24.998 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:03:24.998 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:03:24.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:03:24.998 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:03:24.998 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:03:24.998 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:03:24.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:03:24.998 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:03:24.998 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:03:24.998 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:03:24.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:03:24.998 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:03:24.998 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:03:24.998 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:03:24.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:03:24.998 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:03:24.998 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:03:24.999 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:03:24.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:03:24.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:03:24.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:03:24.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:03:25.002 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:03:25.486 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:03:25.519 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:03:25.521 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:03:25.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:03:25.522 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:03:25.536 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:03:25.536 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:03:25.536 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:03:25.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:03:25.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:03:25.963 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:03:26.000 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:03:26.000 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:03:26.000 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:03:26.002 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:03:26.442 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:03:26.921 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:03:27.002 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:03:27.002 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:03:27.002 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:03:27.004 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:03:27.401 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:03:27.881 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:03:28.003 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:03:28.003 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:03:28.003 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:03:28.005 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:03:28.358 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:03:28.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:03:28.581 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:03:28.582 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:03:28.582 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:03:28.582 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:03:28.583 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:03:28.583 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:03:28.583 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:03:28.583 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:03:28.583 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:03:28.583 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:03:28.583 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:03:28.584 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=764 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:03:28.584 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=764 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:03:33.586 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:03:33.586 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:03:33.587 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:03:33.588 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:03:33.588 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:03:33.589 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:03:33.604 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:03:33.605 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:03:33.605 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:03:33.605 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:03:33.605 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:03:33.609 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:03:33.609 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:03:33.609 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:03:33.609 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:03:33.610 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:03:33.610 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:03:33.610 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:03:33.610 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:03:33.612 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:03:33.612 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:03:33.612 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:03:33.612 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:03:33.612 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:03:33.612 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:03:33.612 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:03:33.612 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:03:33.614 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:03:33.614 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:03:33.614 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:03:33.614 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:03:33.614 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:03:33.614 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:03:33.614 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:03:33.614 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:03:33.617 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:03:33.617 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:03:33.617 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:03:33.617 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:03:33.617 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:03:33.617 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:03:33.617 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:03:33.617 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:03:33.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:03:33.617 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:03:33.617 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:03:33.617 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:03:33.617 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:03:33.617 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:03:33.617 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:03:33.617 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:03:33.617 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:03:33.617 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:03:33.617 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:03:33.618 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:03:33.618 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:03:33.618 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:03:33.618 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:03:33.618 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:03:33.618 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:03:33.618 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:03:33.618 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:03:33.618 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:03:33.618 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:03:33.618 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:03:33.618 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:03:33.618 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:03:33.618 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:03:33.618 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:03:33.618 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:03:33.618 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:03:33.618 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:03:33.618 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:03:33.618 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:03:33.618 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:03:33.618 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:03:33.618 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:03:33.618 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:03:33.618 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:03:33.618 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:03:33.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:03:33.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:03:33.622 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:03:34.107 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:03:34.143 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:03:34.145 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:03:34.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:03:34.147 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:03:34.167 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:03:34.167 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:03:34.167 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:03:34.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:03:34.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:03:34.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:03:34.188 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:03:34.188 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:03:34.189 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:03:34.189 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:03:34.190 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:03:34.190 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:03:34.190 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:03:34.190 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:03:34.190 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:03:34.190 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:03:34.191 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:03:39.194 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:03:39.195 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:03:39.195 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:03:39.195 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:03:39.195 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:03:39.195 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:03:39.198 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:03:39.198 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:03:39.198 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:03:39.198 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:03:39.198 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:03:39.200 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:03:39.200 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:03:39.200 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:03:39.200 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:03:39.201 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:03:39.201 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:03:39.201 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:03:39.201 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:03:39.202 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:03:39.202 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:03:39.203 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:03:39.203 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:03:39.203 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:03:39.203 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:03:39.203 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:03:39.203 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:03:39.204 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:03:39.204 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:03:39.204 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:03:39.204 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:03:39.205 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:03:39.205 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:03:39.205 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:03:39.205 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:03:39.207 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:03:39.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:03:39.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:03:39.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:03:39.207 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:03:39.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:03:39.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:03:39.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:03:39.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:03:39.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:03:39.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:03:39.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:03:39.207 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:03:39.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:03:39.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:03:39.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:03:39.207 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:03:39.207 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:03:39.207 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:03:39.207 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:03:39.208 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:03:39.208 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:03:39.208 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:03:39.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:03:39.208 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:03:39.208 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:03:39.208 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:03:39.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:03:39.208 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:03:39.208 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:03:39.208 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:03:39.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:03:39.208 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:03:39.208 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:03:39.208 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:03:39.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:03:39.208 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:03:39.208 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:03:39.208 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:03:39.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:03:39.209 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:03:39.209 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:03:39.209 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:03:39.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:03:39.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:03:39.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:03:39.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:03:39.212 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:03:39.697 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:03:39.730 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:03:39.733 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:03:39.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:03:39.735 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:03:39.752 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:03:39.752 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:03:39.752 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:03:39.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:03:39.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:03:40.166 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:03:40.210 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:03:40.210 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:03:40.211 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:03:40.212 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:03:40.635 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:03:41.114 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:03:41.211 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:03:41.212 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:03:41.212 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:03:41.214 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:03:41.592 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:03:42.070 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:03:42.213 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:03:42.213 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:03:42.213 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:03:42.214 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:03:42.551 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:03:42.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:03:42.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:03:42.777 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:03:42.777 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:03:42.777 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:03:42.777 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:03:42.779 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:03:42.779 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:03:42.779 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:03:42.779 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:03:42.779 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:03:42.779 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:03:42.779 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:03:42.779 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=765 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:03:42.779 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=765 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:03:42.779 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=765 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:03:42.779 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=765 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:03:42.779 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=765 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:03:42.779 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=765 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:03:47.780 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:03:47.780 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:03:47.782 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:03:47.784 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:03:47.784 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:03:47.785 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:03:47.800 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:03:47.802 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:03:47.802 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:03:47.802 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:03:47.802 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:03:47.807 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:03:47.807 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:03:47.807 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:03:47.807 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:03:47.807 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:03:47.807 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:03:47.808 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:03:47.808 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:03:47.810 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:03:47.810 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:03:47.810 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:03:47.810 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:03:47.810 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:03:47.810 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:03:47.810 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:03:47.810 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:03:47.813 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:03:47.813 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:03:47.813 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:03:47.813 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:03:47.813 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:03:47.813 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:03:47.813 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:03:47.814 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:03:47.817 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:03:47.817 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:03:47.817 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:03:47.817 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:03:47.817 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:03:47.817 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:03:47.817 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:03:47.817 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:03:47.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:03:47.817 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:03:47.817 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:03:47.817 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:03:47.817 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:03:47.817 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:03:47.817 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:03:47.817 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:03:47.817 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:03:47.817 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:03:47.817 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:03:47.817 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:03:47.817 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:03:47.817 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:03:47.817 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:03:47.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:03:47.817 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:03:47.818 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:03:47.818 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:03:47.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:03:47.818 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:03:47.818 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:03:47.818 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:03:47.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:03:47.818 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:03:47.818 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:03:47.818 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:03:47.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:03:47.818 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:03:47.818 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:03:47.818 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:03:47.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:03:47.818 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:03:47.818 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:03:47.818 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:03:47.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:03:47.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:03:47.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:03:47.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:03:47.822 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:03:48.306 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:03:48.339 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:03:48.341 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:03:48.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:03:48.343 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:03:48.370 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:03:48.370 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:03:48.371 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:03:48.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:03:48.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:03:48.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:03:48.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:03:48.401 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:03:48.402 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:03:48.402 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:03:48.402 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:03:48.404 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:03:48.404 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:03:48.404 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:03:48.404 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:03:48.404 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:03:48.404 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:03:48.404 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:03:48.404 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=125 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:03:48.404 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=125 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:03:48.404 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=125 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:03:48.404 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=125 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:03:48.404 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=125 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:03:48.404 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=125 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:03:48.404 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=125 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:03:48.404 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=125 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:03:53.405 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:03:53.405 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:03:53.405 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:03:53.405 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:03:53.405 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:03:53.405 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:03:53.412 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:03:53.412 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:03:53.412 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:03:53.412 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:03:53.412 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:03:53.414 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:03:53.414 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:03:53.414 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:03:53.414 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:03:53.414 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:03:53.414 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:03:53.414 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:03:53.414 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:03:53.416 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:03:53.416 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:03:53.416 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:03:53.416 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:03:53.416 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:03:53.416 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:03:53.416 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:03:53.416 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:03:53.417 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:03:53.417 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:03:53.417 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:03:53.417 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:03:53.417 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:03:53.417 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:03:53.417 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:03:53.417 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:03:53.419 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:03:53.419 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:03:53.419 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:03:53.419 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:03:53.419 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:03:53.419 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:03:53.419 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:03:53.419 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:03:53.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:03:53.419 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:03:53.419 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:03:53.419 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:03:53.419 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:03:53.419 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:03:53.419 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:03:53.419 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:03:53.420 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:03:53.420 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:03:53.420 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:03:53.420 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:03:53.420 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:03:53.420 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:03:53.420 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:03:53.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:03:53.420 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:03:53.420 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:03:53.420 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:03:53.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:03:53.420 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:03:53.420 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:03:53.420 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:03:53.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:03:53.420 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:03:53.420 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:03:53.420 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:03:53.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:03:53.420 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:03:53.420 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:03:53.420 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:03:53.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:03:53.420 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:03:53.420 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:03:53.420 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:03:53.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:03:53.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:03:53.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:03:53.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:03:53.424 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:03:53.908 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:03:53.946 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:03:53.948 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:03:53.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:03:53.951 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:03:53.967 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:03:53.967 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:03:53.967 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:03:53.967 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:03:53.973 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:03:53.973 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:03:53.973 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:03:53.973 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:03:53.974 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:03:53.974 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:03:53.974 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:03:53.974 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=116 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:03:53.974 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=116 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:03:58.971 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:03:58.971 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:03:58.973 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:03:58.974 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:03:58.975 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:03:58.975 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:03:58.983 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:03:58.984 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:03:58.984 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:03:58.985 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:03:58.985 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:03:58.987 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:03:58.987 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:03:58.987 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:03:58.987 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:03:58.988 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:03:58.988 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:03:58.988 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:03:58.988 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:03:58.989 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:03:58.989 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:03:58.989 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:03:58.989 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:03:58.989 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:03:58.989 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:03:58.989 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:03:58.989 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:03:58.991 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:03:58.991 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:03:58.991 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:03:58.991 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:03:58.991 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:03:58.992 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:03:58.992 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:03:58.992 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:03:58.993 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:03:58.993 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:03:58.993 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:03:58.993 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:03:58.994 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:03:58.994 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:03:58.994 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:03:58.994 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:03:58.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:03:58.994 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:03:58.994 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:03:58.994 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:03:58.994 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:03:58.994 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:03:58.994 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:03:58.994 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:03:58.994 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:03:58.994 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:03:58.994 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:03:58.994 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:03:58.994 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:03:58.994 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:03:58.994 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:03:58.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:03:58.995 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:03:58.995 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:03:58.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:03:58.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:03:58.995 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:03:58.995 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:03:58.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:03:58.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:03:58.995 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:03:58.995 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:03:58.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:03:58.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:03:58.995 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:03:58.995 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:03:58.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:03:58.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:03:58.995 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:03:58.995 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:03:58.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:03:58.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:03:58.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:03:58.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:03:58.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:03:58.999 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:03:59.483 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:03:59.515 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:03:59.515 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:03:59.516 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:03:59.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:03:59.523 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:03:59.523 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:03:59.523 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:03:59.523 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:03:59.528 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:03:59.528 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:03:59.528 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:03:59.528 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:03:59.528 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:03:59.528 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:03:59.528 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:03:59.528 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=112 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:03:59.528 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=112 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:03:59.528 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=112 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:03:59.528 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=112 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:03:59.528 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=113 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:03:59.528 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=113 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:03:59.528 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=113 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:03:59.528 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=113 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:03:59.528 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=113 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:03:59.528 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=113 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:03:59.528 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=113 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:03:59.528 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=113 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:04:04.528 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:04:04.528 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:04:04.530 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:04:04.530 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:04:04.530 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:04:04.531 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:04:04.540 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:04:04.541 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:04:04.541 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:04:04.541 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:04:04.541 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:04:04.544 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:04:04.544 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:04:04.544 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:04:04.544 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:04:04.545 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:04:04.545 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:04:04.545 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:04:04.545 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:04:04.546 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:04:04.546 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:04:04.547 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:04:04.547 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:04:04.547 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:04:04.547 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:04:04.547 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:04:04.547 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:04:04.549 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:04:04.549 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:04:04.549 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:04:04.549 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:04:04.549 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:04:04.549 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:04:04.549 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:04:04.549 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:04:04.551 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:04:04.552 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:04:04.552 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:04:04.552 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:04:04.552 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:04:04.552 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:04:04.552 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:04:04.552 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:04:04.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:04:04.552 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:04:04.552 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:04:04.552 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:04:04.552 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:04:04.552 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:04:04.552 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:04:04.552 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:04:04.553 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:04:04.553 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:04:04.553 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:04:04.553 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:04:04.553 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:04:04.553 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:04:04.553 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:04:04.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:04:04.553 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:04:04.553 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:04:04.553 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:04:04.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:04:04.553 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:04:04.553 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:04:04.553 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:04:04.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:04:04.553 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:04:04.553 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:04:04.553 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:04:04.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:04:04.553 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:04:04.553 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:04:04.553 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:04:04.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:04:04.553 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:04:04.553 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:04:04.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:04:04.553 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:04:04.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:04:04.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:04:04.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:04:04.557 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:04:05.042 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:04:05.075 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:04:05.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:04:05.076 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:04:05.077 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:04:05.086 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:04:05.086 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:04:05.086 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:04:05.086 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:04:05.090 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:04:05.090 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:04:05.090 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:04:05.090 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:04:05.090 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:04:05.090 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:04:05.090 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:04:05.090 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=113 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:04:05.090 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=113 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:04:10.091 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:04:10.091 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:04:10.093 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:04:10.093 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:04:10.094 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:04:10.094 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:04:10.102 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:04:10.102 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:04:10.102 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:04:10.103 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:04:10.103 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:04:10.107 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:04:10.107 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:04:10.107 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:04:10.107 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:04:10.108 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:04:10.108 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:04:10.108 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:04:10.108 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:04:10.111 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:04:10.111 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:04:10.111 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:04:10.111 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:04:10.111 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:04:10.111 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:04:10.111 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:04:10.111 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:04:10.114 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:04:10.114 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:04:10.114 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:04:10.114 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:04:10.114 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:04:10.114 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:04:10.114 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:04:10.114 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:04:10.117 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:04:10.117 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:04:10.117 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:04:10.117 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:04:10.117 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:04:10.118 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:04:10.118 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:04:10.118 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:04:10.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:04:10.118 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:04:10.118 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:04:10.118 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:04:10.118 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:04:10.118 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:04:10.118 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:04:10.118 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:04:10.118 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:04:10.118 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:04:10.118 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:04:10.118 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:04:10.118 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:04:10.119 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:04:10.119 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:04:10.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:04:10.119 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:04:10.119 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:04:10.119 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:04:10.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:04:10.119 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:04:10.119 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:04:10.119 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:04:10.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:04:10.119 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:04:10.119 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:04:10.119 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:04:10.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:04:10.119 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:04:10.119 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:04:10.119 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:04:10.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:04:10.120 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:04:10.120 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:04:10.120 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:04:10.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:04:10.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:04:10.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:04:10.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:04:10.123 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:04:10.607 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:04:10.646 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:04:10.648 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:04:10.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:04:10.649 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:04:10.660 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:04:10.661 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:04:10.661 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:04:10.661 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:04:10.663 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:04:10.663 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:04:10.663 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:04:10.663 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:04:10.663 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:04:10.663 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:04:10.663 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:04:10.663 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=115 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:04:10.663 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=115 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:04:10.663 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=115 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:04:10.663 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=115 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:04:10.663 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=115 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:04:10.663 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=115 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:04:10.663 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=116 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:04:10.663 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=116 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:04:10.663 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=116 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:04:10.663 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=116 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:04:10.663 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=116 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:04:10.663 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=116 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:04:10.663 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=116 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:04:10.663 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=116 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:04:15.665 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:04:15.665 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:04:15.667 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:04:15.667 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:04:15.667 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:04:15.668 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:04:15.677 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:04:15.678 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:04:15.678 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:04:15.678 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:04:15.678 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:04:15.680 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:04:15.680 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:04:15.681 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:04:15.681 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:04:15.681 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:04:15.681 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:04:15.681 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:04:15.681 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:04:15.683 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:04:15.683 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:04:15.683 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:04:15.683 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:04:15.684 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:04:15.684 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:04:15.684 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:04:15.684 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:04:15.685 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:04:15.685 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:04:15.685 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:04:15.685 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:04:15.685 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:04:15.685 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:04:15.685 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:04:15.685 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:04:15.687 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:04:15.687 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:04:15.687 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:04:15.687 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:04:15.687 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:04:15.688 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:04:15.688 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:04:15.688 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:04:15.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:04:15.688 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:04:15.688 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:04:15.688 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:04:15.688 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:04:15.688 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:04:15.688 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:04:15.688 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:04:15.688 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:04:15.688 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:04:15.688 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:04:15.688 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:04:15.689 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:04:15.689 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:04:15.689 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:04:15.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:04:15.689 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:04:15.689 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:04:15.689 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:04:15.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:04:15.689 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:04:15.689 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:04:15.689 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:04:15.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:04:15.689 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:04:15.689 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:04:15.689 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:04:15.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:04:15.689 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:04:15.689 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:04:15.689 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:04:15.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:04:15.690 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:04:15.690 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:04:15.690 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:04:15.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:04:15.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:04:15.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:04:15.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:04:15.693 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:04:16.178 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:04:16.207 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:04:16.208 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:04:16.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:04:16.209 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:04:16.656 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:04:16.692 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:04:16.692 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:04:16.693 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:04:16.693 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:04:17.134 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:04:17.614 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:04:17.693 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:04:17.694 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:04:17.694 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:04:17.695 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:04:18.095 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:04:18.573 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:04:18.695 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:04:18.695 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:04:18.695 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:04:18.695 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:04:19.051 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:04:19.217 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:04:19.217 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:04:19.218 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:04:19.219 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:04:19.219 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:04:19.220 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:04:19.221 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:04:19.221 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:04:19.529 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:04:19.696 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:04:19.696 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:04:19.696 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:04:19.696 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:04:20.006 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:04:20.484 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 02:04:20.697 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:04:20.697 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:04:20.697 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:04:20.697 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:04:20.961 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 02:04:21.440 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 02:04:21.565 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:04:21.565 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:04:21.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:04:21.575 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:04:21.575 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:04:21.575 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:04:21.575 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:04:21.576 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:04:21.576 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:04:21.576 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:04:21.576 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:04:21.576 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:04:21.576 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:04:21.576 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:04:26.579 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:04:26.579 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:04:26.581 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:04:26.581 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:04:26.581 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:04:26.582 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:04:26.591 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:04:26.592 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:04:26.592 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:04:26.593 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:04:26.593 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:04:26.595 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:04:26.595 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:04:26.595 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:04:26.595 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:04:26.596 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:04:26.596 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:04:26.596 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:04:26.596 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:04:26.597 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:04:26.598 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:04:26.598 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:04:26.598 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:04:26.598 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:04:26.598 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:04:26.598 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:04:26.598 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:04:26.599 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:04:26.599 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:04:26.599 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:04:26.600 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:04:26.600 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:04:26.600 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:04:26.600 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:04:26.600 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:04:26.602 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:04:26.602 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:04:26.602 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:04:26.602 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:04:26.602 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:04:26.602 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:04:26.602 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:04:26.602 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:04:26.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:04:26.602 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:04:26.602 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:04:26.602 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:04:26.602 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:04:26.602 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:04:26.602 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:04:26.602 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:04:26.603 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:04:26.603 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:04:26.603 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:04:26.603 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:04:26.603 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:04:26.603 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:04:26.603 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:04:26.603 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:04:26.603 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:04:26.603 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:04:26.603 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:04:26.603 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:04:26.603 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:04:26.603 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:04:26.603 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:04:26.603 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:04:26.603 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:04:26.603 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:04:26.603 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:04:26.603 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:04:26.603 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:04:26.603 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:04:26.603 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:04:26.603 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:04:26.603 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:04:26.603 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:04:26.603 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:04:26.603 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:04:26.603 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:04:26.603 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:04:26.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:04:26.607 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:04:27.092 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:04:27.124 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:04:27.126 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:04:27.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:04:27.128 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:04:27.144 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:04:27.144 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:04:27.144 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:04:27.166 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:04:27.166 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:04:27.166 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:04:27.167 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:04:27.169 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:04:27.169 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:04:27.169 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:04:27.169 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:04:27.169 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:04:27.169 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:04:27.169 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:04:32.169 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:04:32.169 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:04:32.170 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:04:32.171 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:04:32.171 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:04:32.172 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:04:32.180 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:04:32.180 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:04:32.180 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:04:32.181 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:04:32.181 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:04:32.183 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:04:32.183 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:04:32.183 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:04:32.183 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:04:32.183 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:04:32.184 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:04:32.184 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:04:32.184 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:04:32.185 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:04:32.185 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:04:32.186 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:04:32.186 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:04:32.186 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:04:32.186 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:04:32.186 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:04:32.186 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:04:32.187 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:04:32.187 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:04:32.188 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:04:32.188 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:04:32.188 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:04:32.188 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:04:32.188 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:04:32.188 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:04:32.190 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:04:32.190 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:04:32.190 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:04:32.190 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:04:32.190 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:04:32.190 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:04:32.190 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:04:32.190 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:04:32.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:04:32.190 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:04:32.190 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:04:32.190 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:04:32.190 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:04:32.191 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:04:32.191 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:04:32.191 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:04:32.191 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:04:32.191 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:04:32.191 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:04:32.191 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:04:32.191 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:04:32.191 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:04:32.191 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:04:32.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:04:32.191 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:04:32.191 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:04:32.191 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:04:32.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:04:32.191 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:04:32.191 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:04:32.191 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:04:32.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:04:32.191 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:04:32.191 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:04:32.191 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:04:32.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:04:32.192 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:04:32.192 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:04:32.192 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:04:32.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:04:32.192 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:04:32.192 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:04:32.192 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:04:32.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:04:32.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:04:32.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:04:32.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:04:32.195 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:04:32.679 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:04:32.713 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:04:32.714 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:04:32.715 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:04:32.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:04:32.730 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:04:32.730 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:04:32.730 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:04:32.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:04:32.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:04:32.754 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:04:32.754 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:04:32.754 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:04:32.755 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:04:32.756 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:04:32.756 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:04:32.756 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:04:32.756 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:04:32.756 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:04:32.756 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:04:32.756 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:04:37.758 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:04:37.758 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:04:37.761 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:04:37.761 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:04:37.761 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:04:37.761 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:04:37.770 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:04:37.771 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:04:37.771 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:04:37.772 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:04:37.772 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:04:37.776 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:04:37.776 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:04:37.777 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:04:37.777 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:04:37.777 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:04:37.777 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:04:37.778 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:04:37.778 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:04:37.779 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:04:37.780 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:04:37.780 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:04:37.780 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:04:37.780 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:04:37.780 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:04:37.781 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:04:37.781 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:04:37.782 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:04:37.782 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:04:37.783 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:04:37.783 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:04:37.783 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:04:37.783 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:04:37.783 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:04:37.783 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:04:37.786 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:04:37.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:04:37.786 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:04:37.786 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:04:37.786 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:04:37.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:04:37.786 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:04:37.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:04:37.786 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:04:37.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:04:37.786 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:04:37.786 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:04:37.786 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:04:37.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:04:37.786 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:04:37.786 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:04:37.786 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:04:37.786 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:04:37.787 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:04:37.787 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:04:37.787 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:04:37.787 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:04:37.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:04:37.787 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:04:37.787 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:04:37.787 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:04:37.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:04:37.787 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:04:37.787 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:04:37.787 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:04:37.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:04:37.787 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:04:37.787 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:04:37.787 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:04:37.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:04:37.787 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:04:37.787 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:04:37.787 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:04:37.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:04:37.787 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:04:37.787 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:04:37.788 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:04:37.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:04:37.788 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:04:37.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:04:37.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:04:37.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:04:37.791 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:04:38.274 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:04:38.313 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:04:38.314 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:04:38.315 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:04:38.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:04:38.333 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:04:38.334 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:04:38.334 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:04:38.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:04:38.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:04:38.347 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:04:38.355 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:04:38.355 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:04:38.355 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:04:38.355 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:04:38.357 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:04:38.357 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:04:38.357 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:04:38.357 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:04:38.357 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:04:38.357 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:04:38.357 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:04:38.357 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=121 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:04:38.357 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=121 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:04:43.363 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:04:43.364 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:04:43.364 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:04:43.364 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:04:43.364 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:04:43.364 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:04:43.372 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:04:43.373 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:04:43.373 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:04:43.373 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:04:43.374 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:04:43.377 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:04:43.377 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:04:43.377 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:04:43.378 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:04:43.378 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:04:43.378 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:04:43.379 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:04:43.379 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:04:43.381 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:04:43.381 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:04:43.381 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:04:43.381 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:04:43.382 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:04:43.382 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:04:43.382 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:04:43.382 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:04:43.384 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:04:43.384 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:04:43.385 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:04:43.385 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:04:43.385 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:04:43.385 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:04:43.385 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:04:43.385 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:04:43.388 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:04:43.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:04:43.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:04:43.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:04:43.389 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:04:43.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:04:43.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:04:43.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:04:43.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:04:43.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:04:43.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:04:43.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:04:43.389 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:04:43.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:04:43.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:04:43.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:04:43.389 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:04:43.389 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:04:43.389 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:04:43.390 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:04:43.390 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:04:43.390 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:04:43.390 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:04:43.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:04:43.390 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:04:43.390 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:04:43.390 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:04:43.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:04:43.390 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:04:43.390 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:04:43.390 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:04:43.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:04:43.390 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:04:43.390 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:04:43.390 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:04:43.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:04:43.390 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:04:43.390 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:04:43.391 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:04:43.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:04:43.391 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:04:43.391 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:04:43.391 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:04:43.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:04:43.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:04:43.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:04:43.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:04:43.394 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:04:43.879 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:04:43.914 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:04:43.915 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:04:43.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:04:43.916 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:04:43.927 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:04:43.927 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:04:43.927 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:04:43.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:04:43.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:04:43.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:04:43.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:04:43.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:04:43.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:04:43.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:04:43.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:04:43.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:04:43.966 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:04:43.967 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:04:43.967 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:04:43.967 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:04:43.975 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:04:43.976 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:04:43.976 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:04:43.976 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:04:43.976 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:04:43.976 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:04:43.976 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:04:43.976 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=123 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:04:43.976 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=123 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:04:43.976 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=123 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:04:43.976 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=123 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:04:43.976 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=123 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:04:43.977 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=124 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:04:43.977 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=124 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:04:48.969 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:04:48.969 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:04:48.972 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:04:48.974 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:04:48.976 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:04:48.981 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:04:48.990 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:04:48.990 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:04:48.990 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:04:48.990 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:04:48.990 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:04:48.991 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:04:48.992 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:04:48.992 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:04:48.992 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:04:48.992 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:04:48.992 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:04:48.992 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:04:48.992 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:04:48.993 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:04:48.993 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:04:48.993 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:04:48.993 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:04:48.993 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:04:48.993 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:04:48.993 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:04:48.993 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:04:48.994 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:04:48.995 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:04:48.995 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:04:48.995 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:04:48.995 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:04:48.995 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:04:48.995 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:04:48.995 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:04:48.997 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:04:48.997 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:04:48.997 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:04:48.997 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:04:48.997 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:04:48.997 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:04:48.997 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:04:48.997 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:04:48.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:04:48.997 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:04:48.997 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:04:48.997 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:04:48.997 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:04:48.998 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:04:48.998 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:04:48.998 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:04:48.998 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:04:48.998 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:04:48.998 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:04:48.998 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:04:48.998 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:04:48.998 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:04:48.998 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:04:48.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:04:48.998 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:04:48.998 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:04:48.998 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:04:48.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:04:48.998 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:04:48.998 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:04:48.998 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:04:48.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:04:48.998 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:04:48.998 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:04:48.998 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:04:48.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:04:48.998 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:04:48.998 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:04:48.998 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:04:48.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:04:48.999 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:04:48.999 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:04:48.999 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:04:48.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:04:48.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:04:48.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:04:48.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:04:49.002 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:04:49.486 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:04:49.521 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:04:49.523 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:04:49.526 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:04:49.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:04:49.528 [DEBUG] fake_trx.py:377 (BTS@172.18.122.20:5700) Recv FAKE_TRXC_DELAY cmd
2026-01-09 02:04:49.528 [INFO] fake_trx.py:380 (BTS@172.18.122.20:5700) Artificial TRXC delay set to 200
2026-01-09 02:04:49.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD FAKE_TRXC_DELAY
2026-01-09 02:04:49.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:04:49.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:04:49.965 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:04:50.162 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:04:50.162 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:04:50.162 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:04:50.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:04:50.363 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:04:50.445 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:04:50.926 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:04:50.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:04:51.168 [DEBUG] fake_trx.py:377 (BTS@172.18.122.20:5700) Recv FAKE_TRXC_DELAY cmd
2026-01-09 02:04:51.168 [INFO] fake_trx.py:380 (BTS@172.18.122.20:5700) Artificial TRXC delay set to 0
2026-01-09 02:04:51.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD FAKE_TRXC_DELAY
2026-01-09 02:04:51.169 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:04:51.169 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:04:51.169 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:04:51.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:04:51.174 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:04:51.174 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:04:51.174 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:04:51.174 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:04:51.176 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:04:51.176 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:04:51.176 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:04:51.176 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:04:51.176 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:04:51.176 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:04:51.176 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:04:51.176 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=464 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:04:51.176 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=464 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:04:51.176 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=464 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:04:51.176 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=464 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:04:51.176 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=464 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:04:51.176 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=464 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:04:51.176 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=464 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:04:56.179 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:04:56.180 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:04:56.182 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:04:56.182 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:04:56.183 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:04:56.184 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:04:56.188 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:04:56.189 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:04:56.189 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:04:56.189 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:04:56.189 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:04:56.191 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:04:56.191 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:04:56.191 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:04:56.191 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:04:56.191 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:04:56.191 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:04:56.192 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:04:56.192 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:04:56.193 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:04:56.193 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:04:56.193 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:04:56.193 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:04:56.193 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:04:56.193 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:04:56.194 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:04:56.194 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:04:56.195 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:04:56.195 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:04:56.195 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:04:56.195 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:04:56.195 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:04:56.195 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:04:56.195 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:04:56.195 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:04:56.197 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:04:56.197 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:04:56.197 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:04:56.197 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:04:56.197 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:04:56.197 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:04:56.198 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:04:56.198 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:04:56.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:04:56.198 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:04:56.198 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:04:56.198 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:04:56.198 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:04:56.198 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:04:56.198 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:04:56.198 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:04:56.198 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:04:56.198 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:04:56.198 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:04:56.198 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:04:56.198 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:04:56.198 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:04:56.198 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:04:56.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:04:56.198 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:04:56.198 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:04:56.198 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:04:56.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:04:56.199 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:04:56.199 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:04:56.199 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:04:56.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:04:56.199 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:04:56.199 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:04:56.199 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:04:56.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:04:56.199 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:04:56.199 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:04:56.199 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:04:56.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:04:56.199 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:04:56.199 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:04:56.199 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:04:56.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:04:56.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:04:56.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:04:56.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:04:56.203 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:04:56.687 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:04:56.720 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:04:56.722 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:04:56.725 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:04:56.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:04:56.727 [DEBUG] fake_trx.py:377 (BTS@172.18.122.20:5700) Recv FAKE_TRXC_DELAY cmd
2026-01-09 02:04:56.727 [INFO] fake_trx.py:380 (BTS@172.18.122.20:5700) Artificial TRXC delay set to 200
2026-01-09 02:04:56.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD FAKE_TRXC_DELAY
2026-01-09 02:04:56.954 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:04:57.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:04:57.165 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:04:57.361 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:04:57.361 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:04:57.361 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:04:57.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:04:57.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:04:57.643 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:04:57.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:04:57.963 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:04:58.122 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:04:58.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:04:58.365 [DEBUG] fake_trx.py:377 (BTS@172.18.122.20:5700) Recv FAKE_TRXC_DELAY cmd
2026-01-09 02:04:58.365 [INFO] fake_trx.py:380 (BTS@172.18.122.20:5700) Artificial TRXC delay set to 0
2026-01-09 02:04:58.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD FAKE_TRXC_DELAY
2026-01-09 02:04:58.365 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:04:58.365 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:04:58.365 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:04:58.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:04:58.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:04:58.366 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:04:58.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:04:58.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:04:58.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:04:58.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:04:58.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:04:58.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:04:58.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:04:58.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:04:58.372 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:04:58.372 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:04:58.372 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:04:58.372 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:04:58.373 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:04:58.373 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:04:58.373 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:04:58.373 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:04:58.373 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:04:58.374 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:04:58.374 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:04:58.374 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=464 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:04:58.374 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=464 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:04:58.374 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=464 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:05:03.376 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:05:03.377 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:05:03.378 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:05:03.379 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:05:03.379 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:05:03.380 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:05:03.389 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:05:03.390 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:05:03.390 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:05:03.390 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:05:03.391 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:05:03.393 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:05:03.394 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:05:03.394 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:05:03.394 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:05:03.394 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:05:03.394 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:05:03.394 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:05:03.394 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:05:03.396 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:05:03.396 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:05:03.397 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:05:03.397 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:05:03.397 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:05:03.397 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:05:03.397 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:05:03.397 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:05:03.399 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:05:03.399 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:05:03.399 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:05:03.399 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:05:03.399 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:05:03.399 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:05:03.399 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:05:03.399 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:05:03.402 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:05:03.402 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:05:03.402 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:05:03.402 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:05:03.402 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:05:03.402 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:05:03.402 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:05:03.402 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:05:03.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:05:03.402 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:05:03.402 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:05:03.402 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:05:03.402 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:05:03.402 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:05:03.402 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:05:03.402 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:05:03.402 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:05:03.402 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:05:03.402 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:05:03.402 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:05:03.403 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:05:03.403 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:05:03.403 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:05:03.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:05:03.403 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:05:03.403 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:05:03.403 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:05:03.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:05:03.403 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:05:03.403 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:05:03.403 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:05:03.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:05:03.403 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:05:03.403 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:05:03.403 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:05:03.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:05:03.403 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:05:03.403 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:05:03.403 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:05:03.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:05:03.403 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:05:03.403 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:05:03.403 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:05:03.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:05:03.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:05:03.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:05:03.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:05:03.407 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:05:03.891 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:05:03.926 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:05:03.928 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:05:03.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:05:03.930 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:05:03.956 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:05:03.957 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:05:03.957 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:05:03.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:05:03.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:05:03.979 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:05:03.980 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:05:03.980 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:05:03.980 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:05:03.989 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:05:03.989 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:05:03.989 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:05:03.989 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:05:03.989 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:05:03.989 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:05:03.990 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:05:03.990 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=122 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:05:03.991 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=122 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:05:08.984 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:05:08.984 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:05:08.986 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:05:08.988 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:05:08.988 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:05:08.989 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:05:08.997 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:05:08.998 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:05:08.998 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:05:08.999 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:05:08.999 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:05:09.001 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:05:09.001 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:05:09.001 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:05:09.001 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:05:09.002 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:05:09.002 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:05:09.002 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:05:09.002 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:05:09.003 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:05:09.003 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:05:09.004 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:05:09.004 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:05:09.004 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:05:09.004 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:05:09.004 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:05:09.004 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:05:09.005 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:05:09.005 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:05:09.006 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:05:09.006 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:05:09.006 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:05:09.006 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:05:09.006 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:05:09.006 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:05:09.008 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:05:09.008 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:05:09.008 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:05:09.008 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:05:09.008 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:05:09.008 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:05:09.008 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:05:09.008 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:05:09.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:05:09.008 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:05:09.008 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:05:09.008 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:05:09.009 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:05:09.009 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:05:09.009 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:05:09.009 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:05:09.009 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:05:09.009 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:05:09.009 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:05:09.009 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:05:09.009 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:05:09.009 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:05:09.009 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:05:09.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:05:09.009 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:05:09.009 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:05:09.009 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:05:09.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:05:09.009 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:05:09.009 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:05:09.009 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:05:09.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:05:09.009 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:05:09.009 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:05:09.009 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:05:09.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:05:09.009 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:05:09.009 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:05:09.010 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:05:09.010 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:05:09.010 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:05:09.010 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:05:09.010 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:05:09.010 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:05:09.010 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:05:09.010 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:05:09.010 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:05:09.013 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:05:09.496 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:05:09.524 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:05:09.524 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:05:09.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:05:09.525 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:05:09.532 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:05:09.532 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:05:09.532 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:05:09.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:05:09.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:05:09.557 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:05:09.557 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:05:09.557 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:05:09.557 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:05:09.559 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:05:09.559 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:05:09.559 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:05:09.559 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:05:09.559 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:05:09.559 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:05:09.559 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:05:14.561 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:05:14.561 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:05:14.563 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:05:14.564 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:05:14.564 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:05:14.565 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:05:14.576 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:05:14.576 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:05:14.576 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:05:14.576 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:05:14.576 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:05:14.579 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:05:14.580 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:05:14.580 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:05:14.580 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:05:14.580 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:05:14.580 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:05:14.580 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:05:14.580 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:05:14.582 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:05:14.582 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:05:14.582 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:05:14.582 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:05:14.582 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:05:14.582 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:05:14.582 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:05:14.582 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:05:14.584 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:05:14.584 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:05:14.584 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:05:14.584 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:05:14.584 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:05:14.584 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:05:14.584 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:05:14.584 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:05:14.587 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:05:14.587 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:05:14.587 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:05:14.587 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:05:14.587 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:05:14.587 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:05:14.587 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:05:14.587 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:05:14.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:05:14.587 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:05:14.587 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:05:14.587 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:05:14.587 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:05:14.587 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:05:14.587 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:05:14.588 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:05:14.588 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:05:14.588 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:05:14.588 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:05:14.588 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:05:14.588 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:05:14.588 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:05:14.588 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:05:14.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:05:14.588 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:05:14.588 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:05:14.588 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:05:14.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:05:14.588 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:05:14.588 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:05:14.588 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:05:14.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:05:14.588 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:05:14.588 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:05:14.588 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:05:14.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:05:14.588 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:05:14.588 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:05:14.588 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:05:14.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:05:14.588 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:05:14.588 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:05:14.589 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:05:14.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:05:14.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:05:14.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:05:14.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:05:14.592 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:05:15.076 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:05:15.115 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:05:15.118 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:05:15.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:05:15.120 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:05:15.143 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:05:15.143 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:05:15.144 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:05:15.149 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:15.149 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:05:15.150 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:05:15.150 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:05:15.150 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:05:15.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:05:15.180 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:05:15.180 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:05:15.180 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:15.180 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:15.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:05:15.239 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:15.240 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:05:15.241 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:05:15.258 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:05:15.258 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:05:15.258 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:05:15.260 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:15.260 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:05:15.260 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:05:15.260 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:05:15.260 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:05:15.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:05:15.320 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:05:15.320 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:05:15.320 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:15.320 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:15.546 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:05:15.590 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:05:15.591 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:05:15.592 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:05:15.595 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:05:16.016 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:05:16.486 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:05:16.591 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:05:16.592 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:05:16.593 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:05:16.595 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:05:16.965 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:05:17.443 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:05:17.592 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:05:17.593 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:05:17.593 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:05:17.596 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:05:17.921 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:05:18.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:05:18.327 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:18.328 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:05:18.329 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:05:18.348 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:05:18.348 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:05:18.349 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:05:18.349 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:18.349 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:05:18.349 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:05:18.349 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:05:18.349 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:05:18.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:05:18.395 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:05:18.395 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:05:18.395 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:18.395 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:18.398 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:05:18.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:05:18.444 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:18.445 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:05:18.445 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:05:18.462 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:05:18.462 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:05:18.462 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:05:18.464 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:18.464 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:05:18.464 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:05:18.464 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:05:18.464 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:05:18.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:05:18.497 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:05:18.498 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:05:18.498 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:18.498 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:18.593 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:05:18.594 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:05:18.594 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:05:18.597 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:05:18.876 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:05:19.354 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 02:05:19.594 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:05:19.595 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:05:19.595 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:05:19.598 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:05:19.832 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 02:05:20.310 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 02:05:20.789 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 02:05:21.267 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 02:05:21.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:05:21.505 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:21.506 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:05:21.506 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:05:21.523 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:05:21.523 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:05:21.523 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:05:21.524 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:21.524 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:05:21.524 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:05:21.524 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:05:21.524 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:05:21.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:05:21.555 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:05:21.555 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:05:21.556 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:21.556 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:21.745 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 02:05:22.223 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 02:05:22.702 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 02:05:23.178 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 02:05:23.656 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 02:05:24.133 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 02:05:24.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:05:24.563 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:24.564 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:05:24.564 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:05:24.583 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:05:24.583 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:05:24.583 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:05:24.584 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:24.584 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:05:24.584 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:05:24.584 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:05:24.585 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:05:24.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:05:24.607 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:05:24.608 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:05:24.608 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:24.608 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:24.609 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 02:05:24.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:05:24.651 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:24.652 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:05:24.652 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:05:24.663 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:05:24.664 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:05:24.664 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:05:24.665 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:24.665 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:05:24.665 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:05:24.665 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:05:24.665 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:05:24.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:05:24.709 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:05:24.709 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:05:24.709 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:24.709 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:25.079 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 02:05:25.550 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 02:05:25.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:05:25.754 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:25.755 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:05:25.755 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:05:25.774 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:05:25.774 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:05:25.774 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:05:25.775 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:25.776 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:05:25.776 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:05:25.776 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:05:25.776 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:05:25.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:05:25.780 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:05:25.780 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:05:25.780 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:25.780 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:25.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:05:25.851 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:25.852 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:05:25.853 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:05:25.871 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:05:25.871 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:05:25.871 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:05:25.873 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:25.873 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:05:25.873 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:05:25.873 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:05:25.873 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:05:25.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:05:25.928 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:05:25.928 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:05:25.928 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:25.928 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:26.028 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 02:05:26.506 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 02:05:26.984 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 02:05:27.463 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-09 02:05:27.941 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-09 02:05:28.419 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-09 02:05:28.897 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-09 02:05:28.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:05:28.935 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:28.936 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:05:28.936 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:05:28.955 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:05:28.955 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:05:28.955 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:05:28.957 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:28.957 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:05:28.957 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:05:28.957 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:05:28.957 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:05:28.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:05:28.996 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:05:28.997 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:05:28.997 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:28.998 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:29.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:05:29.067 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:29.069 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:05:29.069 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:05:29.089 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:05:29.089 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:05:29.089 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:05:29.091 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:29.091 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:05:29.091 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:05:29.091 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:05:29.091 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:05:29.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:05:29.137 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:05:29.137 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:05:29.137 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:29.138 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:29.374 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-09 02:05:29.853 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-09 02:05:30.331 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-09 02:05:30.810 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-09 02:05:31.288 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-09 02:05:31.767 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-09 02:05:32.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:05:32.143 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:32.145 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:05:32.145 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:05:32.165 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:05:32.165 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:05:32.165 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:05:32.166 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:32.166 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:05:32.166 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:05:32.166 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:05:32.166 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:05:32.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:05:32.190 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:05:32.190 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:05:32.191 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:32.191 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:32.244 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-09 02:05:32.722 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-09 02:05:33.201 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-09 02:05:33.679 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-09 02:05:34.158 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-09 02:05:34.636 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-09 02:05:35.115 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-09 02:05:35.194 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:05:35.197 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:35.199 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:05:35.199 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:05:35.218 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:05:35.218 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:05:35.218 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:05:35.219 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:35.220 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:05:35.220 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:05:35.220 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:05:35.220 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:05:35.255 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:05:35.260 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:05:35.260 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:05:35.261 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:35.261 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:35.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:05:35.322 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:35.324 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:05:35.324 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:05:35.343 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:05:35.343 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:05:35.343 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:05:35.344 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:35.344 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:05:35.344 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:05:35.344 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:05:35.344 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:05:35.347 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:05:35.348 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:05:35.348 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:05:35.348 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:35.348 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:35.588 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-01-09 02:05:36.058 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-01-09 02:05:36.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:05:36.228 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:36.229 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:05:36.229 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:05:36.246 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:05:36.246 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:05:36.247 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:05:36.248 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:36.248 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:05:36.248 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:05:36.248 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:05:36.248 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:05:36.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:05:36.295 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:05:36.295 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:05:36.295 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:36.295 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:36.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:05:36.522 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:36.524 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:05:36.524 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:05:36.531 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-01-09 02:05:36.544 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:05:36.544 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:05:36.544 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:05:36.546 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:36.546 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:05:36.546 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:05:36.546 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:05:36.546 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:05:36.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:05:36.581 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:05:36.582 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:05:36.582 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:36.582 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:37.000 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-01-09 02:05:37.472 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-01-09 02:05:37.951 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-01-09 02:05:38.428 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-01-09 02:05:38.907 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-01-09 02:05:39.385 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-01-09 02:05:39.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:05:39.585 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:39.586 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:05:39.586 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:05:39.594 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:05:39.594 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:05:39.594 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:05:39.595 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:39.595 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:05:39.595 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:05:39.595 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:05:39.595 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:05:39.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:05:39.621 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:05:39.621 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:05:39.621 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:39.621 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:39.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:05:39.847 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:39.848 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:05:39.848 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:05:39.854 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-01-09 02:05:39.858 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:05:39.858 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:05:39.858 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:05:39.860 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:39.860 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:05:39.860 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:05:39.860 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:05:39.860 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:05:39.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:05:39.897 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:05:39.897 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:05:39.897 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:39.897 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:40.322 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-01-09 02:05:40.794 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-01-09 02:05:41.262 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-01-09 02:05:41.737 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-01-09 02:05:42.216 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-01-09 02:05:42.693 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-01-09 02:05:42.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:05:42.903 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:42.905 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:05:42.905 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:05:42.924 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:05:42.924 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:05:42.924 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:05:42.925 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:42.925 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:05:42.925 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:05:42.925 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:05:42.925 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:05:42.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:05:42.980 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:05:42.981 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:05:42.981 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:42.981 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:43.166 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-01-09 02:05:43.639 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-01-09 02:05:44.117 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-01-09 02:05:44.596 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-01-09 02:05:45.073 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-01-09 02:05:45.551 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-01-09 02:05:45.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:05:45.988 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:45.990 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:05:45.990 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:05:46.009 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:05:46.009 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:05:46.009 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:05:46.010 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:46.010 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:05:46.010 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:05:46.011 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:05:46.011 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:05:46.019 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:05:46.020 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:05:46.020 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:05:46.020 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:46.020 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:46.028 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-01-09 02:05:46.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:05:46.257 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:46.259 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:05:46.259 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:05:46.278 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:05:46.278 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:05:46.279 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:05:46.280 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:46.280 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:05:46.280 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:05:46.280 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:05:46.280 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:05:46.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:05:46.319 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:05:46.319 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:05:46.319 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:46.319 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:46.497 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-01-09 02:05:46.966 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-01-09 02:05:47.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:05:47.007 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:47.008 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:05:47.009 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:05:47.029 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:05:47.029 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:05:47.029 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:05:47.031 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:47.031 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:05:47.031 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:05:47.031 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:05:47.031 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:05:47.060 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:05:47.065 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:05:47.065 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:05:47.066 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:47.066 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:47.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:05:47.122 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:47.124 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:05:47.124 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:05:47.143 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:05:47.143 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:05:47.143 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:05:47.144 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:47.145 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:05:47.145 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:05:47.145 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:05:47.145 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:05:47.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:05:47.147 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:05:47.148 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:05:47.148 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:47.148 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:47.438 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-01-09 02:05:47.908 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-01-09 02:05:48.387 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-01-09 02:05:48.864 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-01-09 02:05:49.343 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-01-09 02:05:49.821 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-01-09 02:05:50.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:05:50.154 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:50.156 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:05:50.156 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:05:50.171 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:05:50.171 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:05:50.171 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:05:50.172 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:50.172 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:05:50.172 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:05:50.172 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:05:50.173 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:05:50.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:05:50.201 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:05:50.201 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:05:50.201 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:50.201 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:50.298 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-01-09 02:05:50.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:05:50.455 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:50.457 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:05:50.457 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:05:50.470 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:05:50.470 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:05:50.470 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:05:50.471 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:50.471 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:05:50.471 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:05:50.472 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:05:50.472 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:05:50.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:05:50.482 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:05:50.482 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:05:50.482 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:50.482 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:50.776 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-01-09 02:05:51.254 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-01-09 02:05:51.732 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-01-09 02:05:52.211 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-01-09 02:05:52.688 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-01-09 02:05:53.167 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-01-09 02:05:53.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:05:53.487 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:53.489 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:05:53.489 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:05:53.507 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:05:53.507 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:05:53.508 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:05:53.509 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:53.509 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:05:53.509 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:05:53.509 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:05:53.509 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:05:53.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:05:53.552 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:05:53.552 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:05:53.552 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:53.552 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:53.645 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-01-09 02:05:54.124 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-01-09 02:05:54.602 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-01-09 02:05:55.080 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-01-09 02:05:55.558 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-01-09 02:05:56.036 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-01-09 02:05:56.514 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-01-09 02:05:56.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:05:56.560 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:56.562 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:05:56.562 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:05:56.579 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:05:56.579 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:05:56.579 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:05:56.580 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:56.580 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:05:56.580 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:05:56.580 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:05:56.580 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:05:56.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:05:56.611 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:05:56.611 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:05:56.611 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:56.611 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:56.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:05:56.671 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:56.672 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:05:56.672 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:05:56.689 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:05:56.689 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:05:56.690 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:05:56.691 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:56.691 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:05:56.691 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:05:56.691 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:05:56.691 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:05:56.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:05:56.697 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:05:56.697 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:05:56.697 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:56.697 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:56.991 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-01-09 02:05:57.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:05:57.459 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:05:57.461 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:05:57.461 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:05:57.470 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-01-09 02:05:57.477 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:05:57.477 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:05:57.477 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:05:57.477 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:05:57.486 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:05:57.487 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:05:57.487 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:05:57.487 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:05:57.487 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:05:57.487 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:05:57.487 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:05:57.487 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=9184 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:05:57.488 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=9184 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:05:57.488 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=9184 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:05:57.488 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=9184 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:05:57.488 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=9184 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:05:57.488 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=9184 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:06:02.480 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:06:02.480 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:06:02.481 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:06:02.483 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:06:02.483 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:06:02.483 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:06:02.487 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:06:02.487 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:06:02.487 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:06:02.488 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:06:02.488 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:06:02.489 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:06:02.489 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:06:02.490 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:06:02.490 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:06:02.490 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:06:02.490 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:06:02.490 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:06:02.490 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:06:02.491 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:06:02.491 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:06:02.491 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:06:02.491 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:06:02.491 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:06:02.491 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:06:02.492 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:06:02.492 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:06:02.493 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:06:02.493 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:06:02.493 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:06:02.493 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:06:02.493 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:06:02.493 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:06:02.493 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:06:02.493 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:06:02.495 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:06:02.495 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:06:02.495 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:06:02.495 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:06:02.495 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:06:02.495 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:06:02.495 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:06:02.496 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:06:02.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:06:02.496 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:06:02.496 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:06:02.496 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:06:02.496 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:06:02.496 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:06:02.496 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:06:02.496 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:06:02.496 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:06:02.496 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:06:02.496 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:06:02.496 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:06:02.496 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:06:02.496 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:06:02.496 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:06:02.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:06:02.496 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:06:02.496 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:06:02.496 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:06:02.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:06:02.496 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:06:02.496 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:06:02.496 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:06:02.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:06:02.496 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:06:02.497 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:06:02.497 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:06:02.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:06:02.497 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:06:02.497 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:06:02.497 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:06:02.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:06:02.497 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:06:02.497 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:06:02.497 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:06:02.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:06:02.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:06:02.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:06:02.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:06:02.501 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:06:02.982 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:06:03.021 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:06:03.023 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:06:03.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:06:03.026 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:06:03.054 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:06:03.054 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:06:03.054 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:06:03.058 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:06:03.058 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:06:03.059 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:06:03.059 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:06:03.059 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:06:03.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:06:03.084 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:06:03.084 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:06:03.085 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:06:03.085 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:06:03.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:06:03.142 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:06:03.144 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:06:03.144 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:06:03.161 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:06:03.161 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:06:03.162 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:06:03.163 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:06:03.163 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:06:03.163 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:06:03.163 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:06:03.163 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:06:03.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:06:03.228 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:06:03.228 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:06:03.229 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:06:03.229 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:06:03.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:06:03.305 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:06:03.306 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:06:03.307 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:06:03.325 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:06:03.326 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:06:03.326 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:06:03.327 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:06:03.327 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:06:03.327 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:06:03.327 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:06:03.327 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:06:03.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:06:03.364 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:06:03.364 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:06:03.364 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:06:03.364 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:06:03.457 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:06:03.498 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:06:03.499 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:06:03.499 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:06:03.500 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:06:03.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:06:03.612 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:06:03.613 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:06:03.613 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:06:03.633 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:06:03.633 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:06:03.633 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:06:03.634 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:06:03.634 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:06:03.634 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:06:03.634 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:06:03.634 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:06:03.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:06:03.696 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:06:03.696 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:06:03.696 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:06:03.696 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:06:03.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:06:03.775 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:06:03.776 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:06:03.776 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:06:03.788 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:06:03.788 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:06:03.789 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:06:03.789 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:06:03.796 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:06:03.797 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:06:03.797 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:06:03.797 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:06:03.797 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:06:03.797 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:06:03.798 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:06:03.798 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=277 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:06:03.798 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=277 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:06:08.793 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:06:08.793 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:06:08.795 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:06:08.795 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:06:08.795 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:06:08.796 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:06:08.809 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:06:08.810 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:06:08.810 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:06:08.810 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:06:08.810 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:06:08.813 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:06:08.813 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:06:08.813 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:06:08.813 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:06:08.814 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:06:08.814 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:06:08.814 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:06:08.814 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:06:08.816 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:06:08.816 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:06:08.816 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:06:08.816 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:06:08.817 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:06:08.817 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:06:08.817 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:06:08.817 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:06:08.819 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:06:08.819 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:06:08.819 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:06:08.819 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:06:08.819 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:06:08.819 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:06:08.819 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:06:08.819 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:06:08.822 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:06:08.822 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:06:08.822 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:06:08.822 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:06:08.822 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:06:08.822 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:06:08.822 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:06:08.823 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:06:08.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:06:08.823 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:06:08.823 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:06:08.823 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:06:08.823 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:06:08.823 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:06:08.823 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:06:08.823 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:06:08.823 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:06:08.823 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:06:08.823 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:06:08.823 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:06:08.823 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:06:08.823 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:06:08.823 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:06:08.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:06:08.823 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:06:08.823 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:06:08.823 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:06:08.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:06:08.824 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:06:08.824 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:06:08.824 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:06:08.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:06:08.824 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:06:08.824 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:06:08.824 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:06:08.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:06:08.824 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:06:08.824 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:06:08.824 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:06:08.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:06:08.824 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:06:08.824 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:06:08.824 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:06:08.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:06:08.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:06:08.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:06:08.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:06:08.828 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:06:09.310 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:06:09.353 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:06:09.355 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:06:09.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:06:09.357 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:06:09.384 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:06:09.384 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:06:09.384 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:06:09.389 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:06:09.389 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:06:09.389 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:06:09.389 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:06:09.389 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:06:09.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:06:09.411 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:06:09.412 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:06:09.412 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:06:09.412 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:06:09.787 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:06:09.826 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:06:09.826 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:06:09.828 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:06:09.830 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:06:10.266 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:06:10.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:06:10.286 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:06:10.288 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:06:10.288 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:06:10.305 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:06:10.305 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:06:10.305 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:06:10.306 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:06:10.306 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:06:10.306 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:06:10.306 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:06:10.306 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:06:10.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:06:10.310 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:06:10.310 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:06:10.310 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:06:10.310 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:06:10.743 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:06:10.827 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:06:10.827 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:06:10.829 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:06:10.831 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:06:11.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:06:11.015 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:06:11.017 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:06:11.017 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:06:11.027 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:06:11.027 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:06:11.027 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:06:11.028 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:06:11.028 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:06:11.028 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:06:11.028 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:06:11.028 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:06:11.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:06:11.079 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:06:11.079 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:06:11.079 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:06:11.079 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:06:11.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:06:11.183 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:06:11.185 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:06:11.185 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:06:11.197 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:06:11.197 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:06:11.197 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:06:11.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:06:11.199 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:06:11.199 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:06:11.199 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:06:11.199 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:06:11.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:06:11.214 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:06:11.214 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:06:11.214 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:06:11.214 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:06:11.220 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:06:11.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:06:11.616 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:06:11.618 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:06:11.618 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:06:11.634 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:06:11.634 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:06:11.634 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:06:11.634 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:06:11.643 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:06:11.643 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:06:11.643 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:06:11.643 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:06:11.643 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:06:11.643 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:06:11.644 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:06:11.644 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=602 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:06:11.644 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=602 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:06:16.635 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:06:16.635 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:06:16.637 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:06:16.638 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:06:16.639 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:06:16.639 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:06:16.650 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:06:16.650 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:06:16.650 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:06:16.650 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:06:16.651 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:06:16.652 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:06:16.652 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:06:16.652 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:06:16.653 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:06:16.653 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:06:16.653 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:06:16.653 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:06:16.653 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:06:16.654 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:06:16.654 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:06:16.654 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:06:16.655 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:06:16.655 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:06:16.655 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:06:16.655 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:06:16.655 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:06:16.656 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:06:16.656 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:06:16.656 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:06:16.656 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:06:16.656 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:06:16.656 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:06:16.657 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:06:16.657 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:06:16.659 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:06:16.659 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:06:16.659 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:06:16.659 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:06:16.659 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:06:16.659 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:06:16.659 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:06:16.659 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:06:16.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:06:16.659 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:06:16.659 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:06:16.659 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:06:16.659 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:06:16.659 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:06:16.659 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:06:16.659 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:06:16.660 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:06:16.660 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:06:16.660 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:06:16.660 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:06:16.660 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:06:16.660 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:06:16.660 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:06:16.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:06:16.660 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:06:16.660 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:06:16.660 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:06:16.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:06:16.660 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:06:16.660 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:06:16.660 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:06:16.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:06:16.660 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:06:16.660 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:06:16.660 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:06:16.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:06:16.660 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:06:16.660 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:06:16.660 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:06:16.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:06:16.660 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:06:16.660 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:06:16.660 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:06:16.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:06:16.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:06:16.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:06:16.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:06:16.664 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:06:17.148 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:06:17.185 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:06:17.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:06:17.189 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:06:17.191 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:06:17.209 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:06:17.209 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:06:17.209 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:06:17.214 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:06:17.214 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:06:17.214 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:06:17.214 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:06:17.214 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:06:17.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:06:17.251 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:06:17.251 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:06:17.252 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:06:17.252 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:06:17.417 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:06:17.421 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:06:17.423 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:06:17.423 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:06:17.443 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:06:17.443 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:06:17.443 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:06:17.445 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:06:17.445 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:06:17.445 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:06:17.445 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:06:17.445 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:06:17.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:06:17.486 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:06:17.486 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:06:17.487 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:06:17.487 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:06:17.618 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:06:17.662 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:06:17.662 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:06:17.663 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:06:17.665 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:06:17.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:06:17.760 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:06:17.762 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:06:17.762 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:06:17.780 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:06:17.780 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:06:17.780 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:06:17.782 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:06:17.782 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:06:17.782 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:06:17.782 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:06:17.782 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:06:17.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:06:17.799 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:06:17.799 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:06:17.799 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:06:17.799 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:06:18.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:06:18.080 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:06:18.082 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:06:18.083 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:06:18.093 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:06:18.100 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:06:18.100 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:06:18.100 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:06:18.101 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:06:18.101 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:06:18.101 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:06:18.101 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:06:18.101 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:06:18.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:06:18.148 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:06:18.148 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:06:18.148 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:06:18.149 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:06:18.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:06:18.484 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:06:18.486 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:06:18.486 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:06:18.500 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:06:18.500 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:06:18.500 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:06:18.501 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:06:18.503 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:06:18.503 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:06:18.503 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:06:18.503 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:06:18.503 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:06:18.503 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:06:18.503 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:06:23.522 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:06:23.522 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:06:23.524 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:06:23.525 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:06:23.525 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:06:23.526 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:06:23.537 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:06:23.538 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:06:23.538 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:06:23.538 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:06:23.538 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:06:23.540 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:06:23.541 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:06:23.541 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:06:23.541 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:06:23.541 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:06:23.541 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:06:23.541 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:06:23.541 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:06:23.543 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:06:23.543 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:06:23.543 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:06:23.543 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:06:23.543 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:06:23.543 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:06:23.543 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:06:23.543 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:06:23.544 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:06:23.545 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:06:23.545 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:06:23.545 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:06:23.545 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:06:23.545 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:06:23.545 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:06:23.545 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:06:23.547 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:06:23.547 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:06:23.547 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:06:23.547 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:06:23.547 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:06:23.547 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:06:23.547 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:06:23.547 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:06:23.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:06:23.547 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:06:23.547 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:06:23.547 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:06:23.547 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:06:23.547 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:06:23.547 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:06:23.547 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:06:23.547 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:06:23.547 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:06:23.547 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:06:23.547 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:06:23.548 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:06:23.548 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:06:23.548 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:06:23.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:06:23.548 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:06:23.548 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:06:23.548 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:06:23.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:06:23.548 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:06:23.548 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:06:23.548 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:06:23.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:06:23.548 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:06:23.548 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:06:23.548 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:06:23.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:06:23.548 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:06:23.548 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:06:23.548 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:06:23.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:06:23.548 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:06:23.548 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:06:23.548 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:06:23.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:06:23.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:06:23.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:06:23.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:06:23.552 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:06:24.036 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:06:24.066 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:06:24.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:06:24.067 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:06:24.069 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:06:24.081 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:06:24.082 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:06:24.082 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:06:24.085 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:06:24.086 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:06:24.086 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:06:24.086 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:06:24.086 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:06:24.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:06:24.134 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:06:24.134 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:06:24.135 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:06:24.135 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:06:24.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:06:24.308 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:06:24.309 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:06:24.309 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:06:24.325 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:06:24.325 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:06:24.325 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:06:24.327 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:06:24.327 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:06:24.327 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:06:24.327 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:06:24.327 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:06:24.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:06:24.372 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:06:24.372 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:06:24.372 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:06:24.372 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:06:24.505 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:06:24.549 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:06:24.550 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:06:24.551 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:06:24.552 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:06:24.645 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:06:24.648 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:06:24.650 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:06:24.651 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:06:24.669 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:06:24.670 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:06:24.670 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:06:24.671 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:06:24.671 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:06:24.671 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:06:24.671 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:06:24.671 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:06:24.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:06:24.687 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:06:24.687 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:06:24.687 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:06:24.687 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:06:24.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:06:24.966 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:06:24.968 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:06:24.968 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:06:24.975 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:06:24.987 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:06:24.987 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:06:24.987 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:06:24.988 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:06:24.988 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:06:24.988 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:06:24.989 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:06:24.989 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:06:25.019 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:06:25.024 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:06:25.025 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:06:25.025 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:06:25.025 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:06:25.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:06:25.366 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:06:25.367 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:06:25.367 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:06:25.378 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:06:25.378 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:06:25.378 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:06:25.378 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:06:25.380 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:06:25.380 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:06:25.380 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:06:25.380 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:06:25.380 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:06:25.380 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:06:25.380 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:06:25.380 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=395 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:06:25.380 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=395 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:06:30.383 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:06:30.383 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:06:30.385 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:06:30.385 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:06:30.386 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:06:30.386 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:06:30.394 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:06:30.395 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:06:30.395 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:06:30.395 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:06:30.395 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:06:30.397 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:06:30.397 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:06:30.398 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:06:30.398 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:06:30.398 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:06:30.398 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:06:30.398 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:06:30.398 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:06:30.400 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:06:30.400 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:06:30.400 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:06:30.400 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:06:30.401 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:06:30.401 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:06:30.401 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:06:30.401 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:06:30.402 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:06:30.402 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:06:30.402 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:06:30.402 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:06:30.403 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:06:30.403 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:06:30.403 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:06:30.403 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:06:30.405 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:06:30.405 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:06:30.405 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:06:30.405 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:06:30.405 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:06:30.405 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:06:30.405 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:06:30.405 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:06:30.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:06:30.405 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:06:30.405 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:06:30.405 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:06:30.405 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:06:30.405 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:06:30.405 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:06:30.405 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:06:30.405 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:06:30.405 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:06:30.405 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:06:30.406 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:06:30.406 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:06:30.406 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:06:30.406 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:06:30.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:06:30.406 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:06:30.406 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:06:30.406 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:06:30.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:06:30.406 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:06:30.406 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:06:30.406 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:06:30.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:06:30.406 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:06:30.406 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:06:30.406 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:06:30.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:06:30.406 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:06:30.406 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:06:30.406 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:06:30.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:06:30.406 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:06:30.406 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:06:30.406 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:06:30.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:06:30.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:06:30.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:06:30.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:06:30.410 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:06:30.892 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:06:30.930 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:06:30.932 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:06:30.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:06:30.935 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:06:30.954 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:06:30.954 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:06:30.954 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:06:30.959 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:06:30.959 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:06:30.959 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:06:30.959 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:06:30.960 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:06:30.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:06:30.995 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:06:30.996 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:06:30.996 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:06:30.996 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:06:31.370 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:06:31.408 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:06:31.408 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:06:31.408 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:06:31.409 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:06:31.848 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:06:32.326 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:06:32.409 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:06:32.409 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:06:32.409 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:06:32.409 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:06:32.804 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:06:32.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:06:32.852 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:06:32.853 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:06:32.854 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:06:32.871 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:06:32.871 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:06:32.871 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:06:32.872 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:06:32.872 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:06:32.872 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:06:32.872 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:06:32.872 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:06:32.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:06:32.900 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:06:32.900 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:06:32.900 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:06:32.901 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:06:33.282 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:06:33.410 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:06:33.411 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:06:33.411 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:06:33.411 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:06:33.760 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:06:34.238 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:06:34.412 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:06:34.412 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:06:34.412 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:06:34.412 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:06:34.717 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:06:35.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:06:35.047 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:06:35.049 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:06:35.049 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:06:35.063 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:06:35.063 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:06:35.063 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:06:35.064 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:06:35.064 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:06:35.064 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:06:35.064 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:06:35.064 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:06:35.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:06:35.098 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:06:35.098 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:06:35.098 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:06:35.098 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:06:35.195 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 02:06:35.412 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:06:35.413 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:06:35.413 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:06:35.413 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:06:35.673 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 02:06:36.152 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 02:06:36.631 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 02:06:36.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:06:36.672 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:06:36.673 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:06:36.673 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:06:36.692 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:06:36.692 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:06:36.692 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:06:36.693 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:06:36.694 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:06:36.694 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:06:36.694 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:06:36.694 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:06:36.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:06:36.730 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:06:36.731 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:06:36.731 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:06:36.731 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:06:37.109 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 02:06:37.588 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 02:06:38.066 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 02:06:38.544 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 02:06:38.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:06:38.552 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:06:38.553 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:06:38.553 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:06:38.562 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:06:38.562 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:06:38.562 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:06:38.562 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:06:38.564 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:06:38.564 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:06:38.564 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:06:38.564 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:06:38.564 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:06:38.564 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:06:38.564 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:06:38.564 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1740 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:06:38.564 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1740 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:06:43.567 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:06:43.571 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:06:43.571 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:06:43.571 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:06:43.571 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:06:43.572 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:06:43.580 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:06:43.581 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:06:43.581 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:06:43.581 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:06:43.581 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:06:43.584 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:06:43.584 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:06:43.585 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:06:43.585 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:06:43.585 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:06:43.585 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:06:43.586 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:06:43.586 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:06:43.588 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:06:43.588 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:06:43.588 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:06:43.589 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:06:43.589 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:06:43.589 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:06:43.589 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:06:43.589 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:06:43.591 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:06:43.591 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:06:43.591 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:06:43.591 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:06:43.591 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:06:43.592 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:06:43.592 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:06:43.592 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:06:43.594 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:06:43.594 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:06:43.594 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:06:43.594 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:06:43.594 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:06:43.594 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:06:43.595 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:06:43.595 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:06:43.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:06:43.595 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:06:43.595 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:06:43.595 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:06:43.595 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:06:43.595 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:06:43.595 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:06:43.595 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:06:43.595 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:06:43.595 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:06:43.595 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:06:43.595 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:06:43.595 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:06:43.595 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:06:43.595 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:06:43.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:06:43.595 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:06:43.595 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:06:43.595 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:06:43.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:06:43.595 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:06:43.595 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:06:43.595 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:06:43.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:06:43.596 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:06:43.596 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:06:43.596 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:06:43.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:06:43.596 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:06:43.596 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:06:43.596 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:06:43.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:06:43.596 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:06:43.596 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:06:43.596 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:06:43.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:06:43.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:06:43.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:06:43.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:06:43.600 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:06:44.085 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:06:44.118 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:06:44.119 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:06:44.120 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:06:44.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:06:44.140 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:06:44.140 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:06:44.140 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:06:44.145 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:06:44.145 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:06:44.145 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:06:44.145 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:06:44.145 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:06:44.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:06:44.186 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:06:44.187 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:06:44.187 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:06:44.188 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:06:44.562 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:06:44.598 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:06:44.598 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:06:44.598 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:06:44.601 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:06:45.041 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:06:45.518 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:06:45.599 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:06:45.599 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:06:45.599 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:06:45.602 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:06:45.996 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:06:46.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:06:46.045 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:06:46.047 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:06:46.047 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:06:46.061 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:06:46.061 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:06:46.061 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:06:46.062 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:06:46.062 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:06:46.062 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:06:46.062 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:06:46.062 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:06:46.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:06:46.095 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:06:46.095 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:06:46.095 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:06:46.095 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:06:46.474 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:06:46.600 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:06:46.600 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:06:46.600 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:06:46.603 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:06:46.952 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:06:47.430 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:06:47.600 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:06:47.601 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:06:47.601 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:06:47.604 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:06:47.908 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:06:48.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:06:48.241 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:06:48.243 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:06:48.243 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:06:48.260 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:06:48.260 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:06:48.260 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:06:48.261 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:06:48.261 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:06:48.261 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:06:48.261 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:06:48.261 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:06:48.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:06:48.286 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:06:48.286 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:06:48.287 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:06:48.287 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:06:48.386 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 02:06:48.601 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:06:48.602 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:06:48.602 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:06:48.604 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:06:48.864 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 02:06:49.342 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 02:06:49.820 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 02:06:49.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:06:49.861 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:06:49.862 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:06:49.862 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:06:49.881 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:06:49.881 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:06:49.881 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:06:49.882 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:06:49.883 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:06:49.883 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:06:49.883 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:06:49.883 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:06:49.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:06:49.920 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:06:49.920 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:06:49.920 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:06:49.920 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:06:50.299 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 02:06:50.777 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 02:06:51.255 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 02:06:51.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:06:51.719 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:06:51.720 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:06:51.720 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:06:51.727 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:06:51.727 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:06:51.727 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:06:51.727 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:06:51.728 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:06:51.728 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:06:51.729 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:06:51.729 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:06:51.729 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:06:51.729 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:06:51.729 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:06:56.732 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:06:56.732 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:06:56.734 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:06:56.736 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:06:56.736 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:06:56.736 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:06:56.744 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:06:56.746 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:06:56.746 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:06:56.746 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:06:56.746 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:06:56.749 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:06:56.750 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:06:56.750 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:06:56.750 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:06:56.751 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:06:56.751 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:06:56.751 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:06:56.751 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:06:56.753 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:06:56.753 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:06:56.753 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:06:56.753 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:06:56.753 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:06:56.753 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:06:56.753 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:06:56.753 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:06:56.755 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:06:56.755 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:06:56.756 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:06:56.756 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:06:56.756 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:06:56.756 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:06:56.756 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:06:56.756 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:06:56.758 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:06:56.759 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:06:56.759 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:06:56.759 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:06:56.759 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:06:56.759 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:06:56.759 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:06:56.759 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:06:56.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:06:56.759 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:06:56.759 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:06:56.759 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:06:56.759 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:06:56.759 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:06:56.759 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:06:56.759 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:06:56.759 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:06:56.759 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:06:56.759 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:06:56.759 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:06:56.760 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:06:56.760 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:06:56.760 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:06:56.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:06:56.760 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:06:56.760 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:06:56.760 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:06:56.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:06:56.760 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:06:56.760 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:06:56.760 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:06:56.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:06:56.760 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:06:56.760 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:06:56.760 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:06:56.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:06:56.760 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:06:56.760 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:06:56.760 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:06:56.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:06:56.760 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:06:56.760 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:06:56.760 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:06:56.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:06:56.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:06:56.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:06:56.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:06:56.764 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:06:57.247 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:06:57.283 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:06:57.285 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:06:57.286 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:06:57.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:06:57.309 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:06:57.309 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:06:57.310 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:06:57.314 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:06:57.315 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:06:57.315 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:06:57.316 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:06:57.316 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:06:57.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:06:57.349 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:06:57.350 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:06:57.350 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:06:57.351 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:06:57.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:06:57.526 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:06:57.527 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:06:57.527 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:06:57.543 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:06:57.543 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:06:57.544 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:06:57.545 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:06:57.545 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:06:57.545 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:06:57.545 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:06:57.545 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:06:57.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:06:57.582 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:06:57.583 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:06:57.583 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:06:57.583 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:06:57.725 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:06:57.763 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:06:57.763 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:06:57.764 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:06:57.766 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:06:58.203 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:06:58.681 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:06:58.787 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:06:58.787 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:06:58.787 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:06:58.787 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:06:59.158 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:06:59.636 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:06:59.682 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:06:59.686 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:06:59.687 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:06:59.688 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:06:59.704 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:06:59.704 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:06:59.704 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:06:59.705 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:06:59.705 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:06:59.705 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:06:59.705 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:06:59.705 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:06:59.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:06:59.732 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:06:59.732 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:06:59.732 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:06:59.732 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:06:59.789 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:06:59.789 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:06:59.789 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:06:59.789 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:06:59.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:06:59.902 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:06:59.904 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:06:59.904 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:06:59.923 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:06:59.923 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:06:59.923 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:06:59.924 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:06:59.924 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:06:59.924 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:06:59.924 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:06:59.924 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:06:59.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:06:59.972 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:06:59.972 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:06:59.973 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:06:59.974 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:00.113 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:07:00.591 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:07:00.790 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:07:00.790 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:07:00.791 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:07:00.791 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:07:01.069 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:07:01.547 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 02:07:01.791 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:07:01.791 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:07:01.792 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:07:01.792 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:07:02.025 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 02:07:02.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:07:02.115 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:02.116 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:07:02.116 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:07:02.128 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:07:02.128 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:07:02.129 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:07:02.130 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:02.130 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:07:02.130 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:07:02.130 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:07:02.130 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:07:02.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:07:02.171 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:07:02.172 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:07:02.172 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:02.172 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:02.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:07:02.439 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:02.441 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:07:02.441 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:07:02.459 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:07:02.459 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:07:02.459 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:07:02.461 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:02.461 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:07:02.461 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:07:02.461 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:07:02.461 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:07:02.494 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 02:07:02.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:07:02.503 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:07:02.503 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:07:02.503 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:02.503 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:02.964 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 02:07:03.437 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 02:07:03.916 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 02:07:04.394 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 02:07:04.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:07:04.775 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:04.777 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:07:04.777 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:07:04.795 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:07:04.795 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:07:04.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:07:04.797 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:04.797 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:07:04.797 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:07:04.797 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:07:04.797 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:07:04.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:07:04.815 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:07:04.815 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:07:04.816 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:04.816 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:04.871 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 02:07:05.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:07:05.102 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:05.104 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:07:05.104 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:07:05.124 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:07:05.124 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:07:05.124 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:07:05.125 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:05.125 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:07:05.125 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:07:05.125 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:07:05.126 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:07:05.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:07:05.160 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:07:05.160 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:07:05.160 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:05.160 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:05.344 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 02:07:05.819 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 02:07:06.298 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 02:07:06.776 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 02:07:07.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:07:07.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:07.199 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:07:07.199 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:07:07.208 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:07:07.208 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:07:07.208 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:07:07.209 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:07.209 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:07:07.210 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:07:07.210 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:07:07.210 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:07:07.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:07:07.254 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 02:07:07.255 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:07:07.255 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:07:07.256 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:07.256 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:07.732 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 02:07:07.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:07:07.890 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:07.892 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:07:07.892 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:07:07.906 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:07:07.906 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:07:07.906 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:07:07.907 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:07.907 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:07:07.907 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:07:07.908 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:07:07.908 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:07:07.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:07:07.915 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:07:07.915 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:07:07.915 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:07.915 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:08.210 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 02:07:08.687 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 02:07:09.166 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 02:07:09.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:07:09.608 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:09.610 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:07:09.611 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:07:09.624 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:07:09.624 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:07:09.624 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:07:09.625 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:09.625 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:07:09.625 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:07:09.625 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:07:09.625 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:07:09.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:07:09.636 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:07:09.636 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:07:09.636 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:09.636 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:09.644 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-09 02:07:10.122 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-09 02:07:10.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:07:10.281 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:10.282 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:07:10.282 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:07:10.300 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:07:10.300 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:07:10.300 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:07:10.301 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:10.301 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:07:10.301 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:07:10.301 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:07:10.301 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:07:10.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:07:10.304 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:07:10.305 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:07:10.305 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:10.305 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:10.600 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-09 02:07:11.078 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-09 02:07:11.557 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-09 02:07:11.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:07:11.998 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:11.999 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:07:12.000 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:07:12.019 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:07:12.019 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:07:12.020 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:07:12.021 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:12.021 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:07:12.021 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:07:12.021 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:07:12.021 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:07:12.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:07:12.026 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:07:12.026 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:07:12.026 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:12.026 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:12.035 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-09 02:07:12.512 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-09 02:07:12.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:07:12.599 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:12.601 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:07:12.601 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:07:12.614 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:07:12.614 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:07:12.614 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:07:12.615 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:12.615 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:07:12.616 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:07:12.616 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:07:12.616 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:07:12.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:07:12.659 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:07:12.660 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:07:12.660 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:12.661 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:12.990 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-09 02:07:13.468 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-09 02:07:13.947 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-09 02:07:14.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:07:14.341 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:14.343 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:07:14.343 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:07:14.358 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:07:14.358 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:07:14.359 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:07:14.360 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:14.360 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:07:14.360 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:07:14.360 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:07:14.360 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:07:14.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:07:14.365 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:07:14.365 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:07:14.365 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:14.365 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:14.425 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-09 02:07:14.903 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-09 02:07:14.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:07:14.990 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:14.991 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:07:14.992 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:07:15.011 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:07:15.011 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:07:15.011 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:07:15.012 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:15.012 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:07:15.012 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:07:15.012 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:07:15.012 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:07:15.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:07:15.050 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:07:15.050 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:07:15.050 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:15.051 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:15.381 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-09 02:07:15.856 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-09 02:07:16.334 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-09 02:07:16.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:07:16.729 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:16.731 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:07:16.731 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:07:16.736 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:07:16.736 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:07:16.736 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:07:16.736 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:07:16.738 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:07:16.738 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:07:16.738 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:07:16.738 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:07:16.738 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:07:16.738 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:07:16.738 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:07:16.738 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4271 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:07:16.738 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4271 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:07:16.738 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4271 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:07:16.738 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4271 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:07:16.738 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4271 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:07:16.738 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4271 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:07:16.738 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4271 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:07:16.738 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4271 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:07:21.743 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:07:21.743 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:07:21.743 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:07:21.743 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:07:21.743 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:07:21.743 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:07:21.750 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:07:21.750 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:07:21.750 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:07:21.750 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:07:21.750 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:07:21.753 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:07:21.754 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:07:21.754 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:07:21.754 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:07:21.754 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:07:21.755 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:07:21.755 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:07:21.755 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:07:21.757 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:07:21.757 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:07:21.758 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:07:21.758 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:07:21.758 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:07:21.758 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:07:21.758 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:07:21.758 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:07:21.760 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:07:21.760 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:07:21.760 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:07:21.760 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:07:21.760 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:07:21.760 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:07:21.760 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:07:21.760 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:07:21.763 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:07:21.763 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:07:21.763 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:07:21.763 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:07:21.763 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:07:21.763 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:07:21.763 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:07:21.763 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:07:21.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:07:21.763 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:07:21.764 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:07:21.764 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:07:21.764 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:07:21.764 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:07:21.764 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:07:21.764 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:07:21.764 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:07:21.764 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:07:21.764 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:07:21.764 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:07:21.764 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:07:21.764 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:07:21.764 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:07:21.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:07:21.764 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:07:21.764 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:07:21.764 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:07:21.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:07:21.764 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:07:21.764 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:07:21.764 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:07:21.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:07:21.765 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:07:21.765 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:07:21.765 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:07:21.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:07:21.765 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:07:21.765 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:07:21.765 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:07:21.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:07:21.765 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:07:21.765 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:07:21.765 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:07:21.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:07:21.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:07:21.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:07:21.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:07:21.769 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:07:22.251 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:07:22.290 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:07:22.292 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:07:22.294 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:07:22.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:07:22.317 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:07:22.318 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:07:22.318 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:07:22.322 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:22.322 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:07:22.322 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:07:22.323 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:07:22.323 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:07:22.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:07:22.354 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:07:22.355 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:07:22.355 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:22.355 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:22.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:07:22.411 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:22.413 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:07:22.413 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:07:22.431 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:07:22.431 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:07:22.431 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:07:22.433 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:22.433 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:07:22.433 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:07:22.433 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:07:22.433 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:07:22.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:07:22.495 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:07:22.495 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:07:22.495 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:22.496 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:22.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:07:22.573 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:22.574 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:07:22.574 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:07:22.594 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:07:22.594 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:07:22.594 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:07:22.596 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:22.596 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:07:22.596 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:07:22.596 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:07:22.596 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:07:22.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:07:22.634 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:07:22.634 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:07:22.634 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:22.635 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:22.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:07:22.728 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:07:22.730 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:22.731 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:07:22.732 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:07:22.750 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:07:22.750 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:07:22.750 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:07:22.752 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:22.752 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:07:22.752 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:07:22.752 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:07:22.752 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:07:22.767 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:07:22.767 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:07:22.769 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:07:22.770 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:07:22.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:07:22.780 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:07:22.781 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:07:22.781 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:22.781 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:22.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:07:22.856 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:22.859 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:07:22.859 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:07:22.872 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:07:22.872 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:07:22.872 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:07:22.874 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:22.874 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:07:22.874 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:07:22.874 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:07:22.874 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:07:22.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:07:22.918 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:07:22.918 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:07:22.918 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:22.918 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:23.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:07:23.125 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:23.127 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:07:23.127 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:07:23.140 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:07:23.141 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:07:23.141 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:07:23.142 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:23.142 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:07:23.142 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:07:23.142 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:07:23.142 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:07:23.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:07:23.147 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:07:23.147 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:07:23.147 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:23.147 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:23.200 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:07:23.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:07:23.359 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:23.361 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:07:23.361 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:07:23.379 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:07:23.379 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:07:23.380 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:07:23.381 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:23.381 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:07:23.381 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:07:23.381 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:07:23.381 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:07:23.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:07:23.444 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:07:23.444 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:07:23.445 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:23.445 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:23.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:07:23.522 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:23.523 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:07:23.523 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:07:23.537 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:07:23.537 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:07:23.537 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:07:23.539 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:23.539 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:07:23.539 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:07:23.539 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:07:23.539 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:07:23.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:07:23.581 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:07:23.581 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:07:23.581 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:23.581 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:23.676 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:07:23.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:07:23.763 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:23.764 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:07:23.765 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:07:23.768 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:07:23.768 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:07:23.769 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:07:23.776 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:07:23.777 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:07:23.777 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:07:23.786 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:07:23.790 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:07:23.790 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:07:23.790 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:07:23.790 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:07:23.790 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:07:23.791 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:07:23.791 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:07:23.791 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=431 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:07:23.791 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=431 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:07:23.791 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=431 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:07:23.791 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=431 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:07:23.791 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=431 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:07:23.791 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=431 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:07:23.791 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=432 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:07:23.791 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=432 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:07:23.791 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=432 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:07:23.791 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=432 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:07:23.791 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=432 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:07:23.791 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=432 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:07:23.791 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=432 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:07:23.791 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=432 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:07:23.791 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=433 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:07:23.791 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=433 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:07:23.791 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=433 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:07:23.791 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=433 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:07:23.791 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=433 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:07:23.791 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=433 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:07:23.791 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=433 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:07:23.791 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=433 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:07:23.792 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=434 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:07:23.792 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=434 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:07:23.792 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=434 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:07:23.792 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=434 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:07:23.792 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=434 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:07:23.792 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=434 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:07:23.792 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=434 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:07:23.792 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=434 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:07:28.782 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:07:28.782 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:07:28.790 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:07:28.790 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:07:28.790 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:07:28.791 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:07:28.807 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:07:28.808 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:07:28.808 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:07:28.808 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:07:28.808 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:07:28.811 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:07:28.811 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:07:28.811 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:07:28.811 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:07:28.812 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:07:28.812 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:07:28.812 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:07:28.812 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:07:28.815 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:07:28.815 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:07:28.815 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:07:28.815 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:07:28.816 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:07:28.816 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:07:28.816 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:07:28.816 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:07:28.817 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:07:28.817 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:07:28.818 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:07:28.818 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:07:28.818 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:07:28.818 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:07:28.818 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:07:28.818 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:07:28.820 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:07:28.820 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:07:28.820 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:07:28.820 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:07:28.820 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:07:28.820 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:07:28.820 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:07:28.820 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:07:28.820 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:07:28.820 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:07:28.820 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:07:28.820 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:07:28.821 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:07:28.821 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:07:28.821 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:07:28.821 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:07:28.821 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:07:28.821 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:07:28.821 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:07:28.821 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:07:28.821 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:07:28.821 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:07:28.821 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:07:28.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:07:28.821 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:07:28.821 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:07:28.821 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:07:28.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:07:28.821 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:07:28.821 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:07:28.821 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:07:28.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:07:28.821 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:07:28.821 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:07:28.821 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:07:28.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:07:28.821 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:07:28.822 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:07:28.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:07:28.822 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:07:28.822 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:07:28.822 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:07:28.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:07:28.822 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:07:28.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:07:28.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:07:28.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:07:28.825 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:07:29.309 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:07:29.344 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:07:29.346 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:07:29.348 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:07:29.351 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:07:29.373 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:07:29.374 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:07:29.374 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:07:29.378 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:29.379 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:07:29.379 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:07:29.379 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:07:29.379 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:07:29.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:07:29.413 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:07:29.413 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:07:29.414 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:29.414 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:29.787 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:07:29.824 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:07:29.824 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:07:29.824 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:07:29.825 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:07:30.266 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:07:30.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:07:30.288 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:30.290 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:07:30.290 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:07:30.307 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:07:30.307 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:07:30.307 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:07:30.308 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:30.308 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:07:30.308 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:07:30.308 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:07:30.308 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:07:30.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:07:30.361 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:07:30.361 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:07:30.361 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:30.361 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:30.738 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:07:30.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:07:30.766 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:30.768 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:07:30.768 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:07:30.784 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:07:30.784 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:07:30.784 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:07:30.785 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:30.785 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:07:30.785 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:07:30.785 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:07:30.785 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:07:30.824 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:07:30.825 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:07:30.825 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:07:30.825 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:07:30.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:07:30.838 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:07:30.838 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:07:30.839 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:30.839 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:31.216 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:07:31.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:07:31.496 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:31.497 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:07:31.498 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:07:31.515 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:07:31.515 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:07:31.515 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:07:31.516 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:31.516 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:07:31.516 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:07:31.516 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:07:31.516 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:07:31.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:07:31.550 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:07:31.551 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:07:31.551 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:31.551 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:31.694 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:07:31.826 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:07:31.826 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:07:31.826 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:07:31.827 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:07:31.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:07:31.983 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:31.985 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:07:31.985 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:07:32.003 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:07:32.003 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:07:32.003 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:07:32.004 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:32.004 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:07:32.004 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:07:32.004 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:07:32.004 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:07:32.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:07:32.023 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:07:32.024 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:07:32.024 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:32.024 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:32.131 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:07:32.134 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:32.135 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:07:32.135 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:07:32.155 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:07:32.155 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:07:32.155 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:07:32.156 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:32.156 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:07:32.156 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:07:32.156 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:07:32.156 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:07:32.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:07:32.162 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:07:32.162 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:07:32.162 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:32.162 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:32.171 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:07:32.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:07:32.611 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:32.611 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:07:32.611 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:07:32.626 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:07:32.626 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:07:32.626 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:07:32.628 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:32.628 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:07:32.628 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:07:32.628 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:07:32.628 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:07:32.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:07:32.643 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:07:32.643 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:07:32.643 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:32.644 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:32.649 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:07:32.827 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:07:32.827 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:07:32.828 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:07:32.828 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:07:33.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:07:33.045 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:33.046 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:07:33.047 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:07:33.062 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:07:33.063 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:07:33.063 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:07:33.064 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:33.064 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:07:33.064 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:07:33.064 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:07:33.064 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:07:33.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:07:33.067 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:07:33.067 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:07:33.067 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:33.067 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:33.126 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:07:33.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:07:33.522 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:33.524 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:07:33.524 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:07:33.533 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:07:33.534 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:07:33.534 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:07:33.534 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:07:33.536 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:07:33.536 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:07:33.536 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:07:33.536 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:07:33.536 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:07:33.536 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:07:33.536 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:07:33.536 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1008 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:07:33.536 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1008 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:07:33.536 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1008 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:07:33.536 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1008 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:07:33.536 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1008 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:07:33.536 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1008 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:07:33.536 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1008 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:07:33.536 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1008 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:07:38.538 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:07:38.538 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:07:38.540 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:07:38.540 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:07:38.540 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:07:38.541 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:07:38.548 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:07:38.548 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:07:38.548 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:07:38.549 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:07:38.549 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:07:38.552 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:07:38.553 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:07:38.553 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:07:38.553 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:07:38.554 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:07:38.554 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:07:38.555 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:07:38.555 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:07:38.557 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:07:38.557 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:07:38.557 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:07:38.558 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:07:38.558 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:07:38.558 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:07:38.558 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:07:38.558 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:07:38.560 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:07:38.561 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:07:38.561 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:07:38.561 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:07:38.561 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:07:38.561 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:07:38.561 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:07:38.561 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:07:38.565 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:07:38.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:07:38.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:07:38.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:07:38.565 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:07:38.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:07:38.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:07:38.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:07:38.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:07:38.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:07:38.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:07:38.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:07:38.565 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:07:38.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:07:38.566 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:07:38.566 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:07:38.566 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:07:38.566 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:07:38.566 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:07:38.566 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:07:38.566 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:07:38.566 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:07:38.566 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:07:38.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:07:38.566 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:07:38.566 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:07:38.566 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:07:38.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:07:38.566 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:07:38.566 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:07:38.566 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:07:38.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:07:38.566 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:07:38.566 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:07:38.566 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:07:38.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:07:38.567 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:07:38.567 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:07:38.567 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:07:38.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:07:38.567 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:07:38.567 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:07:38.567 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:07:38.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:07:38.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:07:38.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:07:38.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:07:38.571 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:07:39.053 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:07:39.093 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:07:39.096 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:07:39.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:07:39.099 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:07:39.114 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:07:39.114 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:07:39.114 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:07:39.118 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:39.119 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:07:39.119 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:07:39.119 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:07:39.119 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:07:39.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:07:39.155 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:07:39.156 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:07:39.156 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:39.157 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:39.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:07:39.216 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:39.217 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:07:39.218 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:07:39.235 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:07:39.235 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:07:39.235 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:07:39.237 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:39.237 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:07:39.237 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:07:39.237 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:07:39.237 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:07:39.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:07:39.296 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:07:39.296 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:07:39.297 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:39.297 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:39.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:07:39.353 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:39.354 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:07:39.354 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:07:39.372 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:07:39.372 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:07:39.372 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:07:39.374 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:39.374 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:07:39.374 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:07:39.374 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:07:39.374 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:07:39.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:07:39.379 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:07:39.380 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:07:39.380 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:39.380 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:39.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:07:39.472 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:39.474 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:07:39.474 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:07:39.492 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:07:39.492 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:07:39.492 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:07:39.493 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:39.493 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:07:39.493 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:07:39.493 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:07:39.493 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:07:39.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:07:39.527 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:07:39.530 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:07:39.530 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:07:39.530 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:39.530 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:39.569 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:07:39.569 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:07:39.570 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:07:39.571 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:07:39.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:07:39.592 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:39.593 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:07:39.593 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:07:39.612 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:07:39.612 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:07:39.612 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:07:39.613 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:39.613 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:07:39.613 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:07:39.613 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:07:39.613 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:07:39.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:07:39.671 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:07:39.671 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:07:39.671 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:39.671 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:39.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:07:39.754 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:39.756 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:07:39.756 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:07:39.776 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:07:39.776 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:07:39.776 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:07:39.777 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:39.777 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:07:39.777 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:07:39.777 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:07:39.777 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:07:39.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:07:39.814 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:07:39.814 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:07:39.814 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:39.814 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:39.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:07:39.990 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:39.992 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:07:39.992 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:07:39.996 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:07:40.008 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:07:40.008 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:07:40.008 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:07:40.010 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:40.010 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:07:40.010 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:07:40.010 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:07:40.010 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:07:40.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:07:40.048 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:07:40.048 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:07:40.048 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:40.048 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:40.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:07:40.152 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:40.153 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:07:40.154 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:07:40.169 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:07:40.170 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:07:40.170 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:07:40.171 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:40.171 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:07:40.171 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:07:40.171 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:07:40.171 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:07:40.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:07:40.178 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:07:40.178 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:07:40.178 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:40.178 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:40.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:07:40.382 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:40.384 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:07:40.384 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:07:40.395 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:07:40.396 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:07:40.396 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:07:40.396 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:07:40.397 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:07:40.397 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:07:40.397 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:07:40.397 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:07:40.397 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:07:40.397 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:07:40.398 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:07:40.398 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=394 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:07:40.398 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=394 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:07:45.401 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:07:45.401 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:07:45.403 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:07:45.403 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:07:45.403 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:07:45.404 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:07:45.413 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:07:45.413 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:07:45.413 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:07:45.414 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:07:45.414 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:07:45.416 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:07:45.417 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:07:45.417 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:07:45.417 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:07:45.417 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:07:45.418 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:07:45.418 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:07:45.418 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:07:45.419 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:07:45.419 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:07:45.420 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:07:45.420 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:07:45.420 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:07:45.420 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:07:45.420 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:07:45.420 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:07:45.422 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:07:45.422 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:07:45.422 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:07:45.422 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:07:45.422 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:07:45.422 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:07:45.422 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:07:45.422 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:07:45.425 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:07:45.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:07:45.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:07:45.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:07:45.425 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:07:45.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:07:45.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:07:45.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:07:45.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:07:45.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:07:45.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:07:45.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:07:45.425 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:07:45.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:07:45.426 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:07:45.426 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:07:45.426 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:07:45.426 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:07:45.426 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:07:45.426 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:07:45.426 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:07:45.426 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:07:45.426 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:07:45.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:07:45.426 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:07:45.426 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:07:45.426 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:07:45.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:07:45.426 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:07:45.426 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:07:45.426 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:07:45.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:07:45.426 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:07:45.426 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:07:45.426 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:07:45.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:07:45.426 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:07:45.426 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:07:45.426 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:07:45.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:07:45.426 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:07:45.426 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:07:45.426 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:07:45.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:07:45.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:07:45.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:07:45.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:07:45.430 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:07:45.913 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:07:45.950 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:07:45.952 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:07:45.953 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:07:45.954 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:07:45.976 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:07:45.976 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:07:45.977 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:07:45.980 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:45.980 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:07:45.980 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:07:45.981 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:07:45.981 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:07:46.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:07:46.015 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:07:46.016 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:07:46.016 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:46.017 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:46.391 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:07:46.428 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:07:46.428 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:07:46.429 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:07:46.430 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:07:46.869 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:07:46.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:07:46.893 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:46.894 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:07:46.894 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:07:46.913 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:07:46.913 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:07:46.913 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:07:46.914 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:46.915 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:07:46.915 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:07:46.915 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:07:46.915 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:07:46.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:07:46.969 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:07:46.969 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:07:46.970 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:46.971 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:47.346 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:07:47.429 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:07:47.429 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:07:47.430 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:07:47.431 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:07:47.825 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:07:47.863 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:07:47.866 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:47.868 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:07:47.868 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:07:47.887 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:07:47.888 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:07:47.888 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:07:47.889 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:47.889 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:07:47.889 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:07:47.889 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:07:47.889 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:07:47.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:07:47.927 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:07:47.928 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:07:47.928 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:47.928 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:48.302 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:07:48.430 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:07:48.430 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:07:48.430 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:07:48.432 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:07:48.780 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:07:49.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:07:49.081 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:49.083 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:07:49.083 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:07:49.122 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:07:49.122 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:07:49.122 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:07:49.125 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:49.126 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:07:49.126 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:07:49.126 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:07:49.126 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:07:49.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:07:49.162 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:07:49.162 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:07:49.163 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:49.163 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:49.258 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:07:49.431 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:07:49.431 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:07:49.431 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:07:49.433 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:07:49.737 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:07:50.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:07:50.056 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:50.057 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:07:50.058 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:07:50.074 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:07:50.074 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:07:50.074 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:07:50.075 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:50.075 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:07:50.075 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:07:50.075 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:07:50.075 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:07:50.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:07:50.119 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:07:50.120 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:07:50.121 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:50.121 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:50.215 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 02:07:50.432 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:07:50.432 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:07:50.432 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:07:50.433 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:07:50.694 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 02:07:50.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:07:50.736 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:50.737 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:07:50.737 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:07:50.754 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:07:50.754 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:07:50.754 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:07:50.755 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:50.755 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:07:50.756 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:07:50.756 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:07:50.756 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:07:50.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:07:50.794 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:07:50.795 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:07:50.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:50.796 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:51.171 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 02:07:51.649 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 02:07:51.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:07:51.691 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:51.692 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:07:51.692 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:07:51.693 [WARNING] transceiver.py:250 (MS@172.18.122.22:6700) RX TRXD message (fn=1337 tn=6 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:07:51.712 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:07:51.712 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:07:51.712 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:07:51.713 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:51.713 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:07:51.713 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:07:51.714 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:07:51.714 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:07:51.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:07:51.748 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:07:51.749 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:07:51.749 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:51.749 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:52.125 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 02:07:52.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:07:52.593 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:52.594 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:07:52.594 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:07:52.602 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 02:07:52.614 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:07:52.614 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:07:52.614 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:07:52.615 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:52.615 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:07:52.615 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:07:52.615 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:07:52.615 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:07:52.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:07:52.656 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:07:52.656 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:07:52.657 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:52.657 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:53.080 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 02:07:53.544 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:07:53.548 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:53.549 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:07:53.549 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:07:53.557 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 02:07:53.562 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:07:53.563 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:07:53.563 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:07:53.563 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:07:53.572 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:07:53.572 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:07:53.573 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:07:53.573 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:07:53.573 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:07:53.573 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:07:53.573 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:07:53.574 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1737 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:07:58.567 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:07:58.568 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:07:58.570 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:07:58.573 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:07:58.576 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:07:58.579 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:07:58.587 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:07:58.588 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:07:58.588 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:07:58.588 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:07:58.588 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:07:58.590 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:07:58.591 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:07:58.591 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:07:58.591 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:07:58.591 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:07:58.591 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:07:58.592 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:07:58.592 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:07:58.593 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:07:58.593 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:07:58.593 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:07:58.593 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:07:58.593 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:07:58.593 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:07:58.593 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:07:58.593 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:07:58.594 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:07:58.594 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:07:58.594 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:07:58.594 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:07:58.595 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:07:58.595 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:07:58.595 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:07:58.595 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:07:58.597 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:07:58.597 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:07:58.597 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:07:58.597 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:07:58.597 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:07:58.597 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:07:58.597 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:07:58.597 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:07:58.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:07:58.597 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:07:58.597 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:07:58.597 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:07:58.597 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:07:58.597 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:07:58.597 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:07:58.597 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:07:58.597 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:07:58.597 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:07:58.597 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:07:58.597 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:07:58.597 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:07:58.597 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:07:58.597 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:07:58.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:07:58.598 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:07:58.598 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:07:58.598 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:07:58.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:07:58.598 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:07:58.598 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:07:58.598 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:07:58.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:07:58.598 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:07:58.598 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:07:58.598 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:07:58.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:07:58.598 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:07:58.598 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:07:58.598 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:07:58.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:07:58.598 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:07:58.598 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:07:58.598 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:07:58.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:07:58.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:07:58.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:07:58.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:07:58.602 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:07:59.086 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:07:59.121 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:07:59.123 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:07:59.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:07:59.125 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:07:59.144 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:07:59.144 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:07:59.144 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:07:59.149 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:59.149 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:07:59.149 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:07:59.149 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:07:59.149 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:07:59.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:07:59.189 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:07:59.190 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:07:59.190 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:59.190 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:59.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:07:59.291 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:59.292 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:07:59.292 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:07:59.311 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:07:59.311 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:07:59.311 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:07:59.312 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:59.312 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:07:59.312 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:07:59.312 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:07:59.312 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:07:59.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:07:59.320 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:07:59.320 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:07:59.320 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:59.320 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:59.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:07:59.469 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:59.471 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:07:59.471 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:07:59.488 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:07:59.488 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:07:59.489 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:07:59.490 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:59.490 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:07:59.490 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:07:59.490 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:07:59.490 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:07:59.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:07:59.507 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:07:59.507 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:07:59.507 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:59.507 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:59.559 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:07:59.599 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:07:59.600 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:07:59.600 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:07:59.602 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:07:59.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:07:59.788 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:59.790 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:07:59.790 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:07:59.807 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:07:59.807 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:07:59.807 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:07:59.808 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:59.808 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:07:59.808 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:07:59.809 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:07:59.809 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:07:59.840 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:07:59.843 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:07:59.843 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:07:59.843 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:07:59.843 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:00.029 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:08:00.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:08:00.186 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:00.187 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:08:00.187 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:08:00.200 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:08:00.200 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:08:00.200 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:08:00.200 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:08:00.211 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:08:00.211 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:08:00.211 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:08:00.211 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:08:00.212 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:08:00.212 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:08:00.212 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:08:00.212 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=344 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:08:00.212 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=344 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:08:00.212 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=344 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:08:00.212 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=344 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:08:00.213 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=344 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:08:00.213 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=344 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:08:00.213 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=345 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:08:00.213 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=345 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:08:00.213 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=345 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:08:00.213 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=345 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:08:00.213 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=345 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:08:00.213 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=345 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:08:00.213 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=345 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:08:00.213 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=345 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:08:00.213 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=346 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:08:00.213 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=346 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:08:00.214 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=346 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:08:00.214 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=346 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:08:00.214 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=346 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:08:00.214 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=346 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:08:00.214 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=346 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:08:00.214 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=346 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:08:00.214 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=347 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:08:00.214 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=347 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:08:00.214 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=347 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:08:00.214 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=347 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:08:00.215 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=347 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:08:00.215 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=347 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:08:00.215 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=347 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:08:00.215 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=347 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:08:05.204 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:08:05.204 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:08:05.206 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:08:05.207 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:08:05.207 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:08:05.208 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:08:05.216 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:08:05.217 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:08:05.217 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:08:05.217 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:08:05.217 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:08:05.219 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:08:05.220 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:08:05.220 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:08:05.220 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:08:05.220 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:08:05.220 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:08:05.220 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:08:05.221 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:08:05.222 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:08:05.222 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:08:05.222 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:08:05.222 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:08:05.222 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:08:05.222 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:08:05.223 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:08:05.223 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:08:05.224 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:08:05.224 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:08:05.224 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:08:05.224 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:08:05.224 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:08:05.224 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:08:05.224 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:08:05.224 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:08:05.226 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:08:05.226 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:08:05.226 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:08:05.226 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:08:05.226 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:08:05.226 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:08:05.227 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:08:05.227 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:08:05.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:08:05.227 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:08:05.227 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:08:05.227 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:08:05.227 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:08:05.227 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:08:05.227 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:08:05.227 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:08:05.227 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:08:05.227 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:08:05.227 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:08:05.227 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:08:05.227 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:08:05.227 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:08:05.227 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:08:05.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:08:05.227 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:08:05.227 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:08:05.227 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:08:05.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:08:05.227 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:08:05.227 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:08:05.227 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:08:05.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:08:05.227 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:08:05.227 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:08:05.228 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:08:05.228 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:08:05.228 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:08:05.228 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:08:05.228 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:08:05.228 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:08:05.228 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:08:05.228 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:08:05.228 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:08:05.228 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:08:05.228 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:08:05.228 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:08:05.228 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:08:05.232 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:08:05.716 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:08:05.749 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:08:05.751 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:08:05.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:08:05.753 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:08:05.779 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:08:05.779 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:08:05.780 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:08:05.784 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:05.784 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:08:05.784 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:08:05.785 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:08:05.785 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:08:05.813 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:08:05.819 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:08:05.820 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:08:05.820 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:05.820 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:05.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:08:05.937 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:05.939 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:08:05.939 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:08:05.956 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:08:05.956 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:08:05.956 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:08:05.958 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:05.958 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:08:05.958 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:08:05.958 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:08:05.958 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:08:06.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:08:06.007 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:08:06.008 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:08:06.008 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:06.009 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:06.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:08:06.178 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:06.180 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:08:06.180 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:08:06.193 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:08:06.199 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:08:06.199 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:08:06.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:08:06.200 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:06.200 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:08:06.200 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:08:06.200 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:08:06.201 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:08:06.229 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:08:06.229 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:08:06.230 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:08:06.230 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:08:06.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:08:06.243 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:08:06.244 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:08:06.244 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:06.244 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:06.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:08:06.423 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:06.425 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:08:06.425 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:08:06.445 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:08:06.445 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:08:06.445 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:08:06.446 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:06.446 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:08:06.447 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:08:06.447 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:08:06.447 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:08:06.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:08:06.483 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:08:06.484 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:08:06.484 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:06.484 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:06.670 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:08:06.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:08:06.828 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:06.829 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:08:06.829 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:08:06.841 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:08:06.842 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:08:06.842 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:08:06.842 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:08:06.851 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:08:06.852 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:08:06.852 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:08:06.852 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:08:06.852 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:08:06.852 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:08:06.852 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:08:06.853 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=344 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:08:06.854 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=344 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:08:11.850 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:08:11.850 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:08:11.851 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:08:11.851 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:08:11.851 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:08:11.851 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:08:11.858 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:08:11.858 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:08:11.858 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:08:11.858 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:08:11.858 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:08:11.862 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:08:11.862 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:08:11.863 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:08:11.863 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:08:11.863 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:08:11.864 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:08:11.864 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:08:11.864 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:08:11.866 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:08:11.866 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:08:11.867 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:08:11.867 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:08:11.867 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:08:11.867 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:08:11.867 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:08:11.867 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:08:11.870 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:08:11.870 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:08:11.870 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:08:11.870 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:08:11.870 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:08:11.871 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:08:11.871 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:08:11.871 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:08:11.874 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:08:11.874 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:08:11.874 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:08:11.874 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:08:11.874 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:08:11.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:08:11.875 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:08:11.875 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:08:11.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:08:11.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:08:11.875 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:08:11.875 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:08:11.875 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:08:11.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:08:11.875 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:08:11.875 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:08:11.875 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:08:11.875 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:08:11.875 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:08:11.875 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:08:11.876 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:08:11.876 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:08:11.876 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:08:11.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:08:11.876 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:08:11.876 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:08:11.876 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:08:11.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:08:11.876 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:08:11.876 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:08:11.876 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:08:11.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:08:11.876 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:08:11.876 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:08:11.876 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:08:11.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:08:11.876 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:08:11.876 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:08:11.876 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:08:11.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:08:11.876 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:08:11.877 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:08:11.877 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:08:11.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:08:11.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:08:11.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:08:11.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:08:11.880 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:08:12.364 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:08:12.408 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:08:12.410 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:08:12.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:08:12.414 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:08:12.440 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:08:12.440 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:08:12.441 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:08:12.445 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:12.445 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:08:12.445 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:08:12.446 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:08:12.446 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:08:12.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:08:12.467 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:08:12.468 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:08:12.468 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:12.469 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:12.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:08:12.585 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:12.587 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:08:12.587 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:08:12.607 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:08:12.607 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:08:12.607 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:08:12.609 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:12.609 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:08:12.609 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:08:12.609 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:08:12.609 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:08:12.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:08:12.654 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:08:12.654 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:08:12.655 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:12.655 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:12.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:08:12.827 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:12.828 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:08:12.829 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:08:12.842 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:08:12.845 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:08:12.845 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:08:12.845 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:08:12.847 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:12.847 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:08:12.847 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:08:12.847 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:08:12.847 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:08:12.879 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:08:12.879 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:08:12.880 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:08:12.885 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:08:12.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:08:12.897 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:08:12.898 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:08:12.898 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:12.899 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:13.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:08:13.072 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:13.073 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:08:13.073 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:08:13.091 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:08:13.091 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:08:13.091 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:08:13.092 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:13.093 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:08:13.093 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:08:13.093 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:08:13.093 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:08:13.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:08:13.132 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:08:13.132 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:08:13.132 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:13.132 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:13.315 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:08:13.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:08:13.469 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:13.471 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:08:13.471 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:08:13.482 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:08:13.482 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:08:13.482 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:08:13.482 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:08:13.488 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:08:13.488 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:08:13.489 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:08:13.489 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:08:13.489 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:08:13.489 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:08:13.489 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:08:13.489 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=344 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:08:13.489 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=344 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:08:18.487 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:08:18.487 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:08:18.489 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:08:18.489 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:08:18.490 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:08:18.490 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:08:18.498 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:08:18.500 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:08:18.500 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:08:18.500 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:08:18.500 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:08:18.504 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:08:18.504 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:08:18.504 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:08:18.504 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:08:18.504 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:08:18.505 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:08:18.505 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:08:18.505 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:08:18.506 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:08:18.506 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:08:18.507 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:08:18.507 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:08:18.507 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:08:18.507 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:08:18.507 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:08:18.507 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:08:18.509 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:08:18.509 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:08:18.509 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:08:18.509 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:08:18.509 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:08:18.509 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:08:18.509 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:08:18.509 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:08:18.512 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:08:18.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:08:18.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:08:18.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:08:18.512 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:08:18.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:08:18.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:08:18.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:08:18.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:08:18.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:08:18.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:08:18.513 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:08:18.513 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:08:18.513 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:08:18.513 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:08:18.513 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:08:18.513 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:08:18.513 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:08:18.513 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:08:18.513 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:08:18.513 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:08:18.513 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:08:18.513 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:08:18.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:08:18.513 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:08:18.513 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:08:18.513 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:08:18.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:08:18.513 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:08:18.513 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:08:18.513 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:08:18.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:08:18.513 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:08:18.513 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:08:18.513 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:08:18.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:08:18.513 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:08:18.513 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:08:18.513 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:08:18.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:08:18.513 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:08:18.513 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:08:18.513 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:08:18.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:08:18.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:08:18.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:08:18.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:08:18.518 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:08:19.000 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:08:19.034 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:08:19.034 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:08:19.035 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:08:19.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:08:19.054 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:08:19.054 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:08:19.055 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:08:19.060 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:19.060 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:08:19.060 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:08:19.060 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:08:19.060 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:08:19.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:08:19.103 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:08:19.103 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:08:19.104 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:19.104 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:19.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:08:19.222 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:19.223 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:08:19.224 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:08:19.244 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:08:19.244 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:08:19.244 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:08:19.245 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:19.246 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:08:19.246 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:08:19.246 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:08:19.246 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:08:19.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:08:19.290 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:08:19.290 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:08:19.291 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:19.291 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:19.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:08:19.461 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:19.463 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:08:19.463 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:08:19.472 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:08:19.484 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:08:19.484 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:08:19.484 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:08:19.485 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:19.485 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:08:19.485 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:08:19.486 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:08:19.486 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:08:19.515 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:08:19.515 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:08:19.516 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:08:19.518 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:08:19.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:08:19.525 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:08:19.525 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:08:19.526 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:19.526 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:19.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:08:19.701 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:19.703 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:08:19.703 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:08:19.724 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:08:19.724 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:08:19.724 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:08:19.725 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:19.725 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:08:19.725 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:08:19.725 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:08:19.725 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:08:19.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:08:19.776 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:08:19.776 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:08:19.777 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:19.777 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:19.947 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:08:20.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:08:20.105 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:20.106 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:08:20.106 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:08:20.119 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:08:20.119 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:08:20.119 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:08:20.120 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:08:20.125 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:08:20.126 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:08:20.126 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:08:20.126 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:08:20.126 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:08:20.126 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:08:20.126 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:08:20.126 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=344 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:08:20.126 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=344 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:08:25.124 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:08:25.124 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:08:25.126 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:08:25.128 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:08:25.128 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:08:25.129 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:08:25.137 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:08:25.138 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:08:25.138 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:08:25.138 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:08:25.138 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:08:25.140 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:08:25.140 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:08:25.141 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:08:25.141 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:08:25.141 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:08:25.141 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:08:25.141 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:08:25.142 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:08:25.143 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:08:25.143 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:08:25.143 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:08:25.143 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:08:25.143 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:08:25.143 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:08:25.144 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:08:25.144 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:08:25.145 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:08:25.145 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:08:25.145 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:08:25.145 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:08:25.145 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:08:25.145 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:08:25.145 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:08:25.145 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:08:25.147 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:08:25.147 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:08:25.147 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:08:25.147 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:08:25.148 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:08:25.148 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:08:25.148 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:08:25.148 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:08:25.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:08:25.148 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:08:25.148 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:08:25.148 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:08:25.148 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:08:25.148 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:08:25.148 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:08:25.148 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:08:25.148 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:08:25.148 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:08:25.148 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:08:25.148 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:08:25.148 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:08:25.148 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:08:25.148 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:08:25.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:08:25.148 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:08:25.148 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:08:25.148 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:08:25.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:08:25.149 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:08:25.149 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:08:25.149 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:08:25.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:08:25.149 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:08:25.149 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:08:25.149 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:08:25.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:08:25.149 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:08:25.149 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:08:25.149 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:08:25.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:08:25.149 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:08:25.149 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:08:25.149 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:08:25.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:08:25.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:08:25.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:08:25.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:08:25.153 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:08:25.637 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:08:25.669 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:08:25.670 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:08:25.672 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:08:25.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:08:25.691 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:08:25.691 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:08:25.692 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:08:25.696 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:25.696 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:08:25.696 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:08:25.696 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:08:25.696 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:08:25.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:08:25.739 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:08:25.740 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:08:25.740 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:25.741 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:26.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:08:26.054 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:26.056 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:08:26.056 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:08:26.074 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:08:26.075 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:08:26.075 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:08:26.077 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:26.077 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:08:26.077 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:08:26.077 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:08:26.077 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:08:26.109 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:08:26.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:08:26.112 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:08:26.112 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:08:26.113 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:26.113 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:26.151 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:08:26.151 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:08:26.152 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:08:26.153 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:08:26.580 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:08:26.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:08:26.596 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:26.598 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:08:26.598 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:08:26.617 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:08:26.617 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:08:26.617 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:08:26.619 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:26.619 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:08:26.619 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:08:26.619 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:08:26.619 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:08:26.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:08:26.623 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:08:26.623 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:08:26.623 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:26.623 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:27.055 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:08:27.151 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:08:27.152 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:08:27.153 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:08:27.154 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:08:27.534 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:08:27.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:08:27.692 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:27.694 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:08:27.694 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:08:27.704 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:08:27.704 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:08:27.704 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:08:27.706 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:27.707 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:08:27.707 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:08:27.707 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:08:27.707 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:08:27.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:08:27.721 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:08:27.721 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:08:27.721 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:27.721 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:28.006 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:08:28.153 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:08:28.153 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:08:28.154 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:08:28.154 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:08:28.484 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:08:28.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:08:28.807 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:28.809 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:08:28.809 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:08:28.821 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:08:28.821 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:08:28.821 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:08:28.822 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:08:28.831 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:08:28.831 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:08:28.832 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:08:28.832 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:08:28.832 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:08:28.832 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:08:28.832 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:08:28.833 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=788 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:08:28.833 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=788 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:08:33.825 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:08:33.826 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:08:33.828 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:08:33.829 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:08:33.829 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:08:33.830 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:08:33.837 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:08:33.838 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:08:33.838 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:08:33.838 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:08:33.839 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:08:33.841 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:08:33.841 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:08:33.841 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:08:33.841 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:08:33.841 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:08:33.841 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:08:33.841 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:08:33.842 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:08:33.843 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:08:33.843 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:08:33.843 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:08:33.843 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:08:33.843 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:08:33.843 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:08:33.844 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:08:33.844 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:08:33.845 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:08:33.845 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:08:33.846 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:08:33.846 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:08:33.846 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:08:33.846 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:08:33.846 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:08:33.846 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:08:33.848 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:08:33.848 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:08:33.848 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:08:33.848 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:08:33.848 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:08:33.848 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:08:33.848 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:08:33.849 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:08:33.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:08:33.849 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:08:33.849 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:08:33.849 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:08:33.849 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:08:33.849 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:08:33.849 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:08:33.849 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:08:33.849 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:08:33.849 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:08:33.849 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:08:33.849 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:08:33.849 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:08:33.849 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:08:33.849 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:08:33.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:08:33.849 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:08:33.849 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:08:33.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:08:33.849 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:08:33.849 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:08:33.849 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:08:33.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:08:33.849 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:08:33.849 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:08:33.850 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:08:33.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:08:33.850 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:08:33.850 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:08:33.850 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:08:33.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:08:33.850 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:08:33.850 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:08:33.850 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:08:33.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:08:33.850 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:08:33.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:08:33.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:08:33.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:08:33.854 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:08:34.334 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:08:34.375 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:08:34.377 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:08:34.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:08:34.379 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:08:34.394 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:08:34.394 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:08:34.394 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:08:34.396 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:34.396 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:08:34.396 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:08:34.396 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:08:34.396 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:08:34.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:08:34.437 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:08:34.438 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:08:34.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:34.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:34.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:08:34.752 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:34.754 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:08:34.754 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:08:34.771 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:08:34.771 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:08:34.772 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:08:34.773 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:34.773 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:08:34.773 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:08:34.773 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:08:34.773 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:08:34.804 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:08:34.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:08:34.812 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:08:34.813 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:08:34.813 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:34.813 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:34.852 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:08:34.852 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:08:34.852 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:08:34.854 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:08:35.283 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:08:35.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:08:35.289 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:35.290 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:08:35.291 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:08:35.303 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:08:35.303 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:08:35.303 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:08:35.306 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:35.306 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:08:35.306 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:08:35.306 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:08:35.306 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:08:35.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:08:35.336 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:08:35.337 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:08:35.337 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:35.337 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:35.760 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:08:35.853 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:08:35.853 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:08:35.853 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:08:35.854 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:08:36.238 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:08:36.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:08:36.397 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:36.399 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:08:36.399 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:08:36.408 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:08:36.408 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:08:36.408 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:08:36.410 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:36.410 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:08:36.410 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:08:36.410 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:08:36.410 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:08:36.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:08:36.425 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:08:36.426 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:08:36.426 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:36.426 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:36.717 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:08:36.853 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:08:36.854 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:08:36.854 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:08:36.856 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:08:37.195 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:08:37.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:08:37.517 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:37.519 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:08:37.519 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:08:37.530 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:08:37.530 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:08:37.531 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:08:37.531 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:08:37.532 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:08:37.532 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:08:37.532 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:08:37.532 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:08:37.532 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:08:37.532 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:08:37.533 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:08:37.533 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=788 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:08:37.533 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=788 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:08:42.534 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:08:42.535 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:08:42.536 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:08:42.537 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:08:42.537 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:08:42.538 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:08:42.541 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:08:42.541 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:08:42.541 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:08:42.542 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:08:42.542 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:08:42.543 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:08:42.543 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:08:42.543 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:08:42.543 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:08:42.543 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:08:42.543 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:08:42.543 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:08:42.543 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:08:42.544 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:08:42.544 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:08:42.544 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:08:42.544 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:08:42.544 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:08:42.544 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:08:42.545 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:08:42.545 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:08:42.546 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:08:42.546 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:08:42.546 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:08:42.546 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:08:42.546 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:08:42.546 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:08:42.546 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:08:42.546 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:08:42.548 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:08:42.548 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:08:42.548 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:08:42.548 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:08:42.548 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:08:42.548 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:08:42.548 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:08:42.548 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:08:42.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:08:42.548 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:08:42.548 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:08:42.548 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:08:42.549 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:08:42.549 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:08:42.549 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:08:42.549 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:08:42.549 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:08:42.549 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:08:42.549 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:08:42.549 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:08:42.549 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:08:42.549 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:08:42.549 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:08:42.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:08:42.549 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:08:42.549 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:08:42.549 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:08:42.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:08:42.549 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:08:42.549 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:08:42.549 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:08:42.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:08:42.549 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:08:42.549 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:08:42.549 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:08:42.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:08:42.549 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:08:42.549 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:08:42.549 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:08:42.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:08:42.550 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:08:42.550 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:08:42.550 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:08:42.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:08:42.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:08:42.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:08:42.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:08:42.553 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:08:43.036 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:08:43.071 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:08:43.072 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:08:43.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:08:43.073 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:08:43.085 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:08:43.085 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:08:43.085 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:08:43.090 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:43.090 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:08:43.091 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:08:43.091 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:08:43.091 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:08:43.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:08:43.138 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:08:43.139 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:08:43.139 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:43.139 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:43.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:08:43.454 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:43.455 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:08:43.455 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:08:43.472 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:08:43.472 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:08:43.473 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:08:43.474 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:43.474 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:08:43.475 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:08:43.475 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:08:43.475 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:08:43.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:08:43.512 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:08:43.516 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:08:43.516 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:08:43.516 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:43.517 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:43.552 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:08:43.552 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:08:43.552 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:08:43.553 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:08:43.982 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:08:43.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:08:43.996 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:43.999 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:08:43.999 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:08:44.021 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:08:44.021 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:08:44.021 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:08:44.024 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:44.024 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:08:44.024 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:08:44.024 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:08:44.024 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:08:44.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:08:44.077 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:08:44.077 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:08:44.078 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:44.078 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:44.459 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:08:44.553 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:08:44.553 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:08:44.553 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:08:44.553 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:08:44.936 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:08:45.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:08:45.094 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:45.096 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:08:45.096 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:08:45.115 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:08:45.115 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:08:45.115 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:08:45.117 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:45.117 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:08:45.117 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:08:45.117 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:08:45.118 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:08:45.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:08:45.180 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:08:45.181 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:08:45.182 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:45.182 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:45.413 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:08:45.554 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:08:45.554 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:08:45.554 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:08:45.554 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:08:45.891 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:08:46.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:08:46.213 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:46.215 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:08:46.215 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:08:46.222 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:08:46.223 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:08:46.223 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:08:46.223 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:08:46.224 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:08:46.224 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:08:46.224 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:08:46.224 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:08:46.224 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:08:46.224 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:08:46.224 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:08:46.225 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=788 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:08:46.225 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=788 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:08:46.225 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=788 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:08:46.225 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=788 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:08:51.228 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:08:51.228 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:08:51.229 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:08:51.230 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:08:51.230 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:08:51.231 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:08:51.243 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:08:51.244 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:08:51.244 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:08:51.244 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:08:51.244 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:08:51.247 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:08:51.247 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:08:51.248 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:08:51.248 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:08:51.248 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:08:51.248 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:08:51.248 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:08:51.248 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:08:51.250 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:08:51.250 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:08:51.250 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:08:51.250 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:08:51.250 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:08:51.250 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:08:51.250 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:08:51.250 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:08:51.252 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:08:51.252 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:08:51.252 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:08:51.252 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:08:51.252 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:08:51.252 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:08:51.252 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:08:51.252 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:08:51.254 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:08:51.254 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:08:51.254 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:08:51.254 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:08:51.254 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:08:51.254 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:08:51.255 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:08:51.255 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:08:51.255 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:08:51.255 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:08:51.255 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:08:51.255 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:08:51.255 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:08:51.255 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:08:51.255 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:08:51.255 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:08:51.255 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:08:51.255 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:08:51.255 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:08:51.255 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:08:51.255 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:08:51.255 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:08:51.255 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:08:51.255 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:08:51.255 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:08:51.255 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:08:51.255 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:08:51.255 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:08:51.255 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:08:51.255 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:08:51.255 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:08:51.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:08:51.256 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:08:51.256 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:08:51.256 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:08:51.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:08:51.256 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:08:51.256 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:08:51.256 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:08:51.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:08:51.256 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:08:51.256 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:08:51.256 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:08:51.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:08:51.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:08:51.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:08:51.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:08:51.260 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:08:51.742 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:08:51.781 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:08:51.782 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:08:51.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:08:51.782 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:08:51.805 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:08:51.806 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:08:51.806 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:08:51.812 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:51.813 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:08:51.813 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:08:51.813 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:08:51.813 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:08:51.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:08:51.843 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:08:51.844 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:08:51.844 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:51.844 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:52.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:08:52.159 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:52.161 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:08:52.161 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:08:52.179 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:08:52.179 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:08:52.179 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:08:52.181 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:52.181 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:08:52.181 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:08:52.181 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:08:52.181 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:08:52.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:08:52.219 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:08:52.221 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:08:52.221 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:08:52.221 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:52.222 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:52.258 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:08:52.258 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:08:52.258 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:08:52.260 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:08:52.698 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:08:52.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:08:52.714 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:52.716 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:08:52.716 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:08:52.736 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:08:52.736 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:08:52.736 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:08:52.738 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:52.738 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:08:52.738 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:08:52.738 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:08:52.738 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:08:52.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:08:52.742 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:08:52.742 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:08:52.742 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:52.742 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:53.175 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:08:53.265 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:08:53.265 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:08:53.265 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:08:53.266 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:08:53.653 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:08:53.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:08:53.812 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:53.813 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:08:53.813 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:08:53.834 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:08:53.834 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:08:53.834 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:08:53.836 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:53.836 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:08:53.836 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:08:53.836 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:08:53.836 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:08:53.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:08:53.897 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:08:53.897 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:08:53.897 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:53.897 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:54.131 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:08:54.266 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:08:54.266 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:08:54.266 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:08:54.267 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:08:54.609 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:08:54.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:08:54.931 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:08:54.932 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:08:54.932 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:08:54.945 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:08:54.946 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:08:54.946 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:08:54.946 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:08:54.955 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:08:54.956 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:08:54.956 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:08:54.956 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:08:54.956 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:08:54.956 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:08:54.956 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:08:54.957 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=788 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:08:54.957 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=788 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:08:59.954 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:08:59.954 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:08:59.954 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:08:59.954 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:08:59.954 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:08:59.955 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:08:59.962 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:08:59.963 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:08:59.963 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:08:59.963 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:08:59.964 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:08:59.967 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:08:59.968 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:08:59.968 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:08:59.968 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:08:59.968 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:08:59.969 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:08:59.969 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:08:59.969 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:08:59.971 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:08:59.971 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:08:59.971 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:08:59.971 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:08:59.971 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:08:59.971 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:08:59.972 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:08:59.972 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:08:59.973 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:08:59.973 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:08:59.973 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:08:59.974 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:08:59.974 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:08:59.974 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:08:59.974 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:08:59.974 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:08:59.976 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:08:59.976 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:08:59.976 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:08:59.976 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:08:59.976 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:08:59.976 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:08:59.976 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:08:59.977 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:08:59.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:08:59.977 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:08:59.977 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:08:59.977 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:08:59.977 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:08:59.977 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:08:59.977 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:08:59.977 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:08:59.977 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:08:59.977 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:08:59.977 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:08:59.977 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:08:59.977 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:08:59.977 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:08:59.977 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:08:59.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:08:59.977 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:08:59.977 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:08:59.977 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:08:59.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:08:59.978 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:08:59.978 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:08:59.978 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:08:59.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:08:59.978 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:08:59.978 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:08:59.978 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:08:59.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:08:59.978 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:08:59.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:08:59.978 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:08:59.978 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:08:59.978 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:08:59.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:08:59.978 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:08:59.978 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:08:59.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:08:59.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:08:59.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:08:59.982 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:09:00.464 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:09:00.499 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:09:00.501 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:09:00.502 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:09:00.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:09:00.520 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:09:00.520 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:09:00.521 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:09:00.540 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:09:00.540 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:09:00.541 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:09:00.541 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:09:00.542 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:09:00.542 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:09:00.542 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:09:00.542 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:09:00.542 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:09:00.543 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:09:00.543 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:09:00.543 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=121 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:09:00.543 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=121 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:09:00.543 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=121 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:09:00.543 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=121 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:09:00.543 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=121 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:09:00.543 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=121 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:09:00.543 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=121 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:09:00.543 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=121 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:09:05.543 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:09:05.543 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:09:05.545 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:09:05.545 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:09:05.545 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:09:05.546 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:09:05.554 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:09:05.554 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:09:05.555 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:09:05.555 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:09:05.555 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:09:05.556 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:09:05.557 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:09:05.557 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:09:05.557 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:09:05.557 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:09:05.557 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:09:05.558 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:09:05.558 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:09:05.559 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:09:05.559 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:09:05.559 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:09:05.559 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:09:05.559 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:09:05.559 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:09:05.559 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:09:05.559 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:09:05.560 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:09:05.561 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:09:05.561 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:09:05.561 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:09:05.561 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:09:05.561 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:09:05.561 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:09:05.561 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:09:05.563 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:09:05.563 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:09:05.563 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:09:05.563 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:09:05.563 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:09:05.563 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:09:05.563 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:09:05.563 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:09:05.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:09:05.563 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:09:05.563 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:09:05.563 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:09:05.563 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:09:05.563 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:09:05.563 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:09:05.563 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:09:05.563 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:09:05.563 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:09:05.563 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:09:05.563 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:09:05.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:09:05.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:09:05.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:09:05.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:09:05.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:09:05.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:09:05.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:09:05.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:09:05.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:09:05.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:09:05.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:09:05.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:09:05.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:09:05.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:09:05.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:09:05.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:09:05.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:09:05.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:09:05.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:09:05.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:09:05.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:09:05.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:09:05.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:09:05.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:09:05.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:09:05.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:09:05.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:09:05.568 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:09:06.052 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:09:06.083 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:09:06.085 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:09:06.086 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:09:06.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:09:06.104 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:09:06.104 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:09:06.104 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:09:06.112 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:09:06.112 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:09:06.112 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:09:06.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:09:06.118 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:09:06.119 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:09:06.119 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:09:06.119 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:09:06.121 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:09:06.121 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:09:06.121 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:09:06.121 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:09:06.121 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:09:06.121 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:09:06.121 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:09:11.123 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:09:11.123 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:09:11.125 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:09:11.127 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:09:11.127 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:09:11.127 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:09:11.136 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:09:11.137 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:09:11.137 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:09:11.138 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:09:11.138 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:09:11.141 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:09:11.142 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:09:11.142 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:09:11.142 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:09:11.142 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:09:11.143 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:09:11.143 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:09:11.143 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:09:11.144 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:09:11.145 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:09:11.145 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:09:11.145 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:09:11.145 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:09:11.145 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:09:11.145 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:09:11.145 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:09:11.147 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:09:11.147 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:09:11.147 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:09:11.147 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:09:11.147 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:09:11.147 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:09:11.147 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:09:11.147 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:09:11.150 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:09:11.150 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:09:11.150 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:09:11.150 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:09:11.150 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:09:11.150 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:09:11.150 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:09:11.150 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:09:11.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:09:11.150 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:09:11.151 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:09:11.151 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:09:11.151 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:09:11.151 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:09:11.151 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:09:11.151 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:09:11.151 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:09:11.151 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:09:11.151 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:09:11.151 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:09:11.151 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:09:11.151 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:09:11.151 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:09:11.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:09:11.151 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:09:11.151 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:09:11.151 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:09:11.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:09:11.151 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:09:11.151 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:09:11.151 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:09:11.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:09:11.151 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:09:11.151 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:09:11.151 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:09:11.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:09:11.151 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:09:11.152 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:09:11.152 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:09:11.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:09:11.152 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:09:11.152 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:09:11.152 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:09:11.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:09:11.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:09:11.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:09:11.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:09:11.156 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:09:11.639 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:09:11.678 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:09:11.680 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:09:11.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:09:11.683 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:09:11.707 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:09:11.707 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:09:11.708 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:09:11.717 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:09:11.717 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:09:11.717 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:09:11.717 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:09:11.721 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:09:11.721 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:09:11.721 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:09:11.721 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:09:11.721 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:09:11.721 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:09:11.721 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:09:11.721 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=121 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:09:11.721 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=121 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:09:11.721 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=121 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:09:11.721 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=121 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:09:11.721 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=121 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:09:11.721 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=121 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:09:11.721 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=121 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:09:16.722 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:09:16.722 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:09:16.724 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:09:16.724 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:09:16.724 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:09:16.725 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:09:16.734 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:09:16.734 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:09:16.734 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:09:16.735 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:09:16.735 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:09:16.736 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:09:16.737 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:09:16.737 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:09:16.737 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:09:16.737 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:09:16.737 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:09:16.738 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:09:16.738 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:09:16.739 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:09:16.739 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:09:16.739 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:09:16.739 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:09:16.739 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:09:16.740 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:09:16.740 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:09:16.740 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:09:16.742 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:09:16.742 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:09:16.742 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:09:16.742 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:09:16.742 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:09:16.742 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:09:16.743 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:09:16.743 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:09:16.746 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:09:16.746 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:09:16.746 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:09:16.746 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:09:16.746 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:09:16.746 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:09:16.746 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:09:16.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:09:16.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:09:16.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:09:16.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:09:16.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:09:16.747 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:09:16.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:09:16.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:09:16.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:09:16.747 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:09:16.747 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:09:16.747 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:09:16.747 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:09:16.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:09:16.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:09:16.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:09:16.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:09:16.748 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:09:16.748 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:09:16.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:09:16.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:09:16.748 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:09:16.748 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:09:16.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:09:16.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:09:16.748 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:09:16.748 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:09:16.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:09:16.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:09:16.748 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:09:16.749 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:09:16.749 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:09:16.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:09:16.749 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:09:16.749 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:09:16.749 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:09:16.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:09:16.750 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:09:16.750 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:09:16.750 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:09:16.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:09:16.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:09:16.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:09:16.750 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:09:16.750 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:09:16.750 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:09:16.750 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:09:21.754 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:09:21.754 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:09:21.757 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:09:21.757 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:09:21.757 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:09:21.757 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:09:21.766 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:09:21.768 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:09:21.768 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:09:21.769 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:09:21.769 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:09:21.772 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:09:21.773 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:09:21.773 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:09:21.773 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:09:21.774 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:09:21.774 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:09:21.774 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:09:21.774 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:09:21.776 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:09:21.777 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:09:21.777 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:09:21.777 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:09:21.777 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:09:21.777 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:09:21.777 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:09:21.777 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:09:21.779 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:09:21.780 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:09:21.780 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:09:21.780 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:09:21.780 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:09:21.780 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:09:21.780 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:09:21.780 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:09:21.783 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:09:21.783 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:09:21.783 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:09:21.783 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:09:21.783 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:09:21.783 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:09:21.784 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:09:21.784 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:09:21.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:09:21.784 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:09:21.784 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:09:21.784 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:09:21.784 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:09:21.784 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:09:21.784 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:09:21.784 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:09:21.784 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:09:21.784 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:09:21.784 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:09:21.784 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:09:21.784 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:09:21.784 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:09:21.784 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:09:21.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:09:21.785 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:09:21.785 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:09:21.785 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:09:21.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:09:21.785 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:09:21.785 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:09:21.785 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:09:21.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:09:21.785 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:09:21.785 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:09:21.785 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:09:21.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:09:21.785 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:09:21.785 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:09:21.785 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:09:21.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:09:21.785 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:09:21.785 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:09:21.786 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:09:21.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:09:21.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:09:21.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:09:21.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:09:21.789 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:09:22.273 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:09:22.306 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:09:22.307 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:09:22.308 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:09:22.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:09:22.324 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:09:22.325 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:09:22.325 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:09:22.330 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:09:22.330 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:09:22.330 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:09:22.331 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:09:22.331 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:09:22.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:09:22.375 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:09:22.376 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:09:22.376 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:09:22.377 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:09:22.750 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:09:22.788 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:09:22.788 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:09:22.789 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:09:22.789 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:09:23.229 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:09:23.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:09:23.359 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:09:23.359 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:09:23.359 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:09:23.369 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:09:23.369 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:09:23.369 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:09:23.370 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:09:23.370 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:09:23.370 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:09:23.370 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:09:23.370 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:09:23.414 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:09:23.417 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:09:23.418 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:09:23.418 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:09:23.418 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:09:23.702 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:09:23.788 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:09:23.789 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:09:23.789 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:09:23.790 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:09:24.181 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:09:24.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:09:24.312 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:09:24.312 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:09:24.312 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:09:24.323 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:09:24.323 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:09:24.323 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:09:24.324 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:09:24.324 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:09:24.324 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:09:24.324 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:09:24.324 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:09:24.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:09:24.376 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:09:24.376 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:09:24.377 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:09:24.377 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:09:24.658 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:09:24.789 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:09:24.790 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:09:24.790 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:09:24.791 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:09:25.136 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:09:25.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:09:25.295 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:09:25.296 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:09:25.296 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:09:25.315 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:09:25.315 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:09:25.315 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:09:25.316 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:09:25.316 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:09:25.316 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:09:25.316 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:09:25.316 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:09:25.374 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:09:25.379 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:09:25.379 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:09:25.379 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:09:25.380 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:09:25.614 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:09:25.790 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:09:25.790 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:09:25.791 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:09:25.793 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:09:26.092 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:09:26.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:09:26.269 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:09:26.269 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:09:26.270 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:09:26.288 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:09:26.289 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:09:26.289 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:09:26.290 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:09:26.290 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:09:26.291 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:09:26.291 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:09:26.291 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:09:26.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:09:26.335 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:09:26.335 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:09:26.335 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:09:26.335 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:09:26.570 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 02:09:26.791 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:09:26.791 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:09:26.791 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:09:26.793 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:09:26.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:09:26.890 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:09:26.890 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:09:26.890 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:09:26.910 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:09:26.910 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:09:26.910 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:09:26.911 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:09:26.911 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:09:26.911 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:09:26.911 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:09:26.911 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:09:26.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:09:26.951 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:09:26.952 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:09:26.952 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:09:26.952 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:09:27.048 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 02:09:27.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:09:27.498 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:09:27.499 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:09:27.499 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:09:27.518 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:09:27.518 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:09:27.518 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:09:27.520 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:09:27.520 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:09:27.520 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:09:27.520 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:09:27.520 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:09:27.526 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 02:09:27.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:09:27.580 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:09:27.581 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:09:27.581 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:09:27.582 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:09:28.005 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 02:09:28.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:09:28.136 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:09:28.136 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:09:28.136 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:09:28.146 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:09:28.146 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:09:28.146 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:09:28.147 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:09:28.147 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:09:28.147 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:09:28.147 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:09:28.147 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:09:28.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:09:28.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:09:28.195 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:09:28.195 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:09:28.196 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:09:28.196 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:09:28.482 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 02:09:28.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:09:28.799 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:09:28.799 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:09:28.800 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:09:28.820 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:09:28.820 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:09:28.820 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:09:28.822 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:09:28.822 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:09:28.822 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:09:28.822 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:09:28.822 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:09:28.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:09:28.863 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:09:28.863 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:09:28.863 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:09:28.863 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:09:28.964 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 02:09:29.443 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 02:09:29.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:09:29.459 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:09:29.459 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:09:29.459 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:09:29.479 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:09:29.479 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:09:29.479 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:09:29.480 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:09:29.480 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:09:29.481 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:09:29.481 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:09:29.481 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:09:29.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:09:29.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:09:29.487 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:09:29.487 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:09:29.487 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:09:29.487 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:09:29.920 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 02:09:30.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:09:30.046 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:09:30.047 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:09:30.047 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:09:30.067 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:09:30.067 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:09:30.067 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:09:30.069 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:09:30.069 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:09:30.069 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:09:30.069 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:09:30.069 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:09:30.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:09:30.112 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:09:30.112 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:09:30.112 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:09:30.112 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:09:30.398 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 02:09:30.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:09:30.711 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:09:30.711 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:09:30.712 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:09:30.724 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:09:30.724 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:09:30.724 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:09:30.726 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:09:30.726 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:09:30.726 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:09:30.726 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:09:30.726 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:09:30.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:09:30.776 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:09:30.776 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:09:30.776 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:09:30.776 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:09:30.877 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 02:09:31.356 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 02:09:31.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:09:31.372 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:09:31.372 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:09:31.372 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:09:31.392 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:09:31.392 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:09:31.392 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:09:31.393 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:09:31.394 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:09:31.394 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:09:31.394 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:09:31.394 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:09:31.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:09:31.400 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:09:31.400 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:09:31.400 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:09:31.400 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:09:31.833 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 02:09:32.311 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 02:09:32.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:09:32.315 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:09:32.316 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:09:32.316 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:09:32.336 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:09:32.336 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:09:32.336 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:09:32.337 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:09:32.337 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:09:32.337 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:09:32.337 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:09:32.337 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:09:32.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:09:32.360 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:09:32.360 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:09:32.361 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:09:32.361 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:09:32.788 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 02:09:33.266 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 02:09:33.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:09:33.296 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:09:33.297 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:09:33.297 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:09:33.317 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:09:33.317 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:09:33.317 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:09:33.318 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:09:33.318 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:09:33.319 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:09:33.319 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:09:33.319 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:09:33.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:09:33.378 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:09:33.378 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:09:33.379 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:09:33.379 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:09:33.744 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 02:09:34.222 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 02:09:34.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:09:34.271 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:09:34.272 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:09:34.272 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:09:34.292 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:09:34.292 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:09:34.292 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:09:34.294 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:09:34.294 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:09:34.294 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:09:34.294 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:09:34.294 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:09:34.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:09:34.321 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:09:34.321 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:09:34.322 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:09:34.322 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:09:34.700 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-09 02:09:35.178 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-09 02:09:35.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:09:35.245 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:09:35.246 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:09:35.246 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:09:35.265 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:09:35.265 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:09:35.265 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:09:35.267 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:09:35.267 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:09:35.267 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:09:35.267 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:09:35.267 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:09:35.318 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:09:35.320 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:09:35.320 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:09:35.320 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:09:35.321 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:09:35.651 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-09 02:09:36.129 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-09 02:09:36.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:09:36.214 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:09:36.215 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:09:36.215 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:09:36.224 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:09:36.225 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:09:36.225 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:09:36.226 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:09:36.226 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:09:36.226 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:09:36.226 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:09:36.226 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:09:36.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:09:36.275 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:09:36.276 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:09:36.277 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:09:36.277 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:09:36.608 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-09 02:09:37.086 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-09 02:09:37.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:09:37.190 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:09:37.191 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:09:37.191 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:09:37.204 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:09:37.204 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:09:37.204 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:09:37.205 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:09:37.205 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:09:37.205 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:09:37.205 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:09:37.205 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:09:37.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:09:37.227 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:09:37.228 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:09:37.228 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:09:37.228 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:09:37.564 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-09 02:09:38.041 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-09 02:09:38.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:09:38.164 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:09:38.164 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:09:38.165 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:09:38.174 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:09:38.174 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:09:38.174 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:09:38.175 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:09:38.175 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:09:38.175 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:09:38.175 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:09:38.175 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:09:38.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:09:38.178 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:09:38.178 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:09:38.178 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:09:38.178 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:09:38.514 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-09 02:09:38.991 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-09 02:09:39.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:09:39.132 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:09:39.133 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:09:39.133 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:09:39.141 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:09:39.141 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:09:39.141 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:09:39.141 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:09:39.142 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:09:39.142 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:09:39.142 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:09:39.142 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:09:39.143 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:09:39.143 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:09:39.143 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:09:39.143 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3706 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:09:39.143 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3706 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:09:44.146 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:09:44.146 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:09:44.148 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:09:44.148 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:09:44.148 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:09:44.148 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:09:44.157 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:09:44.159 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:09:44.159 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:09:44.160 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:09:44.160 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:09:44.163 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:09:44.164 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:09:44.164 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:09:44.164 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:09:44.164 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:09:44.165 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:09:44.165 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:09:44.165 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:09:44.167 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:09:44.167 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:09:44.168 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:09:44.168 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:09:44.168 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:09:44.168 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:09:44.168 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:09:44.168 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:09:44.170 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:09:44.171 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:09:44.171 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:09:44.171 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:09:44.171 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:09:44.171 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:09:44.171 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:09:44.171 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:09:44.174 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:09:44.174 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:09:44.174 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:09:44.174 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:09:44.175 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:09:44.175 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:09:44.175 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:09:44.175 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:09:44.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:09:44.175 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:09:44.175 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:09:44.175 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:09:44.175 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:09:44.175 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:09:44.175 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:09:44.175 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:09:44.175 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:09:44.175 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:09:44.175 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:09:44.176 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:09:44.176 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:09:44.176 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:09:44.176 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:09:44.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:09:44.176 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:09:44.176 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:09:44.176 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:09:44.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:09:44.176 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:09:44.176 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:09:44.176 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:09:44.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:09:44.176 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:09:44.176 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:09:44.176 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:09:44.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:09:44.176 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:09:44.177 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:09:44.177 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:09:44.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:09:44.177 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:09:44.177 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:09:44.177 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:09:44.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:09:44.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:09:44.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:09:44.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:09:44.180 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:09:44.665 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:09:44.699 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:09:44.701 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:09:44.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:09:44.702 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:09:44.724 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:09:44.724 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:09:44.724 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:09:44.729 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:09:44.729 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:09:44.730 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:09:44.730 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:09:44.730 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:09:44.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:09:44.768 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:09:44.769 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:09:44.769 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:09:44.769 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:09:45.011 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:09:45.014 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:09:45.014 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:09:45.015 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:09:45.024 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:09:45.024 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:09:45.024 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:09:45.025 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:09:45.025 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:09:45.025 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:09:45.025 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:09:45.025 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:09:45.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:09:45.039 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:09:45.039 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:09:45.039 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:09:45.039 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:09:45.140 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:09:45.179 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:09:45.179 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:09:45.181 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:09:45.183 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:09:45.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:09:45.268 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:09:45.269 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:09:45.270 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:09:45.283 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:09:45.283 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:09:45.283 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:09:45.284 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:09:45.284 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:09:45.284 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:09:45.284 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:09:45.284 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:09:45.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:09:45.324 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:09:45.325 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:09:45.325 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:09:45.325 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:09:45.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:09:45.530 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:09:45.531 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:09:45.531 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:09:45.541 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:09:45.541 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:09:45.541 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:09:45.542 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:09:45.542 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:09:45.542 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:09:45.542 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:09:45.542 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:09:45.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:09:45.557 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:09:45.557 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:09:45.557 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:09:45.557 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:09:45.609 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:09:45.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:09:45.784 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:09:45.785 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:09:45.785 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:09:45.793 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:09:45.793 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:09:45.793 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:09:45.793 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:09:45.800 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:09:45.800 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:09:45.800 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:09:45.800 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:09:45.800 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:09:45.801 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:09:45.801 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:09:45.801 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=348 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:09:45.801 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=348 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:09:50.798 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:09:50.798 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:09:50.801 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:09:50.801 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:09:50.801 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:09:50.801 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:09:50.810 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:09:50.812 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:09:50.812 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:09:50.813 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:09:50.813 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:09:50.816 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:09:50.817 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:09:50.817 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:09:50.817 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:09:50.818 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:09:50.818 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:09:50.819 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:09:50.819 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:09:50.820 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:09:50.821 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:09:50.821 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:09:50.821 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:09:50.821 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:09:50.821 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:09:50.821 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:09:50.821 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:09:50.823 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:09:50.823 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:09:50.824 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:09:50.824 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:09:50.824 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:09:50.824 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:09:50.824 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:09:50.824 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:09:50.827 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:09:50.827 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:09:50.827 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:09:50.827 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:09:50.827 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:09:50.827 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:09:50.827 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:09:50.827 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:09:50.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:09:50.827 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:09:50.827 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:09:50.827 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:09:50.827 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:09:50.827 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:09:50.827 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:09:50.827 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:09:50.827 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:09:50.828 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:09:50.828 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:09:50.828 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:09:50.828 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:09:50.828 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:09:50.828 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:09:50.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:09:50.828 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:09:50.828 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:09:50.828 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:09:50.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:09:50.828 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:09:50.828 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:09:50.828 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:09:50.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:09:50.828 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:09:50.828 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:09:50.828 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:09:50.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:09:50.828 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:09:50.828 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:09:50.828 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:09:50.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:09:50.829 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:09:50.829 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:09:50.829 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:09:50.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:09:50.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:09:50.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:09:50.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:09:50.832 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:09:51.316 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:09:51.797 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:09:52.275 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:09:52.754 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:09:53.233 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:09:53.713 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:09:54.193 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:09:54.674 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:09:55.155 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:09:55.635 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 02:09:56.113 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 02:09:56.592 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 02:09:57.070 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 02:09:57.548 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 02:09:58.027 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 02:09:58.505 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 02:09:58.986 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 02:09:59.466 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 02:09:59.948 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 02:10:00.427 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 02:10:00.906 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 02:10:01.384 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 02:10:01.862 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 02:10:02.340 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 02:10:02.819 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 02:10:03.298 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 02:10:03.776 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-09 02:10:04.254 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-09 02:10:04.733 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-09 02:10:05.211 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-09 02:10:05.689 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-09 02:10:06.170 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-09 02:10:06.651 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-09 02:10:07.129 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-09 02:10:07.608 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-09 02:10:08.086 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-09 02:10:08.564 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-09 02:10:09.043 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-09 02:10:09.523 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-09 02:10:10.001 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-09 02:10:10.480 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-09 02:10:10.958 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-09 02:10:11.437 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-09 02:10:11.916 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-01-09 02:10:12.396 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-01-09 02:10:12.876 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-01-09 02:10:13.354 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-01-09 02:10:13.834 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-01-09 02:10:14.313 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-01-09 02:10:14.793 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-01-09 02:10:14.854 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:10:14.854 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:10:14.854 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:10:14.855 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:10:14.855 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:10:14.855 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:10:14.855 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:10:14.856 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=5115 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:10:14.856 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=5115 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:10:14.856 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=5115 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:10:14.856 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=5115 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:10:14.856 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=5115 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:10:14.856 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=5115 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:10:14.856 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=5115 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:10:14.856 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=5115 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:10:19.858 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:10:19.859 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:10:19.861 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:10:19.861 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:10:19.861 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:10:19.862 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:10:19.865 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:10:19.866 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:10:19.866 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:10:19.866 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:10:19.866 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:10:19.867 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:10:19.867 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:10:19.867 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:10:19.867 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:10:19.867 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:10:19.868 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:10:19.868 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:10:19.868 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:10:19.868 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:10:19.868 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:10:19.869 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:10:19.869 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:10:19.869 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:10:19.869 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:10:19.869 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:10:19.869 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:10:19.870 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:10:19.870 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:10:19.870 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:10:19.870 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:10:19.870 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:10:19.870 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:10:19.870 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:10:19.870 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:10:19.872 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:10:19.872 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:10:19.872 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:10:19.872 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:10:19.872 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:10:19.872 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:10:19.872 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:10:19.873 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:10:19.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:10:19.873 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:10:19.873 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:10:19.873 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:10:19.873 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:10:19.873 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:10:19.873 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:10:19.873 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:10:19.873 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:10:19.873 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:10:19.873 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:10:19.873 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:10:19.873 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:10:19.873 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:10:19.873 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:10:19.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:10:19.873 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:10:19.873 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:10:19.873 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:10:19.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:10:19.873 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:10:19.873 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:10:19.873 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:10:19.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:10:19.873 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:10:19.873 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:10:19.873 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:10:19.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:10:19.873 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:10:19.873 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:10:19.873 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:10:19.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:10:19.874 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:10:19.874 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:10:19.874 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:10:19.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:10:19.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:10:19.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:10:19.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:10:19.878 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:10:20.362 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:10:20.834 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:10:21.307 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:10:21.785 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:10:22.263 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:10:22.742 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:10:23.223 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:10:23.703 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:10:24.182 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:10:24.661 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 02:10:25.140 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 02:10:25.619 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 02:10:26.096 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 02:10:26.574 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 02:10:27.053 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 02:10:27.532 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 02:10:28.010 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 02:10:28.489 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 02:10:28.972 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 02:10:29.450 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 02:10:29.929 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 02:10:30.407 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 02:10:30.885 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 02:10:31.364 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 02:10:31.843 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 02:10:32.321 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 02:10:32.800 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-09 02:10:33.280 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-09 02:10:33.760 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-09 02:10:34.239 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-09 02:10:34.717 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-09 02:10:35.196 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-09 02:10:35.674 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-09 02:10:36.153 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-09 02:10:36.632 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-09 02:10:37.110 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-09 02:10:37.589 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-09 02:10:38.067 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-09 02:10:38.545 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-09 02:10:39.025 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-09 02:10:39.506 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-09 02:10:39.986 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-09 02:10:40.468 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-09 02:10:40.947 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-01-09 02:10:41.426 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-01-09 02:10:41.904 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-01-09 02:10:42.382 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-01-09 02:10:42.861 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-01-09 02:10:43.340 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-01-09 02:10:43.821 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-01-09 02:10:44.302 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-01-09 02:10:44.780 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-01-09 02:10:45.259 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-01-09 02:10:45.737 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-01-09 02:10:46.216 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-01-09 02:10:46.695 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-01-09 02:10:47.173 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-01-09 02:10:47.652 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-01-09 02:10:48.131 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-01-09 02:10:48.610 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-01-09 02:10:49.089 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-01-09 02:10:49.567 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-01-09 02:10:50.046 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-01-09 02:10:50.524 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-01-09 02:10:51.002 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-01-09 02:10:51.481 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-01-09 02:10:51.959 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-01-09 02:10:52.438 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-01-09 02:10:52.916 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-01-09 02:10:53.394 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-01-09 02:10:53.862 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-01-09 02:10:54.334 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-01-09 02:10:54.813 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-01-09 02:10:55.291 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-01-09 02:10:55.770 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-01-09 02:10:56.248 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-01-09 02:10:56.726 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-01-09 02:10:56.900 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:10:57.204 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-01-09 02:10:57.682 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-01-09 02:10:57.902 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:10:58.161 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-01-09 02:10:58.639 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-01-09 02:10:58.903 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:10:59.118 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-01-09 02:10:59.597 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-01-09 02:10:59.905 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:11:00.075 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-01-09 02:11:00.553 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-01-09 02:11:00.906 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:11:01.032 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-01-09 02:11:01.511 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-01-09 02:11:01.905 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:11:01.905 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:11:01.905 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:11:01.905 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:11:01.906 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:11:01.906 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:11:01.906 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:11:01.906 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:11:01.906 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=8961 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:11:01.906 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=8961 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:11:01.906 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=8961 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:11:06.911 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:11:06.911 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:11:06.912 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:11:06.912 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:11:06.913 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:11:06.914 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:11:06.918 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:11:06.918 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:11:06.918 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:11:06.918 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:11:06.918 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:11:06.920 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:11:06.920 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:11:06.920 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:11:06.920 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:11:06.920 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:11:06.921 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:11:06.921 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:11:06.921 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:11:06.922 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:11:06.922 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:11:06.922 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:11:06.922 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:11:06.922 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:11:06.922 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:11:06.922 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:11:06.922 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:11:06.923 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:11:06.923 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:11:06.923 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:11:06.924 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:11:06.924 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:11:06.924 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:11:06.924 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:11:06.924 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:11:06.926 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:11:06.926 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:11:06.926 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:11:06.926 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:11:06.926 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:11:06.926 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:11:06.926 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:11:06.926 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:11:06.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:11:06.926 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:11:06.926 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:11:06.926 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:11:06.926 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:11:06.926 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:11:06.926 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:11:06.926 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:11:06.926 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:11:06.926 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:11:06.926 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:11:06.927 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:11:06.927 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:11:06.927 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:11:06.927 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:11:06.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:11:06.927 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:11:06.927 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:11:06.927 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:11:06.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:11:06.927 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:11:06.927 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:11:06.927 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:11:06.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:11:06.927 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:11:06.927 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:11:06.927 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:11:06.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:11:06.927 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:11:06.927 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:11:06.927 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:11:06.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:11:06.927 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:11:06.927 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:11:06.927 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:11:06.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:11:06.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:11:06.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:11:06.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:11:06.931 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:11:07.415 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:11:07.447 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:11:07.449 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:11:07.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:11:07.450 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:11:07.476 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:11:07.476 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:11:07.476 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:11:07.480 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:11:07.481 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:11:07.481 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:11:07.481 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:11:07.482 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:11:07.509 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:11:07.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:11:07.524 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:11:07.524 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:11:07.524 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:11:07.525 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:11:07.893 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:11:07.929 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:11:07.929 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:11:07.930 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:11:07.930 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:11:08.371 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:11:08.849 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:11:08.930 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:11:08.930 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:11:08.931 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:11:08.931 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:11:09.335 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:11:09.813 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:11:09.931 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:11:09.932 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:11:09.932 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:11:09.932 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:11:10.291 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:11:10.769 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:11:10.932 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:11:10.933 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:11:10.933 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:11:10.933 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:11:11.248 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:11:11.726 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 02:11:11.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:11:11.812 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:11:11.813 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:11:11.813 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:11:11.830 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:11:11.831 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:11:11.831 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:11:11.832 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:11:11.832 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:11:11.832 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:11:11.832 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:11:11.832 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:11:11.866 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:11:11.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:11:11.883 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:11:11.884 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:11:11.884 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:11:11.884 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:11:11.933 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:11:11.933 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:11:11.934 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:11:11.934 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:11:12.204 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 02:11:12.682 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 02:11:13.160 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 02:11:13.639 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 02:11:14.118 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 02:11:14.597 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 02:11:15.073 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 02:11:15.552 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 02:11:15.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:11:15.951 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:11:15.952 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:11:15.952 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:11:15.970 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:11:15.970 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:11:15.970 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:11:15.972 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:11:15.972 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:11:15.972 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:11:15.972 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:11:15.972 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:11:16.024 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:11:16.030 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 02:11:16.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:11:16.038 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:11:16.038 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:11:16.038 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:11:16.038 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:11:16.508 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 02:11:16.986 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 02:11:17.464 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 02:11:17.942 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 02:11:18.419 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 02:11:18.898 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 02:11:19.375 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 02:11:19.813 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:11:19.816 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:11:19.817 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:11:19.817 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:11:19.832 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:11:19.832 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:11:19.832 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:11:19.834 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:11:19.834 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:11:19.834 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:11:19.834 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:11:19.834 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:11:19.843 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:11:19.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:11:19.848 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:11:19.848 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:11:19.848 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:11:19.848 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:11:19.852 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-09 02:11:20.322 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-09 02:11:20.791 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-09 02:11:21.267 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-09 02:11:21.744 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-09 02:11:22.222 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-09 02:11:22.701 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-09 02:11:23.179 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-09 02:11:23.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:11:23.583 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:11:23.584 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:11:23.584 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:11:23.599 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:11:23.600 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:11:23.600 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:11:23.600 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:11:23.610 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:11:23.610 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:11:23.610 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:11:23.610 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:11:23.610 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:11:23.610 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:11:23.611 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:11:23.611 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3560 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:11:23.612 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3560 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:11:28.604 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:11:28.605 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:11:28.607 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:11:28.607 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:11:28.607 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:11:28.608 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:11:28.611 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:11:28.612 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:11:28.612 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:11:28.612 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:11:28.612 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:11:28.613 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:11:28.613 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:11:28.613 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:11:28.613 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:11:28.613 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:11:28.614 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:11:28.614 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:11:28.614 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:11:28.614 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:11:28.615 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:11:28.615 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:11:28.615 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:11:28.615 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:11:28.615 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:11:28.615 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:11:28.615 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:11:28.616 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:11:28.616 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:11:28.616 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:11:28.616 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:11:28.616 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:11:28.616 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:11:28.616 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:11:28.616 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:11:28.618 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:11:28.618 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:11:28.618 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:11:28.618 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:11:28.618 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:11:28.619 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:11:28.619 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:11:28.619 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:11:28.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:11:28.619 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:11:28.619 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:11:28.619 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:11:28.619 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:11:28.619 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:11:28.619 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:11:28.619 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:11:28.619 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:11:28.619 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:11:28.619 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:11:28.619 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:11:28.619 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:11:28.619 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:11:28.619 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:11:28.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:11:28.619 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:11:28.619 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:11:28.619 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:11:28.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:11:28.619 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:11:28.619 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:11:28.619 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:11:28.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:11:28.619 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:11:28.619 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:11:28.619 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:11:28.620 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:11:28.620 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:11:28.620 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:11:28.620 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:11:28.620 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:11:28.620 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:11:28.620 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:11:28.620 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:11:28.620 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:11:28.620 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:11:28.620 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:11:28.620 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:11:28.624 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:11:29.108 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:11:29.142 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:11:29.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:11:29.143 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:11:29.144 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:11:29.165 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:11:29.165 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:11:29.165 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:11:29.169 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:11:29.169 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:11:29.169 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:11:29.169 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:11:29.169 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:11:29.201 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:11:29.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:11:29.217 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:11:29.217 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:11:29.217 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:11:29.218 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:11:29.584 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:11:29.622 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:11:29.622 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:11:29.623 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:11:29.624 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:11:30.062 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:11:30.079 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:11:30.541 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:11:30.566 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:11:30.623 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:11:30.624 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:11:30.624 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:11:30.625 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:11:31.019 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:11:31.053 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:11:31.497 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:11:31.541 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:11:31.625 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:11:31.625 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:11:31.625 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:11:31.625 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:11:31.975 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:11:32.028 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:11:32.454 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:11:32.516 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:11:32.626 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:11:32.626 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:11:32.626 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:11:32.626 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:11:32.932 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:11:33.004 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:11:33.411 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 02:11:33.491 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:11:33.627 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:11:33.628 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:11:33.628 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:11:33.628 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:11:33.890 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 02:11:33.980 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:11:34.368 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 02:11:34.467 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:11:34.847 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 02:11:34.955 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:11:35.325 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 02:11:35.443 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:11:35.804 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 02:11:35.931 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:11:36.282 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 02:11:36.418 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:11:36.761 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 02:11:36.906 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:11:37.238 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 02:11:37.393 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:11:37.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:11:37.401 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:11:37.401 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:11:37.401 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:11:37.416 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:11:37.416 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:11:37.416 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:11:37.417 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:11:37.417 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:11:37.417 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:11:37.417 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:11:37.418 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:11:37.420 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:11:37.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:11:37.423 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:11:37.424 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:11:37.424 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:11:37.424 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:11:37.716 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 02:11:38.121 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:11:38.195 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 02:11:38.608 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:11:38.673 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 02:11:39.095 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:11:39.151 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 02:11:39.583 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:11:39.630 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 02:11:40.071 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:11:40.108 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 02:11:40.558 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:11:40.586 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 02:11:41.046 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:11:41.065 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 02:11:41.534 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:11:41.543 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-09 02:11:42.021 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:11:42.022 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-09 02:11:42.500 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-09 02:11:42.517 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:11:42.979 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-09 02:11:43.005 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:11:43.457 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-09 02:11:43.493 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:11:43.935 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-09 02:11:43.980 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:11:44.414 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-09 02:11:44.467 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:11:44.892 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-09 02:11:44.955 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:11:45.371 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-09 02:11:45.443 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:11:45.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:11:45.452 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:11:45.453 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:11:45.453 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:11:45.464 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:11:45.464 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:11:45.464 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:11:45.465 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:11:45.465 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:11:45.465 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:11:45.465 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:11:45.465 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:11:45.510 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:11:45.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:11:45.515 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:11:45.515 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:11:45.515 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:11:45.515 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:11:45.807 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:11:45.849 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-09 02:11:46.285 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:11:46.327 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-09 02:11:46.763 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:11:46.805 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-09 02:11:47.240 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:11:47.283 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-09 02:11:47.719 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:11:47.760 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-09 02:11:48.196 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:11:48.239 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-09 02:11:48.675 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:11:48.717 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-09 02:11:49.153 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:11:49.196 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-09 02:11:49.631 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:11:49.674 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-01-09 02:11:50.110 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:11:50.152 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-01-09 02:11:50.588 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:11:50.631 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-01-09 02:11:51.067 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:11:51.108 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-01-09 02:11:51.544 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:11:51.587 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-01-09 02:11:52.022 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:11:52.065 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-01-09 02:11:52.501 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:11:52.543 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-01-09 02:11:52.979 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:11:52.983 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:11:52.984 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:11:52.984 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:11:52.984 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:11:52.998 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:11:52.998 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:11:52.999 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:11:53.002 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:11:53.002 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:11:53.002 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:11:53.003 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:11:53.003 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:11:53.011 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:11:53.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:11:53.017 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:11:53.018 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:11:53.018 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:11:53.018 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:11:53.020 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-01-09 02:11:53.411 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:11:53.498 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-01-09 02:11:53.888 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:11:53.977 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-01-09 02:11:54.367 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:11:54.454 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-01-09 02:11:54.844 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:11:54.932 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-01-09 02:11:55.323 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:11:55.411 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-01-09 02:11:55.801 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:11:55.889 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-01-09 02:11:56.279 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:11:56.367 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-01-09 02:11:56.757 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:11:56.845 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-01-09 02:11:57.235 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:11:57.324 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-01-09 02:11:57.714 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:11:57.802 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-01-09 02:11:58.193 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:11:58.281 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-01-09 02:11:58.671 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:11:58.759 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-01-09 02:11:59.150 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:11:59.237 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-01-09 02:11:59.627 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:11:59.715 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-01-09 02:12:00.105 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:12:00.193 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-01-09 02:12:00.584 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:12:00.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:12:00.591 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:12:00.592 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:12:00.592 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:12:00.607 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:12:00.607 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:12:00.607 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:12:00.607 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:12:00.613 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:12:00.613 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:12:00.613 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:12:00.614 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:12:00.614 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:12:00.614 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:12:00.614 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:12:00.614 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=6824 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:12:00.614 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=6824 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:12:05.610 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:12:05.610 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:12:05.612 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:12:05.612 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:12:05.612 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:12:05.613 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:12:05.622 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:12:05.623 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:12:05.623 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:12:05.623 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:12:05.623 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:12:05.625 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:12:05.625 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:12:05.626 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:12:05.626 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:12:05.626 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:12:05.626 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:12:05.626 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:12:05.626 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:12:05.628 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:12:05.628 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:12:05.628 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:12:05.628 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:12:05.628 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:12:05.628 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:12:05.628 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:12:05.628 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:12:05.630 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:12:05.630 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:12:05.630 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:12:05.630 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:12:05.630 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:12:05.631 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:12:05.631 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:12:05.631 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:12:05.633 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:12:05.633 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:12:05.633 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:12:05.633 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:12:05.633 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:12:05.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:12:05.634 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:12:05.634 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:12:05.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:12:05.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:12:05.634 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:12:05.634 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:12:05.634 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:12:05.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:12:05.634 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:12:05.634 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:12:05.634 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:12:05.634 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:12:05.634 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:12:05.634 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:12:05.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:12:05.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:12:05.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:12:05.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:12:05.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:12:05.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:12:05.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:12:05.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:12:05.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:12:05.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:12:05.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:12:05.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:12:05.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:12:05.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:12:05.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:12:05.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:12:05.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:12:05.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:12:05.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:12:05.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:12:05.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:12:05.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:12:05.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:12:05.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:12:05.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:12:05.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:12:05.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:12:05.639 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:12:06.124 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:12:06.165 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:12:06.166 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:12:06.167 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:12:06.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:12:06.178 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:12:06.178 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:12:06.178 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:12:06.180 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:12:06.180 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:12:06.181 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:12:06.181 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:12:06.181 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:12:06.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:12:06.227 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:12:06.228 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:12:06.228 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:12:06.228 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:12:06.602 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:12:06.638 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:12:06.638 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:12:06.640 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:12:06.644 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:12:07.081 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:12:07.559 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:12:07.639 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:12:07.639 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:12:07.641 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:12:07.645 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:12:08.037 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:12:08.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:12:08.332 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:12:08.333 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:12:08.333 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:12:08.343 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:12:08.343 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:12:08.343 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:12:08.345 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:12:08.345 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:12:08.345 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:12:08.345 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:12:08.345 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:12:08.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:12:08.365 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:12:08.365 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:12:08.366 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:12:08.366 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:12:08.512 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:12:08.640 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:12:08.640 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:12:08.642 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:12:08.645 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:12:08.981 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:12:09.455 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:12:09.641 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:12:09.641 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:12:09.643 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:12:09.646 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:12:09.933 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:12:10.411 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 02:12:10.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:12:10.474 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:12:10.478 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:12:10.478 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:12:10.495 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:12:10.495 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:12:10.495 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:12:10.495 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:12:10.496 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:12:10.496 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:12:10.496 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:12:10.496 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:12:10.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:12:10.502 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:12:10.502 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:12:10.502 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:12:10.503 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:12:10.642 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:12:10.642 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:12:10.644 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:12:10.647 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:12:10.888 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 02:12:11.366 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 02:12:11.845 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 02:12:12.323 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 02:12:12.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:12:12.597 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:12:12.598 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:12:12.598 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:12:12.600 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:12:12.600 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:12:12.600 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:12:12.600 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:12:12.602 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:12:12.602 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:12:12.602 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:12:12.602 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:12:12.602 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:12:12.602 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:12:12.602 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:12:12.602 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1490 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:12:12.602 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1490 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:12:12.602 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1490 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:12:12.602 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1490 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:12:17.605 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:12:17.605 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:12:17.607 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:12:17.608 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:12:17.608 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:12:17.609 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:12:17.617 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:12:17.618 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:12:17.618 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:12:17.618 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:12:17.619 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:12:17.620 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:12:17.621 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:12:17.621 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:12:17.621 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:12:17.621 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:12:17.621 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:12:17.622 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:12:17.622 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:12:17.623 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:12:17.623 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:12:17.623 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:12:17.623 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:12:17.623 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:12:17.623 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:12:17.623 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:12:17.623 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:12:17.625 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:12:17.625 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:12:17.625 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:12:17.625 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:12:17.625 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:12:17.625 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:12:17.625 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:12:17.625 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:12:17.627 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:12:17.627 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:12:17.627 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:12:17.627 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:12:17.627 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:12:17.627 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:12:17.628 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:12:17.628 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:12:17.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:12:17.628 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:12:17.628 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:12:17.628 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:12:17.628 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:12:17.628 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:12:17.628 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:12:17.628 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:12:17.628 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:12:17.628 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:12:17.628 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:12:17.628 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:12:17.628 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:12:17.628 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:12:17.628 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:12:17.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:12:17.628 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:12:17.628 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:12:17.628 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:12:17.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:12:17.628 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:12:17.628 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:12:17.628 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:12:17.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:12:17.628 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:12:17.628 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:12:17.629 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:12:17.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:12:17.629 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:12:17.629 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:12:17.629 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:12:17.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:12:17.629 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:12:17.629 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:12:17.629 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:12:17.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:12:17.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:12:17.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:12:17.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:12:17.633 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:12:18.115 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:12:18.142 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:12:18.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:12:18.143 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:12:18.144 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:12:18.152 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:12:18.152 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:12:18.152 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:12:18.155 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:12:18.155 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:12:18.155 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:12:18.155 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:12:18.155 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:12:18.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:12:18.166 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:12:18.167 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:12:18.167 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:12:18.167 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:12:18.593 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:12:18.630 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:12:18.631 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:12:18.631 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:12:18.631 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:12:19.071 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:12:19.550 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:12:19.631 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:12:19.631 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:12:19.632 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:12:19.632 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:12:20.028 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:12:20.258 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:12:20.261 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:12:20.265 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:12:20.266 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:12:20.282 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:12:20.282 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:12:20.282 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:12:20.283 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:12:20.284 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:12:20.284 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:12:20.284 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:12:20.284 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:12:20.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:12:20.319 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:12:20.320 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:12:20.320 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:12:20.320 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:12:20.506 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:12:20.632 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:12:20.633 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:12:20.633 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:12:20.633 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:12:20.985 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:12:21.463 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:12:21.633 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:12:21.633 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:12:21.633 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:12:21.633 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:12:21.942 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:12:22.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:12:22.410 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:12:22.415 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:12:22.415 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:12:22.421 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 02:12:22.426 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:12:22.426 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:12:22.426 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:12:22.426 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:12:22.428 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:12:22.428 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:12:22.429 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:12:22.429 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:12:22.429 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:12:22.429 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:12:22.429 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:12:27.430 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:12:27.431 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:12:27.432 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:12:27.434 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:12:27.434 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:12:27.435 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:12:27.442 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:12:27.442 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:12:27.442 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:12:27.442 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:12:27.442 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:12:27.444 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:12:27.444 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:12:27.444 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:12:27.444 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:12:27.444 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:12:27.444 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:12:27.444 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:12:27.444 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:12:27.446 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:12:27.446 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:12:27.446 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:12:27.446 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:12:27.446 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:12:27.446 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:12:27.446 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:12:27.446 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:12:27.448 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:12:27.448 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:12:27.448 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:12:27.448 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:12:27.448 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:12:27.448 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:12:27.448 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:12:27.448 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:12:27.450 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:12:27.450 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:12:27.450 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:12:27.450 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:12:27.450 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:12:27.450 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:12:27.450 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:12:27.450 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:12:27.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:12:27.450 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:12:27.450 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:12:27.450 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:12:27.450 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:12:27.450 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:12:27.450 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:12:27.450 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:12:27.450 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:12:27.450 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:12:27.450 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:12:27.450 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:12:27.451 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:12:27.451 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:12:27.451 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:12:27.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:12:27.451 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:12:27.451 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:12:27.451 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:12:27.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:12:27.451 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:12:27.451 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:12:27.451 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:12:27.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:12:27.451 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:12:27.451 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:12:27.451 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:12:27.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:12:27.451 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:12:27.451 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:12:27.451 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:12:27.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:12:27.451 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:12:27.451 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:12:27.451 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:12:27.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:12:27.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:12:27.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:12:27.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:12:27.455 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:12:27.940 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:12:27.975 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:12:27.977 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:12:27.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:12:27.979 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:12:27.998 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:12:27.998 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:12:27.999 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:12:28.004 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:12:28.004 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:12:28.005 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:12:28.005 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:12:28.005 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:12:28.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:12:28.042 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:12:28.043 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:12:28.043 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:12:28.043 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:12:28.417 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:12:28.454 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:12:28.454 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:12:28.454 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:12:28.454 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:12:28.895 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:12:29.374 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:12:29.455 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:12:29.455 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:12:29.456 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:12:29.456 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:12:29.853 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:12:30.147 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:12:30.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:12:30.157 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:12:30.157 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:12:30.174 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:12:30.174 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:12:30.174 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:12:30.175 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:12:30.175 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:12:30.175 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:12:30.175 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:12:30.175 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:12:30.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:12:30.178 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:12:30.178 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:12:30.178 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:12:30.178 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:12:30.328 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:12:30.456 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:12:30.457 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:12:30.457 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:12:30.457 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:12:30.797 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:12:31.273 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:12:31.457 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:12:31.458 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:12:31.458 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:12:31.458 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:12:31.751 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:12:32.230 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 02:12:32.250 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:12:32.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:12:32.256 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:12:32.257 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:12:32.271 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:12:32.271 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:12:32.271 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:12:32.272 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:12:32.272 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:12:32.272 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:12:32.272 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:12:32.272 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:12:32.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:12:32.332 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:12:32.332 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:12:32.333 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:12:32.333 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:12:32.458 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:12:32.458 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:12:32.459 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:12:32.459 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:12:32.708 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 02:12:33.186 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 02:12:33.665 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 02:12:34.143 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 02:12:34.423 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:12:34.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:12:34.430 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:12:34.430 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:12:34.445 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:12:34.445 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:12:34.445 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:12:34.445 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:12:34.454 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:12:34.455 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:12:34.455 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:12:34.455 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:12:34.455 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:12:34.455 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:12:34.455 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:12:34.456 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1496 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:12:34.456 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1496 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:12:34.456 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1496 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:12:34.456 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1496 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:12:34.456 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1496 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:12:34.456 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1496 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:12:34.456 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1497 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:12:34.456 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1497 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:12:34.456 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1497 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:12:34.457 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1497 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:12:34.457 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1497 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:12:34.457 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1497 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:12:34.457 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1497 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:12:34.457 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1497 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:12:39.445 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:12:39.446 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:12:39.448 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:12:39.449 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:12:39.450 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:12:39.450 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:12:39.458 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:12:39.459 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:12:39.459 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:12:39.459 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:12:39.459 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:12:39.463 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:12:39.463 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:12:39.463 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:12:39.463 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:12:39.463 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:12:39.463 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:12:39.464 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:12:39.464 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:12:39.465 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:12:39.465 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:12:39.465 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:12:39.465 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:12:39.466 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:12:39.466 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:12:39.466 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:12:39.466 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:12:39.468 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:12:39.468 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:12:39.468 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:12:39.468 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:12:39.468 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:12:39.468 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:12:39.468 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:12:39.468 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:12:39.470 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:12:39.470 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:12:39.471 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:12:39.471 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:12:39.471 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:12:39.471 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:12:39.471 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:12:39.471 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:12:39.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:12:39.471 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:12:39.471 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:12:39.471 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:12:39.471 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:12:39.471 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:12:39.471 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:12:39.471 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:12:39.471 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:12:39.471 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:12:39.471 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:12:39.472 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:12:39.472 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:12:39.472 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:12:39.472 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:12:39.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:12:39.472 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:12:39.472 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:12:39.472 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:12:39.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:12:39.472 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:12:39.472 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:12:39.472 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:12:39.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:12:39.472 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:12:39.472 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:12:39.472 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:12:39.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:12:39.472 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:12:39.472 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:12:39.472 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:12:39.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:12:39.472 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:12:39.472 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:12:39.472 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:12:39.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:12:39.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:12:39.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:12:39.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:12:39.476 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:12:39.959 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:12:39.993 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:12:39.994 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:12:39.995 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:12:39.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:12:40.008 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:12:40.008 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:12:40.008 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:12:40.013 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:12:40.013 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:12:40.014 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:12:40.014 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:12:40.014 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:12:40.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:12:40.056 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:12:40.057 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:12:40.057 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:12:40.057 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:12:40.429 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:12:40.474 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:12:40.474 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:12:40.476 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:12:40.477 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:12:40.898 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:12:41.369 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:12:41.475 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:12:41.475 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:12:41.477 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:12:41.478 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:12:41.848 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:12:42.178 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:12:42.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:12:42.187 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:12:42.188 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:12:42.206 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:12:42.206 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:12:42.206 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:12:42.207 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:12:42.207 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:12:42.207 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:12:42.207 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:12:42.207 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:12:42.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:12:42.223 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:12:42.224 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:12:42.224 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:12:42.224 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:12:42.325 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:12:42.476 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:12:42.476 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:12:42.477 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:12:42.479 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:12:42.804 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:12:43.282 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:12:43.476 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:12:43.477 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:12:43.478 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:12:43.480 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:12:43.761 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:12:44.239 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 02:12:44.315 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:12:44.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:12:44.323 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:12:44.324 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:12:44.332 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:12:44.332 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:12:44.332 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:12:44.332 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:12:44.334 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:12:44.334 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:12:44.334 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:12:44.334 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:12:44.334 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:12:44.334 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:12:44.334 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:12:44.334 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1042 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:12:44.334 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1042 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:12:44.334 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1042 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:12:49.336 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:12:49.336 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:12:49.338 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:12:49.339 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:12:49.339 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:12:49.340 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:12:49.351 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:12:49.352 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:12:49.352 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:12:49.353 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:12:49.353 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:12:49.355 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:12:49.355 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:12:49.355 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:12:49.355 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:12:49.356 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:12:49.356 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:12:49.356 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:12:49.356 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:12:49.357 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:12:49.357 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:12:49.358 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:12:49.358 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:12:49.358 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:12:49.358 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:12:49.358 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:12:49.358 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:12:49.359 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:12:49.359 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:12:49.359 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:12:49.359 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:12:49.359 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:12:49.359 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:12:49.359 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:12:49.359 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:12:49.361 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:12:49.361 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:12:49.361 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:12:49.361 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:12:49.361 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:12:49.362 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:12:49.362 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:12:49.362 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:12:49.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:12:49.362 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:12:49.362 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:12:49.362 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:12:49.362 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:12:49.362 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:12:49.362 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:12:49.362 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:12:49.362 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:12:49.362 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:12:49.362 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:12:49.362 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:12:49.362 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:12:49.362 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:12:49.362 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:12:49.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:12:49.362 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:12:49.362 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:12:49.362 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:12:49.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:12:49.362 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:12:49.362 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:12:49.362 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:12:49.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:12:49.362 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:12:49.362 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:12:49.363 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:12:49.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:12:49.363 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:12:49.363 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:12:49.363 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:12:49.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:12:49.363 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:12:49.363 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:12:49.363 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:12:49.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:12:49.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:12:49.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:12:49.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:12:49.367 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:12:49.851 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:12:49.883 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:12:49.885 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:12:49.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:12:49.887 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:12:49.910 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:12:49.910 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:12:49.910 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:12:49.915 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:12:49.915 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:12:49.915 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:12:49.915 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:12:49.915 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:12:49.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:12:49.955 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:12:49.955 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:12:49.955 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:12:49.955 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:12:50.327 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:12:50.364 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:12:50.365 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:12:50.365 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:12:50.368 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:12:50.806 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:12:51.284 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:12:51.366 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:12:51.366 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:12:51.366 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:12:51.368 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:12:51.762 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:12:52.138 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:12:52.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:12:52.144 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:12:52.145 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:12:52.158 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:12:52.158 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:12:52.158 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:12:52.159 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:12:52.167 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:12:52.167 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:12:52.167 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:12:52.167 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:12:52.168 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:12:52.168 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:12:52.168 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:12:52.168 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=598 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:12:52.169 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=598 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:12:57.159 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:12:57.159 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:12:57.161 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:12:57.163 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:12:57.165 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:12:57.169 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:12:57.182 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:12:57.183 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:12:57.183 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:12:57.183 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:12:57.183 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:12:57.185 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:12:57.185 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:12:57.185 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:12:57.185 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:12:57.185 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:12:57.186 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:12:57.186 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:12:57.186 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:12:57.187 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:12:57.187 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:12:57.187 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:12:57.187 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:12:57.187 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:12:57.187 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:12:57.187 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:12:57.187 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:12:57.188 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:12:57.188 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:12:57.188 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:12:57.188 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:12:57.188 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:12:57.188 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:12:57.189 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:12:57.189 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:12:57.190 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:12:57.190 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:12:57.190 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:12:57.190 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:12:57.190 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:12:57.190 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:12:57.190 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:12:57.190 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:12:57.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:12:57.191 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:12:57.191 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:12:57.191 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:12:57.191 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:12:57.191 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:12:57.191 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:12:57.191 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:12:57.191 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:12:57.191 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:12:57.191 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:12:57.191 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:12:57.191 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:12:57.191 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:12:57.191 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:12:57.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:12:57.191 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:12:57.191 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:12:57.191 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:12:57.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:12:57.191 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:12:57.191 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:12:57.191 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:12:57.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:12:57.191 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:12:57.191 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:12:57.191 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:12:57.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:12:57.191 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:12:57.191 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:12:57.191 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:12:57.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:12:57.191 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:12:57.191 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:12:57.191 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:12:57.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:12:57.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:12:57.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:12:57.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:12:57.196 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:12:57.677 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:12:57.719 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:12:57.722 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:12:57.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:12:57.724 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:12:57.747 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:12:57.748 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:12:57.748 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:12:57.751 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:12:57.752 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:12:57.752 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:12:57.752 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:12:57.752 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:12:57.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:12:57.783 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:12:57.784 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:12:57.784 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:12:57.785 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:12:58.156 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:12:58.193 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:12:58.194 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:12:58.194 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:12:58.195 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:12:58.634 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:12:59.112 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:12:59.195 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:12:59.195 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:12:59.195 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:12:59.196 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:12:59.591 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:12:59.981 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:12:59.983 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:12:59.987 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:12:59.987 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:12:59.999 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:12:59.999 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:12:59.999 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:12:59.999 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:13:00.005 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:13:00.006 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:13:00.006 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:13:00.006 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:13:00.006 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:13:00.006 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:13:00.006 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:13:00.007 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=601 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:13:00.007 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=601 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:13:05.003 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:13:05.003 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:13:05.005 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:13:05.006 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:13:05.006 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:13:05.007 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:13:05.014 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:13:05.015 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:13:05.016 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:13:05.016 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:13:05.016 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:13:05.017 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:13:05.018 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:13:05.018 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:13:05.018 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:13:05.018 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:13:05.018 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:13:05.018 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:13:05.019 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:13:05.020 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:13:05.020 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:13:05.020 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:13:05.020 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:13:05.020 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:13:05.020 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:13:05.020 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:13:05.020 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:13:05.021 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:13:05.021 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:13:05.022 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:13:05.022 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:13:05.022 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:13:05.022 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:13:05.022 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:13:05.022 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:13:05.024 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:13:05.024 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:13:05.024 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:13:05.024 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:13:05.024 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:13:05.024 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:13:05.024 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:13:05.024 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:13:05.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:13:05.024 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:13:05.024 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:13:05.024 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:13:05.024 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:13:05.024 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:13:05.024 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:13:05.024 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:13:05.024 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:13:05.024 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:13:05.024 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:13:05.024 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:13:05.024 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:13:05.024 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:13:05.024 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:13:05.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:13:05.025 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:13:05.025 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:13:05.025 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:13:05.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:13:05.025 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:13:05.025 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:13:05.025 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:13:05.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:13:05.025 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:13:05.025 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:13:05.025 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:13:05.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:13:05.025 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:13:05.025 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:13:05.025 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:13:05.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:13:05.025 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:13:05.025 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:13:05.025 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:13:05.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:13:05.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:13:05.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:13:05.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:13:05.029 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:13:05.510 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:13:05.539 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:13:05.540 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:13:05.540 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:13:05.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:13:05.551 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:13:05.551 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:13:05.551 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:13:05.596 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:13:05.597 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:13:05.597 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:13:05.597 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:13:05.597 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:13:05.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:13:05.609 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:13:05.609 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:13:05.610 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:13:05.610 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:13:05.980 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:13:05.983 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:13:05.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:13:05.992 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:13:05.992 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:13:06.011 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:13:06.011 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:13:06.011 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:13:06.022 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:13:06.022 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:13:06.022 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:13:06.022 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:13:06.022 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:13:06.027 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:13:06.027 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:13:06.027 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:13:06.029 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:13:06.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:13:06.073 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:13:06.073 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:13:06.074 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:13:06.074 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:13:06.441 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:13:06.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:13:06.449 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:13:06.450 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:13:06.450 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:13:06.462 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:13:06.462 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:13:06.462 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:13:06.462 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:13:06.464 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:13:06.464 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:13:06.464 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:13:06.464 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:13:06.464 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:13:06.464 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:13:06.464 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:13:06.464 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=310 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:13:06.464 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=310 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:13:11.467 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:13:11.467 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:13:11.469 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:13:11.469 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:13:11.469 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:13:11.470 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:13:11.480 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:13:11.482 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:13:11.482 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:13:11.482 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:13:11.482 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:13:11.488 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:13:11.488 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:13:11.488 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:13:11.488 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:13:11.489 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:13:11.489 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:13:11.489 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:13:11.489 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:13:11.492 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:13:11.492 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:13:11.492 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:13:11.492 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:13:11.492 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:13:11.492 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:13:11.493 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:13:11.493 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:13:11.495 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:13:11.495 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:13:11.495 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:13:11.495 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:13:11.495 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:13:11.495 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:13:11.495 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:13:11.495 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:13:11.498 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:13:11.499 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:13:11.499 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:13:11.499 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:13:11.499 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:13:11.499 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:13:11.499 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:13:11.499 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:13:11.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:13:11.499 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:13:11.499 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:13:11.499 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:13:11.499 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:13:11.499 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:13:11.499 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:13:11.499 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:13:11.499 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:13:11.499 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:13:11.499 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:13:11.500 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:13:11.500 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:13:11.500 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:13:11.500 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:13:11.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:13:11.500 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:13:11.500 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:13:11.500 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:13:11.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:13:11.500 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:13:11.500 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:13:11.500 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:13:11.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:13:11.500 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:13:11.500 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:13:11.500 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:13:11.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:13:11.500 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:13:11.500 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:13:11.501 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:13:11.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:13:11.501 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:13:11.501 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:13:11.501 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:13:11.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:13:11.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:13:11.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:13:11.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:13:11.504 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:13:11.987 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:13:12.026 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:13:12.028 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:13:12.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:13:12.031 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:13:12.054 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:13:12.054 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:13:12.054 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:13:12.104 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:13:12.104 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:13:12.105 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:13:12.105 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:13:12.106 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:13:12.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:13:12.133 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:13:12.133 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:13:12.133 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:13:12.133 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:13:12.465 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:13:12.503 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:13:12.503 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:13:12.504 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:13:12.505 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:13:12.510 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:13:12.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:13:12.517 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:13:12.517 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:13:12.534 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:13:12.534 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:13:12.534 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:13:12.546 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:13:12.546 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:13:12.546 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:13:12.546 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:13:12.546 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:13:12.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:13:12.558 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:13:12.558 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:13:12.559 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:13:12.559 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:13:12.930 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:13:12.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:13:12.936 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:13:12.936 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:13:12.937 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:13:12.940 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:13:12.940 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:13:12.940 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:13:12.940 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:13:12.942 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:13:12.942 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:13:12.942 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:13:12.942 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:13:12.942 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:13:12.942 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:13:12.942 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:13:12.942 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=309 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:13:12.942 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=309 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:13:12.942 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=309 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:13:12.942 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=309 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:13:12.942 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=309 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:13:12.942 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=309 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:13:12.942 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=309 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:13:12.942 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=309 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:13:17.947 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:13:17.947 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:13:17.947 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:13:17.947 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:13:17.947 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:13:17.947 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:13:17.954 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:13:17.955 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:13:17.955 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:13:17.956 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:13:17.956 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:13:17.959 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:13:17.960 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:13:17.960 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:13:17.960 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:13:17.961 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:13:17.961 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:13:17.961 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:13:17.961 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:13:17.963 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:13:17.964 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:13:17.964 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:13:17.964 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:13:17.964 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:13:17.964 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:13:17.965 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:13:17.965 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:13:17.966 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:13:17.966 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:13:17.966 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:13:17.966 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:13:17.967 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:13:17.967 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:13:17.967 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:13:17.967 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:13:17.970 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:13:17.970 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:13:17.970 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:13:17.970 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:13:17.970 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:13:17.970 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:13:17.970 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:13:17.970 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:13:17.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:13:17.970 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:13:17.970 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:13:17.970 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:13:17.970 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:13:17.971 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:13:17.971 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:13:17.971 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:13:17.971 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:13:17.971 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:13:17.971 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:13:17.971 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:13:17.971 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:13:17.971 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:13:17.971 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:13:17.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:13:17.971 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:13:17.971 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:13:17.971 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:13:17.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:13:17.971 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:13:17.971 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:13:17.971 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:13:17.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:13:17.971 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:13:17.971 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:13:17.971 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:13:17.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:13:17.972 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:13:17.972 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:13:17.972 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:13:17.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:13:17.972 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:13:17.972 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:13:17.972 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:13:17.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:13:17.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:13:17.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:13:17.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:13:17.976 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:13:18.459 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:13:18.495 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:13:18.498 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:13:18.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:13:18.499 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:13:18.514 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:13:18.515 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:13:18.515 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:13:18.529 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:13:18.529 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:13:18.529 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:13:18.529 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:13:18.529 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:13:18.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:13:18.557 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:13:18.557 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:13:18.558 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:13:18.558 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:13:18.931 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:13:18.933 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:13:18.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:13:18.943 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:13:18.943 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:13:18.955 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:13:18.955 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:13:18.955 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:13:18.965 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:13:18.965 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:13:18.965 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:13:18.965 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:13:18.965 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:13:18.974 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:13:18.974 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:13:18.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:13:18.975 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:13:18.976 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:13:18.977 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:13:18.977 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:13:18.977 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:13:18.977 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:13:19.395 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:13:19.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:13:19.402 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:13:19.402 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:13:19.402 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:13:19.416 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:13:19.416 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:13:19.416 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:13:19.416 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:13:19.418 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:13:19.418 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:13:19.418 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:13:19.418 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:13:19.418 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:13:19.418 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:13:19.418 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:13:19.418 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=310 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:13:19.418 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=310 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:13:24.421 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:13:24.421 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:13:24.422 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:13:24.423 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:13:24.423 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:13:24.424 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:13:24.431 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:13:24.431 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:13:24.432 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:13:24.432 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:13:24.432 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:13:24.434 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:13:24.434 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:13:24.434 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:13:24.434 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:13:24.434 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:13:24.434 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:13:24.434 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:13:24.434 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:13:24.436 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:13:24.436 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:13:24.436 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:13:24.436 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:13:24.437 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:13:24.437 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:13:24.437 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:13:24.437 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:13:24.438 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:13:24.438 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:13:24.439 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:13:24.439 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:13:24.439 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:13:24.439 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:13:24.439 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:13:24.439 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:13:24.441 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:13:24.441 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:13:24.441 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:13:24.441 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:13:24.441 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:13:24.442 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:13:24.442 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:13:24.442 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:13:24.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:13:24.442 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:13:24.442 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:13:24.442 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:13:24.442 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:13:24.442 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:13:24.442 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:13:24.442 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:13:24.442 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:13:24.442 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:13:24.442 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:13:24.442 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:13:24.442 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:13:24.442 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:13:24.442 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:13:24.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:13:24.443 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:13:24.443 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:13:24.443 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:13:24.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:13:24.443 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:13:24.443 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:13:24.443 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:13:24.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:13:24.443 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:13:24.443 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:13:24.443 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:13:24.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:13:24.443 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:13:24.443 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:13:24.443 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:13:24.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:13:24.444 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:13:24.444 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:13:24.444 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:13:24.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:13:24.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:13:24.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:13:24.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:13:24.447 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:13:24.931 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:13:24.972 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:13:24.975 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:13:24.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:13:24.978 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:13:25.003 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:13:25.003 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:13:25.004 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:13:25.050 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:13:25.051 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:13:25.051 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:13:25.052 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:13:25.052 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:13:25.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:13:25.074 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:13:25.075 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:13:25.075 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:13:25.076 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:13:25.408 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:13:25.446 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:13:25.446 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:13:25.447 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:13:25.447 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:13:25.886 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:13:26.365 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:13:26.447 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:13:26.448 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:13:26.448 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:13:26.448 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:13:26.843 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:13:27.322 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:13:27.448 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:13:27.448 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:13:27.449 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:13:27.449 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:13:27.800 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:13:28.279 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:13:28.449 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:13:28.449 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:13:28.450 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:13:28.450 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:13:28.758 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:13:29.079 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:13:29.079 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:13:29.083 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:13:29.083 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:13:29.083 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:13:29.083 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:13:29.085 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:13:29.085 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:13:29.085 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:13:29.085 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:13:29.085 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:13:29.085 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:13:29.085 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:13:29.085 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=990 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:13:29.085 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=990 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:13:34.088 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:13:34.089 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:13:34.090 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:13:34.090 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:13:34.091 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:13:34.092 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:13:34.096 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:13:34.096 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:13:34.096 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:13:34.096 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:13:34.096 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:13:34.099 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:13:34.099 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:13:34.099 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:13:34.099 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:13:34.099 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:13:34.100 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:13:34.100 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:13:34.100 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:13:34.101 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:13:34.101 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:13:34.101 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:13:34.101 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:13:34.101 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:13:34.101 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:13:34.101 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:13:34.101 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:13:34.103 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:13:34.103 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:13:34.103 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:13:34.103 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:13:34.103 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:13:34.103 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:13:34.103 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:13:34.103 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:13:34.105 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:13:34.105 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:13:34.105 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:13:34.105 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:13:34.105 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:13:34.105 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:13:34.105 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:13:34.105 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:13:34.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:13:34.106 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:13:34.106 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:13:34.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:13:34.106 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:13:34.106 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:13:34.106 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:13:34.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:13:34.106 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:13:34.106 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:13:34.106 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:13:34.106 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:13:34.106 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:13:34.106 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:13:34.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:13:34.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:13:34.106 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:13:34.106 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:13:34.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:13:34.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:13:34.106 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:13:34.106 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:13:34.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:13:34.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:13:34.106 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:13:34.106 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:13:34.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:13:34.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:13:34.106 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:13:34.107 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:13:34.107 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:13:34.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:13:34.107 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:13:34.107 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:13:34.107 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:13:34.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:13:34.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:13:34.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:13:34.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:13:34.111 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:13:34.595 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:13:34.623 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:13:34.624 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:13:34.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:13:34.626 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:13:34.641 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:13:34.641 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:13:34.641 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:13:34.679 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:13:34.679 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:13:34.680 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:13:34.680 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:13:34.680 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:13:34.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:13:34.694 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:13:34.694 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:13:34.694 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:13:34.695 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:13:34.912 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:13:34.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:13:34.922 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:13:34.922 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:13:34.933 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:13:34.933 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:13:34.934 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:13:34.943 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:13:34.943 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:13:34.944 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:13:34.944 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:13:34.944 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:13:34.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:13:34.973 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:13:34.973 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:13:34.974 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:13:34.974 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:13:35.065 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:13:35.108 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:13:35.109 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:13:35.109 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:13:35.110 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:13:35.185 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:13:35.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:13:35.192 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:13:35.192 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:13:35.204 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:13:35.204 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:13:35.204 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:13:35.204 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:13:35.206 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:13:35.206 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:13:35.206 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:13:35.206 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:13:35.206 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:13:35.206 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:13:35.206 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:13:35.206 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=236 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:13:35.206 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=236 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:13:40.208 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:13:40.208 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:13:40.210 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:13:40.212 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:13:40.212 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:13:40.213 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:13:40.221 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:13:40.222 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:13:40.222 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:13:40.222 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:13:40.222 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:13:40.224 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:13:40.224 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:13:40.224 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:13:40.224 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:13:40.224 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:13:40.224 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:13:40.224 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:13:40.224 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:13:40.226 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:13:40.226 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:13:40.226 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:13:40.226 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:13:40.227 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:13:40.227 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:13:40.227 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:13:40.227 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:13:40.229 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:13:40.229 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:13:40.229 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:13:40.229 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:13:40.229 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:13:40.230 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:13:40.230 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:13:40.230 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:13:40.233 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:13:40.233 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:13:40.233 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:13:40.233 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:13:40.233 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:13:40.233 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:13:40.234 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:13:40.234 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:13:40.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:13:40.234 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:13:40.234 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:13:40.234 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:13:40.234 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:13:40.234 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:13:40.234 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:13:40.234 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:13:40.234 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:13:40.234 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:13:40.234 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:13:40.234 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:13:40.235 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:13:40.235 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:13:40.235 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:13:40.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:13:40.235 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:13:40.235 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:13:40.235 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:13:40.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:13:40.235 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:13:40.235 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:13:40.235 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:13:40.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:13:40.235 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:13:40.235 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:13:40.235 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:13:40.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:13:40.235 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:13:40.235 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:13:40.235 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:13:40.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:13:40.236 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:13:40.236 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:13:40.236 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:13:40.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:13:40.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:13:40.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:13:40.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:13:40.239 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:13:40.723 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:13:40.765 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:13:40.767 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:13:40.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:13:40.769 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:13:40.788 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:13:40.789 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:13:40.789 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:13:40.833 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:13:40.834 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:13:40.834 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:13:40.834 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:13:40.834 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:13:40.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:13:40.884 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:13:40.884 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:13:40.885 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:13:40.885 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:13:41.201 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:13:41.239 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:13:41.239 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:13:41.240 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:13:41.244 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:13:41.680 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:13:42.159 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:13:42.240 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:13:42.240 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:13:42.242 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:13:42.245 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:13:42.638 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:13:43.116 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:13:43.241 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:13:43.241 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:13:43.242 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:13:43.246 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:13:43.594 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:13:44.072 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:13:44.241 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:13:44.242 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:13:44.243 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:13:44.247 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:13:44.551 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:13:44.890 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:13:44.890 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:13:44.894 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:13:44.894 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:13:44.895 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:13:44.895 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:13:44.896 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:13:44.896 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:13:44.896 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:13:44.896 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:13:44.896 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:13:44.896 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:13:44.896 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:13:44.896 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=994 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:13:44.896 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=994 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:13:44.896 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=994 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:13:44.896 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=994 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:13:44.896 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=994 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:13:44.896 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=994 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:13:44.896 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=994 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:13:49.899 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:13:49.899 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:13:49.901 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:13:49.901 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:13:49.902 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:13:49.902 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:13:49.909 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:13:49.910 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:13:49.910 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:13:49.910 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:13:49.910 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:13:49.913 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:13:49.913 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:13:49.913 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:13:49.913 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:13:49.913 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:13:49.913 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:13:49.913 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:13:49.913 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:13:49.915 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:13:49.915 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:13:49.915 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:13:49.915 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:13:49.915 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:13:49.916 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:13:49.916 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:13:49.916 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:13:49.917 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:13:49.917 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:13:49.917 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:13:49.917 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:13:49.917 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:13:49.917 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:13:49.917 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:13:49.917 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:13:49.920 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:13:49.920 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:13:49.920 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:13:49.920 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:13:49.920 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:13:49.920 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:13:49.920 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:13:49.920 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:13:49.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:13:49.920 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:13:49.920 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:13:49.920 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:13:49.920 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:13:49.920 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:13:49.920 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:13:49.920 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:13:49.920 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:13:49.920 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:13:49.920 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:13:49.920 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:13:49.920 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:13:49.920 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:13:49.920 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:13:49.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:13:49.921 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:13:49.921 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:13:49.921 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:13:49.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:13:49.921 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:13:49.921 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:13:49.921 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:13:49.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:13:49.921 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:13:49.921 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:13:49.921 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:13:49.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:13:49.921 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:13:49.921 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:13:49.921 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:13:49.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:13:49.921 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:13:49.921 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:13:49.921 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:13:49.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:13:49.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:13:49.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:13:49.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:13:49.925 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:13:50.407 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:13:50.444 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:13:50.446 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:13:50.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:13:50.447 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:13:50.464 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:13:50.464 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:13:50.465 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:13:50.514 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:13:50.514 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:13:50.515 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:13:50.515 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:13:50.516 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:13:50.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:13:50.553 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:13:50.553 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:13:50.554 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:13:50.554 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:13:50.884 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:13:50.923 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:13:50.923 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:13:50.923 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:13:50.924 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:13:51.271 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:13:51.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:13:51.280 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:13:51.280 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:13:51.290 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:13:51.290 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:13:51.290 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:13:51.290 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:13:51.298 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:13:51.299 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:13:51.299 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:13:51.299 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:13:51.299 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:13:51.299 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:13:51.299 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:13:51.300 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=293 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:13:51.300 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=293 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:13:56.295 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:13:56.295 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:13:56.297 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:13:56.297 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:13:56.298 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:13:56.298 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:13:56.307 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:13:56.308 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:13:56.308 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:13:56.308 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:13:56.308 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:13:56.310 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:13:56.310 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:13:56.311 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:13:56.311 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:13:56.311 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:13:56.311 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:13:56.311 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:13:56.311 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:13:56.313 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:13:56.313 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:13:56.313 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:13:56.313 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:13:56.313 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:13:56.313 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:13:56.313 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:13:56.313 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:13:56.315 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:13:56.315 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:13:56.315 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:13:56.315 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:13:56.315 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:13:56.315 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:13:56.315 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:13:56.315 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:13:56.317 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:13:56.317 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:13:56.317 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:13:56.317 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:13:56.317 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:13:56.318 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:13:56.318 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:13:56.318 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:13:56.318 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:13:56.318 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:13:56.318 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:13:56.318 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:13:56.318 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:13:56.318 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:13:56.318 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:13:56.318 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:13:56.318 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:13:56.318 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:13:56.318 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:13:56.318 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:13:56.318 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:13:56.318 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:13:56.318 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:13:56.318 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:13:56.318 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:13:56.318 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:13:56.318 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:13:56.318 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:13:56.318 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:13:56.319 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:13:56.319 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:13:56.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:13:56.319 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:13:56.319 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:13:56.319 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:13:56.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:13:56.319 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:13:56.319 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:13:56.319 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:13:56.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:13:56.319 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:13:56.319 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:13:56.319 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:13:56.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:13:56.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:13:56.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:13:56.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:13:56.323 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:13:56.807 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:13:56.841 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:13:56.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:13:56.843 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:13:56.844 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:13:56.859 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:13:56.860 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:13:56.860 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:13:56.908 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:13:56.909 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:13:56.909 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:13:56.910 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:13:56.910 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:13:56.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:13:56.951 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:13:56.952 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:13:56.952 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:13:56.953 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:13:57.285 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:13:57.321 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:13:57.322 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:13:57.322 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:13:57.325 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:13:57.672 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:13:57.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:13:57.681 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:13:57.681 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:13:57.694 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:13:57.694 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:13:57.694 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:13:57.694 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:13:57.695 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:13:57.695 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:13:57.695 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:13:57.695 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:13:57.695 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:13:57.695 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:13:57.695 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:14:02.698 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:14:02.698 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:14:02.700 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:14:02.700 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:14:02.700 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:14:02.700 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:14:02.709 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:14:02.710 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:14:02.711 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:14:02.711 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:14:02.711 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:14:02.715 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:14:02.715 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:14:02.716 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:14:02.716 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:14:02.716 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:14:02.716 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:14:02.717 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:14:02.717 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:14:02.718 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:14:02.719 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:14:02.719 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:14:02.719 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:14:02.719 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:14:02.719 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:14:02.719 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:14:02.719 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:14:02.721 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:14:02.721 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:14:02.721 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:14:02.721 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:14:02.721 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:14:02.722 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:14:02.722 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:14:02.722 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:14:02.724 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:14:02.724 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:14:02.724 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:14:02.725 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:14:02.725 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:14:02.725 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:14:02.725 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:14:02.725 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:14:02.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:14:02.725 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:14:02.725 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:14:02.725 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:14:02.725 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:14:02.725 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:14:02.725 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:14:02.725 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:14:02.725 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:14:02.725 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:14:02.725 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:14:02.725 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:14:02.725 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:14:02.726 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:14:02.726 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:14:02.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:14:02.726 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:14:02.726 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:14:02.726 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:14:02.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:14:02.726 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:14:02.726 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:14:02.726 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:14:02.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:14:02.726 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:14:02.726 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:14:02.726 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:14:02.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:14:02.726 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:14:02.726 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:14:02.726 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:14:02.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:14:02.726 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:14:02.726 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:14:02.726 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:14:02.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:14:02.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:14:02.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:14:02.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:14:02.730 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:14:03.215 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:14:03.251 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:14:03.253 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:14:03.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:14:03.255 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:14:03.275 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:14:03.275 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:14:03.275 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:14:03.321 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:14:03.322 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:14:03.322 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:14:03.322 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:14:03.322 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:14:03.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:14:03.363 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:14:03.364 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:14:03.364 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:14:03.364 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:14:03.691 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:14:03.729 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:14:03.730 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:14:03.730 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:14:03.730 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:14:04.078 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:14:04.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:14:04.085 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:14:04.085 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:14:04.093 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:14:04.093 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:14:04.093 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:14:04.093 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:14:04.098 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:14:04.098 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:14:04.098 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:14:04.098 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:14:04.098 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:14:04.098 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:14:04.098 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:14:04.098 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=293 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:14:04.099 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=293 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:14:04.099 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=293 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:14:04.099 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=293 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:14:04.099 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=293 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:14:04.099 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=293 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:14:04.099 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=293 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:14:04.099 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=294 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:14:04.099 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=294 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:14:04.099 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=294 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:14:04.099 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=294 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:14:04.099 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=294 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:14:04.099 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=294 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:14:04.099 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=294 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:14:04.099 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=294 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:14:09.098 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:14:09.098 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:14:09.099 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:14:09.101 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:14:09.103 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:14:09.103 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:14:09.112 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:14:09.112 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:14:09.112 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:14:09.112 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:14:09.112 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:14:09.113 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:14:09.113 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:14:09.113 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:14:09.113 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:14:09.113 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:14:09.113 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:14:09.113 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:14:09.113 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:14:09.114 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:14:09.114 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:14:09.114 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:14:09.114 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:14:09.115 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:14:09.115 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:14:09.115 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:14:09.115 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:14:09.116 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:14:09.116 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:14:09.116 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:14:09.116 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:14:09.116 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:14:09.116 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:14:09.116 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:14:09.116 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:14:09.118 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:14:09.118 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:14:09.118 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:14:09.118 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:14:09.118 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:14:09.118 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:14:09.118 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:14:09.118 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:14:09.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:14:09.118 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:14:09.118 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:14:09.118 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:14:09.118 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:14:09.118 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:14:09.118 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:14:09.118 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:14:09.118 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:14:09.118 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:14:09.118 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:14:09.118 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:14:09.118 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:14:09.118 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:14:09.118 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:14:09.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:14:09.118 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:14:09.119 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:14:09.119 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:14:09.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:14:09.119 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:14:09.119 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:14:09.119 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:14:09.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:14:09.119 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:14:09.119 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:14:09.119 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:14:09.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:14:09.119 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:14:09.119 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:14:09.119 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:14:09.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:14:09.119 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:14:09.119 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:14:09.119 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:14:09.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:14:09.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:14:09.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:14:09.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:14:09.123 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:14:09.594 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:14:09.636 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:14:09.637 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:14:09.637 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:14:09.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:14:09.656 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:14:09.656 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:14:09.656 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:14:09.687 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:14:09.687 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:14:09.687 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:14:09.687 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:14:09.687 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:14:09.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:14:09.740 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:14:09.740 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:14:09.740 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:14:09.740 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:14:10.064 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:14:10.121 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:14:10.121 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:14:10.121 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:14:10.121 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:14:10.533 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:14:10.581 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:14:10.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:14:10.589 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:14:10.589 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:14:10.602 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:14:10.602 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:14:10.602 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:14:10.602 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:14:10.604 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:14:10.604 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:14:10.604 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:14:10.604 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:14:10.604 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:14:10.604 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:14:10.604 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:14:15.606 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:14:15.606 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:14:15.608 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:14:15.608 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:14:15.608 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:14:15.609 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:14:15.618 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:14:15.618 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:14:15.619 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:14:15.619 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:14:15.619 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:14:15.621 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:14:15.622 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:14:15.622 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:14:15.622 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:14:15.622 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:14:15.622 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:14:15.623 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:14:15.623 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:14:15.624 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:14:15.624 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:14:15.624 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:14:15.624 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:14:15.624 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:14:15.624 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:14:15.624 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:14:15.624 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:14:15.626 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:14:15.626 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:14:15.626 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:14:15.626 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:14:15.626 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:14:15.626 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:14:15.626 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:14:15.626 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:14:15.629 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:14:15.629 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:14:15.629 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:14:15.629 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:14:15.629 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:14:15.629 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:14:15.629 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:14:15.629 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:14:15.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:14:15.629 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:14:15.629 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:14:15.629 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:14:15.629 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:14:15.629 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:14:15.629 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:14:15.629 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:14:15.629 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:14:15.629 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:14:15.629 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:14:15.629 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:14:15.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:14:15.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:14:15.630 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:14:15.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:14:15.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:14:15.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:14:15.630 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:14:15.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:14:15.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:14:15.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:14:15.630 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:14:15.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:14:15.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:14:15.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:14:15.630 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:14:15.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:14:15.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:14:15.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:14:15.630 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:14:15.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:14:15.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:14:15.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:14:15.630 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:14:15.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:14:15.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:14:15.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:14:15.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:14:15.634 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:14:16.118 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:14:16.149 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:14:16.150 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:14:16.151 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:14:16.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:14:16.165 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:14:16.165 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:14:16.166 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:14:16.209 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:14:16.210 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:14:16.210 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:14:16.210 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:14:16.210 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:14:16.258 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:14:16.263 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:14:16.263 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:14:16.263 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:14:16.264 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:14:16.588 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:14:16.632 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:14:16.632 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:14:16.632 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:14:16.635 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:14:16.971 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:14:16.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:14:16.976 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:14:16.976 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:14:16.988 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:14:16.988 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:14:16.988 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:14:16.988 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:14:16.989 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:14:16.989 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:14:16.990 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:14:16.990 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:14:16.990 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:14:16.990 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:14:16.990 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:14:21.991 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:14:21.991 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:14:21.993 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:14:21.993 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:14:21.994 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:14:21.994 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:14:22.001 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:14:22.002 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:14:22.002 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:14:22.003 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:14:22.003 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:14:22.006 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:14:22.007 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:14:22.007 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:14:22.007 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:14:22.007 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:14:22.007 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:14:22.007 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:14:22.007 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:14:22.009 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:14:22.009 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:14:22.009 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:14:22.009 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:14:22.010 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:14:22.010 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:14:22.010 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:14:22.010 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:14:22.012 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:14:22.012 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:14:22.012 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:14:22.012 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:14:22.012 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:14:22.012 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:14:22.013 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:14:22.013 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:14:22.015 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:14:22.015 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:14:22.015 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:14:22.015 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:14:22.015 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:14:22.015 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:14:22.015 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:14:22.016 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:14:22.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:14:22.016 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:14:22.016 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:14:22.016 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:14:22.016 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:14:22.016 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:14:22.016 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:14:22.016 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:14:22.016 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:14:22.016 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:14:22.016 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:14:22.016 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:14:22.016 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:14:22.016 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:14:22.016 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:14:22.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:14:22.016 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:14:22.016 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:14:22.016 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:14:22.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:14:22.016 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:14:22.016 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:14:22.016 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:14:22.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:14:22.016 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:14:22.016 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:14:22.017 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:14:22.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:14:22.017 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:14:22.017 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:14:22.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:14:22.017 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:14:22.017 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:14:22.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:14:22.017 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:14:22.017 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:14:22.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:14:22.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:14:22.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:14:22.021 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:14:22.505 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:14:22.540 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:14:22.543 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:14:22.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:14:22.545 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:14:22.570 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:14:22.570 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:14:22.570 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:14:22.609 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:14:22.609 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:14:22.609 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:14:22.609 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:14:22.609 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:14:22.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:14:22.650 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:14:22.651 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:14:22.651 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:14:22.651 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:14:22.983 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:14:23.019 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:14:23.019 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:14:23.019 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:14:23.021 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:14:23.461 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:14:23.511 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:14:23.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:14:23.519 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:14:23.519 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:14:23.533 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:14:23.534 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:14:23.534 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:14:23.534 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:14:23.543 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:14:23.543 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:14:23.543 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:14:23.544 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:14:23.544 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:14:23.544 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:14:23.544 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:14:23.544 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=324 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:14:23.544 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=324 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:14:23.545 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=324 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:14:23.545 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=324 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:14:23.545 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=324 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:14:23.545 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=324 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:14:23.545 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=325 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:14:23.545 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=325 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:14:23.545 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=325 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:14:23.545 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=325 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:14:23.545 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=325 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:14:23.545 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=325 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:14:23.546 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=325 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:14:23.546 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=325 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:14:23.546 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=326 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:14:23.546 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=326 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:14:23.546 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=326 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:14:23.546 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=326 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:14:23.546 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=326 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:14:28.535 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:14:28.535 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:14:28.537 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:14:28.538 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:14:28.538 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:14:28.539 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:14:28.546 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:14:28.546 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:14:28.546 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:14:28.547 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:14:28.547 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:14:28.548 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:14:28.549 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:14:28.549 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:14:28.549 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:14:28.549 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:14:28.549 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:14:28.549 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:14:28.549 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:14:28.551 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:14:28.551 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:14:28.551 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:14:28.551 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:14:28.551 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:14:28.551 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:14:28.551 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:14:28.551 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:14:28.552 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:14:28.552 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:14:28.552 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:14:28.553 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:14:28.553 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:14:28.553 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:14:28.553 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:14:28.553 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:14:28.555 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:14:28.555 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:14:28.555 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:14:28.555 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:14:28.555 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:14:28.555 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:14:28.555 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:14:28.555 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:14:28.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:14:28.555 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:14:28.555 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:14:28.555 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:14:28.555 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:14:28.555 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:14:28.555 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:14:28.555 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:14:28.555 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:14:28.555 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:14:28.555 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:14:28.555 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:14:28.555 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:14:28.556 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:14:28.556 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:14:28.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:14:28.556 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:14:28.556 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:14:28.556 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:14:28.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:14:28.556 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:14:28.556 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:14:28.556 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:14:28.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:14:28.556 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:14:28.556 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:14:28.556 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:14:28.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:14:28.556 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:14:28.556 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:14:28.556 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:14:28.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:14:28.556 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:14:28.556 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:14:28.556 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:14:28.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:14:28.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:14:28.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:14:28.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:14:28.560 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:14:29.045 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:14:29.077 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:14:29.078 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:14:29.080 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:14:29.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:14:29.097 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:14:29.098 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:14:29.098 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:14:29.103 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:14:29.103 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:14:29.104 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:14:29.104 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:14:29.105 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:14:29.522 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:14:29.558 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:14:29.558 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:14:29.558 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:14:29.560 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:14:30.000 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:14:30.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:14:30.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:14:30.278 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:14:30.278 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:14:30.291 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:14:30.291 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:14:30.291 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:14:30.292 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:14:30.292 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:14:30.292 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:14:30.292 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:14:30.292 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:14:30.478 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:14:30.559 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:14:30.559 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:14:30.559 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:14:30.561 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:14:30.956 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:14:31.340 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD NOHANDOVER
2026-01-09 02:14:31.434 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:14:31.470 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD NOHANDOVER
2026-01-09 02:14:31.474 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:14:31.474 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:14:31.487 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:14:31.487 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:14:31.487 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:14:31.487 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:14:31.488 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:14:31.489 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:14:31.489 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:14:31.489 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:14:31.489 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:14:31.489 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:14:31.489 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:14:36.488 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:14:36.488 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:14:36.490 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:14:36.491 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:14:36.492 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:14:36.492 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:14:36.496 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:14:36.496 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:14:36.496 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:14:36.496 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:14:36.496 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:14:36.497 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:14:36.497 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:14:36.497 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:14:36.497 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:14:36.497 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:14:36.498 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:14:36.498 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:14:36.498 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:14:36.499 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:14:36.499 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:14:36.499 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:14:36.499 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:14:36.499 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:14:36.499 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:14:36.499 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:14:36.499 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:14:36.500 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:14:36.500 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:14:36.500 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:14:36.500 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:14:36.501 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:14:36.501 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:14:36.501 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:14:36.501 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:14:36.503 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:14:36.503 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:14:36.503 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:14:36.503 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:14:36.503 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:14:36.503 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:14:36.503 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:14:36.503 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:14:36.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:14:36.503 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:14:36.503 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:14:36.503 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:14:36.503 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:14:36.503 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:14:36.503 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:14:36.503 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:14:36.503 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:14:36.503 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:14:36.503 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:14:36.503 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:14:36.503 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:14:36.503 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:14:36.503 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:14:36.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:14:36.504 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:14:36.504 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:14:36.504 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:14:36.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:14:36.504 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:14:36.504 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:14:36.504 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:14:36.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:14:36.504 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:14:36.504 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:14:36.504 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:14:36.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:14:36.504 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:14:36.504 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:14:36.504 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:14:36.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:14:36.504 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:14:36.504 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:14:36.504 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:14:36.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:14:36.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:14:36.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:14:36.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:14:36.508 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:14:36.992 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:14:37.022 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:14:37.023 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:14:37.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:14:37.025 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:14:37.039 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:14:37.039 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:14:37.039 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:14:37.461 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:14:37.506 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:14:37.506 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:14:37.507 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:14:37.508 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:14:37.930 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:14:38.406 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:14:38.508 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:14:38.508 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:14:38.508 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:14:38.509 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:14:38.884 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:14:39.365 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:14:39.509 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:14:39.509 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:14:39.509 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:14:39.510 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:14:39.837 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:14:40.315 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:14:40.510 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:14:40.510 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:14:40.510 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:14:40.511 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:14:40.795 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:14:41.268 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 02:14:41.511 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:14:41.511 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:14:41.511 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:14:41.512 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:14:41.737 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 02:14:42.206 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 02:14:42.675 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 02:14:43.048 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:14:43.048 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:14:43.049 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:14:43.049 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:14:43.050 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:14:43.149 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 02:14:43.171 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD NOHANDOVER
2026-01-09 02:14:43.175 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:14:43.175 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:14:43.176 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:14:43.176 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:14:43.627 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 02:14:44.107 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 02:14:44.585 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 02:14:45.065 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 02:14:45.545 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 02:14:46.017 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 02:14:46.488 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 02:14:46.959 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 02:14:47.429 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 02:14:47.900 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 02:14:48.371 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 02:14:48.845 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 02:14:49.324 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-09 02:14:49.804 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-09 02:14:50.282 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-09 02:14:50.762 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-09 02:14:51.240 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-09 02:14:51.719 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-09 02:14:52.198 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-09 02:14:52.677 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-09 02:14:53.155 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-09 02:14:53.630 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-09 02:14:54.099 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-09 02:14:54.569 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-09 02:14:55.049 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-09 02:14:55.527 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-09 02:14:55.826 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD NOHANDOVER
2026-01-09 02:14:55.829 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:14:55.831 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:14:55.832 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:14:55.845 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:14:55.845 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:14:55.845 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:14:55.845 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:14:55.857 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:14:55.857 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:14:55.857 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:14:55.857 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:14:55.857 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:14:55.857 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:14:55.857 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:14:55.858 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4150 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:14:55.858 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4150 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:14:55.858 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4150 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:14:55.858 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4150 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:14:55.858 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4150 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:14:55.858 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4150 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:14:55.858 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4151 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:14:55.858 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4151 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:14:55.858 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4151 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:14:55.858 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4151 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:14:55.858 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4151 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:14:55.858 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4151 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:14:55.858 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4151 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:14:55.859 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4151 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:14:55.859 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4152 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:14:55.859 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4152 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:14:55.859 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4152 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:14:55.859 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4152 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:14:55.859 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4152 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:14:55.859 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4152 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:14:55.859 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4152 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:14:55.859 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4152 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:14:55.859 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4153 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:14:55.859 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4153 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:14:55.860 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4153 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:14:55.860 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4153 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:14:55.860 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4153 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:14:55.860 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4153 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:14:55.860 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4153 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:14:55.860 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4153 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:15:00.854 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:15:00.854 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:15:00.854 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:15:00.854 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:15:00.854 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:15:00.854 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:15:00.858 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:15:00.858 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:15:00.858 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:15:00.859 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:15:00.859 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:15:00.860 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:15:00.861 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:15:00.861 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:15:00.861 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:15:00.861 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:15:00.861 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:15:00.862 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:15:00.862 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:15:00.863 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:15:00.863 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:15:00.863 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:15:00.863 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:15:00.863 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:15:00.863 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:15:00.863 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:15:00.863 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:15:00.865 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:15:00.865 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:15:00.865 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:15:00.865 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:15:00.865 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:15:00.865 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:15:00.865 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:15:00.865 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:15:00.867 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:15:00.867 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:15:00.867 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:15:00.867 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:15:00.867 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:15:00.867 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:15:00.867 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:15:00.867 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:15:00.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:15:00.867 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:15:00.867 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:15:00.867 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:15:00.868 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:15:00.868 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:15:00.868 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:15:00.868 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:15:00.868 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:15:00.868 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:15:00.868 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:15:00.868 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:15:00.868 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:15:00.868 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:15:00.868 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:15:00.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:15:00.868 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:15:00.868 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:15:00.868 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:15:00.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:15:00.868 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:15:00.868 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:15:00.868 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:15:00.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:15:00.868 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:15:00.868 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:15:00.868 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:15:00.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:15:00.868 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:15:00.869 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:15:00.869 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:15:00.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:15:00.869 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:15:00.869 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:15:00.869 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:15:00.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:15:00.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:15:00.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:15:00.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:15:00.872 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:15:01.354 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:15:01.392 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:15:01.394 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:15:01.395 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:15:01.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:15:01.415 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:15:01.415 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:15:01.415 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:15:01.834 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:15:01.871 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:15:01.871 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:15:01.872 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:15:01.872 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:15:02.313 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:15:02.792 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:15:02.872 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:15:02.872 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:15:02.873 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:15:02.873 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:15:03.271 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:15:03.749 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:15:03.874 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:15:03.874 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:15:03.874 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:15:03.874 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:15:04.227 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:15:04.708 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:15:04.875 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:15:04.875 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:15:04.876 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:15:04.876 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:15:05.187 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:15:05.666 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 02:15:05.877 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:15:05.877 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:15:05.877 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:15:05.877 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:15:06.146 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 02:15:06.624 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 02:15:07.103 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 02:15:07.424 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:15:07.425 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:15:07.426 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:15:07.426 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:15:07.426 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:15:07.581 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 02:15:07.602 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD NOHANDOVER
2026-01-09 02:15:07.607 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:15:07.607 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:15:07.607 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:15:07.608 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:15:08.060 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 02:15:08.538 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 02:15:09.017 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 02:15:09.496 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 02:15:09.974 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 02:15:10.454 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 02:15:10.927 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 02:15:11.406 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 02:15:11.884 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 02:15:12.356 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 02:15:12.830 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 02:15:13.308 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 02:15:13.478 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD NOHANDOVER
2026-01-09 02:15:13.482 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:15:13.484 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:15:13.484 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:15:13.491 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:15:13.491 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:15:13.491 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:15:13.491 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:15:13.496 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:15:13.496 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:15:13.496 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:15:13.496 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:15:13.496 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:15:13.496 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:15:13.496 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:15:13.496 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2694 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:15:13.496 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2694 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:15:18.495 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:15:18.496 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:15:18.498 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:15:18.500 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:15:18.502 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:15:18.506 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:15:18.517 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:15:18.518 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:15:18.518 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:15:18.518 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:15:18.518 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:15:18.520 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:15:18.520 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:15:18.520 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:15:18.520 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:15:18.520 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:15:18.521 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:15:18.521 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:15:18.521 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:15:18.523 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:15:18.523 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:15:18.523 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:15:18.524 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:15:18.524 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:15:18.524 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:15:18.524 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:15:18.524 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:15:18.526 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:15:18.526 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:15:18.526 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:15:18.526 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:15:18.527 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:15:18.527 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:15:18.527 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:15:18.527 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:15:18.530 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:15:18.530 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:15:18.530 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:15:18.530 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:15:18.530 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:15:18.530 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:15:18.530 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:15:18.530 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:15:18.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:15:18.530 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:15:18.531 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:15:18.531 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:15:18.531 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:15:18.531 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:15:18.531 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:15:18.531 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:15:18.531 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:15:18.531 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:15:18.531 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:15:18.531 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:15:18.531 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:15:18.531 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:15:18.531 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:15:18.531 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:15:18.531 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:15:18.531 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:15:18.531 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:15:18.531 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:15:18.531 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:15:18.531 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:15:18.531 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:15:18.531 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:15:18.531 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:15:18.532 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:15:18.532 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:15:18.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:15:18.532 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:15:18.532 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:15:18.532 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:15:18.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:15:18.532 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:15:18.532 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:15:18.532 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:15:18.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:15:18.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:15:18.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:15:18.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:15:18.536 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:15:19.004 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:15:19.056 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:15:19.057 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:15:19.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:15:19.059 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:15:19.072 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:15:19.072 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:15:19.072 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:15:19.472 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:15:19.534 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:15:19.534 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:15:19.534 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:15:19.535 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:15:19.941 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:15:20.409 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:15:20.535 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:15:20.535 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:15:20.535 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:15:20.536 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:15:20.877 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:15:21.345 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:15:21.536 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:15:21.536 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:15:21.536 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:15:21.537 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:15:21.823 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:15:22.303 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:15:22.537 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:15:22.537 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:15:22.537 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:15:22.538 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:15:22.781 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:15:23.259 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 02:15:23.539 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:15:23.539 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:15:23.539 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:15:23.540 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:15:23.740 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 02:15:24.220 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 02:15:24.699 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 02:15:25.081 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:15:25.081 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:15:25.081 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:15:25.081 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:15:25.081 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:15:25.178 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 02:15:25.199 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD NOHANDOVER
2026-01-09 02:15:25.204 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:15:25.204 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:15:25.204 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:15:25.205 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:15:25.650 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 02:15:26.124 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 02:15:26.597 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 02:15:27.070 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 02:15:27.539 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 02:15:28.009 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 02:15:28.480 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 02:15:28.951 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 02:15:29.421 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 02:15:29.894 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 02:15:30.043 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD NOHANDOVER
2026-01-09 02:15:30.046 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:15:30.048 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:15:30.048 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:15:30.061 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:15:30.061 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:15:30.061 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:15:30.061 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:15:30.062 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:15:30.063 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:15:30.063 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:15:30.063 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:15:30.063 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:15:30.063 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:15:30.063 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:15:30.063 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2486 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:15:30.063 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2486 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:15:35.065 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:15:35.065 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:15:35.067 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:15:35.067 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:15:35.068 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:15:35.068 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:15:35.077 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:15:35.077 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:15:35.078 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:15:35.078 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:15:35.078 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:15:35.080 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:15:35.080 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:15:35.080 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:15:35.081 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:15:35.081 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:15:35.081 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:15:35.081 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:15:35.081 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:15:35.082 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:15:35.083 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:15:35.083 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:15:35.083 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:15:35.083 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:15:35.083 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:15:35.083 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:15:35.083 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:15:35.085 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:15:35.085 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:15:35.085 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:15:35.085 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:15:35.085 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:15:35.085 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:15:35.085 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:15:35.085 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:15:35.088 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:15:35.088 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:15:35.088 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:15:35.088 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:15:35.088 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:15:35.088 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:15:35.088 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:15:35.088 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:15:35.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:15:35.088 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:15:35.088 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:15:35.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:15:35.089 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:15:35.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:15:35.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:15:35.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:15:35.089 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:15:35.089 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:15:35.089 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:15:35.089 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:15:35.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:15:35.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:15:35.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:15:35.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:15:35.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:15:35.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:15:35.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:15:35.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:15:35.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:15:35.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:15:35.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:15:35.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:15:35.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:15:35.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:15:35.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:15:35.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:15:35.090 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:15:35.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:15:35.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:15:35.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:15:35.090 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:15:35.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:15:35.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:15:35.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:15:35.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:15:35.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:15:35.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:15:35.094 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:15:35.577 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:15:35.613 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:15:35.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:15:35.615 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:15:35.617 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:15:35.637 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:15:35.638 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:15:35.638 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:15:36.056 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:15:36.093 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:15:36.094 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:15:36.094 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:15:36.095 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:15:36.535 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:15:37.013 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:15:37.094 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:15:37.095 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:15:37.095 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:15:37.096 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:15:37.482 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:15:37.951 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:15:38.096 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:15:38.096 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:15:38.096 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:15:38.098 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:15:38.430 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:15:38.911 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:15:39.098 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:15:39.098 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:15:39.098 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:15:39.099 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:15:39.391 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:15:39.871 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 02:15:40.099 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:15:40.099 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:15:40.099 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:15:40.100 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:15:40.350 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 02:15:40.828 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 02:15:41.303 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 02:15:41.648 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:15:41.649 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:15:41.649 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:15:41.649 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:15:41.650 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:15:41.772 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 02:15:41.790 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD NOHANDOVER
2026-01-09 02:15:41.796 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:15:41.796 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:15:41.796 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:15:41.796 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:15:42.248 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 02:15:42.724 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 02:15:43.193 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 02:15:43.662 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 02:15:44.133 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 02:15:44.605 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 02:15:45.079 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 02:15:45.548 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 02:15:46.017 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 02:15:46.491 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 02:15:46.638 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD NOHANDOVER
2026-01-09 02:15:46.641 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:15:46.643 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:15:46.644 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:15:46.651 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:15:46.651 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:15:46.651 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:15:46.651 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:15:46.653 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:15:46.653 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:15:46.653 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:15:46.653 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:15:46.653 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:15:46.653 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:15:46.653 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:15:46.653 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2486 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:15:46.653 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2486 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:15:46.653 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2486 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:15:51.657 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:15:51.657 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:15:51.658 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:15:51.658 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:15:51.659 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:15:51.660 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:15:51.664 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:15:51.664 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:15:51.664 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:15:51.664 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:15:51.664 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:15:51.667 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:15:51.667 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:15:51.667 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:15:51.667 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:15:51.667 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:15:51.667 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:15:51.668 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:15:51.668 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:15:51.669 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:15:51.669 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:15:51.669 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:15:51.669 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:15:51.669 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:15:51.669 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:15:51.669 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:15:51.669 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:15:51.670 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:15:51.670 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:15:51.670 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:15:51.670 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:15:51.671 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:15:51.671 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:15:51.671 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:15:51.671 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:15:51.673 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:15:51.673 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:15:51.673 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:15:51.673 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:15:51.673 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:15:51.673 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:15:51.673 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:15:51.673 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:15:51.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:15:51.673 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:15:51.673 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:15:51.673 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:15:51.673 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:15:51.673 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:15:51.673 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:15:51.673 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:15:51.673 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:15:51.673 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:15:51.673 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:15:51.674 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:15:51.674 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:15:51.674 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:15:51.674 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:15:51.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:15:51.674 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:15:51.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:15:51.674 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:15:51.674 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:15:51.674 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:15:51.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:15:51.674 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:15:51.674 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:15:51.674 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:15:51.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:15:51.674 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:15:51.674 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:15:51.674 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:15:51.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:15:51.674 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:15:51.674 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:15:51.674 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:15:51.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:15:51.674 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:15:51.674 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:15:51.675 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:15:51.675 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:15:51.675 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:15:51.678 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:15:52.163 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:15:52.194 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:15:52.194 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:15:52.195 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:15:52.195 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:15:52.217 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:15:52.217 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:15:52.217 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:15:52.632 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:15:52.676 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:15:52.676 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:15:52.676 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:15:52.677 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:15:53.101 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:15:53.570 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:15:53.677 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:15:53.677 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:15:53.677 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:15:53.678 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:15:54.038 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:15:54.509 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:15:54.678 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:15:54.679 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:15:54.679 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:15:54.679 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:15:54.990 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:15:55.468 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:15:55.680 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:15:55.681 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:15:55.681 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:15:55.681 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:15:55.946 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:15:56.425 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 02:15:56.682 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:15:56.682 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:15:56.682 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:15:56.682 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:15:56.896 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 02:15:57.364 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 02:15:57.834 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 02:15:58.228 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:15:58.229 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:15:58.229 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:15:58.230 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:15:58.230 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:15:58.316 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 02:15:58.338 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD NOHANDOVER
2026-01-09 02:15:58.342 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:15:58.342 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:15:58.342 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:15:58.342 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:15:58.795 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 02:15:59.274 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 02:15:59.753 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 02:16:00.232 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 02:16:00.704 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 02:16:01.175 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 02:16:01.645 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 02:16:02.116 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 02:16:02.586 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 02:16:03.058 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 02:16:03.208 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD NOHANDOVER
2026-01-09 02:16:03.211 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:16:03.212 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:16:03.213 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:16:03.226 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:16:03.226 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:16:03.226 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:16:03.227 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:16:03.236 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:16:03.236 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:16:03.236 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:16:03.237 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:16:03.237 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:16:03.237 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:16:03.237 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:16:03.237 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2485 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:16:03.237 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2485 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:16:03.238 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2485 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:16:03.238 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2485 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:16:03.238 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2485 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:16:03.238 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2486 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:16:03.242 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2486 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:16:08.231 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:16:08.231 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:16:08.233 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:16:08.233 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:16:08.233 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:16:08.234 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:16:08.242 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:16:08.244 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:16:08.244 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:16:08.245 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:16:08.245 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:16:08.249 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:16:08.250 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:16:08.250 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:16:08.250 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:16:08.251 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:16:08.251 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:16:08.252 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:16:08.252 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:16:08.255 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:16:08.255 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:16:08.255 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:16:08.255 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:16:08.256 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:16:08.256 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:16:08.256 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:16:08.256 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:16:08.258 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:16:08.259 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:16:08.259 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:16:08.259 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:16:08.259 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:16:08.259 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:16:08.259 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:16:08.259 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:16:08.263 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:16:08.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:16:08.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:16:08.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:16:08.263 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:16:08.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:16:08.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:16:08.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:16:08.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:16:08.264 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:16:08.264 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:16:08.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:16:08.264 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:16:08.264 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:16:08.264 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:16:08.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:16:08.264 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:16:08.264 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:16:08.264 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:16:08.264 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:16:08.264 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:16:08.264 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:16:08.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:16:08.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:16:08.264 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:16:08.264 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:16:08.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:16:08.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:16:08.265 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:16:08.265 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:16:08.265 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:16:08.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:16:08.265 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:16:08.265 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:16:08.265 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:16:08.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:16:08.265 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:16:08.265 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:16:08.265 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:16:08.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:16:08.265 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:16:08.265 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:16:08.265 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:16:08.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:16:08.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:16:08.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:16:08.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:16:08.269 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:16:08.749 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:16:08.796 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:16:08.798 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:16:08.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:16:08.800 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:16:09.219 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:16:09.267 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:16:09.268 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:16:09.269 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:16:09.271 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:16:09.688 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:16:10.163 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:16:10.268 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:16:10.269 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:16:10.271 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:16:10.271 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:16:10.643 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:16:11.121 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:16:11.270 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:16:11.270 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:16:11.272 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:16:11.272 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:16:11.599 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:16:12.067 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:16:12.271 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:16:12.271 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:16:12.273 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:16:12.273 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:16:12.536 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:16:13.005 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 02:16:13.272 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:16:13.273 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:16:13.274 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:16:13.274 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:16:13.473 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 02:16:13.942 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 02:16:14.410 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 02:16:14.886 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 02:16:15.364 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 02:16:15.837 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 02:16:16.307 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 02:16:16.783 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 02:16:17.253 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 02:16:17.721 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 02:16:18.190 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 02:16:18.657 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 02:16:18.812 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:16:18.812 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:16:18.812 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:16:18.813 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:16:18.822 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:16:18.822 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:16:18.822 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:16:18.823 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:16:18.823 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:16:18.823 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:16:18.823 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:16:18.823 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2279 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:16:18.824 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2279 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:16:23.816 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:16:23.817 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:16:23.819 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:16:23.820 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:16:23.820 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:16:23.821 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:16:23.834 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:16:23.836 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:16:23.836 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:16:23.837 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:16:23.837 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:16:23.842 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:16:23.843 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:16:23.843 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:16:23.843 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:16:23.844 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:16:23.845 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:16:23.845 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:16:23.845 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:16:23.848 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:16:23.848 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:16:23.849 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:16:23.849 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:16:23.849 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:16:23.849 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:16:23.849 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:16:23.850 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:16:23.852 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:16:23.852 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:16:23.852 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:16:23.852 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:16:23.852 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:16:23.852 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:16:23.853 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:16:23.853 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:16:23.856 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:16:23.856 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:16:23.856 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:16:23.856 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:16:23.856 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:16:23.857 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:16:23.857 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:16:23.857 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:16:23.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:16:23.857 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:16:23.857 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:16:23.857 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:16:23.857 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:16:23.857 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:16:23.857 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:16:23.857 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:16:23.857 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:16:23.857 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:16:23.857 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:16:23.857 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:16:23.858 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:16:23.858 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:16:23.858 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:16:23.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:16:23.858 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:16:23.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:16:23.858 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:16:23.858 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:16:23.858 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:16:23.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:16:23.858 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:16:23.858 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:16:23.858 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:16:23.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:16:23.858 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:16:23.858 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:16:23.858 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:16:23.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:16:23.860 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:16:23.860 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:16:23.860 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:16:23.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:16:23.860 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:16:23.860 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:16:23.860 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:16:23.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:16:23.860 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:16:23.860 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:16:23.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:16:23.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:16:23.860 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:16:23.860 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:16:23.860 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:16:23.860 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:16:28.864 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:16:28.864 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:16:28.865 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:16:28.866 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:16:28.866 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:16:28.867 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:16:28.878 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:16:28.878 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:16:28.878 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:16:28.879 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:16:28.879 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:16:28.880 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:16:28.881 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:16:28.881 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:16:28.881 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:16:28.881 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:16:28.881 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:16:28.882 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:16:28.882 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:16:28.883 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:16:28.883 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:16:28.883 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:16:28.883 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:16:28.883 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:16:28.883 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:16:28.883 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:16:28.883 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:16:28.885 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:16:28.885 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:16:28.885 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:16:28.885 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:16:28.885 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:16:28.885 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:16:28.885 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:16:28.885 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:16:28.887 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:16:28.887 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:16:28.887 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:16:28.887 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:16:28.887 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:16:28.887 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:16:28.887 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:16:28.887 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:16:28.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:16:28.887 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:16:28.887 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:16:28.887 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:16:28.887 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:16:28.887 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:16:28.887 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:16:28.887 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:16:28.887 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:16:28.888 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:16:28.888 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:16:28.888 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:16:28.888 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:16:28.888 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:16:28.888 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:16:28.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:16:28.888 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:16:28.888 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:16:28.888 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:16:28.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:16:28.888 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:16:28.888 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:16:28.888 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:16:28.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:16:28.888 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:16:28.888 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:16:28.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:16:28.888 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:16:28.888 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:16:28.888 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:16:28.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:16:28.888 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:16:28.888 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:16:28.888 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:16:28.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:16:28.888 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:16:28.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:16:28.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:16:28.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:16:28.892 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:16:29.369 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:16:29.419 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:16:29.422 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:16:29.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:16:29.423 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:16:29.425 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:16:29.425 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:16:29.425 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:16:29.426 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:16:29.426 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:16:29.426 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:16:29.426 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:16:29.426 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:16:29.838 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:16:29.890 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:16:29.890 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:16:29.890 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:16:29.891 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:16:30.308 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:16:30.783 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:16:30.891 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:16:30.891 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:16:30.891 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:16:30.892 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:16:31.261 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:16:31.739 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:16:31.892 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:16:31.892 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:16:31.892 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:16:31.893 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:16:32.217 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:16:32.695 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:16:32.893 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:16:32.893 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:16:32.893 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:16:32.893 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:16:33.173 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:16:33.648 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 02:16:33.894 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:16:33.894 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:16:33.894 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:16:33.894 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:16:34.117 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 02:16:34.587 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 02:16:35.066 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 02:16:35.545 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 02:16:36.023 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 02:16:36.501 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 02:16:36.979 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 02:16:37.457 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 02:16:37.464 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:16:37.464 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:16:37.472 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:16:37.472 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:16:37.472 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:16:37.472 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:16:37.474 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:16:37.474 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:16:37.474 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:16:37.474 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:16:37.474 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:16:37.474 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:16:37.475 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:16:37.475 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1840 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:16:37.475 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1840 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:16:37.475 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1840 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:16:37.475 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1840 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:16:37.475 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1840 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:16:37.475 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1840 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:16:37.475 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1841 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:16:37.475 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1841 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:16:37.475 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1841 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:16:37.475 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1841 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:16:37.475 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1841 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:16:37.475 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1841 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:16:37.475 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1841 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:16:37.475 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1841 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:16:42.478 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:16:42.478 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:16:42.480 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:16:42.480 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:16:42.480 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:16:42.480 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:16:42.484 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:16:42.484 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:16:42.484 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:16:42.485 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:16:42.485 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:16:42.487 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:16:42.487 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:16:42.487 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:16:42.487 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:16:42.487 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:16:42.488 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:16:42.488 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:16:42.488 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:16:42.489 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:16:42.489 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:16:42.489 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:16:42.489 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:16:42.489 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:16:42.489 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:16:42.490 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:16:42.490 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:16:42.491 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:16:42.491 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:16:42.491 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:16:42.491 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:16:42.491 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:16:42.491 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:16:42.491 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:16:42.491 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:16:42.493 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:16:42.493 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:16:42.493 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:16:42.493 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:16:42.493 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:16:42.493 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:16:42.493 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:16:42.494 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:16:42.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:16:42.494 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:16:42.494 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:16:42.494 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:16:42.494 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:16:42.494 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:16:42.494 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:16:42.494 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:16:42.494 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:16:42.494 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:16:42.494 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:16:42.494 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:16:42.494 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:16:42.494 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:16:42.494 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:16:42.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:16:42.494 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:16:42.494 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:16:42.494 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:16:42.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:16:42.494 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:16:42.494 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:16:42.494 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:16:42.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:16:42.495 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:16:42.495 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:16:42.495 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:16:42.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:16:42.495 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:16:42.495 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:16:42.495 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:16:42.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:16:42.495 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:16:42.496 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:16:42.496 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:16:42.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:16:42.496 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:16:42.496 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:16:42.496 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:16:42.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:16:42.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:16:42.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:16:42.496 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:16:42.496 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:16:42.496 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:16:42.496 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:16:47.500 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:16:47.500 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:16:47.503 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:16:47.504 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:16:47.505 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:16:47.506 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:16:47.509 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:16:47.510 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:16:47.510 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:16:47.510 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:16:47.510 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:16:47.512 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:16:47.512 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:16:47.512 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:16:47.512 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:16:47.512 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:16:47.512 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:16:47.512 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:16:47.512 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:16:47.514 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:16:47.514 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:16:47.514 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:16:47.514 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:16:47.514 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:16:47.514 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:16:47.514 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:16:47.514 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:16:47.515 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:16:47.515 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:16:47.515 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:16:47.515 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:16:47.515 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:16:47.515 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:16:47.515 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:16:47.515 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:16:47.517 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:16:47.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:16:47.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:16:47.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:16:47.518 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:16:47.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:16:47.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:16:47.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:16:47.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:16:47.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:16:47.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:16:47.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:16:47.518 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:16:47.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:16:47.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:16:47.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:16:47.518 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:16:47.518 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:16:47.518 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:16:47.518 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:16:47.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:16:47.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:16:47.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:16:47.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:16:47.519 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:16:47.519 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:16:47.519 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:16:47.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:16:47.519 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:16:47.519 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:16:47.519 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:16:47.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:16:47.519 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:16:47.519 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:16:47.519 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:16:47.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:16:47.519 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:16:47.519 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:16:47.519 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:16:47.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:16:47.519 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:16:47.519 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:16:47.519 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:16:47.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:16:47.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:16:47.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:16:47.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:16:47.523 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:16:48.007 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:16:48.045 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:16:48.047 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:16:48.049 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:16:48.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:16:48.052 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:16:48.052 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:16:48.053 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:16:48.054 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:16:48.054 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:16:48.055 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:16:48.055 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:16:48.055 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:16:48.485 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:16:48.521 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:16:48.521 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:16:48.521 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:16:48.522 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:16:48.963 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:16:49.441 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:16:49.522 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:16:49.522 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:16:49.522 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:16:49.522 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:16:49.919 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:16:50.397 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:16:50.523 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:16:50.523 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:16:50.524 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:16:50.524 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:16:50.875 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:16:51.353 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:16:51.524 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:16:51.525 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:16:51.525 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:16:51.525 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:16:51.831 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:16:52.309 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 02:16:52.525 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:16:52.526 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:16:52.526 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:16:52.526 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:16:52.787 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 02:16:53.266 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 02:16:53.743 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 02:16:54.221 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 02:16:54.699 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 02:16:55.177 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 02:16:55.655 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 02:16:56.102 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:16:56.102 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:16:56.105 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:16:56.105 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:16:56.105 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:16:56.105 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:16:56.109 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:16:56.109 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:16:56.109 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:16:56.109 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:16:56.109 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:16:56.109 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:16:56.110 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:16:56.110 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1834 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:16:56.110 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1834 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:17:01.109 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:17:01.110 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:17:01.112 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:17:01.112 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:17:01.112 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:17:01.112 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:17:01.116 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:17:01.116 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:17:01.116 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:17:01.116 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:17:01.116 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:17:01.117 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:17:01.117 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:17:01.118 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:17:01.118 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:17:01.118 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:17:01.118 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:17:01.118 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:17:01.118 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:17:01.119 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:17:01.119 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:17:01.119 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:17:01.119 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:17:01.119 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:17:01.119 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:17:01.119 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:17:01.119 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:17:01.120 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:17:01.120 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:17:01.120 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:17:01.120 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:17:01.120 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:17:01.120 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:17:01.121 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:17:01.121 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:17:01.122 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:17:01.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:17:01.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:17:01.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:17:01.123 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:17:01.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:17:01.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:17:01.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:17:01.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:17:01.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:17:01.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:17:01.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:17:01.123 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:17:01.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:17:01.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:17:01.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:17:01.123 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:17:01.123 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:17:01.123 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:17:01.123 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:17:01.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:17:01.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:17:01.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:17:01.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:17:01.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:17:01.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:17:01.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:17:01.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:17:01.124 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:17:01.124 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:17:01.124 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:17:01.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:17:01.124 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:17:01.124 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:17:01.124 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:17:01.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:17:01.124 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:17:01.124 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:17:01.124 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:17:01.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:17:01.124 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:17:01.124 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:17:01.125 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:17:01.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:17:01.125 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:17:01.125 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:17:01.125 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:17:01.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:17:01.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:17:01.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:17:01.125 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:17:01.125 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:17:01.125 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:17:01.125 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:17:06.129 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:17:06.130 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:17:06.133 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:17:06.133 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:17:06.133 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:17:06.133 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:17:06.136 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:17:06.136 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:17:06.136 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:17:06.136 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:17:06.137 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:17:06.137 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:17:06.138 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:17:06.138 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:17:06.138 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:17:06.138 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:17:06.138 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:17:06.138 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:17:06.138 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:17:06.139 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:17:06.139 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:17:06.139 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:17:06.139 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:17:06.139 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:17:06.139 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:17:06.139 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:17:06.139 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:17:06.140 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:17:06.141 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:17:06.141 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:17:06.141 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:17:06.141 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:17:06.141 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:17:06.141 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:17:06.141 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:17:06.143 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:17:06.143 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:17:06.143 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:17:06.143 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:17:06.143 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:17:06.143 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:17:06.143 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:17:06.143 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:17:06.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:17:06.143 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:17:06.143 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:17:06.143 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:17:06.143 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:17:06.143 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:17:06.143 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:17:06.143 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:17:06.143 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:17:06.143 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:17:06.143 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:17:06.144 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:17:06.144 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:17:06.144 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:17:06.144 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:17:06.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:17:06.144 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:17:06.144 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:17:06.144 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:17:06.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:17:06.144 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:17:06.144 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:17:06.144 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:17:06.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:17:06.144 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:17:06.144 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:17:06.144 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:17:06.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:17:06.144 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:17:06.144 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:17:06.144 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:17:06.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:17:06.144 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:17:06.144 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:17:06.144 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:17:06.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:17:06.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:17:06.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:17:06.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:17:06.148 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:17:06.632 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:17:06.659 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:17:06.660 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:17:06.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:17:06.661 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:17:06.663 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:17:06.663 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:17:06.663 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:17:06.663 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:17:06.663 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:17:06.663 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:17:06.663 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:17:06.664 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:17:07.109 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:17:07.147 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:17:07.147 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:17:07.147 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:17:07.149 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:17:07.587 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:17:08.064 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:17:08.148 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:17:08.149 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:17:08.149 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:17:08.149 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:17:08.541 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:17:09.019 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:17:09.149 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:17:09.149 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:17:09.150 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:17:09.150 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:17:09.497 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:17:09.975 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:17:10.151 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:17:10.151 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:17:10.151 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:17:10.151 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:17:10.453 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:17:10.931 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 02:17:11.152 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:17:11.152 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:17:11.152 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:17:11.152 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:17:11.409 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 02:17:11.886 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 02:17:12.364 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 02:17:12.842 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 02:17:13.320 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 02:17:13.797 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 02:17:14.275 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 02:17:14.689 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:17:14.689 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:17:14.693 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:17:14.693 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:17:14.694 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:17:14.694 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:17:14.695 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:17:14.695 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:17:14.695 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:17:14.695 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:17:14.695 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:17:14.695 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:17:14.695 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:17:14.695 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1826 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:17:14.696 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1826 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:17:19.698 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:17:19.698 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:17:19.700 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:17:19.700 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:17:19.700 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:17:19.700 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:17:19.704 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:17:19.704 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:17:19.704 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:17:19.704 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:17:19.704 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:17:19.705 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:17:19.705 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:17:19.705 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:17:19.705 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:17:19.705 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:17:19.705 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:17:19.706 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:17:19.706 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:17:19.707 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:17:19.707 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:17:19.707 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:17:19.707 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:17:19.707 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:17:19.707 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:17:19.707 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:17:19.707 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:17:19.708 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:17:19.708 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:17:19.708 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:17:19.708 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:17:19.708 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:17:19.709 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:17:19.709 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:17:19.709 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:17:19.711 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:17:19.711 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:17:19.711 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:17:19.711 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:17:19.711 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:17:19.711 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:17:19.711 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:17:19.711 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:17:19.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:17:19.711 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:17:19.711 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:17:19.711 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:17:19.711 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:17:19.711 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:17:19.711 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:17:19.711 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:17:19.711 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:17:19.711 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:17:19.711 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:17:19.711 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:17:19.711 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:17:19.711 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:17:19.711 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:17:19.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:17:19.711 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:17:19.711 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:17:19.712 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:17:19.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:17:19.712 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:17:19.712 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:17:19.712 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:17:19.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:17:19.712 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:17:19.712 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:17:19.712 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:17:19.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:17:19.712 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:17:19.712 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:17:19.712 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:17:19.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:17:19.712 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:17:19.712 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:17:19.712 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:17:19.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:17:19.713 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:17:19.713 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:17:19.713 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:17:19.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:17:19.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:17:19.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:17:19.713 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:17:19.713 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:17:19.713 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:17:19.713 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:17:24.717 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:17:24.718 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:17:24.720 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:17:24.721 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:17:24.721 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:17:24.722 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:17:24.725 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:17:24.725 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:17:24.725 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:17:24.726 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:17:24.726 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:17:24.727 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:17:24.727 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:17:24.727 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:17:24.727 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:17:24.727 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:17:24.727 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:17:24.727 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:17:24.727 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:17:24.728 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:17:24.728 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:17:24.728 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:17:24.728 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:17:24.728 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:17:24.728 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:17:24.728 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:17:24.728 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:17:24.730 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:17:24.730 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:17:24.730 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:17:24.730 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:17:24.730 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:17:24.730 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:17:24.730 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:17:24.730 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:17:24.732 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:17:24.732 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:17:24.732 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:17:24.732 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:17:24.732 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:17:24.732 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:17:24.732 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:17:24.732 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:17:24.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:17:24.732 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:17:24.732 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:17:24.732 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:17:24.733 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:17:24.733 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:17:24.733 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:17:24.733 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:17:24.733 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:17:24.733 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:17:24.733 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:17:24.733 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:17:24.733 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:17:24.733 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:17:24.733 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:17:24.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:17:24.733 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:17:24.733 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:17:24.733 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:17:24.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:17:24.733 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:17:24.733 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:17:24.733 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:17:24.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:17:24.733 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:17:24.733 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:17:24.733 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:17:24.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:17:24.733 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:17:24.733 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:17:24.733 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:17:24.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:17:24.733 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:17:24.733 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:17:24.734 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:17:24.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:17:24.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:17:24.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:17:24.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:17:24.737 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:17:25.219 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:17:25.260 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:17:25.263 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:17:25.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:17:25.265 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:17:25.269 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:17:25.269 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:17:25.269 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:17:25.270 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:17:25.270 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:17:25.270 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:17:25.271 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:17:25.271 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:17:25.696 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:17:25.736 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:17:25.737 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:17:25.737 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:17:25.738 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:17:26.174 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:17:26.652 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:17:26.737 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:17:26.737 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:17:26.737 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:17:26.740 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:17:27.130 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:17:27.607 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:17:27.738 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:17:27.738 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:17:27.738 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:17:27.741 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:17:28.085 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:17:28.563 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:17:28.739 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:17:28.739 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:17:28.740 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:17:28.742 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:17:29.041 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:17:29.519 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 02:17:29.740 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:17:29.741 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:17:29.741 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:17:29.742 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:17:29.998 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 02:17:30.475 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 02:17:30.953 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 02:17:31.431 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 02:17:31.910 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 02:17:32.388 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 02:17:32.866 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 02:17:33.314 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:17:33.314 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:17:33.321 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:17:33.321 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:17:33.321 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:17:33.321 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:17:33.323 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:17:33.323 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:17:33.323 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:17:33.323 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:17:33.323 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:17:33.323 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:17:33.323 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:17:33.323 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1834 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:17:33.324 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1834 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:17:38.326 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:17:38.326 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:17:38.327 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:17:38.328 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:17:38.328 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:17:38.329 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:17:38.335 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:17:38.336 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:17:38.336 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:17:38.337 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:17:38.337 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:17:38.339 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:17:38.340 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:17:38.340 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:17:38.340 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:17:38.341 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:17:38.341 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:17:38.341 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:17:38.341 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:17:38.344 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:17:38.344 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:17:38.344 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:17:38.344 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:17:38.344 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:17:38.344 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:17:38.345 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:17:38.345 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:17:38.347 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:17:38.347 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:17:38.347 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:17:38.347 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:17:38.347 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:17:38.347 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:17:38.347 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:17:38.347 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:17:38.350 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:17:38.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:17:38.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:17:38.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:17:38.350 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:17:38.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:17:38.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:17:38.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:17:38.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:17:38.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:17:38.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:17:38.350 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:17:38.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:17:38.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:17:38.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:17:38.350 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:17:38.350 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:17:38.350 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:17:38.351 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:17:38.351 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:17:38.351 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:17:38.351 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:17:38.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:17:38.351 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:17:38.351 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:17:38.351 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:17:38.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:17:38.351 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:17:38.351 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:17:38.351 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:17:38.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:17:38.351 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:17:38.351 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:17:38.351 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:17:38.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:17:38.351 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:17:38.351 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:17:38.352 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:17:38.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:17:38.352 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:17:38.352 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:17:38.352 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:17:38.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:17:38.352 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:17:38.352 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:17:38.352 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:17:38.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:17:38.352 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:17:38.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:17:38.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:17:38.353 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:17:38.353 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:17:38.353 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:17:38.353 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:17:43.357 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:17:43.357 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:17:43.361 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:17:43.361 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:17:43.361 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:17:43.361 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:17:43.371 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:17:43.373 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:17:43.373 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:17:43.374 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:17:43.374 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:17:43.378 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:17:43.378 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:17:43.378 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:17:43.379 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:17:43.379 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:17:43.379 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:17:43.380 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:17:43.380 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:17:43.381 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:17:43.381 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:17:43.382 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:17:43.382 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:17:43.382 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:17:43.382 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:17:43.382 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:17:43.382 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:17:43.384 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:17:43.384 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:17:43.384 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:17:43.384 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:17:43.384 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:17:43.384 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:17:43.384 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:17:43.384 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:17:43.387 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:17:43.387 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:17:43.387 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:17:43.387 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:17:43.387 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:17:43.387 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:17:43.387 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:17:43.387 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:17:43.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:17:43.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:17:43.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:17:43.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:17:43.388 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:17:43.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:17:43.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:17:43.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:17:43.388 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:17:43.388 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:17:43.388 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:17:43.388 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:17:43.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:17:43.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:17:43.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:17:43.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:17:43.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:17:43.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:17:43.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:17:43.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:17:43.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:17:43.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:17:43.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:17:43.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:17:43.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:17:43.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:17:43.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:17:43.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:17:43.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:17:43.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:17:43.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:17:43.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:17:43.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:17:43.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:17:43.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:17:43.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:17:43.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:17:43.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:17:43.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:17:43.393 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:17:43.876 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:17:43.916 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:17:43.918 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:17:43.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:17:43.921 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:17:43.923 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:17:43.923 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:17:43.923 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:17:43.924 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:17:43.924 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:17:43.924 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:17:43.924 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:17:43.924 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:17:44.354 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:17:44.391 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:17:44.391 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:17:44.392 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:17:44.394 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:17:44.831 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:17:45.310 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:17:45.392 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:17:45.392 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:17:45.392 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:17:45.396 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:17:45.788 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:17:46.266 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:17:46.393 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:17:46.394 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:17:46.394 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:17:46.396 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:17:46.744 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:17:47.222 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:17:47.394 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:17:47.395 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:17:47.395 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:17:47.397 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:17:47.699 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:17:48.166 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 02:17:48.396 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:17:48.396 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:17:48.396 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:17:48.398 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:17:48.634 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 02:17:49.102 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 02:17:49.570 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 02:17:50.042 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 02:17:50.520 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 02:17:50.998 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 02:17:51.477 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 02:17:51.955 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 02:17:52.433 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 02:17:52.911 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 02:17:53.388 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 02:17:53.866 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 02:17:54.343 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 02:17:54.821 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 02:17:55.297 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 02:17:55.770 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 02:17:56.239 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-09 02:17:56.712 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-09 02:17:57.179 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-09 02:17:57.648 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-09 02:17:57.972 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:17:57.972 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:17:57.978 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:17:57.978 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:17:57.978 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:17:57.978 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:17:57.980 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:17:57.980 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:17:57.980 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:17:57.980 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:17:57.980 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:17:57.980 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:17:57.980 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:17:57.980 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3133 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:17:57.980 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3133 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:17:57.980 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3133 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:17:57.980 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3133 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:17:57.981 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3133 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:17:57.981 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3133 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:18:02.986 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:18:02.987 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:18:02.987 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:18:02.987 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:18:02.987 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:18:02.987 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:18:02.997 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:18:02.998 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:18:02.998 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:18:02.998 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:18:02.998 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:18:02.999 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:18:02.999 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:18:02.999 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:18:02.999 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:18:02.999 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:18:02.999 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:18:02.999 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:18:02.999 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:18:03.001 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:18:03.001 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:18:03.001 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:18:03.001 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:18:03.001 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:18:03.001 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:18:03.002 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:18:03.002 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:18:03.003 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:18:03.004 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:18:03.004 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:18:03.004 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:18:03.004 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:18:03.004 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:18:03.004 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:18:03.004 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:18:03.006 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:18:03.006 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:18:03.006 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:18:03.006 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:18:03.006 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:18:03.007 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:18:03.007 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:18:03.007 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:18:03.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:18:03.007 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:18:03.007 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:18:03.007 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:18:03.007 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:18:03.007 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:18:03.007 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:18:03.007 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:18:03.007 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:18:03.007 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:18:03.007 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:18:03.007 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:18:03.007 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:18:03.007 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:18:03.007 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:18:03.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:18:03.008 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:18:03.008 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:18:03.008 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:18:03.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:18:03.008 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:18:03.008 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:18:03.008 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:18:03.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:18:03.008 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:18:03.008 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:18:03.008 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:18:03.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:18:03.008 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:18:03.008 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:18:03.009 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:18:03.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:18:03.009 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:18:03.009 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:18:03.009 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:18:03.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:18:03.009 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:18:03.009 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:18:03.009 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:18:03.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:18:03.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:18:03.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:18:03.009 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:18:03.009 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:18:03.009 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:18:03.009 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:18:08.015 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:18:08.015 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:18:08.016 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:18:08.016 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:18:08.017 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:18:08.018 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:18:08.022 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:18:08.022 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:18:08.022 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:18:08.023 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:18:08.023 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:18:08.024 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:18:08.024 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:18:08.025 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:18:08.025 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:18:08.025 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:18:08.025 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:18:08.025 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:18:08.025 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:18:08.026 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:18:08.026 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:18:08.026 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:18:08.026 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:18:08.027 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:18:08.027 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:18:08.027 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:18:08.027 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:18:08.028 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:18:08.028 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:18:08.028 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:18:08.028 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:18:08.028 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:18:08.028 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:18:08.028 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:18:08.028 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:18:08.030 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:18:08.030 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:18:08.030 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:18:08.030 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:18:08.030 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:18:08.030 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:18:08.031 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:18:08.031 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:18:08.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:18:08.031 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:18:08.031 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:18:08.031 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:18:08.031 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:18:08.031 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:18:08.031 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:18:08.031 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:18:08.031 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:18:08.031 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:18:08.031 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:18:08.031 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:18:08.031 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:18:08.031 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:18:08.031 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:18:08.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:18:08.031 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:18:08.031 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:18:08.031 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:18:08.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:18:08.032 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:18:08.032 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:18:08.032 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:18:08.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:18:08.032 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:18:08.032 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:18:08.032 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:18:08.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:18:08.032 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:18:08.032 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:18:08.032 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:18:08.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:18:08.032 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:18:08.032 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:18:08.032 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:18:08.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:18:08.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:18:08.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:18:08.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:18:08.036 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:18:08.515 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:18:08.557 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:18:08.559 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:18:08.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:18:08.561 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:18:08.564 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:18:08.564 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:18:08.564 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:18:08.565 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:18:08.565 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:18:08.566 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:18:08.566 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:18:08.566 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:18:08.993 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:18:09.035 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:18:09.035 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:18:09.035 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:18:09.036 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:18:09.471 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:18:09.949 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:18:10.036 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:18:10.036 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:18:10.036 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:18:10.036 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:18:10.427 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:18:10.905 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:18:11.037 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:18:11.037 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:18:11.038 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:18:11.038 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:18:11.383 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:18:11.862 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:18:12.038 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:18:12.038 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:18:12.039 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:18:12.039 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:18:12.340 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:18:12.819 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 02:18:13.048 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:18:13.049 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:18:13.049 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:18:13.049 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:18:13.297 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 02:18:13.775 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 02:18:14.253 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 02:18:14.732 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 02:18:15.210 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 02:18:15.688 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 02:18:16.166 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 02:18:16.609 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:18:16.610 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:18:16.613 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:18:16.613 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:18:16.613 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:18:16.613 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:18:16.615 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:18:16.615 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:18:16.615 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:18:16.615 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:18:16.615 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:18:16.615 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:18:16.615 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:18:16.615 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1833 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:18:16.615 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1833 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:18:16.615 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1833 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:18:16.615 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1833 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:18:16.615 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1833 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:18:16.615 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1833 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:18:21.618 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:18:21.619 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:18:21.620 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:18:21.620 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:18:21.621 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:18:21.622 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:18:21.626 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:18:21.626 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:18:21.626 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:18:21.627 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:18:21.627 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:18:21.628 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:18:21.628 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:18:21.629 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:18:21.629 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:18:21.629 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:18:21.629 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:18:21.629 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:18:21.629 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:18:21.630 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:18:21.630 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:18:21.631 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:18:21.631 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:18:21.631 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:18:21.631 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:18:21.631 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:18:21.631 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:18:21.632 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:18:21.632 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:18:21.632 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:18:21.632 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:18:21.632 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:18:21.632 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:18:21.632 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:18:21.632 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:18:21.634 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:18:21.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:18:21.634 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:18:21.634 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:18:21.634 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:18:21.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:18:21.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:18:21.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:18:21.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:18:21.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:18:21.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:18:21.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:18:21.635 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:18:21.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:18:21.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:18:21.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:18:21.635 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:18:21.635 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:18:21.635 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:18:21.635 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:18:21.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:18:21.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:18:21.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:18:21.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:18:21.636 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:18:21.636 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:18:21.636 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:18:21.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:18:21.636 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:18:21.636 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:18:21.636 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:18:21.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:18:21.636 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:18:21.636 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:18:21.636 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:18:21.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:18:21.636 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:18:21.636 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:18:21.636 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:18:21.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:18:21.636 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:18:21.637 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:18:21.637 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:18:21.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:18:21.637 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:18:21.637 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:18:21.637 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:18:21.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:18:21.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:18:21.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:18:21.637 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:18:21.637 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:18:21.637 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:18:21.637 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:18:26.646 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:18:26.646 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:18:26.646 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:18:26.646 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:18:26.646 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:18:26.646 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:18:26.650 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:18:26.650 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:18:26.650 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:18:26.651 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:18:26.651 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:18:26.652 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:18:26.652 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:18:26.653 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:18:26.653 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:18:26.653 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:18:26.653 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:18:26.653 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:18:26.654 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:18:26.655 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:18:26.655 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:18:26.655 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:18:26.655 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:18:26.655 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:18:26.655 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:18:26.655 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:18:26.655 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:18:26.656 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:18:26.656 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:18:26.656 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:18:26.657 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:18:26.657 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:18:26.657 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:18:26.657 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:18:26.657 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:18:26.659 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:18:26.659 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:18:26.659 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:18:26.659 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:18:26.659 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:18:26.659 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:18:26.659 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:18:26.659 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:18:26.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:18:26.659 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:18:26.659 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:18:26.659 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:18:26.659 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:18:26.659 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:18:26.659 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:18:26.659 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:18:26.659 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:18:26.659 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:18:26.659 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:18:26.660 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:18:26.660 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:18:26.660 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:18:26.660 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:18:26.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:18:26.660 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:18:26.660 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:18:26.660 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:18:26.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:18:26.660 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:18:26.660 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:18:26.660 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:18:26.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:18:26.660 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:18:26.660 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:18:26.660 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:18:26.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:18:26.660 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:18:26.660 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:18:26.660 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:18:26.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:18:26.660 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:18:26.660 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:18:26.660 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:18:26.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:18:26.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:18:26.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:18:26.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:18:26.664 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:18:27.148 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:18:27.184 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:18:27.186 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:18:27.189 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:18:27.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:18:27.193 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:18:27.193 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:18:27.194 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:18:27.195 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:18:27.195 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:18:27.196 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:18:27.196 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:18:27.196 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:18:27.626 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:18:27.663 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:18:27.663 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:18:27.663 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:18:27.665 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:18:28.105 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:18:28.583 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:18:28.664 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:18:28.665 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:18:28.665 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:18:28.665 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:18:29.061 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:18:29.539 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:18:29.665 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:18:29.665 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:18:29.665 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:18:29.666 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:18:30.017 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:18:30.496 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:18:30.666 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:18:30.666 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:18:30.666 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:18:30.666 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:18:30.974 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:18:31.452 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 02:18:31.667 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:18:31.667 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:18:31.667 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:18:31.667 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:18:31.930 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 02:18:32.408 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 02:18:32.886 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 02:18:33.364 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 02:18:33.842 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 02:18:34.320 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 02:18:34.798 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 02:18:35.276 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 02:18:35.754 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 02:18:36.232 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 02:18:36.710 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 02:18:37.188 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 02:18:37.247 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:18:37.247 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:18:37.252 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:18:37.252 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:18:37.252 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:18:37.252 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:18:37.253 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:18:37.253 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:18:37.253 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:18:37.253 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:18:37.253 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:18:37.253 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:18:37.253 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:18:37.253 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2259 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:18:37.253 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2259 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:18:37.253 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2259 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:18:37.253 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2259 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:18:37.253 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2260 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:18:37.253 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2260 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:18:37.253 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2260 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:18:37.253 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2260 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:18:37.253 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2260 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:18:37.253 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2260 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:18:37.253 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2260 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:18:37.253 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2260 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:18:42.257 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:18:42.257 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:18:42.259 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:18:42.260 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:18:42.260 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:18:42.261 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:18:42.268 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:18:42.269 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:18:42.269 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:18:42.269 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:18:42.269 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:18:42.272 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:18:42.272 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:18:42.272 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:18:42.272 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:18:42.272 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:18:42.272 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:18:42.272 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:18:42.272 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:18:42.275 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:18:42.275 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:18:42.275 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:18:42.275 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:18:42.276 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:18:42.276 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:18:42.276 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:18:42.276 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:18:42.278 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:18:42.279 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:18:42.279 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:18:42.279 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:18:42.279 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:18:42.279 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:18:42.279 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:18:42.279 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:18:42.283 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:18:42.283 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:18:42.283 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:18:42.283 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:18:42.283 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:18:42.283 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:18:42.283 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:18:42.283 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:18:42.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:18:42.283 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:18:42.283 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:18:42.283 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:18:42.284 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:18:42.284 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:18:42.284 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:18:42.284 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:18:42.284 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:18:42.284 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:18:42.284 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:18:42.284 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:18:42.284 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:18:42.284 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:18:42.284 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:18:42.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:18:42.284 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:18:42.284 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:18:42.284 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:18:42.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:18:42.285 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:18:42.285 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:18:42.285 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:18:42.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:18:42.285 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:18:42.285 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:18:42.285 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:18:42.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:18:42.285 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:18:42.286 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:18:42.286 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:18:42.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:18:42.286 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:18:42.286 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:18:42.286 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:18:42.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:18:42.286 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:18:42.286 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:18:42.286 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:18:42.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:18:42.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:18:42.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:18:42.287 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:18:42.287 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:18:42.287 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:18:42.287 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:18:47.290 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:18:47.291 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:18:47.292 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:18:47.293 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:18:47.293 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:18:47.294 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:18:47.302 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:18:47.303 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:18:47.303 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:18:47.303 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:18:47.303 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:18:47.305 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:18:47.306 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:18:47.306 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:18:47.306 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:18:47.306 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:18:47.306 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:18:47.306 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:18:47.306 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:18:47.308 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:18:47.308 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:18:47.308 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:18:47.308 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:18:47.308 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:18:47.308 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:18:47.308 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:18:47.308 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:18:47.309 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:18:47.310 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:18:47.310 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:18:47.310 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:18:47.310 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:18:47.310 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:18:47.310 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:18:47.310 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:18:47.312 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:18:47.312 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:18:47.312 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:18:47.312 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:18:47.312 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:18:47.312 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:18:47.312 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:18:47.312 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:18:47.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:18:47.312 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:18:47.312 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:18:47.312 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:18:47.312 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:18:47.312 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:18:47.313 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:18:47.313 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:18:47.313 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:18:47.313 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:18:47.313 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:18:47.313 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:18:47.313 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:18:47.313 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:18:47.313 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:18:47.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:18:47.313 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:18:47.313 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:18:47.313 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:18:47.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:18:47.313 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:18:47.313 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:18:47.313 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:18:47.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:18:47.313 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:18:47.313 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:18:47.313 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:18:47.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:18:47.313 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:18:47.313 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:18:47.313 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:18:47.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:18:47.314 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:18:47.314 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:18:47.314 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:18:47.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:18:47.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:18:47.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:18:47.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:18:47.317 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:18:47.799 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:18:47.836 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:18:47.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:18:47.838 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:18:47.840 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:18:47.842 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:18:47.842 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:18:47.842 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:18:47.842 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:18:47.842 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:18:47.842 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:18:47.843 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:18:47.843 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:18:48.272 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:18:48.315 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:18:48.316 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:18:48.317 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:18:48.319 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:18:48.750 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:18:49.228 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:18:49.316 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:18:49.317 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:18:49.317 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:18:49.321 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:18:49.706 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:18:50.184 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:18:50.317 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:18:50.318 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:18:50.318 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:18:50.322 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:18:50.662 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:18:51.140 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:18:51.319 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:18:51.319 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:18:51.319 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:18:51.323 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:18:51.619 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:18:52.097 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 02:18:52.320 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:18:52.320 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:18:52.320 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:18:52.324 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:18:52.575 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 02:18:53.052 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 02:18:53.522 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 02:18:53.991 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 02:18:54.464 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 02:18:54.942 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 02:18:55.421 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 02:18:55.898 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 02:18:56.374 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 02:18:56.852 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 02:18:57.330 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 02:18:57.808 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 02:18:58.286 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 02:18:58.764 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 02:18:58.893 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:18:58.894 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:18:58.902 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:18:58.902 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:18:58.902 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:18:58.902 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:18:58.911 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:18:58.912 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:18:58.912 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:18:58.912 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:18:58.912 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:18:58.912 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:18:58.912 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:18:58.912 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2479 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:18:58.913 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2479 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:19:03.907 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:19:03.907 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:19:03.909 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:19:03.909 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:19:03.909 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:19:03.910 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:19:03.919 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:19:03.920 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:19:03.920 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:19:03.920 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:19:03.920 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:19:03.923 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:19:03.923 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:19:03.923 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:19:03.923 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:19:03.924 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:19:03.924 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:19:03.924 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:19:03.924 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:19:03.925 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:19:03.925 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:19:03.926 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:19:03.926 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:19:03.926 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:19:03.926 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:19:03.926 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:19:03.926 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:19:03.928 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:19:03.928 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:19:03.928 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:19:03.928 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:19:03.928 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:19:03.928 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:19:03.928 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:19:03.928 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:19:03.930 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:19:03.931 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:19:03.931 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:19:03.931 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:19:03.931 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:19:03.931 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:19:03.931 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:19:03.931 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:19:03.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:19:03.931 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:19:03.931 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:19:03.931 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:19:03.931 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:19:03.931 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:19:03.931 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:19:03.931 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:19:03.932 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:19:03.932 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:19:03.932 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:19:03.932 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:19:03.932 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:19:03.932 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:19:03.932 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:19:03.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:19:03.932 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:19:03.932 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:19:03.932 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:19:03.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:19:03.932 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:19:03.932 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:19:03.932 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:19:03.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:19:03.932 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:19:03.932 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:19:03.932 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:19:03.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:19:03.932 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:19:03.933 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:19:03.933 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:19:03.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:19:03.933 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:19:03.933 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:19:03.933 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:19:03.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:19:03.933 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:19:03.933 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:19:03.933 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:19:03.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:19:03.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:19:03.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:19:03.933 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:19:03.933 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:19:03.933 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:19:03.933 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:19:08.938 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:19:08.938 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:19:08.939 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:19:08.940 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:19:08.940 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:19:08.941 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:19:08.947 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:19:08.948 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:19:08.949 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:19:08.949 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:19:08.949 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:19:08.952 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:19:08.953 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:19:08.953 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:19:08.953 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:19:08.953 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:19:08.953 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:19:08.954 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:19:08.954 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:19:08.955 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:19:08.955 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:19:08.956 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:19:08.956 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:19:08.956 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:19:08.956 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:19:08.956 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:19:08.956 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:19:08.958 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:19:08.958 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:19:08.959 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:19:08.959 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:19:08.959 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:19:08.959 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:19:08.959 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:19:08.959 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:19:08.961 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:19:08.961 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:19:08.961 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:19:08.961 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:19:08.961 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:19:08.962 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:19:08.962 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:19:08.962 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:19:08.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:19:08.962 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:19:08.962 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:19:08.962 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:19:08.962 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:19:08.962 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:19:08.962 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:19:08.962 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:19:08.962 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:19:08.962 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:19:08.962 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:19:08.962 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:19:08.962 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:19:08.962 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:19:08.962 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:19:08.963 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:19:08.963 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:19:08.963 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:19:08.963 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:19:08.963 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:19:08.963 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:19:08.963 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:19:08.963 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:19:08.963 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:19:08.963 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:19:08.963 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:19:08.963 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:19:08.963 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:19:08.963 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:19:08.963 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:19:08.963 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:19:08.963 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:19:08.963 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:19:08.963 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:19:08.963 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:19:08.963 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:19:08.963 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:19:08.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:19:08.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:19:08.967 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:19:09.449 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:19:09.488 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:19:09.490 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:19:09.493 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:19:09.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:19:09.496 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:19:09.496 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:19:09.497 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:19:09.497 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:19:09.498 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:19:09.498 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:19:09.499 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:19:09.499 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:19:09.927 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:19:09.965 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:19:09.966 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:19:09.966 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:19:09.969 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:19:10.405 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:19:10.883 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:19:10.966 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:19:10.967 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:19:10.967 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:19:10.970 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:19:11.361 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:19:11.839 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:19:11.968 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:19:11.968 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:19:11.968 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:19:11.972 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:19:12.316 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:19:12.794 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:19:12.969 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:19:12.969 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:19:12.969 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:19:12.973 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:19:13.272 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:19:13.749 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 02:19:13.970 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:19:13.971 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:19:13.971 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:19:13.974 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:19:14.228 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 02:19:14.706 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 02:19:15.184 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 02:19:15.662 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 02:19:16.141 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 02:19:16.619 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 02:19:17.098 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 02:19:17.576 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 02:19:18.054 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 02:19:18.532 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 02:19:19.010 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 02:19:19.489 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 02:19:19.967 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 02:19:20.444 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 02:19:20.922 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 02:19:21.401 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 02:19:21.879 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-09 02:19:22.357 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-09 02:19:22.835 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-09 02:19:23.313 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-09 02:19:23.791 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-09 02:19:24.269 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-09 02:19:24.747 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-09 02:19:25.225 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-09 02:19:25.703 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-09 02:19:26.181 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-09 02:19:26.659 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-09 02:19:27.138 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-09 02:19:27.616 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-09 02:19:28.094 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-09 02:19:28.572 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-09 02:19:29.050 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-09 02:19:29.528 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-09 02:19:29.551 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:19:29.551 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:19:29.559 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:19:29.560 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:19:29.560 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:19:29.560 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:19:29.565 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:19:29.565 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:19:29.565 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:19:29.566 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:19:29.566 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:19:29.566 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:19:29.566 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:19:29.566 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4395 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:19:29.566 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4395 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:19:29.566 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4395 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:19:29.566 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4395 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:19:29.567 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4395 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:19:29.567 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4395 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:19:29.567 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4395 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:19:29.567 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4395 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:19:29.567 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4396 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:19:34.563 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:19:34.563 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:19:34.565 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:19:34.567 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:19:34.567 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:19:34.567 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:19:34.578 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:19:34.580 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:19:34.580 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:19:34.580 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:19:34.580 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:19:34.583 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:19:34.583 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:19:34.583 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:19:34.583 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:19:34.583 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:19:34.584 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:19:34.584 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:19:34.584 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:19:34.585 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:19:34.585 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:19:34.586 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:19:34.586 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:19:34.586 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:19:34.586 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:19:34.586 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:19:34.586 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:19:34.587 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:19:34.587 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:19:34.587 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:19:34.587 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:19:34.587 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:19:34.587 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:19:34.587 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:19:34.587 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:19:34.589 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:19:34.589 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:19:34.590 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:19:34.590 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:19:34.590 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:19:34.590 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:19:34.590 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:19:34.590 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:19:34.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:19:34.590 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:19:34.590 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:19:34.590 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:19:34.590 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:19:34.590 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:19:34.590 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:19:34.590 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:19:34.590 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:19:34.590 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:19:34.590 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:19:34.590 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:19:34.590 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:19:34.590 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:19:34.590 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:19:34.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:19:34.590 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:19:34.590 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:19:34.591 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:19:34.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:19:34.591 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:19:34.591 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:19:34.591 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:19:34.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:19:34.591 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:19:34.591 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:19:34.591 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:19:34.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:19:34.591 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:19:34.591 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:19:34.592 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:19:34.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:19:34.592 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:19:34.592 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:19:34.592 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:19:34.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:19:34.592 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:19:34.592 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:19:34.592 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:19:34.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:19:34.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:19:34.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:19:34.592 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:19:34.592 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:19:34.592 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:19:34.592 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:19:39.596 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:19:39.596 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:19:39.598 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:19:39.599 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:19:39.599 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:19:39.599 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:19:39.610 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:19:39.611 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:19:39.611 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:19:39.611 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:19:39.611 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:19:39.613 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:19:39.614 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:19:39.614 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:19:39.614 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:19:39.614 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:19:39.614 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:19:39.615 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:19:39.615 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:19:39.616 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:19:39.616 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:19:39.616 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:19:39.616 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:19:39.617 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:19:39.617 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:19:39.617 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:19:39.617 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:19:39.618 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:19:39.618 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:19:39.618 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:19:39.618 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:19:39.618 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:19:39.619 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:19:39.619 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:19:39.619 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:19:39.621 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:19:39.621 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:19:39.621 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:19:39.621 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:19:39.621 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:19:39.621 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:19:39.621 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:19:39.621 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:19:39.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:19:39.621 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:19:39.621 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:19:39.621 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:19:39.621 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:19:39.621 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:19:39.621 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:19:39.621 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:19:39.621 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:19:39.621 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:19:39.622 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:19:39.622 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:19:39.622 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:19:39.622 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:19:39.622 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:19:39.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:19:39.622 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:19:39.622 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:19:39.622 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:19:39.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:19:39.622 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:19:39.622 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:19:39.622 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:19:39.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:19:39.622 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:19:39.622 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:19:39.622 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:19:39.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:19:39.622 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:19:39.622 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:19:39.622 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:19:39.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:19:39.622 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:19:39.622 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:19:39.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:19:39.622 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:19:39.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:19:39.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:19:39.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:19:39.626 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:19:40.107 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:19:40.145 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:19:40.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:19:40.148 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:19:40.150 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:19:40.576 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:19:40.624 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:19:40.625 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:19:40.625 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:19:40.627 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:19:41.045 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:19:41.514 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:19:41.626 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:19:41.626 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:19:41.626 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:19:41.628 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:19:41.983 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:19:42.455 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:19:42.628 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:19:42.628 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:19:42.628 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:19:42.630 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:19:42.925 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:19:43.395 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:19:43.629 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:19:43.630 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:19:43.630 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:19:43.630 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:19:43.874 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:19:44.354 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 02:19:44.630 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:19:44.631 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:19:44.631 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:19:44.631 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:19:44.835 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 02:19:45.315 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 02:19:45.793 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 02:19:46.271 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 02:19:46.746 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 02:19:47.227 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 02:19:47.708 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 02:19:48.188 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 02:19:48.667 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 02:19:49.147 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 02:19:49.625 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 02:19:50.105 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 02:19:50.162 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:19:50.163 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:19:50.163 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:19:50.163 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:19:50.164 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:19:50.164 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:19:50.164 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:19:50.164 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:19:50.164 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:19:50.164 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:19:50.164 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:19:50.164 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2257 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:19:50.164 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2257 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:19:50.164 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2257 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:19:50.164 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2257 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:19:50.164 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2258 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:19:50.164 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2258 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:19:50.164 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2258 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:19:50.164 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2258 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:19:50.164 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2258 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:19:50.164 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2258 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:19:50.164 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2258 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:19:50.164 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2258 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:19:55.167 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:19:55.167 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:19:55.169 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:19:55.170 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:19:55.170 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:19:55.171 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:19:55.179 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:19:55.179 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:19:55.179 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:19:55.180 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:19:55.180 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:19:55.182 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:19:55.182 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:19:55.182 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:19:55.182 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:19:55.182 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:19:55.182 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:19:55.182 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:19:55.182 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:19:55.184 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:19:55.185 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:19:55.185 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:19:55.185 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:19:55.185 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:19:55.185 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:19:55.185 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:19:55.185 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:19:55.187 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:19:55.188 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:19:55.188 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:19:55.188 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:19:55.188 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:19:55.188 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:19:55.188 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:19:55.188 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:19:55.191 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:19:55.191 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:19:55.191 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:19:55.191 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:19:55.191 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:19:55.192 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:19:55.192 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:19:55.192 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:19:55.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:19:55.192 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:19:55.192 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:19:55.192 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:19:55.192 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:19:55.192 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:19:55.192 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:19:55.192 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:19:55.192 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:19:55.192 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:19:55.192 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:19:55.193 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:19:55.193 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:19:55.193 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:19:55.193 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:19:55.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:19:55.193 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:19:55.193 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:19:55.193 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:19:55.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:19:55.193 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:19:55.193 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:19:55.193 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:19:55.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:19:55.193 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:19:55.193 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:19:55.193 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:19:55.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:19:55.193 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:19:55.195 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:19:55.195 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:19:55.195 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:19:55.195 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:19:55.195 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:19:55.195 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:19:55.195 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:19:55.195 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:19:55.195 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:19:55.195 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:19:55.195 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:19:55.195 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:19:55.195 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:19:55.195 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:19:55.195 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:19:55.195 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:19:55.195 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:20:00.198 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:20:00.198 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:20:00.201 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:20:00.203 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:20:00.205 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:20:00.208 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:20:00.220 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:20:00.220 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:20:00.220 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:20:00.221 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:20:00.221 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:20:00.222 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:20:00.222 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:20:00.222 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:20:00.222 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:20:00.223 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:20:00.223 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:20:00.223 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:20:00.223 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:20:00.224 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:20:00.224 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:20:00.224 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:20:00.224 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:20:00.224 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:20:00.224 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:20:00.224 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:20:00.224 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:20:00.226 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:20:00.226 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:20:00.226 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:20:00.226 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:20:00.226 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:20:00.226 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:20:00.226 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:20:00.226 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:20:00.227 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:20:00.227 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:20:00.227 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:20:00.227 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:20:00.227 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:20:00.227 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:20:00.228 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:20:00.228 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:20:00.228 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:20:00.228 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:20:00.228 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:20:00.228 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:20:00.228 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:20:00.228 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:20:00.228 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:20:00.228 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:20:00.228 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:20:00.228 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:20:00.228 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:20:00.228 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:20:00.228 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:20:00.228 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:20:00.228 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:20:00.228 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:20:00.228 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:20:00.228 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:20:00.228 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:20:00.228 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:20:00.229 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:20:00.229 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:20:00.229 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:20:00.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:20:00.229 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:20:00.229 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:20:00.229 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:20:00.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:20:00.229 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:20:00.229 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:20:00.229 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:20:00.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:20:00.229 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:20:00.229 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:20:00.229 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:20:00.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:20:00.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:20:00.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:20:00.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:20:00.233 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:20:00.713 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:20:00.754 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:20:00.757 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:20:00.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:20:00.759 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:20:01.183 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:20:01.231 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:20:01.231 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:20:01.232 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:20:01.234 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:20:01.652 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:20:02.122 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:20:02.232 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:20:02.233 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:20:02.233 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:20:02.235 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:20:02.602 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:20:03.082 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:20:03.234 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:20:03.234 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:20:03.234 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:20:03.236 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:20:03.562 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:20:04.040 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:20:04.235 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:20:04.235 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:20:04.236 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:20:04.237 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:20:04.521 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:20:05.002 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 02:20:05.237 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:20:05.237 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:20:05.237 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:20:05.238 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:20:05.480 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 02:20:05.959 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 02:20:06.437 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 02:20:06.916 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 02:20:07.394 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 02:20:07.873 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 02:20:08.348 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 02:20:08.816 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 02:20:09.291 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 02:20:09.770 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 02:20:10.248 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 02:20:10.726 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 02:20:11.204 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 02:20:11.685 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 02:20:12.164 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 02:20:12.642 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 02:20:12.778 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:20:12.779 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:20:12.779 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:20:12.779 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:20:12.787 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:20:12.788 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:20:12.788 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:20:12.788 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:20:12.788 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:20:12.788 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:20:12.788 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:20:12.788 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2684 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:20:12.788 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2684 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:20:17.779 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:20:17.780 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:20:17.782 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:20:17.783 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:20:17.783 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:20:17.783 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:20:17.791 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:20:17.792 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:20:17.792 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:20:17.793 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:20:17.793 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:20:17.795 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:20:17.795 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:20:17.795 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:20:17.796 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:20:17.796 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:20:17.796 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:20:17.796 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:20:17.796 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:20:17.798 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:20:17.799 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:20:17.799 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:20:17.799 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:20:17.799 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:20:17.799 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:20:17.800 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:20:17.800 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:20:17.802 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:20:17.802 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:20:17.802 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:20:17.802 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:20:17.802 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:20:17.802 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:20:17.803 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:20:17.803 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:20:17.806 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:20:17.806 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:20:17.806 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:20:17.806 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:20:17.807 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:20:17.807 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:20:17.807 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:20:17.807 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:20:17.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:20:17.807 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:20:17.807 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:20:17.807 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:20:17.807 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:20:17.807 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:20:17.807 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:20:17.807 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:20:17.807 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:20:17.808 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:20:17.808 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:20:17.808 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:20:17.808 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:20:17.808 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:20:17.808 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:20:17.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:20:17.808 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:20:17.808 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:20:17.808 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:20:17.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:20:17.808 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:20:17.808 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:20:17.808 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:20:17.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:20:17.808 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:20:17.809 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:20:17.809 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:20:17.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:20:17.809 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:20:17.810 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:20:17.810 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:20:17.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:20:17.810 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:20:17.810 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:20:17.810 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:20:17.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:20:17.810 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:20:17.810 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:20:17.810 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:20:17.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:20:17.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:20:17.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:20:17.811 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:20:17.811 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:20:17.811 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:20:17.811 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:20:22.814 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:20:22.815 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:20:22.816 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:20:22.817 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:20:22.817 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:20:22.818 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:20:22.824 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:20:22.825 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:20:22.825 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:20:22.825 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:20:22.825 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:20:22.827 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:20:22.827 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:20:22.827 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:20:22.827 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:20:22.828 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:20:22.828 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:20:22.828 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:20:22.828 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:20:22.829 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:20:22.830 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:20:22.830 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:20:22.830 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:20:22.830 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:20:22.830 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:20:22.831 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:20:22.831 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:20:22.832 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:20:22.832 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:20:22.832 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:20:22.832 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:20:22.832 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:20:22.832 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:20:22.832 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:20:22.832 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:20:22.835 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:20:22.835 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:20:22.835 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:20:22.835 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:20:22.835 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:20:22.835 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:20:22.836 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:20:22.836 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:20:22.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:20:22.836 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:20:22.836 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:20:22.836 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:20:22.836 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:20:22.836 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:20:22.836 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:20:22.836 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:20:22.836 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:20:22.836 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:20:22.836 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:20:22.836 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:20:22.836 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:20:22.836 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:20:22.836 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:20:22.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:20:22.836 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:20:22.836 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:20:22.837 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:20:22.837 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:20:22.837 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:20:22.837 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:20:22.837 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:20:22.837 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:20:22.837 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:20:22.837 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:20:22.837 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:20:22.837 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:20:22.837 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:20:22.837 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:20:22.837 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:20:22.837 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:20:22.837 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:20:22.837 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:20:22.837 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:20:22.837 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:20:22.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:20:22.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:20:22.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:20:22.841 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:20:23.325 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:20:23.357 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:20:23.359 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:20:23.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:20:23.359 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:20:23.360 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:20:23.360 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:20:23.360 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:20:23.361 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:20:23.361 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:20:23.361 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:20:23.361 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:20:23.361 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:20:23.368 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:20:23.368 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:20:23.368 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:20:23.368 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:20:23.794 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:20:23.839 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:20:23.841 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:20:23.841 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:20:23.841 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:20:24.264 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:20:24.739 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:20:24.840 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:20:24.841 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:20:24.842 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:20:24.842 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:20:25.218 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:20:25.696 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:20:25.842 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:20:25.842 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:20:25.843 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:20:25.843 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:20:26.174 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:20:26.652 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:20:26.843 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:20:26.843 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:20:26.843 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:20:26.844 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:20:27.130 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:20:27.608 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 02:20:27.844 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:20:27.844 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:20:27.844 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:20:27.845 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:20:28.086 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 02:20:28.564 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 02:20:29.042 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 02:20:29.517 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 02:20:29.986 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 02:20:30.459 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 02:20:30.937 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 02:20:31.372 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:20:31.372 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:20:31.378 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:20:31.378 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:20:31.378 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:20:31.378 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:20:31.379 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:20:31.379 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:20:31.379 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:20:31.379 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:20:31.380 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:20:31.380 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:20:31.380 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:20:36.382 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:20:36.382 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:20:36.385 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:20:36.385 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:20:36.385 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:20:36.385 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:20:36.396 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:20:36.397 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:20:36.397 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:20:36.398 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:20:36.398 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:20:36.404 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:20:36.404 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:20:36.404 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:20:36.404 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:20:36.405 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:20:36.405 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:20:36.405 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:20:36.406 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:20:36.407 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:20:36.407 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:20:36.408 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:20:36.408 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:20:36.408 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:20:36.408 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:20:36.408 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:20:36.408 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:20:36.410 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:20:36.410 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:20:36.410 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:20:36.410 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:20:36.410 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:20:36.410 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:20:36.411 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:20:36.411 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:20:36.413 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:20:36.413 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:20:36.413 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:20:36.413 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:20:36.413 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:20:36.413 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:20:36.414 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:20:36.414 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:20:36.414 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:20:36.414 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:20:36.414 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:20:36.414 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:20:36.414 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:20:36.414 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:20:36.414 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:20:36.414 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:20:36.414 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:20:36.414 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:20:36.414 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:20:36.414 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:20:36.414 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:20:36.414 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:20:36.414 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:20:36.415 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:20:36.415 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:20:36.415 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:20:36.415 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:20:36.415 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:20:36.415 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:20:36.415 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:20:36.415 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:20:36.415 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:20:36.415 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:20:36.415 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:20:36.415 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:20:36.415 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:20:36.415 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:20:36.415 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:20:36.415 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:20:36.415 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:20:36.415 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:20:36.416 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:20:36.416 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:20:36.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:20:36.416 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:20:36.416 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:20:36.416 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:20:36.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:20:36.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:20:36.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:20:36.416 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:20:36.416 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:20:36.416 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:20:36.416 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:20:41.421 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:20:41.421 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:20:41.425 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:20:41.425 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:20:41.425 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:20:41.425 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:20:41.433 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:20:41.433 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:20:41.434 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:20:41.434 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:20:41.434 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:20:41.437 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:20:41.437 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:20:41.437 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:20:41.437 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:20:41.438 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:20:41.438 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:20:41.438 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:20:41.438 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:20:41.440 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:20:41.440 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:20:41.440 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:20:41.440 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:20:41.440 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:20:41.440 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:20:41.441 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:20:41.441 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:20:41.442 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:20:41.442 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:20:41.442 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:20:41.442 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:20:41.443 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:20:41.443 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:20:41.443 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:20:41.443 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:20:41.445 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:20:41.445 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:20:41.445 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:20:41.445 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:20:41.445 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:20:41.445 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:20:41.445 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:20:41.446 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:20:41.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:20:41.446 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:20:41.446 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:20:41.446 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:20:41.446 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:20:41.446 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:20:41.446 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:20:41.446 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:20:41.446 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:20:41.446 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:20:41.446 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:20:41.446 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:20:41.446 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:20:41.446 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:20:41.446 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:20:41.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:20:41.446 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:20:41.446 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:20:41.447 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:20:41.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:20:41.447 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:20:41.447 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:20:41.447 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:20:41.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:20:41.447 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:20:41.447 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:20:41.447 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:20:41.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:20:41.447 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:20:41.447 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:20:41.447 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:20:41.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:20:41.447 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:20:41.447 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:20:41.447 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:20:41.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:20:41.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:20:41.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:20:41.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:20:41.451 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:20:41.934 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:20:41.973 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:20:41.976 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:20:41.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:20:41.978 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:20:41.982 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:20:41.982 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:20:41.982 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:20:41.983 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:20:41.984 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:20:41.984 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:20:41.985 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:20:41.985 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:20:42.024 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:20:42.025 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:20:42.025 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:20:42.025 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:20:42.413 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:20:42.449 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:20:42.450 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:20:42.450 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:20:42.453 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:20:42.891 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:20:43.369 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:20:43.450 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:20:43.451 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:20:43.451 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:20:43.453 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:20:43.847 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:20:44.326 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:20:44.451 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:20:44.451 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:20:44.452 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:20:44.454 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:20:44.804 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:20:45.281 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:20:45.452 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:20:45.453 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:20:45.453 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:20:45.454 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:20:45.760 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:20:46.238 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 02:20:46.454 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:20:46.454 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:20:46.454 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:20:46.455 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:20:46.715 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 02:20:47.193 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 02:20:47.671 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 02:20:48.149 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 02:20:48.627 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 02:20:49.106 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 02:20:49.583 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 02:20:50.030 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:20:50.030 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:20:50.035 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:20:50.035 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:20:50.035 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:20:50.035 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:20:50.036 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:20:50.036 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:20:50.036 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:20:50.037 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:20:50.037 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:20:50.037 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:20:50.037 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:20:50.037 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1834 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:20:50.037 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1834 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:20:55.039 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:20:55.039 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:20:55.041 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:20:55.042 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:20:55.043 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:20:55.043 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:20:55.053 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:20:55.053 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:20:55.053 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:20:55.053 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:20:55.054 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:20:55.057 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:20:55.057 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:20:55.058 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:20:55.058 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:20:55.058 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:20:55.058 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:20:55.059 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:20:55.059 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:20:55.062 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:20:55.062 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:20:55.062 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:20:55.062 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:20:55.063 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:20:55.063 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:20:55.063 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:20:55.063 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:20:55.066 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:20:55.066 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:20:55.067 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:20:55.067 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:20:55.067 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:20:55.067 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:20:55.067 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:20:55.067 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:20:55.071 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:20:55.071 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:20:55.071 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:20:55.071 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:20:55.072 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:20:55.072 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:20:55.072 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:20:55.072 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:20:55.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:20:55.072 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:20:55.072 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:20:55.072 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:20:55.072 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:20:55.072 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:20:55.072 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:20:55.072 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:20:55.073 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:20:55.073 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:20:55.073 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:20:55.073 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:20:55.073 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:20:55.073 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:20:55.073 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:20:55.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:20:55.073 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:20:55.073 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:20:55.073 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:20:55.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:20:55.073 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:20:55.073 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:20:55.073 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:20:55.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:20:55.074 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:20:55.074 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:20:55.074 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:20:55.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:20:55.074 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:20:55.075 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:20:55.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:20:55.075 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:20:55.075 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:20:55.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:20:55.075 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:20:55.075 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:20:55.075 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:20:55.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:20:55.075 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:20:55.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:20:55.075 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:20:55.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:20:55.075 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:20:55.075 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:20:55.075 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:20:55.075 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:21:00.086 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:21:00.086 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:21:00.086 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:21:00.086 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:21:00.087 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:21:00.087 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:21:00.096 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:21:00.097 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:21:00.097 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:21:00.097 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:21:00.097 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:21:00.100 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:21:00.101 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:21:00.101 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:21:00.101 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:21:00.101 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:21:00.102 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:21:00.102 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:21:00.102 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:21:00.104 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:21:00.104 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:21:00.104 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:21:00.104 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:21:00.104 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:21:00.104 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:21:00.105 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:21:00.105 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:21:00.106 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:21:00.106 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:21:00.107 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:21:00.107 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:21:00.107 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:21:00.107 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:21:00.107 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:21:00.107 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:21:00.109 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:21:00.109 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:21:00.109 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:21:00.109 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:21:00.109 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:21:00.110 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:21:00.110 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:21:00.110 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:21:00.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:21:00.110 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:21:00.110 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:21:00.110 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:21:00.110 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:21:00.110 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:21:00.110 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:21:00.110 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:21:00.110 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:21:00.110 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:21:00.110 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:21:00.110 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:21:00.110 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:21:00.111 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:21:00.111 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:21:00.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:21:00.111 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:21:00.111 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:21:00.111 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:21:00.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:21:00.111 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:21:00.111 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:21:00.111 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:21:00.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:21:00.111 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:21:00.111 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:21:00.111 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:21:00.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:21:00.111 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:21:00.111 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:21:00.111 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:21:00.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:21:00.111 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:21:00.111 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:21:00.111 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:21:00.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:21:00.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:21:00.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:21:00.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:21:00.115 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:21:00.598 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:21:00.638 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:21:00.640 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:21:00.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:21:00.642 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:21:00.645 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:21:00.645 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:21:00.646 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:21:00.646 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:21:00.646 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:21:00.646 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:21:00.647 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:21:00.647 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:21:00.688 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:21:00.688 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:21:00.688 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:21:00.689 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:21:01.075 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:21:01.113 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:21:01.114 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:21:01.115 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:21:01.117 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:21:01.553 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:21:02.031 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:21:02.115 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:21:02.115 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:21:02.116 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:21:02.118 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:21:02.509 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:21:02.988 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:21:03.116 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:21:03.116 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:21:03.117 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:21:03.120 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:21:03.466 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:21:03.944 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:21:04.117 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:21:04.117 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:21:04.118 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:21:04.120 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:21:04.422 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:21:04.927 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 02:21:05.118 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:21:05.118 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:21:05.118 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:21:05.121 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:21:05.405 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 02:21:05.882 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 02:21:06.361 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 02:21:06.839 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 02:21:07.317 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 02:21:07.795 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 02:21:08.273 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 02:21:08.694 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:21:08.694 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:21:08.702 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:21:08.702 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:21:08.702 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:21:08.702 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:21:08.704 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:21:08.704 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:21:08.704 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:21:08.704 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:21:08.704 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:21:08.704 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:21:08.704 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:21:08.704 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1828 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:21:08.704 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1828 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:21:13.708 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:21:13.708 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:21:13.710 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:21:13.711 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:21:13.711 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:21:13.712 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:21:13.716 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:21:13.716 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:21:13.716 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:21:13.716 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:21:13.716 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:21:13.718 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:21:13.718 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:21:13.719 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:21:13.719 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:21:13.719 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:21:13.719 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:21:13.719 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:21:13.719 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:21:13.720 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:21:13.720 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:21:13.720 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:21:13.720 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:21:13.720 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:21:13.720 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:21:13.720 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:21:13.721 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:21:13.722 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:21:13.722 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:21:13.722 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:21:13.722 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:21:13.722 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:21:13.722 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:21:13.722 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:21:13.722 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:21:13.724 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:21:13.724 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:21:13.724 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:21:13.724 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:21:13.724 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:21:13.724 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:21:13.724 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:21:13.725 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:21:13.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:21:13.725 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:21:13.725 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:21:13.725 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:21:13.725 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:21:13.725 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:21:13.725 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:21:13.725 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:21:13.725 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:21:13.725 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:21:13.725 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:21:13.725 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:21:13.725 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:21:13.725 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:21:13.725 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:21:13.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:21:13.725 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:21:13.725 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:21:13.725 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:21:13.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:21:13.725 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:21:13.725 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:21:13.725 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:21:13.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:21:13.725 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:21:13.725 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:21:13.726 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:21:13.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:21:13.726 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:21:13.726 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:21:13.726 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:21:13.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:21:13.726 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:21:13.727 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:21:13.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:21:13.727 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:21:13.727 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:21:13.727 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:21:13.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:21:13.727 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:21:13.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:21:13.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:21:13.727 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:21:13.727 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:21:13.727 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:21:13.727 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:21:18.733 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:21:18.733 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:21:18.734 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:21:18.734 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:21:18.734 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:21:18.734 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:21:18.737 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:21:18.738 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:21:18.738 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:21:18.738 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:21:18.738 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:21:18.740 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:21:18.740 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:21:18.740 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:21:18.740 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:21:18.740 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:21:18.740 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:21:18.740 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:21:18.740 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:21:18.742 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:21:18.743 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:21:18.743 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:21:18.743 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:21:18.743 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:21:18.743 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:21:18.743 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:21:18.743 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:21:18.744 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:21:18.744 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:21:18.744 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:21:18.744 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:21:18.745 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:21:18.745 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:21:18.745 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:21:18.745 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:21:18.747 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:21:18.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:21:18.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:21:18.747 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:21:18.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:21:18.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:21:18.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:21:18.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:21:18.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:21:18.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:21:18.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:21:18.747 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:21:18.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:21:18.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:21:18.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:21:18.747 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:21:18.747 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:21:18.747 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:21:18.747 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:21:18.748 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:21:18.748 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:21:18.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:21:18.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:21:18.748 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:21:18.748 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:21:18.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:21:18.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:21:18.748 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:21:18.748 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:21:18.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:21:18.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:21:18.748 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:21:18.748 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:21:18.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:21:18.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:21:18.748 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:21:18.748 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:21:18.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:21:18.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:21:18.748 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:21:18.748 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:21:18.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:21:18.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:21:18.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:21:18.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:21:18.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:21:18.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:21:18.752 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:21:19.237 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:21:19.269 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:21:19.271 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:21:19.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:21:19.273 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:21:19.275 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:21:19.275 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:21:19.276 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:21:19.276 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:21:19.276 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:21:19.277 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:21:19.277 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:21:19.277 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:21:19.280 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:21:19.281 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:21:19.281 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:21:19.281 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:21:19.714 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:21:19.751 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:21:19.751 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:21:19.751 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:21:19.751 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:21:20.192 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:21:20.670 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:21:20.752 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:21:20.752 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:21:20.752 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:21:20.752 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:21:21.147 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:21:21.616 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:21:21.753 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:21:21.753 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:21:21.753 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:21:21.753 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:21:22.085 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:21:22.563 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:21:22.753 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:21:22.754 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:21:22.754 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:21:22.754 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:21:23.042 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:21:23.519 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 02:21:23.755 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:21:23.755 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:21:23.755 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:21:23.756 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:21:23.997 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 02:21:24.475 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 02:21:24.952 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 02:21:25.430 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 02:21:25.908 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 02:21:26.385 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 02:21:26.862 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 02:21:27.286 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:21:27.286 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:21:27.291 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:21:27.291 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:21:27.291 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:21:27.291 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:21:27.293 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:21:27.293 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:21:27.293 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:21:27.293 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:21:27.293 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:21:27.293 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:21:27.293 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:21:27.293 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1829 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:21:27.293 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1829 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:21:32.295 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:21:32.296 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:21:32.297 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:21:32.299 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:21:32.299 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:21:32.300 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:21:32.307 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:21:32.307 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:21:32.308 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:21:32.308 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:21:32.308 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:21:32.310 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:21:32.310 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:21:32.310 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:21:32.310 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:21:32.310 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:21:32.310 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:21:32.310 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:21:32.310 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:21:32.312 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:21:32.312 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:21:32.312 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:21:32.312 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:21:32.312 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:21:32.312 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:21:32.312 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:21:32.312 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:21:32.314 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:21:32.314 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:21:32.314 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:21:32.314 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:21:32.315 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:21:32.315 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:21:32.315 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:21:32.315 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:21:32.317 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:21:32.317 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:21:32.317 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:21:32.317 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:21:32.317 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:21:32.317 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:21:32.317 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:21:32.318 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:21:32.318 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:21:32.318 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:21:32.318 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:21:32.318 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:21:32.318 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:21:32.318 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:21:32.318 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:21:32.318 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:21:32.318 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:21:32.318 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:21:32.318 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:21:32.318 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:21:32.318 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:21:32.318 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:21:32.318 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:21:32.318 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:21:32.318 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:21:32.318 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:21:32.318 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:21:32.318 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:21:32.318 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:21:32.318 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:21:32.318 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:21:32.318 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:21:32.319 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:21:32.319 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:21:32.319 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:21:32.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:21:32.319 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:21:32.320 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:21:32.320 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:21:32.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:21:32.320 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:21:32.320 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:21:32.320 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:21:32.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:21:32.320 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:21:32.320 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:21:32.320 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:21:32.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:21:32.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:21:32.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:21:32.320 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:21:32.320 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:21:32.320 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:21:32.320 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:21:37.324 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:21:37.324 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:21:37.326 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:21:37.326 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:21:37.327 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:21:37.327 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:21:37.333 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:21:37.333 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:21:37.333 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:21:37.334 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:21:37.334 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:21:37.336 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:21:37.336 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:21:37.336 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:21:37.336 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:21:37.336 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:21:37.336 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:21:37.337 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:21:37.337 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:21:37.339 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:21:37.339 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:21:37.339 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:21:37.339 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:21:37.339 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:21:37.339 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:21:37.339 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:21:37.339 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:21:37.341 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:21:37.341 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:21:37.341 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:21:37.341 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:21:37.341 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:21:37.341 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:21:37.341 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:21:37.341 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:21:37.344 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:21:37.344 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:21:37.344 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:21:37.344 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:21:37.344 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:21:37.344 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:21:37.344 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:21:37.344 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:21:37.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:21:37.344 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:21:37.344 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:21:37.344 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:21:37.345 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:21:37.345 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:21:37.345 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:21:37.345 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:21:37.345 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:21:37.345 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:21:37.345 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:21:37.345 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:21:37.345 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:21:37.345 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:21:37.345 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:21:37.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:21:37.345 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:21:37.345 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:21:37.345 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:21:37.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:21:37.345 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:21:37.345 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:21:37.345 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:21:37.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:21:37.345 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:21:37.345 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:21:37.345 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:21:37.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:21:37.345 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:21:37.345 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:21:37.346 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:21:37.346 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:21:37.346 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:21:37.346 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:21:37.346 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:21:37.346 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:21:37.346 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:21:37.346 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:21:37.346 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:21:37.350 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:21:37.834 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:21:37.867 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:21:37.868 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:21:37.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:21:37.869 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:21:37.872 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:21:37.872 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:21:37.872 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:21:37.872 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:21:37.873 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:21:37.873 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:21:37.873 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:21:37.873 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:21:37.878 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:21:37.878 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:21:37.878 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:21:37.878 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:21:38.304 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:21:38.347 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:21:38.347 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:21:38.348 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:21:38.348 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:21:38.773 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:21:39.249 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:21:39.348 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:21:39.349 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:21:39.349 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:21:39.349 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:21:39.727 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:21:40.205 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:21:40.349 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:21:40.350 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:21:40.350 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:21:40.350 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:21:40.684 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:21:41.162 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:21:41.350 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:21:41.351 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:21:41.351 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:21:41.351 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:21:41.640 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:21:42.118 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 02:21:42.351 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:21:42.351 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:21:42.352 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:21:42.352 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:21:42.597 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 02:21:43.074 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 02:21:43.552 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 02:21:44.030 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 02:21:44.508 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 02:21:44.986 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 02:21:45.465 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 02:21:45.944 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 02:21:46.422 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 02:21:46.900 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 02:21:47.378 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 02:21:47.856 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 02:21:48.334 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 02:21:48.812 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 02:21:49.290 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 02:21:49.768 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 02:21:50.247 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-09 02:21:50.725 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-09 02:21:51.203 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-09 02:21:51.681 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-09 02:21:51.884 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:21:51.884 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:21:51.893 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:21:51.893 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:21:51.893 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:21:51.894 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:21:51.904 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:21:51.904 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:21:51.904 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:21:51.904 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:21:51.904 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:21:51.904 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:21:51.904 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:21:51.904 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3107 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:21:51.904 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3107 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:21:51.905 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3107 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:21:51.905 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3107 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:21:51.905 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3107 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:21:51.905 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3107 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:21:51.905 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3108 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:21:51.905 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3108 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:21:51.905 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3108 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:21:51.905 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3108 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:21:51.905 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3108 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:21:51.905 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3108 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:21:51.905 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3108 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:21:51.905 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3108 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:21:51.905 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3109 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:21:51.905 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3109 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:21:51.906 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3109 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:21:51.906 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3109 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:21:51.906 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3109 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:21:51.906 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3109 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:21:51.906 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3109 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:21:51.906 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3109 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:21:51.906 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3110 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:21:51.906 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3110 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:21:51.906 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3110 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:21:51.906 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3110 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:21:51.906 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3110 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:21:51.906 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3110 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:21:51.906 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3110 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:21:51.907 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3110 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:21:56.898 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:21:56.898 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:21:56.900 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:21:56.900 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:21:56.900 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:21:56.900 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:21:56.909 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:21:56.911 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:21:56.911 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:21:56.912 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:21:56.912 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:21:56.916 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:21:56.917 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:21:56.917 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:21:56.917 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:21:56.918 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:21:56.918 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:21:56.919 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:21:56.919 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:21:56.921 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:21:56.921 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:21:56.921 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:21:56.921 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:21:56.921 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:21:56.922 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:21:56.922 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:21:56.922 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:21:56.924 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:21:56.924 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:21:56.925 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:21:56.925 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:21:56.925 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:21:56.925 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:21:56.925 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:21:56.925 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:21:56.928 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:21:56.928 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:21:56.928 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:21:56.928 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:21:56.928 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:21:56.929 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:21:56.929 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:21:56.929 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:21:56.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:21:56.929 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:21:56.929 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:21:56.929 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:21:56.929 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:21:56.929 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:21:56.929 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:21:56.929 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:21:56.929 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:21:56.929 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:21:56.929 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:21:56.930 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:21:56.930 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:21:56.930 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:21:56.930 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:21:56.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:21:56.930 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:21:56.930 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:21:56.930 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:21:56.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:21:56.930 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:21:56.930 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:21:56.930 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:21:56.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:21:56.930 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:21:56.930 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:21:56.930 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:21:56.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:21:56.930 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:21:56.932 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:21:56.932 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:21:56.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:21:56.932 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:21:56.932 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:21:56.932 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:21:56.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:21:56.932 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:21:56.932 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:21:56.932 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:21:56.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:21:56.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:21:56.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:21:56.932 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:21:56.932 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:21:56.932 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:21:56.932 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:22:01.936 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:22:01.936 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:22:01.938 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:22:01.938 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:22:01.938 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:22:01.939 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:22:01.948 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:22:01.949 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:22:01.950 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:22:01.950 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:22:01.950 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:22:01.952 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:22:01.952 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:22:01.953 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:22:01.953 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:22:01.953 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:22:01.953 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:22:01.953 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:22:01.953 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:22:01.955 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:22:01.955 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:22:01.955 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:22:01.955 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:22:01.955 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:22:01.955 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:22:01.955 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:22:01.955 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:22:01.957 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:22:01.957 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:22:01.957 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:22:01.957 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:22:01.957 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:22:01.957 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:22:01.957 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:22:01.957 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:22:01.959 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:22:01.960 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:22:01.960 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:22:01.960 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:22:01.960 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:22:01.960 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:22:01.960 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:22:01.960 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:22:01.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:22:01.960 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:22:01.960 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:22:01.960 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:22:01.960 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:22:01.960 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:22:01.960 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:22:01.960 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:22:01.960 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:22:01.960 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:22:01.960 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:22:01.960 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:22:01.960 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:22:01.960 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:22:01.960 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:22:01.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:22:01.961 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:22:01.961 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:22:01.961 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:22:01.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:22:01.961 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:22:01.961 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:22:01.961 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:22:01.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:22:01.961 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:22:01.961 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:22:01.961 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:22:01.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:22:01.961 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:22:01.961 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:22:01.961 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:22:01.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:22:01.961 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:22:01.961 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:22:01.961 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:22:01.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:22:01.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:22:01.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:22:01.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:22:01.965 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:22:02.449 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:22:02.488 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:22:02.490 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:22:02.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:22:02.493 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:22:02.495 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:22:02.496 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:22:02.496 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:22:02.497 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:22:02.497 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:22:02.498 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:22:02.498 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:22:02.499 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:22:02.539 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:22:02.539 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:22:02.539 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:22:02.540 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:22:02.927 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:22:02.963 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:22:02.964 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:22:02.964 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:22:02.965 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:22:03.405 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:22:03.884 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:22:03.965 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:22:03.965 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:22:03.966 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:22:03.966 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:22:04.362 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:22:04.840 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:22:04.966 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:22:04.966 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:22:04.966 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:22:04.967 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:22:05.318 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:22:05.796 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:22:05.967 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:22:05.968 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:22:05.968 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:22:05.968 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:22:06.274 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:22:06.752 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 02:22:06.971 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:22:06.971 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:22:06.972 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:22:06.972 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:22:07.230 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 02:22:07.708 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 02:22:08.186 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 02:22:08.663 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 02:22:09.141 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 02:22:09.619 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 02:22:10.097 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 02:22:10.543 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:22:10.543 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:22:10.547 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:22:10.547 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:22:10.547 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:22:10.547 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:22:10.549 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:22:10.549 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:22:10.549 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:22:10.549 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:22:10.549 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:22:10.549 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:22:10.549 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:22:10.549 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1833 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:22:10.550 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1833 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:22:10.550 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1833 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:22:10.550 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1833 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:22:10.550 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1833 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:22:10.550 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1833 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:22:10.550 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1833 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:22:10.550 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1833 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:22:15.552 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:22:15.552 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:22:15.554 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:22:15.554 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:22:15.554 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:22:15.555 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:22:15.562 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:22:15.564 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:22:15.564 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:22:15.564 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:22:15.564 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:22:15.567 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:22:15.567 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:22:15.567 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:22:15.567 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:22:15.568 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:22:15.568 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:22:15.568 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:22:15.568 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:22:15.570 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:22:15.570 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:22:15.570 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:22:15.570 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:22:15.570 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:22:15.570 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:22:15.570 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:22:15.570 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:22:15.572 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:22:15.572 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:22:15.572 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:22:15.572 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:22:15.572 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:22:15.572 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:22:15.572 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:22:15.572 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:22:15.574 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:22:15.574 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:22:15.574 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:22:15.575 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:22:15.575 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:22:15.575 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:22:15.575 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:22:15.575 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:22:15.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:22:15.575 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:22:15.575 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:22:15.575 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:22:15.575 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:22:15.575 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:22:15.575 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:22:15.575 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:22:15.575 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:22:15.575 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:22:15.575 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:22:15.575 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:22:15.575 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:22:15.575 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:22:15.575 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:22:15.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:22:15.575 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:22:15.576 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:22:15.576 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:22:15.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:22:15.576 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:22:15.576 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:22:15.576 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:22:15.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:22:15.576 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:22:15.576 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:22:15.576 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:22:15.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:22:15.576 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:22:15.577 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:22:15.577 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:22:15.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:22:15.577 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:22:15.577 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:22:15.577 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:22:15.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:22:15.577 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:22:15.577 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:22:15.577 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:22:15.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:22:15.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:22:15.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:22:15.577 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:22:15.577 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:22:15.577 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:22:15.577 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:22:20.581 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:22:20.581 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:22:20.583 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:22:20.585 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:22:20.587 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:22:20.590 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:22:20.598 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:22:20.599 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:22:20.599 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:22:20.599 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:22:20.599 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:22:20.600 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:22:20.601 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:22:20.601 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:22:20.601 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:22:20.601 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:22:20.601 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:22:20.601 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:22:20.601 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:22:20.602 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:22:20.602 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:22:20.602 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:22:20.602 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:22:20.602 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:22:20.603 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:22:20.603 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:22:20.603 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:22:20.604 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:22:20.604 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:22:20.604 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:22:20.604 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:22:20.604 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:22:20.604 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:22:20.604 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:22:20.604 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:22:20.606 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:22:20.606 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:22:20.606 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:22:20.606 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:22:20.606 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:22:20.606 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:22:20.606 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:22:20.606 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:22:20.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:22:20.606 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:22:20.606 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:22:20.606 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:22:20.606 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:22:20.606 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:22:20.606 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:22:20.606 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:22:20.606 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:22:20.606 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:22:20.606 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:22:20.607 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:22:20.607 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:22:20.607 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:22:20.607 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:22:20.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:22:20.607 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:22:20.607 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:22:20.607 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:22:20.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:22:20.607 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:22:20.607 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:22:20.607 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:22:20.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:22:20.607 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:22:20.607 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:22:20.607 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:22:20.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:22:20.607 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:22:20.607 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:22:20.607 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:22:20.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:22:20.607 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:22:20.607 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:22:20.607 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:22:20.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:22:20.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:22:20.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:22:20.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:22:20.611 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:22:21.096 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:22:21.130 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:22:21.131 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:22:21.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:22:21.133 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:22:21.135 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:22:21.135 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:22:21.135 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:22:21.135 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:22:21.135 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:22:21.136 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:22:21.136 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:22:21.136 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:22:21.565 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:22:21.609 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:22:21.609 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:22:21.610 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:22:21.612 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:22:22.034 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:22:22.509 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:22:22.610 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:22:22.611 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:22:22.611 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:22:22.612 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:22:22.988 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:22:23.465 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:22:23.611 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:22:23.612 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:22:23.612 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:22:23.613 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:22:23.944 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:22:24.422 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:22:24.612 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:22:24.613 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:22:24.613 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:22:24.614 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:22:24.899 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:22:25.377 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 02:22:25.613 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:22:25.613 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:22:25.614 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:22:25.615 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:22:25.855 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 02:22:26.334 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 02:22:26.812 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 02:22:27.291 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 02:22:27.769 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 02:22:28.247 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 02:22:28.726 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 02:22:29.205 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 02:22:29.683 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 02:22:30.161 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 02:22:30.639 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 02:22:31.118 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 02:22:31.147 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:22:31.148 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:22:31.150 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:22:31.150 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:22:31.150 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:22:31.150 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:22:31.151 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:22:31.151 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:22:31.151 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:22:31.151 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:22:31.151 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:22:31.151 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:22:31.151 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:22:31.151 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2253 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:22:31.151 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2253 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:22:31.151 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2253 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:22:31.151 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2253 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:22:31.151 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2253 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:22:31.151 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2253 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:22:31.151 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2253 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:22:36.154 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:22:36.154 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:22:36.156 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:22:36.156 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:22:36.157 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:22:36.157 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:22:36.167 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:22:36.168 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:22:36.168 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:22:36.168 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:22:36.169 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:22:36.172 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:22:36.173 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:22:36.173 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:22:36.173 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:22:36.173 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:22:36.174 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:22:36.174 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:22:36.174 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:22:36.175 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:22:36.176 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:22:36.176 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:22:36.176 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:22:36.176 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:22:36.176 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:22:36.176 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:22:36.176 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:22:36.178 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:22:36.178 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:22:36.178 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:22:36.178 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:22:36.178 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:22:36.178 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:22:36.178 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:22:36.178 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:22:36.181 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:22:36.181 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:22:36.181 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:22:36.181 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:22:36.181 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:22:36.181 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:22:36.181 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:22:36.181 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:22:36.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:22:36.181 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:22:36.181 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:22:36.182 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:22:36.182 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:22:36.182 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:22:36.182 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:22:36.182 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:22:36.182 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:22:36.182 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:22:36.182 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:22:36.182 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:22:36.182 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:22:36.182 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:22:36.182 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:22:36.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:22:36.182 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:22:36.182 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:22:36.182 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:22:36.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:22:36.182 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:22:36.182 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:22:36.182 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:22:36.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:22:36.182 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:22:36.182 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:22:36.182 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:22:36.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:22:36.182 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:22:36.183 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:22:36.183 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:22:36.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:22:36.183 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:22:36.183 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:22:36.183 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:22:36.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:22:36.183 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:22:36.184 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:22:36.184 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:22:36.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:22:36.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:22:36.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:22:36.184 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:22:36.184 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:22:36.184 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:22:36.184 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:22:41.188 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:22:41.188 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:22:41.190 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:22:41.190 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:22:41.190 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:22:41.191 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:22:41.200 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:22:41.201 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:22:41.201 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:22:41.201 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:22:41.201 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:22:41.204 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:22:41.204 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:22:41.204 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:22:41.204 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:22:41.204 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:22:41.205 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:22:41.205 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:22:41.205 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:22:41.206 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:22:41.206 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:22:41.206 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:22:41.206 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:22:41.206 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:22:41.207 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:22:41.207 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:22:41.207 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:22:41.208 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:22:41.208 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:22:41.208 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:22:41.208 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:22:41.208 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:22:41.208 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:22:41.208 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:22:41.208 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:22:41.211 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:22:41.211 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:22:41.211 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:22:41.211 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:22:41.211 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:22:41.211 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:22:41.211 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:22:41.211 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:22:41.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:22:41.211 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:22:41.211 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:22:41.211 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:22:41.211 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:22:41.211 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:22:41.211 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:22:41.211 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:22:41.211 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:22:41.211 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:22:41.211 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:22:41.211 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:22:41.211 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:22:41.211 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:22:41.211 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:22:41.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:22:41.212 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:22:41.212 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:22:41.212 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:22:41.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:22:41.212 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:22:41.212 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:22:41.212 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:22:41.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:22:41.212 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:22:41.212 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:22:41.212 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:22:41.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:22:41.212 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:22:41.212 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:22:41.212 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:22:41.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:22:41.212 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:22:41.212 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:22:41.212 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:22:41.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:22:41.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:22:41.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:22:41.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:22:41.216 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:22:41.700 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:22:41.728 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:22:41.729 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:22:41.730 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:22:41.730 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:22:41.732 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:22:41.732 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:22:41.732 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:22:41.732 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:22:41.732 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:22:41.732 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:22:41.733 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:22:41.733 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:22:41.743 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:22:41.744 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:22:41.744 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:22:41.744 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:22:42.177 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:22:42.214 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:22:42.214 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:22:42.215 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:22:42.217 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:22:42.656 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:22:43.133 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:22:43.215 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:22:43.216 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:22:43.217 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:22:43.217 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:22:43.611 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:22:44.089 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:22:44.215 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:22:44.218 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:22:44.218 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:22:44.219 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:22:44.568 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:22:45.046 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:22:45.216 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:22:45.220 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:22:45.220 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:22:45.220 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:22:45.524 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:22:46.003 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 02:22:46.217 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:22:46.221 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:22:46.221 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:22:46.221 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:22:46.481 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 02:22:46.959 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 02:22:47.437 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 02:22:47.915 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 02:22:48.393 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 02:22:48.871 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 02:22:49.349 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 02:22:49.827 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 02:22:50.305 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 02:22:50.783 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 02:22:51.261 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 02:22:51.739 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 02:22:52.217 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 02:22:52.694 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 02:22:52.748 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:22:52.748 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:22:52.757 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:22:52.757 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:22:52.757 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:22:52.757 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:22:52.758 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:22:52.758 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:22:52.758 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:22:52.758 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:22:52.758 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:22:52.758 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:22:52.758 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:22:57.762 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:22:57.762 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:22:57.764 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:22:57.764 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:22:57.765 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:22:57.766 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:22:57.770 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:22:57.770 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:22:57.770 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:22:57.770 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:22:57.770 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:22:57.772 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:22:57.772 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:22:57.772 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:22:57.772 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:22:57.773 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:22:57.773 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:22:57.773 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:22:57.773 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:22:57.774 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:22:57.774 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:22:57.774 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:22:57.774 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:22:57.774 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:22:57.774 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:22:57.774 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:22:57.774 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:22:57.775 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:22:57.775 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:22:57.776 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:22:57.776 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:22:57.776 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:22:57.776 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:22:57.776 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:22:57.776 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:22:57.778 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:22:57.778 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:22:57.778 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:22:57.778 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:22:57.778 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:22:57.778 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:22:57.778 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:22:57.778 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:22:57.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:22:57.778 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:22:57.778 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:22:57.778 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:22:57.778 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:22:57.778 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:22:57.778 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:22:57.778 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:22:57.779 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:22:57.779 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:22:57.779 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:22:57.779 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:22:57.779 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:22:57.779 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:22:57.779 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:22:57.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:22:57.779 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:22:57.779 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:22:57.779 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:22:57.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:22:57.779 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:22:57.779 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:22:57.779 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:22:57.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:22:57.779 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:22:57.779 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:22:57.779 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:22:57.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:22:57.779 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:22:57.779 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:22:57.779 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:22:57.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:22:57.779 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:22:57.781 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:22:57.781 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:22:57.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:22:57.781 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:22:57.781 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:22:57.781 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:22:57.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:22:57.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:22:57.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:22:57.781 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:22:57.781 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:22:57.781 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:22:57.781 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:23:02.785 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:23:02.786 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:23:02.788 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:23:02.788 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:23:02.789 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:23:02.790 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:23:02.794 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:23:02.794 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:23:02.794 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:23:02.794 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:23:02.794 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:23:02.796 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:23:02.796 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:23:02.796 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:23:02.796 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:23:02.796 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:23:02.797 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:23:02.797 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:23:02.797 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:23:02.798 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:23:02.798 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:23:02.798 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:23:02.798 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:23:02.798 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:23:02.798 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:23:02.798 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:23:02.798 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:23:02.799 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:23:02.799 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:23:02.799 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:23:02.799 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:23:02.799 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:23:02.799 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:23:02.800 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:23:02.800 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:23:02.802 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:23:02.802 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:23:02.802 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:23:02.802 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:23:02.802 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:23:02.802 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:23:02.802 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:23:02.802 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:23:02.802 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:23:02.802 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:23:02.802 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:23:02.802 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:23:02.802 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:23:02.802 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:23:02.802 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:23:02.802 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:23:02.802 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:23:02.802 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:23:02.802 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:23:02.802 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:23:02.802 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:23:02.802 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:23:02.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:23:02.803 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:23:02.803 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:23:02.803 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:23:02.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:23:02.803 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:23:02.803 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:23:02.803 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:23:02.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:23:02.803 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:23:02.803 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:23:02.803 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:23:02.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:23:02.803 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:23:02.803 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:23:02.803 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:23:02.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:23:02.803 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:23:02.803 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:23:02.803 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:23:02.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:23:02.803 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:23:02.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:23:02.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:23:02.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:23:02.807 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:23:03.292 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:23:03.319 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:23:03.320 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:23:03.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:23:03.322 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:23:03.761 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:23:03.805 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:23:03.805 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:23:03.806 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:23:03.806 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:23:04.230 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:23:04.699 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:23:04.806 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:23:04.806 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:23:04.806 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:23:04.807 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:23:05.167 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:23:05.636 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:23:05.808 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:23:05.808 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:23:05.808 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:23:05.808 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:23:06.105 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:23:06.576 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:23:06.809 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:23:06.809 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:23:06.809 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:23:06.809 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:23:07.054 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:23:07.532 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 02:23:07.810 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:23:07.811 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:23:07.811 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:23:07.811 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:23:08.011 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 02:23:08.489 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 02:23:08.958 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 02:23:09.428 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 02:23:09.907 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 02:23:10.387 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 02:23:10.866 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 02:23:11.345 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 02:23:11.823 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 02:23:12.302 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 02:23:12.782 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 02:23:13.262 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 02:23:13.333 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:23:13.333 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:23:13.333 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:23:13.333 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:23:13.335 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:23:13.335 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:23:13.335 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:23:13.335 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:23:13.335 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:23:13.335 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:23:13.335 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:23:13.335 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2261 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:23:13.335 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2261 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:23:13.335 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2261 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:23:13.335 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2261 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:23:13.335 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2261 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:23:18.338 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:23:18.338 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:23:18.341 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:23:18.341 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:23:18.341 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:23:18.341 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:23:18.350 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:23:18.352 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:23:18.352 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:23:18.353 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:23:18.353 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:23:18.356 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:23:18.357 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:23:18.357 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:23:18.357 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:23:18.357 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:23:18.357 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:23:18.358 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:23:18.358 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:23:18.360 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:23:18.360 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:23:18.361 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:23:18.361 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:23:18.361 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:23:18.361 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:23:18.362 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:23:18.362 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:23:18.363 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:23:18.363 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:23:18.363 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:23:18.363 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:23:18.364 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:23:18.364 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:23:18.364 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:23:18.364 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:23:18.367 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:23:18.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:23:18.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:23:18.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:23:18.367 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:23:18.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:23:18.368 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:23:18.368 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:23:18.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:23:18.368 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:23:18.368 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:23:18.368 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:23:18.368 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:23:18.368 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:23:18.368 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:23:18.368 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:23:18.368 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:23:18.368 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:23:18.368 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:23:18.368 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:23:18.368 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:23:18.368 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:23:18.368 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:23:18.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:23:18.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:23:18.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:23:18.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:23:18.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:23:18.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:23:18.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:23:18.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:23:18.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:23:18.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:23:18.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:23:18.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:23:18.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:23:18.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:23:18.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:23:18.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:23:18.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:23:18.370 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:23:18.370 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:23:18.370 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:23:18.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:23:18.371 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:23:18.371 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:23:18.371 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:23:18.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:23:18.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:23:18.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:23:18.371 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:23:18.371 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:23:18.371 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:23:18.371 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:23:23.374 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:23:23.374 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:23:23.376 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:23:23.376 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:23:23.377 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:23:23.378 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:23:23.385 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:23:23.386 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:23:23.386 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:23:23.386 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:23:23.386 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:23:23.388 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:23:23.388 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:23:23.388 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:23:23.388 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:23:23.388 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:23:23.388 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:23:23.388 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:23:23.388 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:23:23.390 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:23:23.390 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:23:23.390 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:23:23.390 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:23:23.390 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:23:23.390 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:23:23.390 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:23:23.390 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:23:23.392 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:23:23.392 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:23:23.392 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:23:23.392 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:23:23.392 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:23:23.392 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:23:23.392 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:23:23.392 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:23:23.394 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:23:23.394 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:23:23.394 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:23:23.394 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:23:23.394 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:23:23.394 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:23:23.394 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:23:23.394 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:23:23.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:23:23.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:23:23.395 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:23:23.395 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:23:23.395 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:23:23.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:23:23.395 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:23:23.395 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:23:23.395 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:23:23.395 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:23:23.395 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:23:23.395 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:23:23.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:23:23.395 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:23:23.395 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:23:23.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:23:23.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:23:23.395 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:23:23.395 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:23:23.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:23:23.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:23:23.395 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:23:23.395 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:23:23.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:23:23.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:23:23.395 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:23:23.395 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:23:23.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:23:23.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:23:23.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:23:23.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:23:23.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:23:23.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:23:23.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:23:23.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:23:23.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:23:23.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:23:23.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:23:23.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:23:23.400 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:23:23.884 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:23:23.922 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:23:23.924 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:23:23.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:23:23.926 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:23:24.364 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:23:24.397 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:23:24.398 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:23:24.398 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:23:24.398 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:23:24.844 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:23:25.326 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:23:25.399 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:23:25.399 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:23:25.399 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:23:25.399 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:23:25.806 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:23:26.285 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:23:26.401 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:23:26.401 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:23:26.401 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:23:26.401 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:23:26.764 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:23:27.244 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:23:27.402 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:23:27.402 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:23:27.402 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:23:27.403 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:23:27.724 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:23:28.205 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 02:23:28.403 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:23:28.404 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:23:28.404 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:23:28.404 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:23:28.685 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 02:23:29.167 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 02:23:29.647 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 02:23:30.127 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 02:23:30.608 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 02:23:31.088 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 02:23:31.568 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 02:23:32.046 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 02:23:32.525 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 02:23:33.004 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 02:23:33.485 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 02:23:33.963 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 02:23:34.442 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 02:23:34.923 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 02:23:35.403 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 02:23:35.884 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 02:23:35.941 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:23:35.942 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:23:35.942 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:23:35.942 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:23:35.943 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:23:35.943 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:23:35.943 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:23:35.943 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:23:35.943 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:23:35.943 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:23:35.943 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:23:40.946 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:23:40.946 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:23:40.947 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:23:40.947 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:23:40.948 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:23:40.949 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:23:40.957 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:23:40.958 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:23:40.958 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:23:40.959 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:23:40.959 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:23:40.961 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:23:40.961 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:23:40.961 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:23:40.961 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:23:40.962 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:23:40.962 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:23:40.962 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:23:40.962 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:23:40.963 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:23:40.963 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:23:40.964 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:23:40.964 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:23:40.964 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:23:40.964 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:23:40.964 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:23:40.964 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:23:40.965 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:23:40.965 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:23:40.965 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:23:40.965 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:23:40.966 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:23:40.966 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:23:40.966 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:23:40.966 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:23:40.968 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:23:40.968 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:23:40.968 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:23:40.968 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:23:40.968 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:23:40.968 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:23:40.968 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:23:40.968 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:23:40.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:23:40.968 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:23:40.968 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:23:40.968 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:23:40.968 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:23:40.968 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:23:40.969 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:23:40.969 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:23:40.969 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:23:40.969 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:23:40.969 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:23:40.969 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:23:40.969 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:23:40.969 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:23:40.969 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:23:40.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:23:40.969 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:23:40.969 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:23:40.969 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:23:40.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:23:40.969 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:23:40.969 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:23:40.969 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:23:40.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:23:40.969 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:23:40.969 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:23:40.969 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:23:40.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:23:40.969 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:23:40.969 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:23:40.969 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:23:40.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:23:40.969 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:23:40.969 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:23:40.969 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:23:40.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:23:40.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:23:40.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:23:40.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:23:40.973 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:23:41.457 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:23:41.496 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:23:41.497 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:23:41.498 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:23:41.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:23:41.500 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:23:41.500 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:23:41.501 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:23:41.501 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:23:41.501 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:23:41.501 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:23:41.501 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:23:41.501 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:23:41.935 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:23:41.971 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:23:41.972 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:23:41.972 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:23:41.975 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:23:42.413 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:23:42.891 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:23:42.972 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:23:42.973 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:23:42.973 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:23:42.975 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:23:43.369 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:23:43.848 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:23:43.973 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:23:43.974 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:23:43.974 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:23:43.977 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:23:44.326 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:23:44.803 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:23:44.974 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:23:44.975 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:23:44.975 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:23:44.977 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:23:45.281 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:23:45.759 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 02:23:45.975 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:23:45.976 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:23:45.976 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:23:45.979 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:23:46.237 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 02:23:46.715 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 02:23:47.193 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 02:23:47.672 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 02:23:48.150 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 02:23:48.628 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 02:23:49.106 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 02:23:49.584 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 02:23:50.077 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 02:23:50.554 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 02:23:51.033 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 02:23:51.511 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 02:23:51.989 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 02:23:52.467 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 02:23:52.552 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:23:52.552 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:23:52.560 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:23:52.561 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:23:52.561 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:23:52.561 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:23:52.562 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:23:52.562 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:23:52.562 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:23:52.562 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:23:52.562 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:23:52.562 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:23:52.562 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:23:57.564 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:23:57.565 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:23:57.567 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:23:57.567 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:23:57.567 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:23:57.567 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:23:57.578 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:23:57.579 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:23:57.579 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:23:57.580 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:23:57.580 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:23:57.582 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:23:57.583 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:23:57.583 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:23:57.583 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:23:57.584 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:23:57.584 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:23:57.584 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:23:57.584 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:23:57.586 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:23:57.586 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:23:57.586 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:23:57.586 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:23:57.586 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:23:57.587 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:23:57.587 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:23:57.587 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:23:57.588 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:23:57.588 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:23:57.588 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:23:57.588 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:23:57.589 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:23:57.589 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:23:57.589 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:23:57.589 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:23:57.591 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:23:57.591 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:23:57.591 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:23:57.591 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:23:57.591 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:23:57.591 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:23:57.591 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:23:57.591 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:23:57.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:23:57.591 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:23:57.591 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:23:57.591 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:23:57.591 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:23:57.591 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:23:57.592 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:23:57.592 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:23:57.592 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:23:57.592 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:23:57.592 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:23:57.592 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:23:57.592 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:23:57.592 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:23:57.592 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:23:57.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:23:57.592 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:23:57.592 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:23:57.592 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:23:57.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:23:57.592 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:23:57.592 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:23:57.592 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:23:57.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:23:57.592 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:23:57.592 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:23:57.592 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:23:57.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:23:57.592 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:23:57.592 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:23:57.592 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:23:57.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:23:57.592 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:23:57.593 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:23:57.593 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:23:57.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:23:57.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:23:57.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:23:57.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:23:57.596 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:23:58.079 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:23:58.116 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:23:58.117 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:23:58.119 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:23:58.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:23:58.121 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:23:58.121 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:23:58.121 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:23:58.122 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:23:58.122 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:23:58.122 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:23:58.122 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:23:58.122 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:23:58.556 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:23:58.594 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:23:58.595 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:23:58.595 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:23:58.596 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:23:59.034 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:23:59.512 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:23:59.596 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:23:59.596 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:23:59.596 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:23:59.597 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:23:59.990 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:24:00.468 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:24:00.597 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:24:00.598 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:24:00.598 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:24:00.598 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:24:00.946 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:24:01.423 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:24:01.599 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:24:01.599 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:24:01.599 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:24:01.600 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:24:01.901 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:24:02.379 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 02:24:02.600 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:24:02.600 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:24:02.600 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:24:02.600 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:24:02.857 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 02:24:03.335 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 02:24:03.813 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 02:24:04.291 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 02:24:04.769 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 02:24:05.250 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 02:24:05.728 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 02:24:06.206 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 02:24:06.684 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 02:24:07.162 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 02:24:07.640 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 02:24:08.118 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 02:24:08.595 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 02:24:09.073 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 02:24:09.551 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 02:24:10.029 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 02:24:10.507 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-09 02:24:10.985 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-09 02:24:11.463 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-09 02:24:11.941 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-09 02:24:12.420 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-09 02:24:12.898 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-09 02:24:13.176 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:24:13.176 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:24:13.178 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:24:13.178 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:24:13.178 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:24:13.178 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:24:13.179 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:24:13.179 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:24:13.179 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:24:13.179 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:24:13.179 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:24:13.179 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:24:13.179 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:24:18.182 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:24:18.183 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:24:18.184 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:24:18.185 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:24:18.185 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:24:18.186 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:24:18.194 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:24:18.195 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:24:18.195 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:24:18.195 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:24:18.195 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:24:18.197 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:24:18.197 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:24:18.198 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:24:18.198 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:24:18.198 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:24:18.198 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:24:18.198 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:24:18.198 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:24:18.199 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:24:18.199 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:24:18.200 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:24:18.200 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:24:18.200 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:24:18.200 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:24:18.200 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:24:18.200 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:24:18.201 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:24:18.201 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:24:18.202 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:24:18.202 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:24:18.202 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:24:18.202 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:24:18.202 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:24:18.202 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:24:18.204 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:24:18.204 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:24:18.204 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:24:18.204 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:24:18.204 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:24:18.204 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:24:18.204 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:24:18.204 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:24:18.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:24:18.204 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:24:18.204 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:24:18.204 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:24:18.205 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:24:18.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:24:18.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:24:18.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:24:18.205 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:24:18.205 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:24:18.205 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:24:18.205 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:24:18.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:24:18.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:24:18.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:24:18.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:24:18.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:24:18.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:24:18.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:24:18.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:24:18.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:24:18.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:24:18.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:24:18.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:24:18.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:24:18.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:24:18.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:24:18.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:24:18.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:24:18.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:24:18.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:24:18.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:24:18.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:24:18.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:24:18.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:24:18.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:24:18.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:24:18.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:24:18.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:24:18.209 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:24:18.694 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:24:18.725 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:24:18.726 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:24:18.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:24:18.728 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:24:18.735 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:24:18.735 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:24:18.735 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:24:18.737 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:24:18.737 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:24:18.737 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:24:18.737 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:24:18.738 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:24:18.790 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:24:18.791 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:24:18.799 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:24:18.799 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:24:18.799 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:24:18.799 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:24:18.809 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:24:18.809 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:24:18.809 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:24:18.809 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:24:18.810 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:24:18.810 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:24:18.810 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:24:18.810 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=125 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:24:18.810 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=125 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:24:18.810 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=125 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:24:18.810 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=125 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:24:18.811 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=125 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:24:18.811 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=125 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:24:18.811 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=126 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:24:18.811 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=126 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:24:18.811 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=126 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:24:18.811 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=126 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:24:18.811 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=126 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:24:18.811 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=126 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:24:18.811 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=126 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:24:18.811 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=126 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:24:18.812 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=127 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:24:18.812 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=127 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:24:18.812 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=127 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:24:18.812 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=127 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:24:18.812 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=127 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:24:18.812 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=127 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:24:18.812 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=127 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:24:18.812 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=127 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:24:18.812 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=128 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:24:18.812 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=128 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:24:18.812 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=128 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:24:18.813 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=128 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:24:18.813 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=128 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:24:18.813 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=128 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:24:18.813 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=128 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:24:18.813 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=128 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:24:18.813 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=129 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:24:18.813 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=129 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:24:18.813 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=129 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:24:18.813 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=129 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:24:18.813 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=129 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:24:18.814 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=129 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:24:18.814 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=129 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:24:18.814 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=129 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:24:23.806 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:24:23.806 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:24:23.806 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:24:23.806 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:24:23.806 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:24:23.806 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:24:23.810 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:24:23.810 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:24:23.810 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:24:23.810 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:24:23.810 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:24:23.811 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:24:23.811 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:24:23.811 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:24:23.811 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:24:23.811 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:24:23.811 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:24:23.811 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:24:23.811 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:24:23.812 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:24:23.813 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:24:23.813 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:24:23.813 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:24:23.813 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:24:23.813 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:24:23.813 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:24:23.813 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:24:23.814 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:24:23.814 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:24:23.814 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:24:23.814 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:24:23.814 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:24:23.814 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:24:23.814 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:24:23.814 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:24:23.816 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:24:23.816 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:24:23.816 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:24:23.816 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:24:23.816 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:24:23.816 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:24:23.817 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:24:23.817 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:24:23.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:24:23.817 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:24:23.817 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:24:23.817 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:24:23.817 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:24:23.817 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:24:23.817 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:24:23.817 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:24:23.817 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:24:23.817 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:24:23.817 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:24:23.817 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:24:23.817 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:24:23.817 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:24:23.817 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:24:23.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:24:23.817 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:24:23.817 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:24:23.817 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:24:23.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:24:23.817 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:24:23.817 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:24:23.817 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:24:23.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:24:23.817 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:24:23.817 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:24:23.817 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:24:23.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:24:23.818 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:24:23.818 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:24:23.818 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:24:23.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:24:23.818 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:24:23.818 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:24:23.818 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:24:23.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:24:23.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:24:23.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:24:23.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:24:23.822 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:24:24.306 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:24:24.342 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:24:24.346 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:24:24.348 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:24:24.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:24:24.366 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:24:24.367 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:24:24.367 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:24:24.383 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:24:24.383 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:24:24.383 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:24:24.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:24:24.391 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:24:24.391 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:24:24.392 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:24:24.392 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:24:24.392 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:24:24.398 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:24:24.399 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:24:24.399 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:24:24.399 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:24:24.504 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:24:24.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:24:24.509 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:24:24.509 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:24:24.527 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:24:24.527 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:24:24.527 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:24:24.533 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:24:24.533 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:24:24.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:24:24.533 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:24:24.535 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:24:24.535 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:24:24.535 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:24:24.535 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:24:24.535 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:24:24.538 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:24:24.538 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:24:24.538 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:24:24.538 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:24:24.703 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:24:24.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:24:24.708 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:24:24.708 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:24:24.721 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:24:24.721 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:24:24.721 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:24:24.766 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:24:24.766 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:24:24.766 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:24:24.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:24:24.773 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:24:24.773 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:24:24.773 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:24:24.773 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:24:24.773 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:24:24.779 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:24:24.819 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:24:24.819 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:24:24.820 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:24:24.822 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:24:24.824 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:24:24.824 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:24:24.824 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:24:24.825 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:24:25.169 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:24:25.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:24:25.176 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:24:25.176 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:24:25.194 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:24:25.194 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:24:25.194 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:24:25.200 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:24:25.200 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:24:25.200 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:24:25.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:24:25.202 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:24:25.202 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:24:25.202 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:24:25.202 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:24:25.202 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:24:25.247 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:24:25.247 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:24:25.248 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:24:25.248 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:24:25.252 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:24:25.566 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:24:25.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:24:25.572 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:24:25.572 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:24:25.584 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:24:25.585 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:24:25.585 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:24:25.585 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:24:25.586 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:24:25.586 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:24:25.586 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:24:25.586 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:24:25.586 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:24:25.586 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:24:25.587 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:24:25.587 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=380 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:24:25.587 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=380 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:24:30.589 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:24:30.589 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:24:30.593 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:24:30.593 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:24:30.593 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:24:30.593 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:24:30.601 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:24:30.603 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:24:30.603 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:24:30.603 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:24:30.603 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:24:30.607 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:24:30.607 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:24:30.607 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:24:30.607 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:24:30.608 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:24:30.608 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:24:30.608 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:24:30.608 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:24:30.610 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:24:30.610 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:24:30.610 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:24:30.610 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:24:30.610 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:24:30.610 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:24:30.610 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:24:30.610 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:24:30.612 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:24:30.612 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:24:30.613 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:24:30.613 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:24:30.613 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:24:30.613 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:24:30.613 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:24:30.613 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:24:30.615 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:24:30.616 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:24:30.616 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:24:30.616 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:24:30.616 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:24:30.616 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:24:30.616 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:24:30.616 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:24:30.616 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:24:30.616 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:24:30.616 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:24:30.616 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:24:30.616 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:24:30.616 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:24:30.616 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:24:30.616 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:24:30.616 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:24:30.616 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:24:30.616 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:24:30.616 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:24:30.616 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:24:30.616 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:24:30.617 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:24:30.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:24:30.617 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:24:30.617 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:24:30.617 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:24:30.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:24:30.617 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:24:30.617 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:24:30.617 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:24:30.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:24:30.617 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:24:30.617 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:24:30.617 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:24:30.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:24:30.617 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:24:30.617 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:24:30.617 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:24:30.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:24:30.617 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:24:30.617 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:24:30.617 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:24:30.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:24:30.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:24:30.618 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:24:30.618 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:24:30.621 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:24:31.104 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:24:31.142 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:24:31.144 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:24:31.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:24:31.146 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:24:31.168 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:24:31.168 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:24:31.169 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:24:31.183 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:24:31.183 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:24:31.183 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:24:31.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:24:31.188 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:24:31.188 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:24:31.188 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:24:31.188 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:24:31.188 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:24:31.194 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:24:31.194 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:24:31.194 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:24:31.195 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:24:31.581 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:24:31.619 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:24:31.619 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:24:31.620 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:24:31.620 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:24:32.059 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:24:32.538 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:24:32.620 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:24:32.621 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:24:32.621 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:24:32.621 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:24:33.016 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:24:33.494 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:24:33.621 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:24:33.622 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:24:33.622 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:24:33.622 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:24:33.972 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:24:34.450 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:24:34.622 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:24:34.622 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:24:34.623 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:24:34.623 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:24:34.928 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:24:35.407 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 02:24:35.623 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:24:35.624 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:24:35.624 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:24:35.624 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:24:35.884 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 02:24:36.198 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:24:36.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:24:36.203 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:24:36.203 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:24:36.217 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:24:36.217 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:24:36.217 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:24:36.223 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:24:36.223 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:24:36.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:24:36.224 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:24:36.225 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:24:36.225 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:24:36.225 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:24:36.226 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:24:36.226 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:24:36.260 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:24:36.260 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:24:36.260 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:24:36.260 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:24:36.362 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 02:24:36.840 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 02:24:37.319 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 02:24:37.797 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 02:24:38.275 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 02:24:38.752 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 02:24:39.231 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 02:24:39.709 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 02:24:40.188 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 02:24:40.666 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 02:24:41.144 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 02:24:41.263 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:24:41.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:24:41.267 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:24:41.267 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:24:41.286 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:24:41.286 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:24:41.286 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:24:41.292 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:24:41.292 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:24:41.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:24:41.292 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:24:41.293 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:24:41.293 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:24:41.294 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:24:41.294 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:24:41.294 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:24:41.328 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:24:41.328 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:24:41.329 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:24:41.329 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:24:41.617 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 02:24:42.096 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 02:24:42.574 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 02:24:43.052 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 02:24:43.530 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-09 02:24:44.008 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-09 02:24:44.486 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-09 02:24:44.964 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-09 02:24:45.451 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-09 02:24:45.929 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-09 02:24:46.333 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:24:46.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:24:46.338 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:24:46.339 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:24:46.358 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:24:46.358 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:24:46.358 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:24:46.364 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:24:46.364 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:24:46.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:24:46.364 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:24:46.365 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:24:46.365 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:24:46.365 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:24:46.365 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:24:46.365 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:24:46.399 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:24:46.399 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:24:46.399 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:24:46.399 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:24:46.406 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-09 02:24:46.875 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-09 02:24:47.350 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-09 02:24:47.828 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-09 02:24:48.306 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-09 02:24:48.784 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-09 02:24:49.262 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-09 02:24:49.741 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-09 02:24:50.219 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-09 02:24:50.696 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-09 02:24:51.175 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-09 02:24:51.404 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:24:51.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:24:51.408 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:24:51.408 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:24:51.423 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:24:51.424 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:24:51.424 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:24:51.424 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:24:51.436 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:24:51.436 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:24:51.436 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:24:51.436 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:24:51.436 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:24:51.436 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:24:51.437 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:24:51.437 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4441 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:24:51.437 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4442 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:24:51.437 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4442 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:24:51.437 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4442 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:24:51.437 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4442 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:24:51.438 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4442 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:24:51.438 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4442 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:24:51.438 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4442 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:24:51.438 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4442 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:24:51.438 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4443 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:24:51.438 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4443 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:24:51.438 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4443 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:24:51.438 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4443 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:24:51.438 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4443 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:24:51.438 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4443 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:24:51.439 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4443 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:24:51.439 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4443 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:24:51.439 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4444 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:24:51.439 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4444 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:24:51.439 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4444 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:24:51.439 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4444 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:24:51.439 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4444 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:24:51.439 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4444 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:24:51.439 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4444 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:24:51.439 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4444 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:24:56.429 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:24:56.430 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:24:56.432 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:24:56.433 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:24:56.433 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:24:56.434 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:24:56.438 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:24:56.438 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:24:56.438 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:24:56.438 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:24:56.438 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:24:56.441 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:24:56.441 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:24:56.441 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:24:56.441 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:24:56.441 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:24:56.441 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:24:56.441 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:24:56.441 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:24:56.443 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:24:56.443 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:24:56.443 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:24:56.443 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:24:56.443 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:24:56.443 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:24:56.443 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:24:56.443 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:24:56.444 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:24:56.444 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:24:56.444 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:24:56.444 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:24:56.444 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:24:56.445 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:24:56.445 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:24:56.445 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:24:56.447 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:24:56.447 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:24:56.447 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:24:56.447 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:24:56.447 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:24:56.447 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:24:56.448 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:24:56.448 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:24:56.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:24:56.448 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:24:56.448 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:24:56.448 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:24:56.448 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:24:56.448 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:24:56.448 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:24:56.448 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:24:56.448 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:24:56.448 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:24:56.448 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:24:56.448 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:24:56.448 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:24:56.448 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:24:56.448 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:24:56.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:24:56.448 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:24:56.448 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:24:56.448 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:24:56.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:24:56.448 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:24:56.449 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:24:56.449 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:24:56.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:24:56.449 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:24:56.449 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:24:56.449 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:24:56.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:24:56.449 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:24:56.449 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:24:56.449 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:24:56.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:24:56.449 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:24:56.449 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:24:56.449 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:24:56.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:24:56.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:24:56.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:24:56.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:24:56.453 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:24:56.937 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:24:56.969 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:24:56.970 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:24:56.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:24:56.972 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:24:56.990 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:24:56.990 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:24:56.991 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:24:57.010 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:24:57.010 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:24:57.011 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:24:57.019 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:24:57.026 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:24:57.027 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:24:57.027 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:24:57.027 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:24:57.027 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:24:57.075 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:24:57.075 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:24:57.075 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:24:57.075 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:24:57.407 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:24:57.450 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:24:57.451 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:24:57.451 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:24:57.453 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:24:57.877 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:24:58.347 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:24:58.451 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:24:58.452 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:24:58.452 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:24:58.453 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:24:58.820 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:24:59.298 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:24:59.452 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:24:59.453 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:24:59.453 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:24:59.454 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:24:59.777 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:25:00.255 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:25:00.453 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:25:00.453 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:25:00.454 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:25:00.455 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:25:00.734 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:25:01.212 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 02:25:01.454 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:25:01.454 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:25:01.455 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:25:01.456 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:25:01.690 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 02:25:02.081 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:25:02.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:25:02.085 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:25:02.085 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:25:02.103 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:25:02.103 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:25:02.103 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:25:02.109 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:25:02.110 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:25:02.110 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:25:02.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:25:02.111 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:25:02.111 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:25:02.111 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:25:02.111 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:25:02.111 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:25:02.160 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:25:02.161 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:25:02.161 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:25:02.161 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:25:02.167 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 02:25:02.637 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 02:25:03.106 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 02:25:03.583 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 02:25:04.062 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 02:25:04.540 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 02:25:05.018 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 02:25:05.496 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 02:25:05.974 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 02:25:06.453 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 02:25:06.931 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 02:25:07.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:25:07.166 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:25:07.170 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:25:07.170 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:25:07.189 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:25:07.189 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:25:07.189 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:25:07.194 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:25:07.194 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:25:07.194 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:25:07.195 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:25:07.196 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:25:07.196 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:25:07.196 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:25:07.196 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:25:07.196 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:25:07.211 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:25:07.211 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:25:07.211 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:25:07.211 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:25:07.405 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 02:25:07.883 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 02:25:08.360 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 02:25:08.837 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 02:25:09.315 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-09 02:25:09.793 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-09 02:25:10.271 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-09 02:25:10.749 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-09 02:25:11.227 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-09 02:25:11.705 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-09 02:25:12.183 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-09 02:25:12.215 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:25:12.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:25:12.221 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:25:12.221 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:25:12.238 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:25:12.238 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:25:12.238 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:25:12.244 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:25:12.244 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:25:12.244 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:25:12.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:25:12.246 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:25:12.246 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:25:12.246 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:25:12.246 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:25:12.246 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:25:12.274 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:25:12.275 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:25:12.275 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:25:12.275 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:25:12.660 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-09 02:25:13.139 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-09 02:25:13.616 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-09 02:25:14.095 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-09 02:25:14.574 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-09 02:25:15.052 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-09 02:25:15.530 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-09 02:25:16.008 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-09 02:25:16.487 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-09 02:25:16.964 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-09 02:25:17.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:25:17.283 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:25:17.286 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:25:17.286 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:25:17.295 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:25:17.296 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:25:17.296 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:25:17.296 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:25:17.297 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:25:17.297 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:25:17.297 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:25:17.297 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:25:17.297 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:25:17.297 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:25:17.297 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:25:17.297 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4460 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:25:17.297 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4460 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:25:17.297 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4460 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:25:17.297 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4460 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:25:17.297 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4460 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:25:17.297 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4460 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:25:22.299 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:25:22.300 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:25:22.301 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:25:22.302 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:25:22.302 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:25:22.303 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:25:22.312 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:25:22.314 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:25:22.314 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:25:22.315 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:25:22.315 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:25:22.319 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:25:22.319 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:25:22.319 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:25:22.320 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:25:22.320 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:25:22.320 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:25:22.321 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:25:22.321 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:25:22.323 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:25:22.323 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:25:22.323 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:25:22.323 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:25:22.323 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:25:22.324 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:25:22.324 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:25:22.324 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:25:22.326 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:25:22.326 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:25:22.326 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:25:22.326 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:25:22.326 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:25:22.326 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:25:22.326 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:25:22.326 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:25:22.330 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:25:22.330 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:25:22.330 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:25:22.330 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:25:22.330 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:25:22.330 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:25:22.331 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:25:22.331 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:25:22.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:25:22.331 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:25:22.331 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:25:22.331 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:25:22.331 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:25:22.331 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:25:22.331 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:25:22.331 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:25:22.331 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:25:22.331 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:25:22.331 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:25:22.331 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:25:22.332 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:25:22.332 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:25:22.332 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:25:22.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:25:22.332 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:25:22.332 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:25:22.332 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:25:22.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:25:22.332 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:25:22.332 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:25:22.332 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:25:22.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:25:22.332 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:25:22.332 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:25:22.332 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:25:22.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:25:22.332 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:25:22.332 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:25:22.332 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:25:22.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:25:22.333 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:25:22.333 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:25:22.333 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:25:22.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:25:22.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:25:22.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:25:22.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:25:22.336 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:25:22.821 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:25:22.859 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:25:22.860 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:25:22.863 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:25:22.863 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:25:22.884 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:25:22.884 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:25:22.885 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:25:22.899 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:25:22.899 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:25:22.899 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:25:22.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:25:22.905 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:25:22.905 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:25:22.905 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:25:22.905 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:25:22.905 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:25:22.912 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:25:22.912 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:25:22.912 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:25:22.912 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:25:23.298 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:25:23.335 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:25:23.335 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:25:23.335 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:25:23.336 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:25:23.776 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:25:24.254 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:25:24.336 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:25:24.336 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:25:24.337 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:25:24.337 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:25:24.733 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:25:25.211 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:25:25.337 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:25:25.337 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:25:25.338 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:25:25.338 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:25:25.689 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:25:26.168 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:25:26.338 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:25:26.338 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:25:26.339 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:25:26.339 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:25:26.646 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:25:27.124 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 02:25:27.339 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:25:27.339 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:25:27.339 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:25:27.340 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:25:27.603 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 02:25:27.916 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:25:27.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:25:27.920 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:25:27.920 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:25:27.938 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:25:27.938 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:25:27.938 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:25:27.944 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:25:27.944 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:25:27.944 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:25:27.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:25:27.946 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:25:27.946 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:25:27.946 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:25:27.946 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:25:27.946 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:25:27.977 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:25:27.978 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:25:27.978 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:25:27.979 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:25:28.080 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 02:25:28.559 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 02:25:29.037 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 02:25:29.516 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 02:25:29.994 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 02:25:30.472 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 02:25:30.950 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 02:25:31.428 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 02:25:31.907 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 02:25:32.385 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 02:25:32.863 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 02:25:32.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:25:32.982 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:25:32.986 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:25:32.986 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:25:33.006 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:25:33.006 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:25:33.006 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:25:33.012 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:25:33.012 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:25:33.012 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:25:33.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:25:33.014 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:25:33.014 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:25:33.014 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:25:33.014 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:25:33.014 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:25:33.047 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:25:33.047 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:25:33.047 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:25:33.048 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:25:33.336 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 02:25:33.814 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 02:25:34.293 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 02:25:34.771 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 02:25:35.249 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-09 02:25:35.727 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-09 02:25:36.205 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-09 02:25:36.684 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-09 02:25:37.162 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-09 02:25:37.640 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-09 02:25:38.052 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:25:38.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:25:38.057 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:25:38.057 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:25:38.074 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:25:38.074 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:25:38.074 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:25:38.080 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:25:38.080 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:25:38.080 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:25:38.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:25:38.082 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:25:38.082 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:25:38.082 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:25:38.082 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:25:38.082 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:25:38.110 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:25:38.111 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:25:38.111 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:25:38.111 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:25:38.117 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-09 02:25:38.595 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-09 02:25:39.074 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-09 02:25:39.552 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-09 02:25:40.031 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-09 02:25:40.509 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-09 02:25:40.987 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-09 02:25:41.465 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-09 02:25:41.943 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-09 02:25:42.418 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-09 02:25:42.896 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-09 02:25:43.116 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:25:43.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:25:43.120 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:25:43.121 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:25:43.133 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:25:43.133 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:25:43.133 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:25:43.133 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:25:43.135 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:25:43.136 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:25:43.136 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:25:43.136 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:25:43.136 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:25:43.136 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:25:43.136 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:25:43.136 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4439 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:25:43.136 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4439 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:25:43.136 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4439 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:25:43.136 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4439 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:25:43.136 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4439 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:25:43.136 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4439 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:25:43.136 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4439 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:25:48.138 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:25:48.138 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:25:48.140 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:25:48.142 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:25:48.142 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:25:48.143 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:25:48.155 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:25:48.156 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:25:48.156 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:25:48.156 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:25:48.156 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:25:48.158 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:25:48.159 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:25:48.159 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:25:48.159 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:25:48.159 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:25:48.159 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:25:48.159 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:25:48.159 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:25:48.161 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:25:48.161 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:25:48.161 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:25:48.161 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:25:48.161 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:25:48.161 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:25:48.161 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:25:48.161 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:25:48.163 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:25:48.163 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:25:48.163 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:25:48.163 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:25:48.163 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:25:48.163 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:25:48.163 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:25:48.163 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:25:48.166 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:25:48.166 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:25:48.166 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:25:48.166 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:25:48.166 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:25:48.166 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:25:48.166 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:25:48.166 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:25:48.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:25:48.166 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:25:48.166 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:25:48.166 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:25:48.167 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:25:48.167 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:25:48.167 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:25:48.167 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:25:48.167 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:25:48.167 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:25:48.167 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:25:48.167 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:25:48.167 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:25:48.167 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:25:48.167 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:25:48.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:25:48.167 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:25:48.167 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:25:48.167 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:25:48.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:25:48.167 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:25:48.167 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:25:48.167 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:25:48.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:25:48.167 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:25:48.167 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:25:48.167 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:25:48.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:25:48.168 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:25:48.168 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:25:48.168 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:25:48.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:25:48.168 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:25:48.168 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:25:48.168 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:25:48.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:25:48.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:25:48.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:25:48.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:25:48.171 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:25:48.654 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:25:48.692 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:25:48.695 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:25:48.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:25:48.697 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:25:48.720 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:25:48.720 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:25:48.721 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:25:48.739 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:25:48.739 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:25:48.739 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:25:48.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:25:48.743 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:25:48.743 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:25:48.743 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:25:48.743 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:25:48.743 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:25:48.792 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:25:48.792 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:25:48.792 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:25:48.793 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:25:49.131 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:25:49.170 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:25:49.170 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:25:49.171 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:25:49.171 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:25:49.609 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:25:50.087 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:25:50.171 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:25:50.171 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:25:50.172 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:25:50.172 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:25:50.565 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:25:51.044 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:25:51.172 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:25:51.172 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:25:51.172 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:25:51.173 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:25:51.522 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:25:52.001 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:25:52.172 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:25:52.173 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:25:52.173 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:25:52.173 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:25:52.479 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:25:52.957 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 02:25:53.174 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:25:53.174 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:25:53.174 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:25:53.174 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:25:53.435 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 02:25:53.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:25:53.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:25:53.800 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:25:53.800 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:25:53.820 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:25:53.820 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:25:53.820 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:25:53.826 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:25:53.826 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:25:53.826 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:25:53.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:25:53.828 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:25:53.828 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:25:53.828 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:25:53.828 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:25:53.828 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:25:53.873 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:25:53.873 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:25:53.873 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:25:53.873 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:25:53.912 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 02:25:54.390 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 02:25:54.863 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 02:25:55.335 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 02:25:55.814 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 02:25:56.292 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 02:25:56.771 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 02:25:57.249 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 02:25:57.728 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 02:25:58.206 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 02:25:58.685 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 02:25:58.857 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:25:58.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:25:58.862 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:25:58.863 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:25:58.882 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:25:58.882 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:25:58.882 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:25:58.889 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:25:58.889 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:25:58.889 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:25:58.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:25:58.890 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:25:58.890 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:25:58.890 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:25:58.890 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:25:58.890 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:25:58.919 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:25:58.920 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:25:58.920 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:25:58.920 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:25:59.158 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 02:25:59.629 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 02:26:00.108 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 02:26:00.586 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 02:26:01.064 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-09 02:26:01.543 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-09 02:26:02.021 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-09 02:26:02.499 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-09 02:26:02.977 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-09 02:26:03.455 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-09 02:26:03.924 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:26:03.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:26:03.929 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:26:03.930 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:26:03.933 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-09 02:26:03.947 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:26:03.947 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:26:03.947 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:26:03.953 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:26:03.953 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:26:03.953 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:26:03.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:26:03.955 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:26:03.955 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:26:03.955 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:26:03.955 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:26:03.955 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:26:03.978 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:26:03.978 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:26:03.978 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:26:03.978 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:26:04.402 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-09 02:26:04.872 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-09 02:26:05.346 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-09 02:26:05.825 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-09 02:26:06.303 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-09 02:26:06.781 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-09 02:26:07.258 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-09 02:26:07.736 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-09 02:26:08.214 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-09 02:26:08.692 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-09 02:26:08.981 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:26:08.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:26:08.986 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:26:08.986 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:26:09.005 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:26:09.005 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:26:09.005 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:26:09.005 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:26:09.015 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:26:09.015 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:26:09.015 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:26:09.015 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:26:09.016 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:26:09.016 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:26:09.016 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:26:09.016 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4455 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:26:09.017 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4455 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:26:14.010 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:26:14.010 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:26:14.012 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:26:14.012 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:26:14.012 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:26:14.013 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:26:14.022 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:26:14.022 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:26:14.022 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:26:14.023 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:26:14.023 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:26:14.025 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:26:14.025 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:26:14.026 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:26:14.026 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:26:14.026 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:26:14.026 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:26:14.027 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:26:14.027 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:26:14.028 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:26:14.028 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:26:14.028 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:26:14.028 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:26:14.028 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:26:14.028 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:26:14.028 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:26:14.028 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:26:14.030 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:26:14.030 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:26:14.030 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:26:14.030 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:26:14.030 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:26:14.030 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:26:14.030 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:26:14.030 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:26:14.032 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:26:14.032 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:26:14.032 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:26:14.032 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:26:14.032 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:26:14.033 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:26:14.033 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:26:14.033 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:26:14.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:26:14.033 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:26:14.033 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:26:14.033 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:26:14.033 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:26:14.033 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:26:14.033 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:26:14.033 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:26:14.033 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:26:14.033 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:26:14.033 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:26:14.033 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:26:14.033 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:26:14.033 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:26:14.033 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:26:14.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:26:14.033 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:26:14.033 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:26:14.033 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:26:14.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:26:14.033 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:26:14.033 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:26:14.033 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:26:14.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:26:14.034 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:26:14.034 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:26:14.034 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:26:14.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:26:14.034 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:26:14.034 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:26:14.034 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:26:14.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:26:14.034 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:26:14.034 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:26:14.034 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:26:14.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:26:14.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:26:14.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:26:14.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:26:14.038 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:26:14.521 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:26:14.556 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:26:14.557 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:26:14.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:26:14.559 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:26:14.577 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:26:14.577 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:26:14.577 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:26:14.584 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:26:14.585 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:26:14.585 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:26:14.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:26:14.589 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:26:14.589 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:26:14.589 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:26:14.589 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:26:14.589 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:26:14.613 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:26:14.613 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:26:14.613 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:26:14.613 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:26:14.839 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:26:14.840 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:26:14.844 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:26:14.844 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:26:14.863 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:26:14.863 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:26:14.863 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:26:14.869 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:26:14.869 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:26:14.869 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:26:14.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:26:14.871 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:26:14.871 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:26:14.871 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:26:14.871 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:26:14.871 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:26:14.894 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:26:14.894 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:26:14.894 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:26:14.895 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:26:14.995 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:26:15.035 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:26:15.035 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:26:15.036 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:26:15.037 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:26:15.278 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:26:15.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:26:15.282 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:26:15.282 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:26:15.301 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:26:15.301 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:26:15.301 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:26:15.308 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:26:15.308 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:26:15.308 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:26:15.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:26:15.310 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:26:15.310 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:26:15.310 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:26:15.310 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:26:15.310 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:26:15.316 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:26:15.317 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:26:15.317 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:26:15.317 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:26:15.465 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:26:15.943 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:26:16.036 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:26:16.036 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:26:16.037 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:26:16.037 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:26:16.099 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:26:16.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:26:16.104 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:26:16.104 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:26:16.116 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:26:16.116 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:26:16.116 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:26:16.122 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:26:16.122 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:26:16.122 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:26:16.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:26:16.124 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:26:16.124 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:26:16.124 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:26:16.124 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:26:16.124 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:26:16.178 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:26:16.178 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:26:16.178 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:26:16.178 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:26:16.415 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:26:16.891 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:26:16.974 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:26:16.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:26:16.979 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:26:16.979 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:26:16.994 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:26:16.994 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:26:16.994 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:26:16.994 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:26:17.004 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:26:17.004 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:26:17.004 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:26:17.004 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:26:17.004 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:26:17.004 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:26:17.005 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:26:17.005 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=635 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:26:17.006 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=635 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:26:21.998 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:26:21.998 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:26:22.000 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:26:22.000 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:26:22.000 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:26:22.001 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:26:22.009 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:26:22.010 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:26:22.010 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:26:22.011 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:26:22.011 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:26:22.014 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:26:22.014 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:26:22.014 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:26:22.014 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:26:22.015 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:26:22.015 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:26:22.015 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:26:22.015 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:26:22.017 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:26:22.017 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:26:22.017 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:26:22.017 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:26:22.017 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:26:22.017 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:26:22.017 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:26:22.017 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:26:22.019 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:26:22.019 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:26:22.019 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:26:22.019 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:26:22.019 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:26:22.019 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:26:22.019 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:26:22.019 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:26:22.022 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:26:22.022 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:26:22.022 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:26:22.022 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:26:22.022 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:26:22.022 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:26:22.022 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:26:22.022 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:26:22.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:26:22.022 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:26:22.022 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:26:22.022 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:26:22.022 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:26:22.022 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:26:22.022 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:26:22.022 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:26:22.022 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:26:22.022 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:26:22.022 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:26:22.022 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:26:22.022 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:26:22.023 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:26:22.023 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:26:22.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:26:22.023 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:26:22.023 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:26:22.023 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:26:22.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:26:22.023 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:26:22.023 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:26:22.023 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:26:22.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:26:22.023 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:26:22.023 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:26:22.023 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:26:22.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:26:22.023 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:26:22.023 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:26:22.023 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:26:22.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:26:22.023 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:26:22.023 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:26:22.023 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:26:22.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:26:22.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:26:22.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:26:22.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:26:22.027 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:26:22.512 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:26:22.549 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:26:22.551 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:26:22.553 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:26:22.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:26:22.568 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:26:22.568 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:26:22.569 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:26:22.586 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:26:22.586 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:26:22.586 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:26:22.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:26:22.595 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:26:22.596 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:26:22.596 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:26:22.597 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:26:22.597 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:26:22.606 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:26:22.606 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:26:22.606 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:26:22.607 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:26:22.990 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:26:23.025 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:26:23.025 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:26:23.026 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:26:23.028 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:26:23.468 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:26:23.946 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:26:24.026 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:26:24.027 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:26:24.027 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:26:24.029 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:26:24.424 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:26:24.903 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:26:25.027 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:26:25.028 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:26:25.028 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:26:25.031 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:26:25.381 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:26:25.859 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:26:26.029 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:26:26.029 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:26:26.029 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:26:26.032 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:26:26.338 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:26:26.816 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 02:26:27.029 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:26:27.030 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:26:27.030 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:26:27.033 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:26:27.294 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 02:26:27.772 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 02:26:28.251 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 02:26:28.729 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 02:26:29.207 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 02:26:29.685 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 02:26:30.164 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 02:26:30.642 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 02:26:31.120 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 02:26:31.598 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 02:26:32.076 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 02:26:32.555 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 02:26:33.033 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 02:26:33.511 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 02:26:33.990 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 02:26:34.468 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 02:26:34.946 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-09 02:26:35.424 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-09 02:26:35.902 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-09 02:26:36.380 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-09 02:26:36.859 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-09 02:26:37.337 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-09 02:26:37.816 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-09 02:26:38.293 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-09 02:26:38.771 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-09 02:26:39.250 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-09 02:26:39.728 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-09 02:26:40.206 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-09 02:26:40.684 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-09 02:26:41.153 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-09 02:26:41.623 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-09 02:26:42.096 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-09 02:26:42.575 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-09 02:26:42.609 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:26:42.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:26:42.614 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:26:42.614 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:26:42.631 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:26:42.631 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:26:42.631 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:26:42.637 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:26:42.637 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:26:42.637 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:26:42.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:26:42.639 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:26:42.639 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:26:42.639 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:26:42.639 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:26:42.639 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:26:42.666 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:26:42.666 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:26:42.667 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:26:42.667 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:26:43.052 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-01-09 02:26:43.530 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-01-09 02:26:44.009 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-01-09 02:26:44.488 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-01-09 02:26:44.966 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-01-09 02:26:45.445 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-01-09 02:26:45.923 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-01-09 02:26:46.402 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-01-09 02:26:46.880 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-01-09 02:26:47.359 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-01-09 02:26:47.837 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-01-09 02:26:48.316 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-01-09 02:26:48.793 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-01-09 02:26:49.272 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-01-09 02:26:49.750 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-01-09 02:26:50.228 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-01-09 02:26:50.707 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-01-09 02:26:51.186 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-01-09 02:26:51.665 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-01-09 02:26:52.144 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-01-09 02:26:52.622 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-01-09 02:26:53.100 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-01-09 02:26:53.577 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-01-09 02:26:54.055 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-01-09 02:26:54.534 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-01-09 02:26:55.012 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-01-09 02:26:55.491 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-01-09 02:26:55.968 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-01-09 02:26:56.447 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-01-09 02:26:56.925 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-01-09 02:26:57.404 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-01-09 02:26:57.883 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-01-09 02:26:58.357 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-01-09 02:26:58.827 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-01-09 02:26:59.298 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-01-09 02:26:59.777 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-01-09 02:27:00.255 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-01-09 02:27:00.734 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-01-09 02:27:01.212 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-01-09 02:27:01.691 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-01-09 02:27:02.169 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-01-09 02:27:02.648 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-01-09 02:27:02.670 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:27:02.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:27:02.674 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:27:02.674 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:27:02.693 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:27:02.693 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:27:02.693 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:27:02.699 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:27:02.699 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:27:02.699 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:27:02.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:27:02.701 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:27:02.701 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:27:02.701 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:27:02.701 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:27:02.701 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:27:02.739 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:27:02.739 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:27:02.739 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:27:02.740 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:27:03.125 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-01-09 02:27:03.603 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-01-09 02:27:04.081 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-01-09 02:27:04.559 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-01-09 02:27:05.037 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-01-09 02:27:05.515 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-01-09 02:27:05.993 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-01-09 02:27:06.472 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-01-09 02:27:06.950 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-01-09 02:27:07.428 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-01-09 02:27:07.906 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-01-09 02:27:08.384 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-01-09 02:27:08.862 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-01-09 02:27:09.340 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-01-09 02:27:09.819 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-01-09 02:27:10.297 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-01-09 02:27:10.776 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-01-09 02:27:11.253 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-01-09 02:27:11.731 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-01-09 02:27:12.210 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-01-09 02:27:12.688 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-01-09 02:27:13.166 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-01-09 02:27:13.644 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-01-09 02:27:14.121 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-01-09 02:27:14.599 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-01-09 02:27:15.077 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-01-09 02:27:15.566 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-01-09 02:27:16.045 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-01-09 02:27:16.523 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-01-09 02:27:17.002 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-01-09 02:27:17.480 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-01-09 02:27:17.958 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-01-09 02:27:18.436 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-01-09 02:27:18.914 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-01-09 02:27:19.393 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-01-09 02:27:19.870 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-01-09 02:27:20.348 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-01-09 02:27:20.826 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-01-09 02:27:21.304 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-01-09 02:27:21.782 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-01-09 02:27:22.260 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-01-09 02:27:22.738 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-01-09 02:27:22.742 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:27:22.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:27:22.747 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:27:22.747 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:27:22.758 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:27:22.758 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:27:22.758 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:27:22.763 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:27:22.763 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:27:22.763 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:27:22.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:27:22.765 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:27:22.765 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:27:22.765 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:27:22.765 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:27:22.765 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:27:22.782 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:27:22.782 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:27:22.782 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:27:22.782 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:27:23.216 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-01-09 02:27:23.693 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-01-09 02:27:24.171 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-01-09 02:27:24.649 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-01-09 02:27:25.127 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-01-09 02:27:25.605 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-01-09 02:27:26.083 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-01-09 02:27:26.560 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-01-09 02:27:27.038 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-01-09 02:27:27.516 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-01-09 02:27:27.995 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-01-09 02:27:28.474 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-01-09 02:27:28.952 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-01-09 02:27:29.430 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-01-09 02:27:29.908 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-01-09 02:27:30.386 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-01-09 02:27:30.864 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-01-09 02:27:31.342 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-01-09 02:27:31.821 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-01-09 02:27:32.299 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-01-09 02:27:32.778 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-01-09 02:27:33.256 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-01-09 02:27:33.733 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-01-09 02:27:34.212 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-01-09 02:27:34.690 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-01-09 02:27:35.168 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-01-09 02:27:35.646 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-01-09 02:27:36.125 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-01-09 02:27:36.603 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-01-09 02:27:37.081 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-01-09 02:27:37.560 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-01-09 02:27:38.039 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-01-09 02:27:38.516 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-01-09 02:27:38.995 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-01-09 02:27:39.473 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-01-09 02:27:39.951 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-01-09 02:27:40.429 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-01-09 02:27:40.908 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-01-09 02:27:41.386 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-01-09 02:27:41.865 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-01-09 02:27:42.343 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-01-09 02:27:42.784 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:27:42.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:27:42.789 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:27:42.790 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:27:42.793 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:27:42.793 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:27:42.793 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:27:42.793 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:27:42.795 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:27:42.795 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:27:42.795 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:27:42.795 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:27:42.795 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:27:42.795 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:27:42.795 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:27:42.795 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=17236 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:27:42.795 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=17236 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:27:42.795 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=17236 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:27:42.795 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=17236 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:27:42.795 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=17236 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:27:42.795 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=17236 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:27:42.795 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=17236 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:27:47.799 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:27:47.799 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:27:47.800 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:27:47.800 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:27:47.801 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:27:47.802 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:27:47.806 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:27:47.806 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:27:47.806 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:27:47.807 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:27:47.807 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:27:47.808 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:27:47.808 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:27:47.809 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:27:47.809 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:27:47.809 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:27:47.809 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:27:47.809 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:27:47.809 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:27:47.810 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:27:47.810 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:27:47.810 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:27:47.810 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:27:47.811 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:27:47.811 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:27:47.811 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:27:47.811 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:27:47.812 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:27:47.812 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:27:47.812 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:27:47.812 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:27:47.812 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:27:47.812 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:27:47.812 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:27:47.812 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:27:47.814 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:27:47.814 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:27:47.814 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:27:47.814 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:27:47.814 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:27:47.814 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:27:47.814 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:27:47.815 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:27:47.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:27:47.815 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:27:47.815 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:27:47.815 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:27:47.815 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:27:47.815 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:27:47.815 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:27:47.815 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:27:47.815 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:27:47.815 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:27:47.815 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:27:47.815 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:27:47.815 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:27:47.815 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:27:47.815 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:27:47.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:27:47.815 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:27:47.815 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:27:47.815 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:27:47.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:27:47.815 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:27:47.815 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:27:47.815 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:27:47.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:27:47.816 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:27:47.816 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:27:47.816 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:27:47.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:27:47.816 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:27:47.816 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:27:47.816 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:27:47.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:27:47.816 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:27:47.817 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:27:47.817 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:27:47.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:27:47.817 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:27:47.817 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:27:47.817 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:27:47.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:27:47.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:27:47.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:27:47.817 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:27:47.817 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:27:47.817 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:27:47.817 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:27:52.822 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:27:52.823 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:27:52.823 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:27:52.824 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:27:52.824 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:27:52.825 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:27:52.829 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:27:52.829 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:27:52.830 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:27:52.830 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:27:52.830 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:27:52.831 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:27:52.831 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:27:52.831 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:27:52.831 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:27:52.831 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:27:52.831 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:27:52.831 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:27:52.832 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:27:52.832 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:27:52.832 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:27:52.832 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:27:52.832 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:27:52.832 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:27:52.832 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:27:52.832 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:27:52.832 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:27:52.834 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:27:52.834 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:27:52.834 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:27:52.834 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:27:52.834 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:27:52.834 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:27:52.834 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:27:52.834 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:27:52.836 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:27:52.836 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:27:52.836 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:27:52.836 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:27:52.836 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:27:52.836 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:27:52.836 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:27:52.836 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:27:52.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:27:52.836 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:27:52.836 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:27:52.837 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:27:52.837 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:27:52.837 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:27:52.837 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:27:52.837 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:27:52.837 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:27:52.837 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:27:52.837 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:27:52.837 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:27:52.837 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:27:52.837 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:27:52.837 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:27:52.837 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:27:52.837 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:27:52.837 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:27:52.837 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:27:52.837 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:27:52.837 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:27:52.837 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:27:52.837 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:27:52.837 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:27:52.837 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:27:52.837 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:27:52.837 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:27:52.837 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:27:52.837 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:27:52.837 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:27:52.837 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:27:52.837 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:27:52.837 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:27:52.837 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:27:52.838 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:27:52.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:27:52.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:27:52.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:27:52.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:27:52.842 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:27:53.323 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:27:53.351 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:27:53.351 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:27:53.352 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:27:53.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:27:53.359 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:27:53.359 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:27:53.359 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:27:53.367 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:27:53.367 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:27:53.367 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:27:53.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:27:53.371 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:27:53.371 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:27:53.371 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:27:53.371 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:27:53.371 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:27:53.414 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:27:53.415 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:27:53.415 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:27:53.415 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:27:53.617 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:27:53.618 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:27:53.621 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:27:53.621 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:27:53.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:27:53.637 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:27:53.637 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:27:53.638 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:27:53.639 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:27:53.639 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:27:53.639 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:27:53.639 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:27:53.639 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:27:53.647 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:27:53.647 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:27:53.647 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:27:53.647 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:27:53.793 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:27:53.839 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:27:53.840 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:27:53.840 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:27:53.841 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:27:53.852 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:27:53.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:27:53.856 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:27:53.856 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:27:53.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:27:53.874 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:27:53.874 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:27:53.874 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:27:53.876 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:27:53.876 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:27:53.876 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:27:53.876 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:27:53.876 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:27:53.878 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:27:53.878 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:27:53.878 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:27:53.878 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:27:54.074 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:27:54.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:27:54.078 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:27:54.079 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:27:54.097 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:27:54.097 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:27:54.097 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:27:54.103 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:27:54.103 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:27:54.103 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:27:54.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:27:54.105 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:27:54.105 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:27:54.105 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:27:54.105 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:27:54.105 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:27:54.114 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:27:54.114 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:27:54.114 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:27:54.114 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:27:54.262 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:27:54.393 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:27:54.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:27:54.397 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:27:54.398 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:27:54.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:27:54.414 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:27:54.414 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:27:54.414 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:27:54.415 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:27:54.415 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:27:54.415 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:27:54.415 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:27:54.416 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:27:54.444 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:27:54.444 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:27:54.444 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:27:54.445 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:27:54.717 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:27:54.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:27:54.721 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:27:54.721 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:27:54.733 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:27:54.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:27:54.737 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:27:54.737 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:27:54.737 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:27:54.739 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:27:54.739 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:27:54.739 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:27:54.739 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:27:54.739 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:27:54.777 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:27:54.777 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:27:54.778 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:27:54.778 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:27:54.841 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:27:54.841 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:27:54.841 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:27:54.842 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:27:55.077 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:27:55.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:27:55.082 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:27:55.082 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:27:55.097 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:27:55.097 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:27:55.097 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:27:55.103 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:27:55.103 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:27:55.103 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:27:55.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:27:55.104 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:27:55.104 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:27:55.104 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:27:55.104 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:27:55.104 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:27:55.151 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:27:55.151 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:27:55.152 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:27:55.152 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:27:55.205 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:27:55.684 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:27:55.842 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:27:55.842 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:27:55.842 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:27:55.843 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:27:56.162 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:27:56.640 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:27:56.843 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:27:56.843 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:27:56.843 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:27:56.843 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:27:57.119 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:27:57.598 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 02:27:57.753 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:27:57.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:27:57.759 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:27:57.759 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:27:57.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:27:57.775 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:27:57.775 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:27:57.775 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:27:57.777 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:27:57.777 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:27:57.777 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:27:57.777 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:27:57.777 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:27:57.779 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:27:57.779 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:27:57.779 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:27:57.779 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:27:57.844 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:27:57.844 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:27:57.844 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:27:57.844 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:27:58.070 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 02:27:58.545 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 02:27:59.023 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 02:27:59.502 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 02:27:59.980 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 02:28:00.371 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:28:00.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:28:00.375 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:28:00.376 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:28:00.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:28:00.392 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:28:00.392 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:28:00.392 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:28:00.394 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:28:00.394 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:28:00.394 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:28:00.394 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:28:00.394 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:28:00.396 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:28:00.396 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:28:00.396 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:28:00.396 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:28:00.457 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 02:28:00.926 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 02:28:01.395 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 02:28:01.871 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 02:28:02.349 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 02:28:02.827 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 02:28:02.980 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:28:02.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:28:02.982 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:28:02.982 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:28:02.992 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:28:02.992 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:28:02.992 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:28:03.003 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:28:03.003 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:28:03.003 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:28:03.003 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:28:03.005 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:28:03.005 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:28:03.005 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:28:03.005 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:28:03.005 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:28:03.008 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:28:03.008 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:28:03.008 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:28:03.008 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:28:03.299 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 02:28:03.770 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 02:28:04.237 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 02:28:04.705 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 02:28:05.172 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 02:28:05.482 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:28:05.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:28:05.484 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:28:05.484 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:28:05.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:28:05.489 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:28:05.489 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:28:05.489 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:28:05.490 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:28:05.490 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:28:05.490 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:28:05.490 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:28:05.490 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:28:05.491 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:28:05.491 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:28:05.491 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:28:05.491 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:28:05.639 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-09 02:28:06.106 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-09 02:28:06.573 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-09 02:28:07.042 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-09 02:28:07.519 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-09 02:28:07.997 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-09 02:28:08.079 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:28:08.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:28:08.084 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:28:08.084 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:28:08.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:28:08.099 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:28:08.099 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:28:08.099 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:28:08.101 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:28:08.101 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:28:08.101 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:28:08.101 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:28:08.101 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:28:08.134 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:28:08.134 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:28:08.134 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:28:08.134 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:28:08.471 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-09 02:28:08.950 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-09 02:28:09.425 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-09 02:28:09.894 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-09 02:28:10.363 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-09 02:28:10.680 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:28:10.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:28:10.685 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:28:10.685 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:28:10.705 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:28:10.705 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:28:10.705 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:28:10.706 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:28:10.714 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:28:10.714 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:28:10.714 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:28:10.715 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:28:10.715 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:28:10.715 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:28:10.715 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:28:10.715 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3851 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:28:10.716 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3851 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:28:15.706 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:28:15.706 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:28:15.708 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:28:15.709 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:28:15.710 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:28:15.710 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:28:15.719 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:28:15.720 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:28:15.720 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:28:15.720 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:28:15.720 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:28:15.723 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:28:15.723 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:28:15.724 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:28:15.724 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:28:15.724 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:28:15.724 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:28:15.724 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:28:15.724 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:28:15.726 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:28:15.727 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:28:15.727 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:28:15.727 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:28:15.727 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:28:15.727 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:28:15.727 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:28:15.727 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:28:15.730 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:28:15.730 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:28:15.730 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:28:15.730 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:28:15.730 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:28:15.731 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:28:15.731 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:28:15.731 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:28:15.734 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:28:15.734 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:28:15.734 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:28:15.734 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:28:15.734 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:28:15.735 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:28:15.735 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:28:15.735 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:28:15.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:28:15.735 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:28:15.735 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:28:15.735 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:28:15.735 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:28:15.735 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:28:15.735 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:28:15.735 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:28:15.735 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:28:15.735 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:28:15.735 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:28:15.735 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:28:15.735 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:28:15.735 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:28:15.736 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:28:15.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:28:15.736 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:28:15.736 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:28:15.736 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:28:15.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:28:15.736 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:28:15.736 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:28:15.736 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:28:15.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:28:15.736 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:28:15.736 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:28:15.736 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:28:15.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:28:15.736 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:28:15.736 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:28:15.736 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:28:15.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:28:15.736 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:28:15.736 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:28:15.736 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:28:15.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:28:15.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:28:15.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:28:15.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:28:15.740 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:28:16.223 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:28:16.264 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:28:16.266 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:28:16.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:28:16.269 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:28:16.290 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:28:16.290 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:28:16.291 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:28:16.302 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:28:16.302 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:28:16.302 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:28:16.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:28:16.305 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:28:16.305 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:28:16.305 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:28:16.305 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:28:16.306 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:28:16.313 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:28:16.313 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:28:16.313 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:28:16.313 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:28:16.700 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:28:16.738 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:28:16.739 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:28:16.740 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:28:16.742 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:28:17.178 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:28:17.650 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:28:17.740 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:28:17.740 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:28:17.741 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:28:17.744 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:28:18.125 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:28:18.604 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:28:18.740 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:28:18.741 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:28:18.742 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:28:18.745 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:28:19.082 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:28:19.431 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:28:19.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:28:19.436 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:28:19.437 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:28:19.453 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:28:19.453 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:28:19.454 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:28:19.459 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:28:19.460 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:28:19.460 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:28:19.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:28:19.461 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:28:19.461 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:28:19.461 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:28:19.462 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:28:19.462 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:28:19.503 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:28:19.503 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:28:19.504 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:28:19.504 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:28:19.558 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:28:19.741 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:28:19.742 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:28:19.743 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:28:19.747 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:28:20.037 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:28:20.516 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 02:28:20.742 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:28:20.743 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:28:20.744 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:28:20.748 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:28:20.994 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 02:28:21.473 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 02:28:21.952 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 02:28:22.430 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 02:28:22.678 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:28:22.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:28:22.684 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:28:22.684 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:28:22.703 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:28:22.703 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:28:22.703 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:28:22.709 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:28:22.709 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:28:22.709 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:28:22.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:28:22.711 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:28:22.711 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:28:22.711 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:28:22.711 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:28:22.711 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:28:22.758 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:28:22.758 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:28:22.759 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:28:22.759 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:28:22.908 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 02:28:23.386 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 02:28:23.863 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 02:28:24.341 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 02:28:24.819 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 02:28:25.296 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 02:28:25.774 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 02:28:25.893 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:28:25.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:28:25.898 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:28:25.898 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:28:25.911 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:28:25.911 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:28:25.911 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:28:25.947 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:28:25.947 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:28:25.947 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:28:25.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:28:25.949 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:28:25.949 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:28:25.949 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:28:25.950 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:28:25.950 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:28:25.957 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:28:25.957 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:28:25.957 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:28:25.957 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:28:26.248 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 02:28:26.726 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 02:28:27.204 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 02:28:27.683 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 02:28:28.160 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 02:28:28.639 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-09 02:28:29.117 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-09 02:28:29.164 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:28:29.165 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:28:29.170 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:28:29.170 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:28:29.186 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:28:29.186 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:28:29.186 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:28:29.186 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:28:29.192 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:28:29.192 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:28:29.192 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:28:29.193 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:28:29.193 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:28:29.193 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:28:29.193 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:28:29.193 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2872 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:28:29.194 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2872 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:28:34.191 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:28:34.191 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:28:34.193 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:28:34.193 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:28:34.193 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:28:34.194 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:28:34.201 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:28:34.202 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:28:34.202 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:28:34.202 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:28:34.202 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:28:34.204 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:28:34.204 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:28:34.204 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:28:34.204 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:28:34.205 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:28:34.205 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:28:34.205 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:28:34.205 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:28:34.206 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:28:34.206 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:28:34.206 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:28:34.206 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:28:34.207 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:28:34.207 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:28:34.207 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:28:34.207 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:28:34.208 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:28:34.208 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:28:34.208 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:28:34.208 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:28:34.208 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:28:34.208 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:28:34.208 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:28:34.208 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:28:34.210 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:28:34.210 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:28:34.210 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:28:34.210 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:28:34.211 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:28:34.211 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:28:34.211 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:28:34.211 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:28:34.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:28:34.211 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:28:34.211 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:28:34.211 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:28:34.211 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:28:34.211 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:28:34.211 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:28:34.211 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:28:34.211 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:28:34.211 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:28:34.211 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:28:34.211 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:28:34.211 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:28:34.211 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:28:34.211 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:28:34.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:28:34.211 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:28:34.211 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:28:34.211 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:28:34.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:28:34.211 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:28:34.211 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:28:34.211 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:28:34.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:28:34.212 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:28:34.212 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:28:34.212 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:28:34.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:28:34.212 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:28:34.212 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:28:34.212 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:28:34.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:28:34.212 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:28:34.212 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:28:34.212 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:28:34.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:28:34.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:28:34.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:28:34.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:28:34.216 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:28:34.699 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:28:34.735 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:28:34.737 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:28:34.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:28:34.740 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:28:34.763 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:28:34.763 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:28:34.764 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:28:34.781 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:28:34.781 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:28:34.781 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:28:34.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:28:34.787 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:28:34.787 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:28:34.787 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:28:34.787 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:28:34.787 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:28:34.790 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:28:34.790 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:28:34.790 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:28:34.790 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:28:35.114 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:28:35.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:28:35.120 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:28:35.120 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:28:35.139 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:28:35.139 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:28:35.140 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:28:35.146 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:28:35.146 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:28:35.146 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:28:35.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:28:35.148 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:28:35.148 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:28:35.148 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:28:35.148 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:28:35.148 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:28:35.169 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:28:35.169 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:28:35.169 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:28:35.169 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:28:35.176 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:28:35.214 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:28:35.215 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:28:35.215 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:28:35.217 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:28:35.654 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:28:35.668 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:28:35.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:28:35.673 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:28:35.673 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:28:35.693 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:28:35.693 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:28:35.693 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:28:35.698 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:28:35.698 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:28:35.699 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:28:35.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:28:35.700 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:28:35.700 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:28:35.700 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:28:35.700 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:28:35.700 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:28:35.746 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:28:35.747 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:28:35.747 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:28:35.747 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:28:36.132 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:28:36.215 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:28:36.216 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:28:36.216 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:28:36.218 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:28:36.610 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:28:37.088 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:28:37.216 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:28:37.217 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:28:37.217 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:28:37.220 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:28:37.566 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:28:38.043 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:28:38.218 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:28:38.218 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:28:38.219 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:28:38.220 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:28:38.521 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:28:38.676 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:28:38.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:28:38.681 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:28:38.681 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:28:38.700 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:28:38.700 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:28:38.700 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:28:38.706 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:28:38.706 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:28:38.706 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:28:38.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:28:38.708 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:28:38.708 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:28:38.708 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:28:38.708 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:28:38.708 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:28:38.756 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:28:38.756 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:28:38.756 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:28:38.756 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:28:38.999 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 02:28:39.219 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:28:39.220 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:28:39.220 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:28:39.221 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:28:39.476 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 02:28:39.954 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 02:28:40.433 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 02:28:40.912 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 02:28:41.389 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 02:28:41.708 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:28:41.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:28:41.713 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:28:41.713 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:28:41.728 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:28:41.728 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:28:41.729 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:28:41.729 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:28:41.738 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:28:41.738 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:28:41.739 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:28:41.739 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:28:41.739 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:28:41.739 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:28:41.739 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:28:41.740 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1604 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:28:41.741 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1604 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:28:46.746 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:28:46.747 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:28:46.749 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:28:46.749 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:28:46.750 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:28:46.750 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:28:46.759 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:28:46.760 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:28:46.760 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:28:46.760 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:28:46.760 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:28:46.763 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:28:46.763 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:28:46.763 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:28:46.763 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:28:46.764 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:28:46.764 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:28:46.764 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:28:46.764 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:28:46.765 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:28:46.765 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:28:46.765 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:28:46.765 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:28:46.766 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:28:46.766 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:28:46.766 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:28:46.766 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:28:46.768 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:28:46.768 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:28:46.768 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:28:46.768 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:28:46.768 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:28:46.768 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:28:46.768 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:28:46.768 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:28:46.771 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:28:46.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:28:46.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:28:46.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:28:46.771 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:28:46.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:28:46.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:28:46.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:28:46.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:28:46.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:28:46.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:28:46.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:28:46.771 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:28:46.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:28:46.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:28:46.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:28:46.771 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:28:46.771 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:28:46.771 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:28:46.772 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:28:46.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:28:46.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:28:46.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:28:46.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:28:46.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:28:46.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:28:46.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:28:46.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:28:46.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:28:46.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:28:46.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:28:46.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:28:46.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:28:46.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:28:46.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:28:46.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:28:46.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:28:46.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:28:46.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:28:46.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:28:46.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:28:46.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:28:46.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:28:46.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:28:46.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:28:46.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:28:46.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:28:46.776 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:28:47.260 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:28:47.296 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:28:47.298 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:28:47.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:28:47.300 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:28:47.312 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:28:47.312 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:28:47.312 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:28:47.327 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:28:47.327 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:28:47.328 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:28:47.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:28:47.334 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:28:47.335 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:28:47.335 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:28:47.335 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:28:47.335 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:28:47.353 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:28:47.353 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:28:47.353 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:28:47.354 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:28:47.738 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:28:47.775 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:28:47.775 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:28:47.775 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:28:47.777 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:28:48.217 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:28:48.652 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:28:48.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:28:48.658 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:28:48.659 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:28:48.678 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:28:48.678 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:28:48.678 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:28:48.684 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:28:48.684 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:28:48.684 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:28:48.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:28:48.686 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:28:48.686 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:28:48.686 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:28:48.686 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:28:48.686 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:28:48.694 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:28:48.740 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:28:48.740 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:28:48.740 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:28:48.740 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:28:48.775 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:28:48.776 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:28:48.776 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:28:48.777 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:28:49.164 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:28:49.633 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:28:49.777 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:28:49.777 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:28:49.777 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:28:49.778 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:28:50.104 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:28:50.583 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:28:50.777 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:28:50.778 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:28:50.778 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:28:50.779 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:28:50.865 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:28:50.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:28:50.870 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:28:50.870 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:28:50.887 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:28:50.887 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:28:50.888 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:28:50.893 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:28:50.893 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:28:50.893 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:28:50.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:28:50.895 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:28:50.895 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:28:50.895 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:28:50.895 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:28:50.895 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:28:50.908 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:28:50.908 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:28:50.908 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:28:50.908 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:28:51.061 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:28:51.539 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 02:28:51.779 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:28:51.780 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:28:51.780 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:28:51.780 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:28:52.017 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 02:28:52.496 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 02:28:52.973 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 02:28:53.451 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 02:28:53.929 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 02:28:54.408 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 02:28:54.886 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 02:28:55.364 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 02:28:55.827 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:28:55.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:28:55.831 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:28:55.832 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:28:55.842 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 02:28:55.850 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:28:55.850 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:28:55.850 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:28:55.856 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:28:55.856 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:28:55.856 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:28:55.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:28:55.858 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:28:55.858 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:28:55.858 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:28:55.858 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:28:55.858 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:28:55.888 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:28:55.889 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:28:55.889 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:28:55.890 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:28:56.320 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 02:28:56.798 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 02:28:57.277 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 02:28:57.755 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 02:28:58.233 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 02:28:58.711 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 02:28:59.190 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 02:28:59.669 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-09 02:29:00.146 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-09 02:29:00.624 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-09 02:29:00.778 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:29:00.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:29:00.784 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:29:00.784 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:29:00.798 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:29:00.798 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:29:00.798 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:29:00.798 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:29:00.799 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:29:00.800 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:29:00.800 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:29:00.800 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:29:00.800 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:29:00.800 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:29:00.800 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:29:00.800 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2996 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:29:00.800 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2997 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:29:00.800 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2997 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:29:00.800 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2997 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:29:00.800 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2997 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:29:00.800 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2997 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:29:00.800 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2997 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:29:00.800 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2997 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:29:00.800 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2997 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:29:00.800 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2998 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:29:05.802 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:29:05.802 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:29:05.805 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:29:05.805 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:29:05.805 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:29:05.805 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:29:05.814 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:29:05.815 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:29:05.816 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:29:05.816 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:29:05.816 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:29:05.820 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:29:05.820 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:29:05.820 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:29:05.820 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:29:05.820 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:29:05.821 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:29:05.821 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:29:05.821 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:29:05.823 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:29:05.824 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:29:05.824 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:29:05.824 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:29:05.824 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:29:05.825 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:29:05.825 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:29:05.825 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:29:05.826 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:29:05.827 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:29:05.827 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:29:05.827 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:29:05.827 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:29:05.827 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:29:05.827 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:29:05.827 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:29:05.830 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:29:05.830 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:29:05.830 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:29:05.830 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:29:05.830 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:29:05.830 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:29:05.830 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:29:05.830 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:29:05.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:29:05.831 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:29:05.831 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:29:05.831 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:29:05.831 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:29:05.831 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:29:05.831 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:29:05.831 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:29:05.831 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:29:05.831 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:29:05.831 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:29:05.831 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:29:05.831 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:29:05.831 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:29:05.831 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:29:05.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:29:05.831 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:29:05.831 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:29:05.831 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:29:05.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:29:05.831 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:29:05.831 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:29:05.831 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:29:05.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:29:05.831 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:29:05.831 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:29:05.832 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:29:05.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:29:05.832 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:29:05.832 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:29:05.832 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:29:05.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:29:05.832 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:29:05.832 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:29:05.832 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:29:05.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:29:05.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:29:05.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:29:05.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:29:05.836 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:29:06.315 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:29:06.360 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:29:06.362 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:29:06.364 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:29:06.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:29:06.389 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:29:06.389 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:29:06.389 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:29:06.406 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:29:06.406 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:29:06.406 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:29:06.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:29:06.412 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:29:06.412 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:29:06.412 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:29:06.412 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:29:06.412 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:29:06.453 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:29:06.453 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:29:06.453 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:29:06.453 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:29:06.791 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:29:06.834 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:29:06.835 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:29:06.835 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:29:06.836 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:29:07.077 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:29:07.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:29:07.081 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:29:07.081 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:29:07.100 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:29:07.101 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:29:07.101 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:29:07.107 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:29:07.107 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:29:07.107 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:29:07.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:29:07.109 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:29:07.109 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:29:07.109 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:29:07.109 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:29:07.109 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:29:07.116 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:29:07.116 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:29:07.116 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:29:07.116 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:29:07.269 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:29:07.747 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:29:07.835 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:29:07.836 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:29:07.836 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:29:07.837 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:29:08.051 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:29:08.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:29:08.056 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:29:08.056 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:29:08.073 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:29:08.073 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:29:08.073 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:29:08.079 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:29:08.079 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:29:08.079 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:29:08.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:29:08.081 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:29:08.081 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:29:08.081 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:29:08.081 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:29:08.081 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:29:08.120 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:29:08.120 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:29:08.120 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:29:08.121 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:29:08.224 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:29:08.702 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:29:08.836 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:29:08.837 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:29:08.837 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:29:08.837 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:29:09.181 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:29:09.659 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:29:09.838 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:29:09.839 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:29:09.839 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:29:09.839 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:29:10.050 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:29:10.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:29:10.055 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:29:10.055 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:29:10.074 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:29:10.074 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:29:10.074 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:29:10.080 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:29:10.080 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:29:10.080 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:29:10.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:29:10.082 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:29:10.082 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:29:10.082 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:29:10.082 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:29:10.082 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:29:10.129 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:29:10.129 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:29:10.129 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:29:10.129 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:29:10.136 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:29:10.605 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 02:29:10.839 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:29:10.839 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:29:10.839 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:29:10.839 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:29:11.074 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 02:29:11.548 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 02:29:12.027 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 02:29:12.110 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:29:12.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:29:12.115 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:29:12.115 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:29:12.128 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:29:12.128 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:29:12.128 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:29:12.128 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:29:12.130 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:29:12.130 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:29:12.130 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:29:12.130 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:29:12.130 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:29:12.130 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:29:12.130 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:29:12.130 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1349 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:29:12.130 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1349 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:29:17.133 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:29:17.133 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:29:17.135 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:29:17.135 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:29:17.135 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:29:17.136 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:29:17.145 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:29:17.146 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:29:17.146 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:29:17.147 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:29:17.147 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:29:17.150 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:29:17.150 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:29:17.151 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:29:17.151 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:29:17.151 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:29:17.151 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:29:17.151 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:29:17.151 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:29:17.153 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:29:17.153 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:29:17.153 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:29:17.153 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:29:17.153 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:29:17.153 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:29:17.153 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:29:17.153 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:29:17.155 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:29:17.155 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:29:17.155 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:29:17.155 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:29:17.156 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:29:17.156 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:29:17.156 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:29:17.156 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:29:17.158 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:29:17.158 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:29:17.158 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:29:17.158 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:29:17.158 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:29:17.158 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:29:17.158 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:29:17.159 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:29:17.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:29:17.159 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:29:17.159 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:29:17.159 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:29:17.159 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:29:17.159 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:29:17.159 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:29:17.159 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:29:17.159 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:29:17.159 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:29:17.159 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:29:17.159 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:29:17.159 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:29:17.159 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:29:17.159 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:29:17.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:29:17.159 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:29:17.159 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:29:17.159 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:29:17.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:29:17.159 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:29:17.159 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:29:17.159 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:29:17.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:29:17.159 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:29:17.159 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:29:17.160 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:29:17.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:29:17.160 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:29:17.160 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:29:17.160 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:29:17.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:29:17.160 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:29:17.160 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:29:17.160 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:29:17.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:29:17.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:29:17.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:29:17.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:29:17.164 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:29:17.647 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:29:17.685 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:29:17.688 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:29:17.690 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:29:17.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:29:17.711 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:29:17.711 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:29:17.712 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:29:17.729 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:29:17.729 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:29:17.729 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:29:17.730 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:29:17.733 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:29:17.733 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:29:17.733 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:29:17.733 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:29:17.733 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:29:17.736 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:29:17.736 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:29:17.737 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:29:17.737 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:29:18.124 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:29:18.162 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:29:18.162 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:29:18.162 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:29:18.165 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:29:18.602 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:29:19.081 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:29:19.162 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:29:19.163 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:29:19.163 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:29:19.166 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:29:19.558 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:29:20.037 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:29:20.163 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:29:20.164 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:29:20.164 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:29:20.166 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:29:20.179 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:29:20.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:29:20.184 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:29:20.184 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:29:20.201 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:29:20.201 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:29:20.201 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:29:20.207 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:29:20.207 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:29:20.207 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:29:20.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:29:20.209 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:29:20.209 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:29:20.209 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:29:20.209 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:29:20.209 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:29:20.218 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:29:20.219 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:29:20.219 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:29:20.219 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:29:20.509 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:29:20.983 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:29:21.164 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:29:21.165 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:29:21.165 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:29:21.167 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:29:21.462 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:29:21.940 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 02:29:22.165 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:29:22.165 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:29:22.165 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:29:22.168 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:29:22.419 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 02:29:22.897 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 02:29:22.956 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:29:22.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:29:22.962 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:29:22.962 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:29:22.979 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:29:22.979 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:29:22.980 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:29:22.985 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:29:22.985 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:29:22.986 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:29:22.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:29:22.987 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:29:22.987 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:29:22.987 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:29:22.987 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:29:22.987 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:29:23.036 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:29:23.036 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:29:23.036 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:29:23.037 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:29:23.373 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 02:29:23.851 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 02:29:24.328 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 02:29:24.806 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 02:29:25.284 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 02:29:25.763 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 02:29:26.241 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 02:29:26.397 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:29:26.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:29:26.401 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:29:26.402 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:29:26.419 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:29:26.419 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:29:26.419 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:29:26.425 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:29:26.425 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:29:26.425 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:29:26.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:29:26.427 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:29:26.427 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:29:26.427 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:29:26.427 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:29:26.427 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:29:26.476 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:29:26.476 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:29:26.476 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:29:26.476 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:29:26.714 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 02:29:27.189 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 02:29:27.668 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 02:29:28.146 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 02:29:28.623 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 02:29:29.101 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 02:29:29.579 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 02:29:29.897 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:29:29.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:29:29.902 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:29:29.902 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:29:29.911 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:29:29.911 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:29:29.911 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:29:29.912 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:29:29.913 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:29:29.913 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:29:29.913 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:29:29.913 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:29:29.913 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:29:29.913 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:29:29.913 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:29:29.913 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2726 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:29:29.913 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2726 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:29:29.914 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2726 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:29:29.914 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2726 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:29:29.914 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2726 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:29:29.914 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2726 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:29:29.914 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2726 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:29:29.914 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2726 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:29:34.919 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:29:34.919 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:29:34.919 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:29:34.919 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:29:34.919 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:29:34.919 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:29:34.926 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:29:34.927 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:29:34.927 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:29:34.928 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:29:34.928 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:29:34.932 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:29:34.933 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:29:34.933 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:29:34.933 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:29:34.934 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:29:34.934 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:29:34.934 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:29:34.934 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:29:34.937 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:29:34.937 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:29:34.937 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:29:34.937 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:29:34.937 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:29:34.938 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:29:34.938 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:29:34.938 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:29:34.939 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:29:34.940 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:29:34.940 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:29:34.940 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:29:34.940 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:29:34.940 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:29:34.940 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:29:34.940 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:29:34.943 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:29:34.943 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:29:34.943 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:29:34.943 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:29:34.943 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:29:34.943 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:29:34.944 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:29:34.944 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:29:34.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:29:34.944 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:29:34.944 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:29:34.944 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:29:34.944 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:29:34.944 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:29:34.944 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:29:34.944 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:29:34.944 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:29:34.944 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:29:34.944 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:29:34.944 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:29:34.944 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:29:34.944 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:29:34.944 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:29:34.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:29:34.945 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:29:34.945 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:29:34.945 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:29:34.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:29:34.945 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:29:34.945 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:29:34.945 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:29:34.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:29:34.945 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:29:34.945 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:29:34.945 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:29:34.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:29:34.945 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:29:34.945 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:29:34.945 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:29:34.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:29:34.945 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:29:34.945 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:29:34.945 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:29:34.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:29:34.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:29:34.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:29:34.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:29:34.949 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:29:35.432 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:29:35.475 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:29:35.478 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:29:35.480 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:29:35.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:29:35.501 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:29:35.501 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:29:35.502 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:29:35.511 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:29:35.511 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:29:35.511 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:29:35.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:29:35.514 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:29:35.514 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:29:35.514 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:29:35.514 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:29:35.514 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:29:35.522 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:29:35.522 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:29:35.522 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:29:35.522 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:29:35.727 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:29:35.728 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:29:35.732 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:29:35.732 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:29:35.743 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:29:35.743 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:29:35.743 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:29:35.749 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:29:35.749 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:29:35.749 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:29:35.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:29:35.751 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:29:35.752 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:29:35.752 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:29:35.752 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:29:35.752 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:29:35.756 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:29:35.757 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:29:35.757 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:29:35.757 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:29:35.905 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:29:35.947 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:29:35.948 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:29:35.949 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:29:35.952 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:29:36.110 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:29:36.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:29:36.114 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:29:36.114 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:29:36.130 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:29:36.130 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:29:36.130 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:29:36.136 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:29:36.136 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:29:36.136 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:29:36.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:29:36.137 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:29:36.137 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:29:36.137 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:29:36.137 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:29:36.137 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:29:36.184 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:29:36.184 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:29:36.184 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:29:36.184 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:29:36.376 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:29:36.765 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:29:36.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:29:36.770 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:29:36.770 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:29:36.790 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:29:36.790 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:29:36.790 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:29:36.796 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:29:36.796 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:29:36.796 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:29:36.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:29:36.797 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:29:36.797 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:29:36.797 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:29:36.797 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:29:36.797 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:29:36.844 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:29:36.844 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:29:36.844 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:29:36.845 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:29:36.854 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:29:36.949 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:29:36.949 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:29:36.950 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:29:36.952 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:29:37.331 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:29:37.414 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:29:37.415 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:29:37.418 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:29:37.418 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:29:37.432 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:29:37.432 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:29:37.432 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:29:37.432 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:29:37.442 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:29:37.444 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:29:37.444 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:29:37.444 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:29:37.444 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:29:37.445 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:29:37.445 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:29:37.445 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=533 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:29:37.445 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=533 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:29:37.445 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=533 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:29:37.446 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=533 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:29:37.446 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=533 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:29:37.446 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=533 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:29:37.446 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=533 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:29:37.446 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=534 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:29:37.446 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=534 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:29:37.446 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=534 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:29:37.446 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=534 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:29:37.446 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=534 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:29:37.446 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=534 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:29:37.447 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=534 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:29:37.447 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=534 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:29:37.447 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=535 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:29:37.447 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=535 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:29:37.447 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=535 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:29:37.447 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=535 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:29:37.447 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=535 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:29:37.447 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=535 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:29:37.447 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=535 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:29:37.447 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=535 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:29:37.447 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=536 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:29:37.448 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=536 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:29:37.448 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=536 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:29:37.448 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=536 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:29:37.448 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=536 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:29:37.448 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=536 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:29:37.448 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=536 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:29:37.448 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=536 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:29:42.436 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:29:42.437 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:29:42.438 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:29:42.438 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:29:42.439 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:29:42.439 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:29:42.447 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:29:42.448 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:29:42.448 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:29:42.448 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:29:42.448 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:29:42.450 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:29:42.451 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:29:42.451 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:29:42.451 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:29:42.451 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:29:42.451 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:29:42.452 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:29:42.452 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:29:42.453 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:29:42.453 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:29:42.453 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:29:42.453 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:29:42.453 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:29:42.454 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:29:42.454 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:29:42.454 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:29:42.455 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:29:42.455 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:29:42.455 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:29:42.455 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:29:42.455 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:29:42.455 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:29:42.455 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:29:42.455 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:29:42.457 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:29:42.457 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:29:42.457 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:29:42.457 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:29:42.457 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:29:42.458 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:29:42.458 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:29:42.458 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:29:42.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:29:42.458 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:29:42.458 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:29:42.458 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:29:42.458 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:29:42.458 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:29:42.458 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:29:42.458 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:29:42.458 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:29:42.458 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:29:42.458 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:29:42.458 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:29:42.458 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:29:42.458 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:29:42.458 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:29:42.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:29:42.459 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:29:42.459 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:29:42.459 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:29:42.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:29:42.459 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:29:42.459 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:29:42.459 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:29:42.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:29:42.459 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:29:42.459 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:29:42.459 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:29:42.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:29:42.459 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:29:42.459 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:29:42.459 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:29:42.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:29:42.459 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:29:42.459 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:29:42.459 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:29:42.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:29:42.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:29:42.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:29:42.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:29:42.463 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:29:42.946 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:29:42.979 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:29:42.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:29:42.982 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:29:42.984 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:29:42.997 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:29:42.997 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:29:42.998 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:29:43.009 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:29:43.009 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:29:43.010 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:29:43.010 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:29:43.013 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:29:43.013 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:29:43.013 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:29:43.013 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:29:43.013 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:29:43.038 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:29:43.039 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:29:43.039 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:29:43.039 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:29:43.416 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:29:43.461 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:29:43.461 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:29:43.462 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:29:43.463 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:29:43.886 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:29:44.357 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:29:44.462 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:29:44.462 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:29:44.462 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:29:44.464 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:29:44.835 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:29:45.314 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:29:45.463 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:29:45.463 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:29:45.463 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:29:45.465 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:29:45.792 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:29:46.270 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:29:46.464 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:29:46.464 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:29:46.464 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:29:46.467 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:29:46.749 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:29:47.227 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 02:29:47.464 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:29:47.465 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:29:47.465 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:29:47.468 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:29:47.705 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 02:29:48.184 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 02:29:48.662 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 02:29:49.140 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 02:29:49.619 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 02:29:50.097 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 02:29:50.575 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 02:29:51.053 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 02:29:51.532 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 02:29:52.010 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 02:29:52.488 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 02:29:52.966 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 02:29:53.444 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 02:29:53.921 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 02:29:54.399 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 02:29:54.878 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 02:29:55.356 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-09 02:29:55.835 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-09 02:29:56.313 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-09 02:29:56.790 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-09 02:29:57.269 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-09 02:29:57.747 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-09 02:29:58.227 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-09 02:29:58.705 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-09 02:29:59.184 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-09 02:29:59.663 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-09 02:30:00.140 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-09 02:30:00.619 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-09 02:30:01.098 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-09 02:30:01.575 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-09 02:30:02.054 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-09 02:30:02.533 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-09 02:30:03.011 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-09 02:30:03.489 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-01-09 02:30:03.967 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-01-09 02:30:04.445 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-01-09 02:30:04.924 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-01-09 02:30:05.402 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-01-09 02:30:05.880 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-01-09 02:30:06.358 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-01-09 02:30:06.836 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-01-09 02:30:07.315 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-01-09 02:30:07.794 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-01-09 02:30:08.272 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-01-09 02:30:08.750 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-01-09 02:30:09.228 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-01-09 02:30:09.706 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-01-09 02:30:10.184 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-01-09 02:30:10.662 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-01-09 02:30:11.140 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-01-09 02:30:11.618 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-01-09 02:30:12.097 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-01-09 02:30:12.575 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-01-09 02:30:13.053 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-01-09 02:30:13.551 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-01-09 02:30:14.028 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-01-09 02:30:14.507 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-01-09 02:30:14.985 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-01-09 02:30:15.463 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-01-09 02:30:15.941 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-01-09 02:30:16.026 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:30:16.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:30:16.040 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:30:16.040 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:30:16.052 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:30:16.052 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:30:16.053 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:30:16.058 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:30:16.058 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:30:16.058 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:30:16.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:30:16.060 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:30:16.060 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:30:16.060 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:30:16.060 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:30:16.060 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:30:16.078 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:30:16.078 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:30:16.078 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:30:16.078 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:30:16.415 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-01-09 02:30:16.894 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-01-09 02:30:17.372 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-01-09 02:30:17.850 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-01-09 02:30:18.329 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-01-09 02:30:18.807 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-01-09 02:30:19.285 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-01-09 02:30:19.763 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-01-09 02:30:20.242 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-01-09 02:30:20.720 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-01-09 02:30:21.199 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-01-09 02:30:21.678 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-01-09 02:30:22.156 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-01-09 02:30:22.634 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-01-09 02:30:23.112 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-01-09 02:30:23.590 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-01-09 02:30:24.068 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-01-09 02:30:24.546 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-01-09 02:30:25.025 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-01-09 02:30:25.504 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-01-09 02:30:25.983 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-01-09 02:30:26.461 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-01-09 02:30:26.940 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-01-09 02:30:27.413 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-01-09 02:30:27.892 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-01-09 02:30:28.371 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-01-09 02:30:28.849 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-01-09 02:30:29.328 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-01-09 02:30:29.806 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-01-09 02:30:30.284 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-01-09 02:30:30.763 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-01-09 02:30:31.241 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-01-09 02:30:31.719 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-01-09 02:30:32.198 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-01-09 02:30:32.676 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-01-09 02:30:33.155 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-01-09 02:30:33.633 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-01-09 02:30:34.112 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-01-09 02:30:34.590 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-01-09 02:30:35.069 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-01-09 02:30:35.547 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-01-09 02:30:36.025 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-01-09 02:30:36.503 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-01-09 02:30:36.981 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-01-09 02:30:37.460 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-01-09 02:30:37.938 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-01-09 02:30:38.415 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-01-09 02:30:38.893 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-01-09 02:30:39.372 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-01-09 02:30:39.850 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-01-09 02:30:40.329 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-01-09 02:30:40.807 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-01-09 02:30:41.286 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-01-09 02:30:41.765 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-01-09 02:30:42.243 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-01-09 02:30:42.721 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-01-09 02:30:43.200 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-01-09 02:30:43.678 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-01-09 02:30:44.157 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-01-09 02:30:44.636 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-01-09 02:30:45.114 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-01-09 02:30:45.592 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-01-09 02:30:46.070 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-01-09 02:30:46.548 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-01-09 02:30:47.027 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-01-09 02:30:47.505 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-01-09 02:30:47.984 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-01-09 02:30:48.462 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-01-09 02:30:48.940 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-01-09 02:30:49.418 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-01-09 02:30:49.733 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:30:49.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:30:49.739 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:30:49.739 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:30:49.752 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:30:49.752 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:30:49.752 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:30:49.758 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:30:49.758 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:30:49.758 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:30:49.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:30:49.759 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:30:49.759 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:30:49.759 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:30:49.759 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:30:49.759 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:30:49.792 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:30:49.792 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:30:49.792 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:30:49.792 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:30:49.896 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-01-09 02:30:50.374 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-01-09 02:30:50.852 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-01-09 02:30:51.330 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-01-09 02:30:51.808 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-01-09 02:30:52.286 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-01-09 02:30:52.764 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-01-09 02:30:53.242 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-01-09 02:30:53.720 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-01-09 02:30:54.198 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-01-09 02:30:54.676 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-01-09 02:30:55.154 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-01-09 02:30:55.631 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-01-09 02:30:56.109 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-01-09 02:30:56.587 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-01-09 02:30:57.065 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-01-09 02:30:57.544 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-01-09 02:30:58.019 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-01-09 02:30:58.498 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-01-09 02:30:58.976 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-01-09 02:30:59.454 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-01-09 02:30:59.933 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-01-09 02:31:00.411 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-01-09 02:31:00.889 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-01-09 02:31:01.367 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-01-09 02:31:01.846 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-01-09 02:31:02.324 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-01-09 02:31:02.802 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-01-09 02:31:03.281 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-01-09 02:31:03.759 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-01-09 02:31:04.237 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-01-09 02:31:04.716 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2026-01-09 02:31:05.194 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2026-01-09 02:31:05.672 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2026-01-09 02:31:06.150 [DEBUG] clck_gen.py:113 IND CLOCK 17850
2026-01-09 02:31:06.629 [DEBUG] clck_gen.py:113 IND CLOCK 17952
2026-01-09 02:31:07.106 [DEBUG] clck_gen.py:113 IND CLOCK 18054
2026-01-09 02:31:07.584 [DEBUG] clck_gen.py:113 IND CLOCK 18156
2026-01-09 02:31:08.062 [DEBUG] clck_gen.py:113 IND CLOCK 18258
2026-01-09 02:31:08.540 [DEBUG] clck_gen.py:113 IND CLOCK 18360
2026-01-09 02:31:09.018 [DEBUG] clck_gen.py:113 IND CLOCK 18462
2026-01-09 02:31:09.496 [DEBUG] clck_gen.py:113 IND CLOCK 18564
2026-01-09 02:31:09.974 [DEBUG] clck_gen.py:113 IND CLOCK 18666
2026-01-09 02:31:10.452 [DEBUG] clck_gen.py:113 IND CLOCK 18768
2026-01-09 02:31:10.931 [DEBUG] clck_gen.py:113 IND CLOCK 18870
2026-01-09 02:31:11.409 [DEBUG] clck_gen.py:113 IND CLOCK 18972
2026-01-09 02:31:11.887 [DEBUG] clck_gen.py:113 IND CLOCK 19074
2026-01-09 02:31:12.364 [DEBUG] clck_gen.py:113 IND CLOCK 19176
2026-01-09 02:31:12.842 [DEBUG] clck_gen.py:113 IND CLOCK 19278
2026-01-09 02:31:13.319 [DEBUG] clck_gen.py:113 IND CLOCK 19380
2026-01-09 02:31:13.797 [DEBUG] clck_gen.py:113 IND CLOCK 19482
2026-01-09 02:31:14.275 [DEBUG] clck_gen.py:113 IND CLOCK 19584
2026-01-09 02:31:14.753 [DEBUG] clck_gen.py:113 IND CLOCK 19686
2026-01-09 02:31:15.232 [DEBUG] clck_gen.py:113 IND CLOCK 19788
2026-01-09 02:31:15.710 [DEBUG] clck_gen.py:113 IND CLOCK 19890
2026-01-09 02:31:16.188 [DEBUG] clck_gen.py:113 IND CLOCK 19992
2026-01-09 02:31:16.666 [DEBUG] clck_gen.py:113 IND CLOCK 20094
2026-01-09 02:31:17.144 [DEBUG] clck_gen.py:113 IND CLOCK 20196
2026-01-09 02:31:17.619 [DEBUG] clck_gen.py:113 IND CLOCK 20298
2026-01-09 02:31:18.089 [DEBUG] clck_gen.py:113 IND CLOCK 20400
2026-01-09 02:31:18.558 [DEBUG] clck_gen.py:113 IND CLOCK 20502
2026-01-09 02:31:19.033 [DEBUG] clck_gen.py:113 IND CLOCK 20604
2026-01-09 02:31:19.511 [DEBUG] clck_gen.py:113 IND CLOCK 20706
2026-01-09 02:31:19.989 [DEBUG] clck_gen.py:113 IND CLOCK 20808
2026-01-09 02:31:20.467 [DEBUG] clck_gen.py:113 IND CLOCK 20910
2026-01-09 02:31:20.945 [DEBUG] clck_gen.py:113 IND CLOCK 21012
2026-01-09 02:31:21.424 [DEBUG] clck_gen.py:113 IND CLOCK 21114
2026-01-09 02:31:21.901 [DEBUG] clck_gen.py:113 IND CLOCK 21216
2026-01-09 02:31:22.379 [DEBUG] clck_gen.py:113 IND CLOCK 21318
2026-01-09 02:31:22.857 [DEBUG] clck_gen.py:113 IND CLOCK 21420
2026-01-09 02:31:23.336 [DEBUG] clck_gen.py:113 IND CLOCK 21522
2026-01-09 02:31:23.813 [DEBUG] clck_gen.py:113 IND CLOCK 21624
2026-01-09 02:31:24.291 [DEBUG] clck_gen.py:113 IND CLOCK 21726
2026-01-09 02:31:24.769 [DEBUG] clck_gen.py:113 IND CLOCK 21828
2026-01-09 02:31:25.178 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:31:25.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:31:25.193 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:31:25.193 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:31:25.211 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:31:25.212 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:31:25.212 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:31:25.218 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:31:25.218 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:31:25.218 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:31:25.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:31:25.220 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:31:25.220 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:31:25.220 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:31:25.220 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:31:25.220 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:31:25.238 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:31:25.238 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:31:25.238 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:31:25.238 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:31:25.247 [DEBUG] clck_gen.py:113 IND CLOCK 21930
2026-01-09 02:31:25.716 [DEBUG] clck_gen.py:113 IND CLOCK 22032
2026-01-09 02:31:26.185 [DEBUG] clck_gen.py:113 IND CLOCK 22134
2026-01-09 02:31:26.660 [DEBUG] clck_gen.py:113 IND CLOCK 22236
2026-01-09 02:31:27.138 [DEBUG] clck_gen.py:113 IND CLOCK 22338
2026-01-09 02:31:27.616 [DEBUG] clck_gen.py:113 IND CLOCK 22440
2026-01-09 02:31:28.094 [DEBUG] clck_gen.py:113 IND CLOCK 22542
2026-01-09 02:31:28.572 [DEBUG] clck_gen.py:113 IND CLOCK 22644
2026-01-09 02:31:29.051 [DEBUG] clck_gen.py:113 IND CLOCK 22746
2026-01-09 02:31:29.528 [DEBUG] clck_gen.py:113 IND CLOCK 22848
2026-01-09 02:31:30.007 [DEBUG] clck_gen.py:113 IND CLOCK 22950
2026-01-09 02:31:30.485 [DEBUG] clck_gen.py:113 IND CLOCK 23052
2026-01-09 02:31:30.963 [DEBUG] clck_gen.py:113 IND CLOCK 23154
2026-01-09 02:31:31.442 [DEBUG] clck_gen.py:113 IND CLOCK 23256
2026-01-09 02:31:31.920 [DEBUG] clck_gen.py:113 IND CLOCK 23358
2026-01-09 02:31:32.399 [DEBUG] clck_gen.py:113 IND CLOCK 23460
2026-01-09 02:31:32.877 [DEBUG] clck_gen.py:113 IND CLOCK 23562
2026-01-09 02:31:33.355 [DEBUG] clck_gen.py:113 IND CLOCK 23664
2026-01-09 02:31:33.832 [DEBUG] clck_gen.py:113 IND CLOCK 23766
2026-01-09 02:31:34.310 [DEBUG] clck_gen.py:113 IND CLOCK 23868
2026-01-09 02:31:34.789 [DEBUG] clck_gen.py:113 IND CLOCK 23970
2026-01-09 02:31:35.266 [DEBUG] clck_gen.py:113 IND CLOCK 24072
2026-01-09 02:31:35.744 [DEBUG] clck_gen.py:113 IND CLOCK 24174
2026-01-09 02:31:36.222 [DEBUG] clck_gen.py:113 IND CLOCK 24276
2026-01-09 02:31:36.700 [DEBUG] clck_gen.py:113 IND CLOCK 24378
2026-01-09 02:31:37.178 [DEBUG] clck_gen.py:113 IND CLOCK 24480
2026-01-09 02:31:37.657 [DEBUG] clck_gen.py:113 IND CLOCK 24582
2026-01-09 02:31:38.135 [DEBUG] clck_gen.py:113 IND CLOCK 24684
2026-01-09 02:31:38.608 [DEBUG] clck_gen.py:113 IND CLOCK 24786
2026-01-09 02:31:39.080 [DEBUG] clck_gen.py:113 IND CLOCK 24888
2026-01-09 02:31:39.558 [DEBUG] clck_gen.py:113 IND CLOCK 24990
2026-01-09 02:31:40.036 [DEBUG] clck_gen.py:113 IND CLOCK 25092
2026-01-09 02:31:40.514 [DEBUG] clck_gen.py:113 IND CLOCK 25194
2026-01-09 02:31:40.992 [DEBUG] clck_gen.py:113 IND CLOCK 25296
2026-01-09 02:31:41.471 [DEBUG] clck_gen.py:113 IND CLOCK 25398
2026-01-09 02:31:41.948 [DEBUG] clck_gen.py:113 IND CLOCK 25500
2026-01-09 02:31:42.427 [DEBUG] clck_gen.py:113 IND CLOCK 25602
2026-01-09 02:31:42.904 [DEBUG] clck_gen.py:113 IND CLOCK 25704
2026-01-09 02:31:43.382 [DEBUG] clck_gen.py:113 IND CLOCK 25806
2026-01-09 02:31:43.860 [DEBUG] clck_gen.py:113 IND CLOCK 25908
2026-01-09 02:31:44.338 [DEBUG] clck_gen.py:113 IND CLOCK 26010
2026-01-09 02:31:44.817 [DEBUG] clck_gen.py:113 IND CLOCK 26112
2026-01-09 02:31:45.295 [DEBUG] clck_gen.py:113 IND CLOCK 26214
2026-01-09 02:31:45.773 [DEBUG] clck_gen.py:113 IND CLOCK 26316
2026-01-09 02:31:46.252 [DEBUG] clck_gen.py:113 IND CLOCK 26418
2026-01-09 02:31:46.729 [DEBUG] clck_gen.py:113 IND CLOCK 26520
2026-01-09 02:31:47.208 [DEBUG] clck_gen.py:113 IND CLOCK 26622
2026-01-09 02:31:47.685 [DEBUG] clck_gen.py:113 IND CLOCK 26724
2026-01-09 02:31:48.164 [DEBUG] clck_gen.py:113 IND CLOCK 26826
2026-01-09 02:31:48.642 [DEBUG] clck_gen.py:113 IND CLOCK 26928
2026-01-09 02:31:49.120 [DEBUG] clck_gen.py:113 IND CLOCK 27030
2026-01-09 02:31:49.599 [DEBUG] clck_gen.py:113 IND CLOCK 27132
2026-01-09 02:31:50.077 [DEBUG] clck_gen.py:113 IND CLOCK 27234
2026-01-09 02:31:50.556 [DEBUG] clck_gen.py:113 IND CLOCK 27336
2026-01-09 02:31:51.034 [DEBUG] clck_gen.py:113 IND CLOCK 27438
2026-01-09 02:31:51.512 [DEBUG] clck_gen.py:113 IND CLOCK 27540
2026-01-09 02:31:51.990 [DEBUG] clck_gen.py:113 IND CLOCK 27642
2026-01-09 02:31:52.468 [DEBUG] clck_gen.py:113 IND CLOCK 27744
2026-01-09 02:31:52.947 [DEBUG] clck_gen.py:113 IND CLOCK 27846
2026-01-09 02:31:53.424 [DEBUG] clck_gen.py:113 IND CLOCK 27948
2026-01-09 02:31:53.902 [DEBUG] clck_gen.py:113 IND CLOCK 28050
2026-01-09 02:31:54.381 [DEBUG] clck_gen.py:113 IND CLOCK 28152
2026-01-09 02:31:54.859 [DEBUG] clck_gen.py:113 IND CLOCK 28254
2026-01-09 02:31:55.337 [DEBUG] clck_gen.py:113 IND CLOCK 28356
2026-01-09 02:31:55.816 [DEBUG] clck_gen.py:113 IND CLOCK 28458
2026-01-09 02:31:56.294 [DEBUG] clck_gen.py:113 IND CLOCK 28560
2026-01-09 02:31:56.773 [DEBUG] clck_gen.py:113 IND CLOCK 28662
2026-01-09 02:31:57.251 [DEBUG] clck_gen.py:113 IND CLOCK 28764
2026-01-09 02:31:57.729 [DEBUG] clck_gen.py:113 IND CLOCK 28866
2026-01-09 02:31:58.207 [DEBUG] clck_gen.py:113 IND CLOCK 28968
2026-01-09 02:31:58.686 [DEBUG] clck_gen.py:113 IND CLOCK 29070
2026-01-09 02:31:59.163 [DEBUG] clck_gen.py:113 IND CLOCK 29172
2026-01-09 02:31:59.641 [DEBUG] clck_gen.py:113 IND CLOCK 29274
2026-01-09 02:32:00.120 [DEBUG] clck_gen.py:113 IND CLOCK 29376
2026-01-09 02:32:00.597 [DEBUG] clck_gen.py:113 IND CLOCK 29478
2026-01-09 02:32:00.662 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:32:00.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:32:00.677 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:32:00.677 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:32:00.684 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:32:00.684 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:32:00.684 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:32:00.685 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:32:00.689 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:32:00.689 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:32:00.689 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:32:00.689 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:32:00.689 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:32:00.689 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:32:00.689 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:32:00.689 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=29499 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:32:00.689 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=29499 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:32:05.689 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:32:05.690 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:32:05.691 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:32:05.691 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:32:05.692 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:32:05.692 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:32:05.695 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:32:05.696 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:32:05.696 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:32:05.697 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:32:05.697 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:32:05.698 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:32:05.699 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:32:05.699 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:32:05.699 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:32:05.699 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:32:05.699 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:32:05.700 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:32:05.700 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:32:05.701 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:32:05.701 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:32:05.701 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:32:05.701 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:32:05.701 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:32:05.701 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:32:05.701 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:32:05.701 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:32:05.703 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:32:05.703 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:32:05.703 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:32:05.703 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:32:05.703 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:32:05.703 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:32:05.703 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:32:05.703 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:32:05.705 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:32:05.705 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:32:05.705 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:32:05.705 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:32:05.705 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:32:05.705 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:32:05.705 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:32:05.705 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:32:05.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:32:05.705 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:32:05.706 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:32:05.706 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:32:05.706 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:32:05.706 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:32:05.706 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:32:05.706 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:32:05.706 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:32:05.706 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:32:05.706 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:32:05.706 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:32:05.706 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:32:05.706 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:32:05.706 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:32:05.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:32:05.706 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:32:05.706 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:32:05.706 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:32:05.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:32:05.706 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:32:05.706 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:32:05.706 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:32:05.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:32:05.706 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:32:05.706 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:32:05.706 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:32:05.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:32:05.706 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:32:05.707 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:32:05.707 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:32:05.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:32:05.707 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:32:05.708 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:32:05.708 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:32:05.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:32:05.708 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:32:05.708 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:32:05.708 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:32:05.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:32:05.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:32:05.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:32:05.708 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:32:05.708 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:32:05.708 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:32:05.708 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:32:10.712 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:32:10.712 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:32:10.714 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:32:10.715 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:32:10.716 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:32:10.716 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:32:10.724 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:32:10.724 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:32:10.724 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:32:10.724 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:32:10.725 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:32:10.727 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:32:10.727 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:32:10.727 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:32:10.727 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:32:10.727 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:32:10.728 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:32:10.728 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:32:10.728 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:32:10.729 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:32:10.729 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:32:10.729 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:32:10.729 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:32:10.729 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:32:10.729 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:32:10.730 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:32:10.730 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:32:10.731 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:32:10.731 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:32:10.731 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:32:10.731 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:32:10.731 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:32:10.731 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:32:10.731 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:32:10.731 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:32:10.733 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:32:10.733 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:32:10.733 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:32:10.733 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:32:10.733 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:32:10.733 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:32:10.733 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:32:10.734 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:32:10.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:32:10.734 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:32:10.734 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:32:10.734 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:32:10.734 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:32:10.734 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:32:10.734 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:32:10.734 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:32:10.734 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:32:10.734 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:32:10.734 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:32:10.734 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:32:10.734 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:32:10.734 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:32:10.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:32:10.734 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:32:10.734 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:32:10.734 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:32:10.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:32:10.734 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:32:10.734 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:32:10.735 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:32:10.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:32:10.735 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:32:10.735 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:32:10.735 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:32:10.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:32:10.735 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:32:10.735 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:32:10.735 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:32:10.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:32:10.735 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:32:10.735 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:32:10.735 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:32:10.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:32:10.735 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:32:10.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:32:10.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:32:10.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:32:10.739 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:32:11.222 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:32:11.248 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:32:11.248 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:32:11.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:32:11.249 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:32:11.257 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:32:11.257 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:32:11.257 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:32:11.266 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:32:11.266 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:32:11.266 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:32:11.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:32:11.299 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:32:11.300 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:32:11.300 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:32:11.300 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:32:11.300 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:32:11.315 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:32:11.315 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:32:11.315 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:32:11.315 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:32:11.692 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:32:11.736 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:32:11.736 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:32:11.738 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:32:11.738 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:32:12.162 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:32:12.634 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:32:12.737 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:32:12.738 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:32:12.738 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:32:12.738 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:32:12.754 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:32:12.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:32:12.759 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:32:12.759 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:32:12.775 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:32:12.775 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:32:12.775 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:32:12.781 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:32:12.781 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:32:12.781 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:32:12.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:32:12.784 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:32:12.784 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:32:12.784 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:32:12.784 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:32:12.784 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:32:12.814 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:32:12.815 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:32:12.815 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:32:12.815 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:32:13.110 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:32:13.589 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:32:13.738 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:32:13.738 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:32:13.739 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:32:13.739 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:32:14.068 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:32:14.546 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:32:14.739 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:32:14.739 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:32:14.740 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:32:14.740 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:32:15.025 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:32:15.094 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:32:15.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:32:15.097 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:32:15.097 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:32:15.116 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:32:15.116 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:32:15.116 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:32:15.122 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:32:15.123 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:32:15.123 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:32:15.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:32:15.124 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:32:15.124 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:32:15.124 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:32:15.124 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:32:15.124 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:32:15.162 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:32:15.163 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:32:15.163 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:32:15.163 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:32:15.501 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 02:32:15.740 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:32:15.741 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:32:15.741 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:32:15.741 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:32:15.980 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 02:32:16.458 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 02:32:16.936 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 02:32:17.414 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 02:32:17.893 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 02:32:18.371 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 02:32:18.527 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:32:18.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:32:18.531 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:32:18.531 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:32:18.550 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:32:18.550 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:32:18.550 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:32:18.556 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:32:18.556 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:32:18.556 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:32:18.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:32:18.558 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:32:18.558 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:32:18.558 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:32:18.558 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:32:18.558 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:32:18.605 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:32:18.606 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:32:18.606 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:32:18.606 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:32:18.843 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 02:32:19.314 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 02:32:19.786 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 02:32:20.265 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 02:32:20.737 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 02:32:21.211 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 02:32:21.689 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 02:32:22.008 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:32:22.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:32:22.013 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:32:22.013 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:32:22.026 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:32:22.026 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:32:22.026 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:32:22.026 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:32:22.028 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:32:22.028 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:32:22.028 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:32:22.028 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:32:22.028 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:32:22.028 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:32:22.028 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:32:22.028 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2420 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:32:22.028 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2420 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:32:22.028 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2420 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:32:22.028 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2420 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:32:22.028 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2420 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:32:22.028 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2420 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:32:22.028 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2420 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:32:22.028 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2421 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:32:22.028 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2421 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:32:22.028 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2421 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:32:22.028 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2421 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:32:22.028 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2421 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:32:22.028 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2421 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:32:22.028 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2421 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:32:22.028 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2421 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:32:27.031 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:32:27.031 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:32:27.033 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:32:27.034 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:32:27.035 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:32:27.035 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:32:27.043 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:32:27.044 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:32:27.044 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:32:27.044 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:32:27.045 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:32:27.047 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:32:27.047 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:32:27.048 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:32:27.048 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:32:27.048 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:32:27.048 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:32:27.048 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:32:27.048 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:32:27.049 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:32:27.050 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:32:27.050 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:32:27.050 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:32:27.050 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:32:27.050 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:32:27.050 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:32:27.050 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:32:27.052 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:32:27.052 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:32:27.052 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:32:27.052 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:32:27.052 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:32:27.052 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:32:27.052 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:32:27.052 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:32:27.054 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:32:27.054 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:32:27.054 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:32:27.054 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:32:27.054 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:32:27.054 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:32:27.055 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:32:27.055 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:32:27.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:32:27.055 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:32:27.055 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:32:27.055 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:32:27.055 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:32:27.055 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:32:27.055 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:32:27.055 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:32:27.055 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:32:27.055 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:32:27.055 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:32:27.055 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:32:27.055 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:32:27.055 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:32:27.055 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:32:27.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:32:27.055 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:32:27.055 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:32:27.055 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:32:27.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:32:27.055 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:32:27.055 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:32:27.055 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:32:27.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:32:27.055 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:32:27.056 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:32:27.056 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:32:27.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:32:27.056 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:32:27.056 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:32:27.056 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:32:27.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:32:27.056 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:32:27.056 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:32:27.056 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:32:27.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:32:27.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:32:27.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:32:27.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:32:27.060 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:32:27.543 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:32:27.578 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:32:27.580 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:32:27.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:32:27.582 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:32:27.607 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:32:27.607 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:32:27.607 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:32:27.619 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:32:27.619 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:32:27.619 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:32:27.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:32:27.621 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:32:27.621 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:32:27.621 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:32:27.622 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:32:27.622 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:32:27.634 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:32:27.634 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:32:27.634 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:32:27.634 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:32:28.020 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:32:28.058 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:32:28.058 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:32:28.059 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:32:28.059 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:32:28.498 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:32:28.976 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:32:29.059 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:32:29.059 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:32:29.060 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:32:29.060 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:32:29.454 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:32:29.933 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:32:30.060 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:32:30.060 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:32:30.061 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:32:30.061 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:32:30.412 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:32:30.890 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:32:31.061 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:32:31.061 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:32:31.061 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:32:31.062 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:32:31.368 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:32:31.846 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 02:32:32.063 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:32:32.063 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:32:32.063 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:32:32.063 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:32:32.325 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 02:32:32.802 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 02:32:33.281 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 02:32:33.760 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 02:32:34.238 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 02:32:34.716 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 02:32:35.194 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 02:32:35.673 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 02:32:36.152 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 02:32:36.630 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 02:32:37.108 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 02:32:37.586 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 02:32:38.064 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 02:32:38.539 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 02:32:39.008 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 02:32:39.478 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 02:32:39.954 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-09 02:32:40.433 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-09 02:32:40.911 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-09 02:32:41.389 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-09 02:32:41.868 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-09 02:32:42.345 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-09 02:32:42.631 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:32:42.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:32:42.637 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:32:42.637 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:32:42.653 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:32:42.653 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:32:42.653 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:32:42.659 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:32:42.659 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:32:42.659 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:32:42.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:32:42.660 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:32:42.661 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:32:42.661 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:32:42.661 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:32:42.661 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:32:42.670 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:32:42.670 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:32:42.670 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:32:42.670 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:32:42.820 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-09 02:32:43.289 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-09 02:32:43.759 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-09 02:32:44.239 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-09 02:32:44.717 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-09 02:32:45.195 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-09 02:32:45.673 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-09 02:32:46.152 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-09 02:32:46.630 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-09 02:32:47.108 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-09 02:32:47.586 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-09 02:32:48.064 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-01-09 02:32:48.542 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-01-09 02:32:49.021 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-01-09 02:32:49.499 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-01-09 02:32:49.978 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-01-09 02:32:50.455 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-01-09 02:32:50.925 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-01-09 02:32:51.394 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-01-09 02:32:51.869 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-01-09 02:32:52.348 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-01-09 02:32:52.826 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-01-09 02:32:53.305 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-01-09 02:32:53.780 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-01-09 02:32:54.258 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-01-09 02:32:54.737 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-01-09 02:32:55.216 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-01-09 02:32:55.694 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-01-09 02:32:56.172 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-01-09 02:32:56.651 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-01-09 02:32:57.129 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-01-09 02:32:57.608 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-01-09 02:32:57.949 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:32:57.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:32:57.955 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:32:57.955 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:32:57.974 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:32:57.974 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:32:57.974 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:32:57.980 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:32:57.980 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:32:57.980 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:32:57.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:32:57.981 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:32:57.981 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:32:57.981 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:32:57.981 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:32:57.981 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:32:58.027 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:32:58.027 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:32:58.027 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:32:58.027 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:32:58.084 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-01-09 02:32:58.563 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-01-09 02:32:59.040 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-01-09 02:32:59.518 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-01-09 02:32:59.992 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-01-09 02:33:00.462 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-01-09 02:33:00.941 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-01-09 02:33:01.419 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-01-09 02:33:01.897 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-01-09 02:33:02.375 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-01-09 02:33:02.853 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-01-09 02:33:03.331 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-01-09 02:33:03.809 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-01-09 02:33:04.286 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-01-09 02:33:04.755 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-01-09 02:33:05.225 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-01-09 02:33:05.702 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-01-09 02:33:06.171 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-01-09 02:33:06.641 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-01-09 02:33:07.119 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-01-09 02:33:07.597 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-01-09 02:33:08.075 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-01-09 02:33:08.552 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-01-09 02:33:09.030 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-01-09 02:33:09.508 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-01-09 02:33:09.986 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-01-09 02:33:10.465 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-01-09 02:33:10.944 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-01-09 02:33:11.421 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-01-09 02:33:11.900 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-01-09 02:33:12.338 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:33:12.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:33:12.342 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:33:12.342 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:33:12.357 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:33:12.357 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:33:12.357 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:33:12.364 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:33:12.364 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:33:12.364 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:33:12.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:33:12.366 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:33:12.366 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:33:12.366 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:33:12.366 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:33:12.366 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:33:12.377 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-01-09 02:33:12.423 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:33:12.423 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:33:12.423 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:33:12.424 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:33:12.855 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-01-09 02:33:13.332 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-01-09 02:33:13.802 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-01-09 02:33:14.271 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-01-09 02:33:14.746 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-01-09 02:33:15.225 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-01-09 02:33:15.702 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-01-09 02:33:16.178 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-01-09 02:33:16.653 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-01-09 02:33:17.128 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-01-09 02:33:17.597 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-01-09 02:33:18.070 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-01-09 02:33:18.548 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-01-09 02:33:19.026 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-01-09 02:33:19.504 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-01-09 02:33:19.980 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-01-09 02:33:20.454 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-01-09 02:33:20.923 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-01-09 02:33:21.392 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-01-09 02:33:21.867 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-01-09 02:33:22.345 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-01-09 02:33:22.823 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-01-09 02:33:23.301 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-01-09 02:33:23.778 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-01-09 02:33:24.256 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-01-09 02:33:24.733 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-01-09 02:33:25.211 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-01-09 02:33:25.685 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-01-09 02:33:26.156 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-01-09 02:33:26.625 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-01-09 02:33:27.016 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:33:27.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:33:27.020 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:33:27.021 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:33:27.039 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:33:27.039 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:33:27.040 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:33:27.040 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:33:27.051 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:33:27.051 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:33:27.052 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:33:27.052 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:33:27.052 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:33:27.052 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:33:27.052 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:33:27.053 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=12841 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:33:27.053 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=12841 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:33:27.053 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=12841 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:33:27.053 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=12841 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:33:27.053 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=12841 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:33:27.053 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=12841 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:33:27.053 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=12842 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:33:27.053 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=12842 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:33:27.053 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=12842 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:33:27.053 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=12842 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:33:27.054 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=12842 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:33:27.054 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=12842 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:33:27.054 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=12842 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:33:27.054 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=12842 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:33:27.054 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=12843 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:33:27.054 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=12843 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:33:27.054 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=12843 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:33:27.054 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=12843 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:33:27.054 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=12843 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:33:27.054 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=12843 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:33:27.055 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=12843 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:33:27.055 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=12843 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:33:27.055 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=12844 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:33:27.055 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=12844 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:33:27.055 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=12844 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:33:27.055 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=12844 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:33:27.055 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=12844 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:33:27.055 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=12844 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:33:27.055 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=12844 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:33:27.055 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=12844 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:33:32.045 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:33:32.050 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:33:32.050 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:33:32.050 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:33:32.050 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:33:32.050 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:33:32.053 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:33:32.054 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:33:32.054 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:33:32.054 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:33:32.054 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:33:32.057 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:33:32.057 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:33:32.057 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:33:32.057 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:33:32.057 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:33:32.058 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:33:32.058 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:33:32.058 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:33:32.059 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:33:32.059 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:33:32.060 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:33:32.060 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:33:32.060 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:33:32.060 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:33:32.060 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:33:32.060 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:33:32.062 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:33:32.062 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:33:32.062 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:33:32.062 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:33:32.062 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:33:32.062 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:33:32.062 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:33:32.062 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:33:32.065 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:33:32.065 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:33:32.065 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:33:32.065 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:33:32.065 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:33:32.065 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:33:32.065 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:33:32.065 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:33:32.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:33:32.066 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:33:32.066 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:33:32.066 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:33:32.066 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:33:32.066 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:33:32.066 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:33:32.066 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:33:32.066 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:33:32.066 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:33:32.066 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:33:32.066 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:33:32.066 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:33:32.066 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:33:32.066 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:33:32.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:33:32.066 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:33:32.066 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:33:32.066 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:33:32.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:33:32.066 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:33:32.066 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:33:32.066 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:33:32.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:33:32.066 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:33:32.066 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:33:32.066 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:33:32.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:33:32.067 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:33:32.067 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:33:32.067 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:33:32.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:33:32.067 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:33:32.067 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:33:32.067 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:33:32.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:33:32.068 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:33:32.068 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:33:32.068 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:33:32.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:33:32.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:33:32.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:33:32.068 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:33:32.068 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:33:32.068 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:33:32.068 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:33:37.092 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:33:37.092 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:33:37.094 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:33:37.095 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:33:37.095 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:33:37.096 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:33:37.103 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:33:37.104 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:33:37.104 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:33:37.104 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:33:37.104 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:33:37.107 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:33:37.107 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:33:37.107 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:33:37.107 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:33:37.107 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:33:37.107 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:33:37.108 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:33:37.108 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:33:37.109 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:33:37.109 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:33:37.110 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:33:37.110 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:33:37.110 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:33:37.110 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:33:37.110 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:33:37.110 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:33:37.112 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:33:37.112 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:33:37.112 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:33:37.112 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:33:37.112 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:33:37.112 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:33:37.112 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:33:37.112 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:33:37.115 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:33:37.115 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:33:37.115 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:33:37.115 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:33:37.115 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:33:37.115 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:33:37.115 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:33:37.115 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:33:37.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:33:37.115 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:33:37.116 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:33:37.116 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:33:37.116 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:33:37.116 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:33:37.116 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:33:37.116 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:33:37.116 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:33:37.116 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:33:37.116 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:33:37.116 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:33:37.116 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:33:37.116 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:33:37.116 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:33:37.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:33:37.116 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:33:37.116 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:33:37.116 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:33:37.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:33:37.116 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:33:37.116 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:33:37.116 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:33:37.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:33:37.116 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:33:37.116 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:33:37.116 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:33:37.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:33:37.116 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:33:37.116 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:33:37.116 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:33:37.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:33:37.117 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:33:37.117 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:33:37.117 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:33:37.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:33:37.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:33:37.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:33:37.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:33:37.121 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:33:37.602 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:33:37.642 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:33:37.643 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:33:37.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:33:37.645 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:33:37.666 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:33:37.666 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:33:37.667 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:33:37.687 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:33:37.687 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:33:37.687 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:33:37.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:33:37.693 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:33:37.693 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:33:37.693 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:33:37.693 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:33:37.693 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:33:37.740 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:33:37.741 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:33:37.741 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:33:37.742 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:33:38.080 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:33:38.118 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:33:38.119 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:33:38.119 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:33:38.121 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:33:38.557 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:33:39.035 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:33:39.119 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:33:39.119 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:33:39.120 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:33:39.122 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:33:39.513 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:33:39.991 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:33:40.120 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:33:40.120 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:33:40.121 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:33:40.124 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:33:40.469 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:33:40.947 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:33:41.121 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:33:41.122 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:33:41.122 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:33:41.124 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:33:41.425 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:33:41.903 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 02:33:42.122 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:33:42.122 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:33:42.122 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:33:42.126 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:33:42.381 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 02:33:42.860 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 02:33:43.338 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 02:33:43.816 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 02:33:44.294 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 02:33:44.773 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 02:33:45.251 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 02:33:45.729 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 02:33:46.208 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 02:33:46.686 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 02:33:47.164 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 02:33:47.641 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 02:33:48.119 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 02:33:48.324 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:33:48.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:33:48.329 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:33:48.329 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:33:48.347 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:33:48.347 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:33:48.347 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:33:48.353 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:33:48.353 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:33:48.353 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:33:48.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:33:48.355 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:33:48.355 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:33:48.355 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:33:48.355 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:33:48.355 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:33:48.401 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:33:48.401 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:33:48.402 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:33:48.402 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:33:48.597 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 02:33:49.075 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 02:33:49.553 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 02:33:50.026 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-09 02:33:50.505 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-09 02:33:50.983 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-09 02:33:51.462 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-09 02:33:51.940 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-09 02:33:52.419 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-09 02:33:52.897 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-09 02:33:53.376 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-09 02:33:53.854 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-09 02:33:54.332 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-09 02:33:54.810 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-09 02:33:55.288 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-09 02:33:55.767 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-09 02:33:56.246 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-09 02:33:56.724 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-09 02:33:57.202 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-09 02:33:57.680 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-09 02:33:58.159 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-01-09 02:33:58.637 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-01-09 02:33:58.806 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:33:58.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:33:58.809 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:33:58.810 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:33:58.829 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:33:58.829 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:33:58.829 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:33:58.834 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:33:58.834 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:33:58.835 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:33:58.835 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:33:58.836 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:33:58.836 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:33:58.836 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:33:58.836 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:33:58.836 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:33:58.872 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:33:58.873 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:33:58.873 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:33:58.873 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:33:59.115 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-01-09 02:33:59.593 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-01-09 02:34:00.072 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-01-09 02:34:00.550 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-01-09 02:34:01.028 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-01-09 02:34:01.505 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-01-09 02:34:01.983 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-01-09 02:34:02.461 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-01-09 02:34:02.939 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-01-09 02:34:03.445 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-01-09 02:34:03.923 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-01-09 02:34:04.400 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-01-09 02:34:04.878 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-01-09 02:34:05.356 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-01-09 02:34:05.833 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-01-09 02:34:05.873 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:34:05.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:34:05.878 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:34:05.878 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:34:05.899 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:34:05.899 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:34:05.899 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:34:05.905 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:34:05.905 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:34:05.905 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:34:05.905 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:34:05.907 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:34:05.907 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:34:05.907 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:34:05.907 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:34:05.907 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:34:05.924 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:34:05.924 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:34:05.924 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:34:05.924 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:34:06.310 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-01-09 02:34:06.788 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-01-09 02:34:07.267 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-01-09 02:34:07.745 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-01-09 02:34:08.224 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-01-09 02:34:08.702 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-01-09 02:34:09.179 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-01-09 02:34:09.658 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-01-09 02:34:10.136 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-01-09 02:34:10.613 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-01-09 02:34:11.092 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-01-09 02:34:11.570 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-01-09 02:34:12.048 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-01-09 02:34:12.526 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-01-09 02:34:12.990 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:34:12.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:34:12.992 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:34:12.992 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:34:13.004 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-01-09 02:34:13.009 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:34:13.009 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:34:13.009 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:34:13.009 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:34:13.011 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:34:13.011 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:34:13.011 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:34:13.011 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:34:13.011 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:34:13.011 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:34:13.011 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:34:13.011 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=7653 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:34:13.011 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=7653 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:34:18.014 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:34:18.014 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:34:18.017 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:34:18.017 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:34:18.017 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:34:18.017 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:34:18.024 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:34:18.024 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:34:18.024 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:34:18.025 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:34:18.025 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:34:18.026 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:34:18.026 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:34:18.027 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:34:18.027 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:34:18.027 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:34:18.027 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:34:18.028 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:34:18.028 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:34:18.030 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:34:18.030 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:34:18.030 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:34:18.030 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:34:18.030 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:34:18.030 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:34:18.031 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:34:18.031 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:34:18.032 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:34:18.032 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:34:18.032 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:34:18.032 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:34:18.033 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:34:18.033 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:34:18.033 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:34:18.033 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:34:18.035 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:34:18.035 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:34:18.035 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:34:18.035 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:34:18.035 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:34:18.035 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:34:18.036 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:34:18.036 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:34:18.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:34:18.036 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:34:18.036 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:34:18.036 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:34:18.036 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:34:18.036 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:34:18.036 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:34:18.036 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:34:18.036 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:34:18.036 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:34:18.036 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:34:18.036 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:34:18.036 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:34:18.036 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:34:18.036 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:34:18.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:34:18.036 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:34:18.036 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:34:18.036 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:34:18.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:34:18.036 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:34:18.036 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:34:18.037 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:34:18.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:34:18.037 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:34:18.037 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:34:18.037 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:34:18.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:34:18.037 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:34:18.037 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:34:18.037 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:34:18.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:34:18.037 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:34:18.037 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:34:18.037 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:34:18.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:34:18.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:34:18.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:34:18.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:34:18.041 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:34:18.524 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:34:18.561 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:34:18.563 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:34:18.565 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:34:18.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:34:18.578 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:34:18.578 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:34:18.578 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:34:18.596 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:34:18.596 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:34:18.597 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:34:18.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:34:18.618 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:34:18.618 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:34:18.619 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:34:18.619 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:34:18.619 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:34:18.662 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:34:18.663 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:34:18.663 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:34:18.663 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:34:18.980 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:34:18.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:34:18.985 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:34:18.985 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:34:18.994 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:34:19.004 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:34:19.004 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:34:19.004 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:34:19.010 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:34:19.010 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:34:19.010 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:34:19.010 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:34:19.011 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:34:19.012 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:34:19.012 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:34:19.012 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:34:19.012 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:34:19.036 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:34:19.037 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:34:19.037 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:34:19.037 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:34:19.038 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:34:19.039 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:34:19.040 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:34:19.040 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:34:19.464 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:34:19.516 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:34:19.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:34:19.521 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:34:19.521 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:34:19.538 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:34:19.539 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:34:19.539 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:34:19.544 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:34:19.544 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:34:19.545 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:34:19.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:34:19.546 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:34:19.546 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:34:19.546 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:34:19.546 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:34:19.546 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:34:19.550 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:34:19.550 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:34:19.550 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:34:19.550 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:34:19.934 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:34:20.039 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:34:20.040 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:34:20.041 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:34:20.041 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:34:20.323 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:34:20.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:34:20.328 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:34:20.328 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:34:20.341 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:34:20.341 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:34:20.341 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:34:20.347 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:34:20.347 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:34:20.347 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:34:20.347 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:34:20.349 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:34:20.349 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:34:20.349 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:34:20.349 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:34:20.349 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:34:20.402 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:34:20.402 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:34:20.403 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:34:20.403 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:34:20.410 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:34:20.880 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:34:21.041 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:34:21.041 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:34:21.041 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:34:21.041 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:34:21.194 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:34:21.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:34:21.200 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:34:21.200 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:34:21.207 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:34:21.207 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:34:21.207 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:34:21.207 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:34:21.208 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:34:21.208 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:34:21.209 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:34:21.209 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:34:21.209 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:34:21.209 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:34:21.209 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:34:21.209 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=685 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:34:21.209 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=685 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:34:21.209 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=685 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:34:21.209 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=685 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:34:21.209 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=685 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:34:21.209 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=685 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:34:21.209 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=685 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:34:21.209 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=685 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:34:26.214 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:34:26.214 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:34:26.214 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:34:26.214 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:34:26.214 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:34:26.214 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:34:26.222 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:34:26.223 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:34:26.223 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:34:26.224 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:34:26.224 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:34:26.227 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:34:26.227 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:34:26.227 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:34:26.227 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:34:26.228 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:34:26.228 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:34:26.228 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:34:26.228 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:34:26.230 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:34:26.230 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:34:26.230 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:34:26.230 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:34:26.230 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:34:26.230 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:34:26.231 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:34:26.231 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:34:26.232 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:34:26.232 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:34:26.232 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:34:26.232 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:34:26.232 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:34:26.232 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:34:26.232 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:34:26.232 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:34:26.235 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:34:26.235 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:34:26.235 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:34:26.235 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:34:26.235 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:34:26.235 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:34:26.235 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:34:26.235 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:34:26.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:34:26.235 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:34:26.235 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:34:26.235 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:34:26.235 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:34:26.235 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:34:26.235 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:34:26.235 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:34:26.235 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:34:26.235 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:34:26.235 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:34:26.235 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:34:26.235 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:34:26.236 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:34:26.236 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:34:26.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:34:26.236 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:34:26.236 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:34:26.236 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:34:26.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:34:26.236 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:34:26.236 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:34:26.236 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:34:26.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:34:26.236 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:34:26.236 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:34:26.236 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:34:26.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:34:26.236 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:34:26.236 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:34:26.236 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:34:26.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:34:26.236 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:34:26.236 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:34:26.236 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:34:26.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:34:26.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:34:26.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:34:26.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:34:26.240 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:34:26.724 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:34:26.756 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:34:26.759 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:34:26.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:34:26.761 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:34:26.784 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:34:26.785 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:34:26.785 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:34:26.808 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:34:26.808 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:34:26.808 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:34:26.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:34:26.818 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:34:26.818 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:34:26.819 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:34:26.819 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:34:26.820 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:34:26.862 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:34:26.863 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:34:26.863 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:34:26.864 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:34:27.202 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:34:27.238 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:34:27.239 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:34:27.239 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:34:27.240 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:34:27.680 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:34:28.159 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:34:28.239 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:34:28.240 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:34:28.240 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:34:28.241 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:34:28.636 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:34:29.114 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:34:29.240 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:34:29.241 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:34:29.241 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:34:29.242 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:34:29.592 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:34:30.071 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:34:30.093 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:34:30.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:34:30.098 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:34:30.098 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:34:30.119 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:34:30.119 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:34:30.119 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:34:30.125 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:34:30.126 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:34:30.126 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:34:30.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:34:30.127 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:34:30.128 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:34:30.128 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:34:30.128 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:34:30.128 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:34:30.162 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:34:30.162 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:34:30.162 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:34:30.162 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:34:30.241 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:34:30.241 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:34:30.241 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:34:30.242 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:34:30.547 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:34:31.026 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 02:34:31.242 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:34:31.243 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:34:31.243 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:34:31.243 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:34:31.504 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 02:34:31.982 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 02:34:32.461 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 02:34:32.939 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 02:34:33.418 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 02:34:33.505 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:34:33.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:34:33.511 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:34:33.511 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:34:33.529 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:34:33.529 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:34:33.529 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:34:33.536 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:34:33.536 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:34:33.536 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:34:33.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:34:33.537 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:34:33.537 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:34:33.537 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:34:33.538 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:34:33.538 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:34:33.554 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:34:33.554 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:34:33.554 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:34:33.554 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:34:33.891 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 02:34:34.369 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 02:34:34.848 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 02:34:35.325 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 02:34:35.804 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 02:34:36.281 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 02:34:36.760 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 02:34:37.151 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:34:37.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:34:37.155 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:34:37.155 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:34:37.176 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:34:37.176 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:34:37.176 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:34:37.182 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:34:37.182 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:34:37.183 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:34:37.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:34:37.184 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:34:37.184 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:34:37.184 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:34:37.184 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:34:37.184 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:34:37.230 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:34:37.230 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:34:37.230 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:34:37.230 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:34:37.236 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 02:34:37.705 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 02:34:38.175 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 02:34:38.652 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 02:34:39.136 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-09 02:34:39.614 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-09 02:34:40.092 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-09 02:34:40.570 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-09 02:34:40.887 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:34:40.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:34:40.892 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:34:40.893 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:34:40.901 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:34:40.901 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:34:40.901 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:34:40.901 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:34:40.903 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:34:40.903 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:34:40.903 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:34:40.903 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:34:40.903 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:34:40.903 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:34:40.903 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:34:40.903 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3134 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:34:40.903 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3134 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:34:40.903 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3134 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:34:40.903 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3134 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:34:40.903 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3134 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:34:40.903 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3134 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:34:40.904 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3134 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:34:40.904 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3134 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:34:45.905 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:34:45.906 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:34:45.907 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:34:45.908 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:34:45.908 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:34:45.909 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:34:45.917 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:34:45.918 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:34:45.918 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:34:45.918 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:34:45.918 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:34:45.920 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:34:45.921 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:34:45.921 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:34:45.921 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:34:45.921 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:34:45.922 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:34:45.922 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:34:45.922 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:34:45.923 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:34:45.923 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:34:45.923 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:34:45.923 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:34:45.923 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:34:45.923 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:34:45.923 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:34:45.924 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:34:45.925 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:34:45.925 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:34:45.925 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:34:45.925 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:34:45.925 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:34:45.925 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:34:45.925 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:34:45.926 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:34:45.928 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:34:45.928 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:34:45.928 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:34:45.928 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:34:45.928 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:34:45.928 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:34:45.928 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:34:45.928 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:34:45.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:34:45.928 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:34:45.928 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:34:45.928 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:34:45.928 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:34:45.928 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:34:45.928 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:34:45.928 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:34:45.928 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:34:45.928 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:34:45.928 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:34:45.929 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:34:45.929 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:34:45.929 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:34:45.929 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:34:45.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:34:45.929 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:34:45.929 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:34:45.929 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:34:45.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:34:45.929 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:34:45.929 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:34:45.929 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:34:45.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:34:45.929 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:34:45.929 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:34:45.929 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:34:45.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:34:45.929 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:34:45.929 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:34:45.929 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:34:45.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:34:45.929 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:34:45.929 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:34:45.929 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:34:45.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:34:45.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:34:45.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:34:45.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:34:45.933 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:34:46.417 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:34:46.450 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:34:46.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:34:46.454 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:34:46.457 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:34:46.478 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:34:46.478 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:34:46.478 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:34:46.503 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:34:46.503 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:34:46.503 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:34:46.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:34:46.514 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:34:46.514 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:34:46.515 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:34:46.515 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:34:46.515 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:34:46.556 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:34:46.556 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:34:46.556 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:34:46.556 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:34:46.888 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:34:46.928 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:34:46.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:34:46.931 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:34:46.931 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:34:46.932 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:34:46.934 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:34:46.934 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:34:46.934 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:34:46.946 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:34:46.946 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:34:46.946 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:34:46.952 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:34:46.952 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:34:46.952 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:34:46.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:34:46.954 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:34:46.954 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:34:46.954 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:34:46.954 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:34:46.954 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:34:46.974 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:34:46.974 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:34:46.974 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:34:46.974 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:34:47.357 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:34:47.571 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:34:47.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:34:47.575 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:34:47.575 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:34:47.595 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:34:47.595 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:34:47.595 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:34:47.601 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:34:47.601 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:34:47.601 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:34:47.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:34:47.603 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:34:47.603 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:34:47.603 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:34:47.603 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:34:47.603 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:34:47.635 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:34:47.635 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:34:47.636 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:34:47.636 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:34:47.827 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:34:47.931 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:34:47.932 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:34:47.932 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:34:47.935 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:34:48.301 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:34:48.687 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:34:48.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:34:48.693 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:34:48.693 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:34:48.711 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:34:48.711 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:34:48.711 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:34:48.717 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:34:48.718 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:34:48.718 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:34:48.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:34:48.719 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:34:48.719 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:34:48.720 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:34:48.720 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:34:48.720 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:34:48.766 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:34:48.767 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:34:48.768 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:34:48.768 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:34:48.778 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:34:48.932 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:34:48.932 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:34:48.933 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:34:48.936 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:34:49.256 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:34:49.735 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:34:49.818 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:34:49.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:34:49.823 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:34:49.824 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:34:49.832 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:34:49.833 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:34:49.833 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:34:49.833 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:34:49.834 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:34:49.834 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:34:49.834 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:34:49.834 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:34:49.834 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:34:49.834 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:34:49.834 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:34:54.838 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:34:54.838 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:34:54.839 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:34:54.840 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:34:54.840 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:34:54.841 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:34:54.845 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:34:54.845 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:34:54.845 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:34:54.845 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:34:54.845 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:34:54.847 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:34:54.847 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:34:54.847 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:34:54.847 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:34:54.848 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:34:54.848 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:34:54.848 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:34:54.848 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:34:54.849 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:34:54.849 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:34:54.849 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:34:54.849 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:34:54.849 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:34:54.849 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:34:54.849 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:34:54.849 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:34:54.850 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:34:54.850 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:34:54.851 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:34:54.851 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:34:54.851 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:34:54.851 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:34:54.851 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:34:54.851 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:34:54.853 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:34:54.853 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:34:54.853 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:34:54.853 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:34:54.853 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:34:54.853 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:34:54.853 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:34:54.853 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:34:54.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:34:54.853 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:34:54.853 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:34:54.853 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:34:54.853 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:34:54.853 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:34:54.853 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:34:54.853 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:34:54.853 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:34:54.854 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:34:54.854 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:34:54.854 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:34:54.854 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:34:54.854 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:34:54.854 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:34:54.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:34:54.854 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:34:54.854 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:34:54.854 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:34:54.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:34:54.854 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:34:54.854 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:34:54.854 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:34:54.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:34:54.854 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:34:54.854 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:34:54.854 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:34:54.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:34:54.854 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:34:54.854 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:34:54.854 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:34:54.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:34:54.854 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:34:54.854 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:34:54.854 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:34:54.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:34:54.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:34:54.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:34:54.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:34:54.858 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:34:55.341 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:34:55.377 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:34:55.379 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:34:55.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:34:55.382 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:34:55.404 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:34:55.404 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:34:55.405 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:34:55.430 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:34:55.430 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:34:55.431 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:34:55.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:34:55.437 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:34:55.437 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:34:55.437 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:34:55.437 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:34:55.437 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:34:55.479 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:34:55.479 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:34:55.480 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:34:55.480 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:34:55.815 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:34:55.856 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:34:55.856 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:34:55.857 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:34:55.857 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:34:56.293 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:34:56.772 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:34:56.858 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:34:56.858 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:34:56.858 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:34:56.858 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:34:57.250 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:34:57.728 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:34:57.859 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:34:57.859 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:34:57.859 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:34:57.859 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:34:58.207 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:34:58.358 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:34:58.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:34:58.362 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:34:58.362 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:34:58.370 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:34:58.370 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:34:58.370 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:34:58.377 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:34:58.377 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:34:58.377 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:34:58.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:34:58.378 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:34:58.379 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:34:58.379 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:34:58.379 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:34:58.379 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:34:58.389 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:34:58.389 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:34:58.389 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:34:58.389 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:34:58.680 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:34:58.860 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:34:58.860 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:34:58.860 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:34:58.860 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:34:59.158 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:34:59.636 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 02:34:59.861 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:34:59.861 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:34:59.861 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:34:59.862 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:35:00.115 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 02:35:00.594 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 02:35:01.073 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 02:35:01.551 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 02:35:02.030 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 02:35:02.508 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 02:35:02.986 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 02:35:03.009 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:35:03.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:35:03.013 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:35:03.013 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:35:03.031 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:35:03.031 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:35:03.031 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:35:03.038 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:35:03.038 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:35:03.038 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:35:03.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:35:03.039 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:35:03.039 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:35:03.039 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:35:03.039 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:35:03.039 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:35:03.077 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:35:03.078 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:35:03.078 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:35:03.078 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:35:03.463 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 02:35:03.941 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 02:35:04.420 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 02:35:04.897 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 02:35:05.376 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 02:35:05.854 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 02:35:06.331 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 02:35:06.809 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 02:35:07.287 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 02:35:07.765 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-09 02:35:08.244 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-09 02:35:08.721 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-09 02:35:09.200 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-09 02:35:09.677 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-09 02:35:09.833 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:35:09.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:35:09.838 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:35:09.838 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:35:09.858 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:35:09.858 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:35:09.858 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:35:09.865 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:35:09.865 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:35:09.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:35:09.865 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:35:09.867 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:35:09.867 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:35:09.867 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:35:09.867 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:35:09.867 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:35:09.912 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:35:09.912 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:35:09.912 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:35:09.912 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:35:10.149 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-09 02:35:10.626 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-09 02:35:11.104 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-09 02:35:11.583 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-09 02:35:12.060 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-09 02:35:12.538 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-09 02:35:13.016 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-09 02:35:13.494 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-09 02:35:13.972 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-09 02:35:14.450 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-09 02:35:14.928 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-09 02:35:15.407 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-09 02:35:15.885 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-01-09 02:35:16.363 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-01-09 02:35:16.681 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:35:16.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:35:16.686 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:35:16.686 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:35:16.706 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:35:16.706 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:35:16.706 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:35:16.706 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:35:16.715 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:35:16.715 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:35:16.715 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:35:16.715 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:35:16.715 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:35:16.715 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:35:16.716 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:35:16.716 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4667 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:35:16.716 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4667 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:35:21.707 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:35:21.707 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:35:21.709 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:35:21.709 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:35:21.709 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:35:21.710 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:35:21.724 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:35:21.725 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:35:21.725 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:35:21.725 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:35:21.725 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:35:21.726 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:35:21.727 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:35:21.727 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:35:21.727 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:35:21.727 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:35:21.727 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:35:21.727 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:35:21.727 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:35:21.728 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:35:21.728 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:35:21.728 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:35:21.728 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:35:21.728 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:35:21.728 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:35:21.728 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:35:21.728 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:35:21.729 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:35:21.730 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:35:21.730 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:35:21.730 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:35:21.730 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:35:21.730 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:35:21.730 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:35:21.730 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:35:21.733 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:35:21.733 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:35:21.733 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:35:21.733 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:35:21.733 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:35:21.733 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:35:21.733 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:35:21.733 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:35:21.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:35:21.733 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:35:21.733 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:35:21.733 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:35:21.733 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:35:21.733 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:35:21.733 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:35:21.733 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:35:21.733 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:35:21.733 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:35:21.734 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:35:21.734 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:35:21.734 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:35:21.734 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:35:21.734 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:35:21.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:35:21.734 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:35:21.734 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:35:21.734 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:35:21.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:35:21.734 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:35:21.734 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:35:21.734 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:35:21.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:35:21.734 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:35:21.734 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:35:21.734 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:35:21.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:35:21.734 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:35:21.735 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:35:21.735 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:35:21.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:35:21.735 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:35:21.735 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:35:21.735 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:35:21.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:35:21.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:35:21.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:35:21.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:35:21.738 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:35:22.221 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:35:22.264 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:35:22.266 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:35:22.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:35:22.269 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:35:22.289 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:35:22.289 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:35:22.289 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:35:22.301 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:35:22.301 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:35:22.301 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:35:22.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:35:22.304 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:35:22.304 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:35:22.304 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:35:22.304 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:35:22.304 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:35:22.311 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:35:22.311 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:35:22.311 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:35:22.311 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:35:22.692 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:35:22.737 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:35:22.737 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:35:22.738 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:35:22.742 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:35:23.161 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:35:23.631 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:35:23.737 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:35:23.738 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:35:23.739 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:35:23.743 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:35:24.035 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:35:24.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:35:24.040 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:35:24.040 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:35:24.061 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:35:24.061 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:35:24.061 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:35:24.068 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:35:24.069 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:35:24.069 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:35:24.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:35:24.070 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:35:24.070 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:35:24.070 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:35:24.070 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:35:24.070 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:35:24.099 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:35:24.100 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:35:24.100 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:35:24.100 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:35:24.108 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:35:24.578 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:35:24.738 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:35:24.738 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:35:24.740 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:35:24.744 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:35:25.047 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:35:25.521 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:35:25.738 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:35:25.739 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:35:25.742 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:35:25.746 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:35:26.000 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:35:26.478 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 02:35:26.740 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:35:26.740 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:35:26.743 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:35:26.746 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:35:26.838 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:35:26.839 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:35:26.843 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:35:26.843 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:35:26.854 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:35:26.854 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:35:26.854 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:35:26.862 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:35:26.862 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:35:26.862 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:35:26.862 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:35:26.864 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:35:26.864 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:35:26.864 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:35:26.864 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:35:26.864 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:35:26.897 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:35:26.898 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:35:26.898 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:35:26.898 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:35:26.955 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 02:35:27.432 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 02:35:27.910 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 02:35:28.388 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 02:35:28.866 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 02:35:29.345 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 02:35:29.823 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 02:35:30.301 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 02:35:30.779 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 02:35:31.170 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:35:31.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:35:31.175 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:35:31.175 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:35:31.195 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:35:31.195 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:35:31.195 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:35:31.203 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:35:31.203 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:35:31.203 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:35:31.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:35:31.204 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:35:31.205 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:35:31.205 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:35:31.205 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:35:31.205 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:35:31.249 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:35:31.249 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:35:31.249 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:35:31.249 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:35:31.256 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 02:35:31.725 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 02:35:32.212 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 02:35:32.691 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 02:35:33.168 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 02:35:33.646 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 02:35:34.124 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 02:35:34.603 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-09 02:35:35.081 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-09 02:35:35.559 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-09 02:35:35.642 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:35:35.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:35:35.647 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:35:35.647 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:35:35.660 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:35:35.660 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:35:35.661 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:35:35.661 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:35:35.662 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:35:35.662 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:35:35.662 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:35:35.662 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:35:35.662 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:35:35.662 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:35:35.662 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:35:35.662 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2981 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:35:35.662 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2981 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:35:35.662 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2981 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:35:35.662 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2981 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:35:35.662 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2981 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:35:35.662 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2981 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:35:35.662 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2981 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:35:35.662 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2982 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:35:35.662 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2982 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:35:35.662 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2982 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:35:35.662 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2982 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:35:35.662 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2982 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:35:35.662 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2982 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:35:35.662 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2982 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:35:35.662 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2982 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:35:40.665 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:35:40.665 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:35:40.667 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:35:40.668 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:35:40.668 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:35:40.668 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:35:40.680 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:35:40.681 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:35:40.681 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:35:40.681 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:35:40.681 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:35:40.683 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:35:40.683 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:35:40.683 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:35:40.683 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:35:40.684 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:35:40.684 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:35:40.684 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:35:40.684 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:35:40.685 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:35:40.685 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:35:40.685 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:35:40.685 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:35:40.685 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:35:40.686 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:35:40.686 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:35:40.686 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:35:40.687 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:35:40.688 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:35:40.688 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:35:40.688 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:35:40.688 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:35:40.688 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:35:40.688 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:35:40.688 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:35:40.691 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:35:40.691 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:35:40.691 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:35:40.691 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:35:40.691 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:35:40.691 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:35:40.691 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:35:40.691 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:35:40.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:35:40.691 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:35:40.691 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:35:40.691 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:35:40.691 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:35:40.691 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:35:40.691 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:35:40.691 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:35:40.691 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:35:40.691 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:35:40.691 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:35:40.691 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:35:40.691 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:35:40.691 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:35:40.691 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:35:40.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:35:40.692 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:35:40.692 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:35:40.692 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:35:40.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:35:40.692 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:35:40.692 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:35:40.692 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:35:40.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:35:40.692 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:35:40.692 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:35:40.692 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:35:40.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:35:40.692 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:35:40.692 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:35:40.692 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:35:40.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:35:40.692 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:35:40.692 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:35:40.692 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:35:40.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:35:40.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:35:40.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:35:40.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:35:40.696 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:35:41.179 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:35:41.214 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:35:41.218 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:35:41.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:35:41.221 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:35:41.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:35:41.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:35:41.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:35:41.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:35:41.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:35:41.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:35:41.657 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:35:41.694 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:35:41.694 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:35:41.695 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:35:41.696 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:35:41.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:35:41.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:35:41.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:35:41.905 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:35:42.135 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:35:42.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:35:42.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:35:42.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:35:42.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:35:42.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:35:42.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:35:42.548 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:35:42.548 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:35:42.548 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:35:42.548 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:35:42.550 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:35:42.550 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:35:42.550 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:35:42.550 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:35:42.550 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:35:42.550 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:35:42.550 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:35:42.550 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=397 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:35:42.550 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=397 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:35:42.550 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=397 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:35:42.550 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=397 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:35:42.550 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=397 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:35:42.550 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=397 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:35:42.550 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=397 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:35:47.552 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:35:47.553 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:35:47.554 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:35:47.555 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:35:47.555 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:35:47.556 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:35:47.559 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:35:47.559 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:35:47.559 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:35:47.560 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:35:47.560 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:35:47.561 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:35:47.561 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:35:47.561 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:35:47.561 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:35:47.561 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:35:47.561 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:35:47.561 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:35:47.561 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:35:47.562 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:35:47.562 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:35:47.562 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:35:47.562 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:35:47.562 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:35:47.562 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:35:47.563 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:35:47.563 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:35:47.564 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:35:47.564 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:35:47.564 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:35:47.564 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:35:47.564 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:35:47.564 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:35:47.564 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:35:47.564 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:35:47.566 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:35:47.566 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:35:47.566 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:35:47.566 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:35:47.566 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:35:47.566 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:35:47.566 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:35:47.566 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:35:47.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:35:47.566 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:35:47.566 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:35:47.566 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:35:47.567 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:35:47.567 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:35:47.567 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:35:47.567 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:35:47.567 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:35:47.567 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:35:47.567 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:35:47.567 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:35:47.567 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:35:47.567 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:35:47.567 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:35:47.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:35:47.567 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:35:47.567 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:35:47.567 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:35:47.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:35:47.567 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:35:47.567 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:35:47.567 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:35:47.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:35:47.567 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:35:47.567 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:35:47.567 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:35:47.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:35:47.567 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:35:47.567 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:35:47.567 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:35:47.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:35:47.567 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:35:47.568 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:35:47.568 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:35:47.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:35:47.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:35:47.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:35:47.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:35:47.571 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:35:48.055 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:35:48.091 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:35:48.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:35:48.093 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:35:48.095 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:35:48.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:35:48.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:35:48.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:35:48.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:35:48.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:35:48.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:35:48.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:35:48.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:35:48.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:35:48.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:35:48.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:35:48.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:35:48.529 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:35:48.570 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:35:48.570 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:35:48.570 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:35:48.571 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:35:48.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:35:48.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:35:48.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:35:48.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:35:48.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:35:48.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:35:48.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:35:48.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:35:48.998 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:35:49.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:35:49.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:35:49.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:35:49.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:35:49.131 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:35:49.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:35:49.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:35:49.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:35:49.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:35:49.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:35:49.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:35:49.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:35:49.448 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:35:49.448 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:35:49.448 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:35:49.448 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:35:49.449 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:35:49.449 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:35:49.449 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:35:49.449 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:35:49.449 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:35:49.449 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:35:49.449 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:35:54.453 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:35:54.453 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:35:54.457 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:35:54.457 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:35:54.457 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:35:54.457 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:35:54.465 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:35:54.466 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:35:54.466 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:35:54.466 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:35:54.466 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:35:54.469 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:35:54.470 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:35:54.470 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:35:54.470 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:35:54.470 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:35:54.470 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:35:54.470 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:35:54.470 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:35:54.474 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:35:54.474 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:35:54.474 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:35:54.474 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:35:54.474 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:35:54.474 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:35:54.474 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:35:54.474 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:35:54.477 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:35:54.477 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:35:54.477 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:35:54.477 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:35:54.477 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:35:54.478 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:35:54.478 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:35:54.478 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:35:54.481 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:35:54.481 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:35:54.481 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:35:54.481 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:35:54.481 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:35:54.482 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:35:54.482 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:35:54.482 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:35:54.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:35:54.482 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:35:54.482 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:35:54.482 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:35:54.482 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:35:54.482 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:35:54.482 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:35:54.482 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:35:54.482 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:35:54.482 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:35:54.482 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:35:54.483 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:35:54.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:35:54.483 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:35:54.483 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:35:54.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:35:54.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:35:54.483 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:35:54.483 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:35:54.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:35:54.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:35:54.483 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:35:54.483 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:35:54.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:35:54.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:35:54.484 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:35:54.484 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:35:54.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:35:54.484 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:35:54.484 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:35:54.484 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:35:54.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:35:54.484 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:35:54.484 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:35:54.484 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:35:54.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:35:54.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:35:54.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:35:54.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:35:54.487 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:35:54.972 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:35:55.009 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:35:55.011 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:35:55.013 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:35:55.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:35:55.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:35:55.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:35:55.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:35:55.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:35:55.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:35:55.347 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:35:55.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:35:55.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:35:55.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:35:55.441 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:35:55.486 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:35:55.486 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:35:55.488 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:35:55.489 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:35:55.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:35:55.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:35:55.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:35:55.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:35:55.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:35:55.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:35:55.910 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:35:55.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:35:56.003 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:35:56.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:35:56.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:35:56.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:35:56.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:35:56.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:35:56.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:35:56.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:35:56.339 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:35:56.339 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:35:56.339 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:35:56.339 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:35:56.341 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:35:56.341 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:35:56.341 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:35:56.341 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:35:56.341 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:35:56.341 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:35:56.341 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:36:01.343 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:36:01.343 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:36:01.345 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:36:01.345 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:36:01.345 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:36:01.346 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:36:01.355 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:36:01.356 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:36:01.356 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:36:01.356 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:36:01.356 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:36:01.359 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:36:01.359 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:36:01.359 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:36:01.359 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:36:01.360 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:36:01.360 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:36:01.360 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:36:01.360 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:36:01.361 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:36:01.361 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:36:01.361 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:36:01.361 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:36:01.362 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:36:01.362 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:36:01.362 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:36:01.362 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:36:01.363 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:36:01.363 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:36:01.363 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:36:01.363 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:36:01.364 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:36:01.364 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:36:01.364 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:36:01.364 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:36:01.366 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:36:01.366 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:36:01.366 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:36:01.366 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:36:01.366 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:36:01.366 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:36:01.366 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:36:01.366 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:36:01.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:36:01.366 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:36:01.366 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:36:01.366 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:36:01.366 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:36:01.366 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:36:01.366 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:36:01.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:36:01.367 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:36:01.367 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:36:01.367 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:36:01.367 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:36:01.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:36:01.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:36:01.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:36:01.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:36:01.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:36:01.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:36:01.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:36:01.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:36:01.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:36:01.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:36:01.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:36:01.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:36:01.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:36:01.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:36:01.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:36:01.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:36:01.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:36:01.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:36:01.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:36:01.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:36:01.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:36:01.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:36:01.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:36:01.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:36:01.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:36:01.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:36:01.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:36:01.371 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:36:01.855 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:36:01.890 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:36:01.893 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:36:01.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:01.895 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:36:01.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:01.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:02.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:02.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:02.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:02.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:02.329 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:36:02.369 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:36:02.370 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:36:02.370 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:36:02.370 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:36:02.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:02.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:02.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:02.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:02.798 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:36:02.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:02.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:02.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:02.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:03.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:03.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:03.223 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:36:03.223 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:36:03.223 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:36:03.223 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:36:03.225 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:36:03.225 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:36:03.225 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:36:03.225 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:36:03.225 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:36:03.225 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:36:03.225 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:36:08.234 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:36:08.243 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:36:08.244 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:36:08.244 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:36:08.244 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:36:08.244 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:36:08.246 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:36:08.247 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:36:08.247 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:36:08.247 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:36:08.247 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:36:08.251 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:36:08.251 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:36:08.251 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:36:08.251 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:36:08.252 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:36:08.252 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:36:08.252 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:36:08.252 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:36:08.255 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:36:08.255 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:36:08.255 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:36:08.255 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:36:08.256 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:36:08.256 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:36:08.256 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:36:08.256 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:36:08.259 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:36:08.259 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:36:08.259 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:36:08.259 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:36:08.259 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:36:08.259 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:36:08.259 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:36:08.260 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:36:08.263 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:36:08.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:36:08.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:36:08.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:36:08.263 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:36:08.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:36:08.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:36:08.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:36:08.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:36:08.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:36:08.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:36:08.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:36:08.263 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:36:08.264 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:36:08.264 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:36:08.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:36:08.264 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:36:08.264 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:36:08.264 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:36:08.264 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:36:08.264 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:36:08.264 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:36:08.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:36:08.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:36:08.264 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:36:08.264 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:36:08.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:36:08.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:36:08.264 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:36:08.264 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:36:08.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:36:08.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:36:08.264 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:36:08.264 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:36:08.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:36:08.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:36:08.265 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:36:08.265 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:36:08.265 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:36:08.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:36:08.265 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:36:08.265 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:36:08.265 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:36:08.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:36:08.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:36:08.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:36:08.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:36:08.268 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:36:08.750 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:36:08.792 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:36:08.794 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:36:08.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:08.797 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:36:08.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:36:08.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:08.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:09.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:09.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:09.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:09.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:09.227 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:36:09.267 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:36:09.267 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:36:09.268 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:36:09.268 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:36:09.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:09.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:09.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:09.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:09.700 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:36:09.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:09.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:09.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:09.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:10.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:10.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:10.127 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:36:10.127 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:36:10.127 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:36:10.127 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:36:10.129 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:36:10.129 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:36:10.129 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:36:10.129 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:36:10.129 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:36:10.129 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:36:10.129 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:36:10.129 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=401 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:36:10.129 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=401 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:36:15.132 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:36:15.132 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:36:15.135 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:36:15.135 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:36:15.135 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:36:15.135 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:36:15.143 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:36:15.143 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:36:15.143 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:36:15.143 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:36:15.143 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:36:15.145 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:36:15.145 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:36:15.146 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:36:15.146 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:36:15.146 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:36:15.146 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:36:15.146 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:36:15.146 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:36:15.148 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:36:15.148 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:36:15.148 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:36:15.148 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:36:15.148 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:36:15.148 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:36:15.148 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:36:15.148 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:36:15.150 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:36:15.150 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:36:15.150 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:36:15.150 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:36:15.151 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:36:15.151 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:36:15.151 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:36:15.151 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:36:15.153 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:36:15.154 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:36:15.154 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:36:15.154 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:36:15.154 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:36:15.154 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:36:15.154 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:36:15.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:36:15.154 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:36:15.154 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:36:15.154 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:36:15.154 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:36:15.154 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:36:15.154 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:36:15.154 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:36:15.154 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:36:15.154 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:36:15.154 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:36:15.154 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:36:15.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:36:15.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:36:15.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:36:15.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:36:15.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:36:15.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:36:15.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:36:15.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:36:15.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:36:15.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:36:15.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:36:15.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:36:15.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:36:15.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:36:15.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:36:15.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:36:15.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:36:15.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:36:15.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:36:15.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:36:15.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:36:15.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:36:15.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:36:15.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:36:15.156 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:36:15.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:36:15.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:36:15.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:36:15.159 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:36:15.641 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:36:15.682 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:36:15.684 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:36:15.686 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:15.686 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:36:15.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:36:15.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:15.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:15.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:15.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:16.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:16.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:16.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:16.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:16.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:16.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:16.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:16.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:16.110 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:36:16.158 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:36:16.158 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:36:16.160 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:36:16.162 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:36:16.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:16.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:16.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:16.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:16.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:16.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:16.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:16.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:16.580 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:36:16.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:16.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:16.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:16.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:16.730 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:16.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:16.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:16.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:17.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:17.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:17.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:17.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:17.052 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:36:17.063 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:36:17.064 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:36:17.064 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:36:17.064 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:36:17.074 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:36:17.074 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:36:17.074 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:36:17.074 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:36:17.074 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:36:17.074 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:36:17.075 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:36:17.075 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=412 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:36:17.076 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=412 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:36:22.069 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:36:22.069 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:36:22.071 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:36:22.072 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:36:22.072 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:36:22.073 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:36:22.081 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:36:22.082 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:36:22.082 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:36:22.082 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:36:22.082 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:36:22.083 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:36:22.084 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:36:22.084 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:36:22.084 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:36:22.084 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:36:22.085 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:36:22.085 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:36:22.085 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:36:22.086 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:36:22.086 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:36:22.086 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:36:22.086 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:36:22.087 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:36:22.087 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:36:22.087 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:36:22.087 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:36:22.088 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:36:22.088 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:36:22.088 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:36:22.088 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:36:22.089 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:36:22.089 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:36:22.089 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:36:22.089 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:36:22.091 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:36:22.091 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:36:22.091 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:36:22.091 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:36:22.091 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:36:22.091 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:36:22.091 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:36:22.091 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:36:22.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:36:22.091 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:36:22.091 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:36:22.091 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:36:22.091 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:36:22.091 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:36:22.091 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:36:22.091 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:36:22.091 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:36:22.091 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:36:22.092 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:36:22.092 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:36:22.092 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:36:22.092 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:36:22.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:36:22.092 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:36:22.092 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:36:22.092 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:36:22.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:36:22.092 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:36:22.092 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:36:22.092 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:36:22.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:36:22.092 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:36:22.092 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:36:22.092 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:36:22.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:36:22.092 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:36:22.092 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:36:22.092 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:36:22.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:36:22.092 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:36:22.092 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:36:22.092 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:36:22.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:36:22.092 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:36:22.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:36:22.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:36:22.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:36:22.096 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:36:22.581 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:36:22.617 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:36:22.620 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:22.620 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:36:22.623 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:36:22.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:36:22.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:22.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:22.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:22.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:22.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:22.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:22.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:22.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:22.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:23.057 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:36:23.094 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:36:23.094 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:36:23.094 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:36:23.095 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:36:23.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:23.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:23.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:23.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:23.318 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:23.322 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:23.530 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:36:23.618 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:23.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:23.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:23.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:23.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:23.645 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:23.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:23.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:23.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:23.968 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:36:23.969 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:36:23.969 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:36:23.969 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:36:23.978 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:36:23.978 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:36:23.978 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:36:23.978 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:36:23.978 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:36:23.978 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:36:23.979 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:36:23.979 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=404 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:36:23.979 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=404 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:36:28.988 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:36:28.988 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:36:28.990 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:36:28.992 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:36:28.994 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:36:28.998 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:36:29.007 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:36:29.008 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:36:29.008 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:36:29.008 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:36:29.008 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:36:29.009 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:36:29.009 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:36:29.009 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:36:29.009 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:36:29.009 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:36:29.010 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:36:29.010 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:36:29.010 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:36:29.010 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:36:29.010 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:36:29.010 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:36:29.011 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:36:29.011 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:36:29.011 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:36:29.011 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:36:29.011 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:36:29.012 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:36:29.012 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:36:29.012 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:36:29.012 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:36:29.012 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:36:29.012 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:36:29.012 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:36:29.012 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:36:29.014 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:36:29.014 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:36:29.014 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:36:29.014 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:36:29.014 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:36:29.014 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:36:29.014 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:36:29.014 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:36:29.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:36:29.014 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:36:29.014 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:36:29.014 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:36:29.014 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:36:29.014 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:36:29.014 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:36:29.014 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:36:29.014 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:36:29.014 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:36:29.014 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:36:29.014 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:36:29.014 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:36:29.014 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:36:29.014 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:36:29.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:36:29.014 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:36:29.014 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:36:29.014 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:36:29.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:36:29.014 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:36:29.015 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:36:29.015 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:36:29.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:36:29.015 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:36:29.015 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:36:29.015 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:36:29.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:36:29.015 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:36:29.015 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:36:29.015 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:36:29.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:36:29.015 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:36:29.015 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:36:29.015 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:36:29.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:36:29.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:36:29.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:36:29.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:36:29.019 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:36:29.503 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:36:29.539 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:36:29.541 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:36:29.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:29.543 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:36:29.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:29.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:29.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:29.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:29.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:29.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:29.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:29.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:29.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:29.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:29.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:29.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:29.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:29.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:29.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:29.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:29.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:29.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:29.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:29.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:29.623 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:29.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:29.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:29.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:29.629 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:36:29.629 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:36:29.629 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:36:29.629 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:36:29.632 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:36:29.632 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:36:29.632 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:36:29.632 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:36:29.632 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:36:29.632 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:36:29.632 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:36:29.632 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=131 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:36:29.632 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=131 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:36:29.632 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=131 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:36:29.632 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=131 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:36:29.632 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=131 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:36:29.632 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=131 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:36:29.632 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=131 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:36:29.632 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=131 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:36:34.633 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:36:34.633 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:36:34.636 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:36:34.636 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:36:34.636 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:36:34.636 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:36:34.645 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:36:34.647 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:36:34.647 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:36:34.647 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:36:34.647 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:36:34.652 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:36:34.652 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:36:34.652 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:36:34.652 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:36:34.652 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:36:34.653 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:36:34.653 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:36:34.653 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:36:34.656 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:36:34.656 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:36:34.656 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:36:34.656 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:36:34.656 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:36:34.656 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:36:34.656 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:36:34.656 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:36:34.659 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:36:34.659 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:36:34.659 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:36:34.659 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:36:34.659 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:36:34.659 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:36:34.660 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:36:34.660 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:36:34.663 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:36:34.663 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:36:34.663 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:36:34.663 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:36:34.663 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:36:34.663 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:36:34.664 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:36:34.664 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:36:34.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:36:34.664 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:36:34.664 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:36:34.664 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:36:34.664 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:36:34.664 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:36:34.664 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:36:34.664 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:36:34.664 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:36:34.664 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:36:34.664 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:36:34.664 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:36:34.664 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:36:34.664 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:36:34.664 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:36:34.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:36:34.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:36:34.665 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:36:34.665 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:36:34.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:36:34.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:36:34.665 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:36:34.665 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:36:34.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:36:34.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:36:34.665 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:36:34.665 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:36:34.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:36:34.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:36:34.665 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:36:34.665 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:36:34.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:36:34.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:36:34.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:36:34.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:36:34.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:36:34.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:36:34.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:36:34.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:36:34.669 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:36:35.153 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:36:35.190 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:36:35.193 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:36:35.195 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:35.195 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:36:35.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:35.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:35.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:35.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:35.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:35.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:35.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:35.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:35.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:35.228 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:35.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:35.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:35.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:35.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:35.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:35.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:35.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:35.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:35.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:35.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:35.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:35.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:35.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:35.251 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:35.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:35.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:35.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:35.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:35.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:35.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:35.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:35.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:35.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:35.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:35.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:35.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:35.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:35.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:35.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:35.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:35.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:35.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:35.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:35.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:35.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:35.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:35.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:35.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:35.297 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:36:35.297 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:36:35.297 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:36:35.297 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:36:35.299 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:36:35.299 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:36:35.299 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:36:35.299 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:36:35.299 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:36:35.299 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:36:35.299 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:36:35.299 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=135 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:36:35.299 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=135 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:36:40.303 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:36:40.303 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:36:40.304 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:36:40.304 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:36:40.305 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:36:40.306 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:36:40.310 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:36:40.310 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:36:40.310 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:36:40.310 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:36:40.310 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:36:40.312 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:36:40.312 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:36:40.312 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:36:40.312 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:36:40.312 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:36:40.313 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:36:40.313 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:36:40.313 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:36:40.314 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:36:40.314 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:36:40.314 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:36:40.314 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:36:40.314 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:36:40.314 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:36:40.314 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:36:40.314 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:36:40.316 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:36:40.316 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:36:40.316 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:36:40.316 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:36:40.316 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:36:40.316 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:36:40.316 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:36:40.316 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:36:40.318 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:36:40.318 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:36:40.318 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:36:40.318 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:36:40.318 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:36:40.318 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:36:40.318 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:36:40.318 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:36:40.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:36:40.319 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:36:40.319 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:36:40.319 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:36:40.319 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:36:40.319 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:36:40.319 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:36:40.319 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:36:40.319 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:36:40.319 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:36:40.319 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:36:40.319 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:36:40.319 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:36:40.319 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:36:40.319 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:36:40.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:36:40.319 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:36:40.319 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:36:40.319 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:36:40.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:36:40.319 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:36:40.319 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:36:40.319 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:36:40.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:36:40.319 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:36:40.319 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:36:40.319 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:36:40.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:36:40.319 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:36:40.320 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:36:40.320 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:36:40.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:36:40.320 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:36:40.320 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:36:40.320 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:36:40.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:36:40.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:36:40.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:36:40.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:36:40.324 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:36:40.806 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:36:40.839 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:36:40.840 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:36:40.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:40.841 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:36:40.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:40.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:40.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:40.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:40.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:40.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:40.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:40.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:40.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:40.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:40.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:40.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:40.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:40.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:40.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:40.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:40.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:40.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:40.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:40.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:40.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:40.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:40.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:40.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:40.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:40.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:40.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:40.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:40.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:40.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:40.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:40.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:40.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:40.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:40.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:40.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:40.937 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:36:40.937 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:36:40.937 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:36:40.937 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:36:40.939 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:36:40.940 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:36:40.940 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:36:40.940 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:36:40.940 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:36:40.940 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:36:40.940 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:36:40.940 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=132 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:36:40.940 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=132 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:36:40.940 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=132 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:36:40.940 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=132 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:36:40.940 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=132 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:36:40.940 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=132 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:36:45.942 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:36:45.942 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:36:45.944 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:36:45.944 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:36:45.945 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:36:45.945 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:36:45.954 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:36:45.955 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:36:45.955 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:36:45.955 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:36:45.955 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:36:45.958 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:36:45.958 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:36:45.958 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:36:45.958 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:36:45.958 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:36:45.958 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:36:45.958 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:36:45.958 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:36:45.960 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:36:45.960 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:36:45.960 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:36:45.960 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:36:45.961 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:36:45.961 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:36:45.961 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:36:45.961 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:36:45.963 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:36:45.963 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:36:45.963 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:36:45.963 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:36:45.963 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:36:45.963 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:36:45.964 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:36:45.964 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:36:45.967 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:36:45.967 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:36:45.967 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:36:45.967 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:36:45.967 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:36:45.967 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:36:45.967 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:36:45.967 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:36:45.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:36:45.967 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:36:45.967 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:36:45.967 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:36:45.968 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:36:45.968 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:36:45.968 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:36:45.968 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:36:45.968 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:36:45.968 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:36:45.968 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:36:45.968 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:36:45.968 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:36:45.968 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:36:45.968 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:36:45.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:36:45.968 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:36:45.968 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:36:45.968 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:36:45.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:36:45.968 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:36:45.968 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:36:45.968 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:36:45.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:36:45.968 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:36:45.968 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:36:45.968 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:36:45.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:36:45.968 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:36:45.969 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:36:45.969 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:36:45.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:36:45.969 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:36:45.969 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:36:45.969 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:36:45.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:36:45.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:36:45.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:36:45.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:36:45.973 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:36:46.455 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:36:46.494 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:36:46.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:46.496 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:36:46.497 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:36:46.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:46.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:46.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:46.538 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:46.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:46.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:46.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:46.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:46.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:46.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:46.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:46.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:46.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:46.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:46.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:46.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:46.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:46.572 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:46.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:46.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:46.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:46.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:46.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:46.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:46.588 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:36:46.588 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:36:46.588 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:36:46.588 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:36:46.591 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:36:46.591 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:36:46.591 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:36:46.591 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:36:46.591 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:36:46.591 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:36:46.591 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:36:51.592 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:36:51.592 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:36:51.594 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:36:51.594 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:36:51.594 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:36:51.595 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:36:51.603 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:36:51.605 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:36:51.605 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:36:51.605 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:36:51.605 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:36:51.607 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:36:51.608 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:36:51.608 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:36:51.608 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:36:51.608 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:36:51.609 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:36:51.609 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:36:51.609 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:36:51.610 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:36:51.610 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:36:51.610 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:36:51.611 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:36:51.611 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:36:51.611 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:36:51.611 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:36:51.611 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:36:51.612 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:36:51.612 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:36:51.612 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:36:51.612 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:36:51.613 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:36:51.613 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:36:51.613 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:36:51.613 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:36:51.615 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:36:51.615 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:36:51.615 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:36:51.615 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:36:51.615 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:36:51.615 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:36:51.615 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:36:51.615 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:36:51.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:36:51.615 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:36:51.615 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:36:51.615 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:36:51.616 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:36:51.616 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:36:51.616 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:36:51.616 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:36:51.616 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:36:51.616 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:36:51.616 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:36:51.616 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:36:51.616 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:36:51.616 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:36:51.616 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:36:51.616 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:36:51.616 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:36:51.616 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:36:51.616 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:36:51.616 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:36:51.616 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:36:51.616 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:36:51.616 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:36:51.616 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:36:51.616 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:36:51.616 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:36:51.616 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:36:51.616 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:36:51.616 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:36:51.616 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:36:51.616 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:36:51.616 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:36:51.616 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:36:51.617 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:36:51.617 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:36:51.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:36:51.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:36:51.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:36:51.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:36:51.620 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:36:52.104 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:36:52.132 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:36:52.133 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:36:52.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:52.134 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:36:52.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:36:52.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:52.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:52.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:52.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:52.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:52.165 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:52.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:52.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:52.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:52.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:52.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:52.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:52.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:52.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:52.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:52.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:52.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:52.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:52.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:52.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:52.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:52.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:52.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:52.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:52.210 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:36:52.210 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:36:52.210 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:36:52.210 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:36:52.211 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:36:52.211 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:36:52.211 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:36:52.211 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:36:52.211 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:36:52.211 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:36:52.212 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:36:52.212 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=127 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:36:52.212 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=127 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:36:52.212 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=127 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:36:52.212 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=127 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:36:52.212 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=127 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:36:52.212 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=127 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:36:52.212 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=127 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:36:57.222 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:36:57.222 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:36:57.222 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:36:57.222 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:36:57.223 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:36:57.223 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:36:57.230 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:36:57.232 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:36:57.232 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:36:57.233 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:36:57.233 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:36:57.236 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:36:57.237 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:36:57.237 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:36:57.237 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:36:57.237 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:36:57.237 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:36:57.237 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:36:57.237 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:36:57.240 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:36:57.240 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:36:57.240 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:36:57.240 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:36:57.241 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:36:57.241 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:36:57.241 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:36:57.241 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:36:57.242 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:36:57.243 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:36:57.243 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:36:57.243 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:36:57.243 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:36:57.243 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:36:57.243 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:36:57.243 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:36:57.246 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:36:57.246 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:36:57.246 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:36:57.246 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:36:57.246 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:36:57.246 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:36:57.246 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:36:57.246 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:36:57.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:36:57.246 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:36:57.246 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:36:57.246 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:36:57.246 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:36:57.246 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:36:57.246 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:36:57.246 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:36:57.246 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:36:57.246 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:36:57.247 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:36:57.247 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:36:57.247 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:36:57.247 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:36:57.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:36:57.247 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:36:57.247 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:36:57.247 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:36:57.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:36:57.247 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:36:57.247 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:36:57.247 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:36:57.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:36:57.247 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:36:57.247 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:36:57.247 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:36:57.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:36:57.247 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:36:57.247 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:36:57.247 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:36:57.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:36:57.248 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:36:57.248 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:36:57.248 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:36:57.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:36:57.248 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:36:57.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:36:57.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:36:57.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:36:57.251 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:36:57.735 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:36:57.778 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:36:57.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:57.782 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:36:57.786 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:36:57.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:36:57.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:57.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:57.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:57.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:57.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:57.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:57.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:57.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:57.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:57.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:57.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:57.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:57.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:57.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:57.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:57.863 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:57.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:57.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:57.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:57.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:57.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:57.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:57.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:57.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:57.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:57.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:57.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:57.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:57.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:57.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:57.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:57.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:57.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:57.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:57.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:57.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:57.905 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:57.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:57.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:57.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:57.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:57.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:57.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:57.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:57.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:57.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:57.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:57.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:36:57.921 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:36:57.921 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:36:57.921 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:36:57.921 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:36:57.923 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:36:57.923 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:36:57.923 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:36:57.923 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:36:57.923 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:36:57.923 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:36:57.923 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:37:02.926 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:37:02.926 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:37:02.929 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:37:02.929 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:37:02.929 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:37:02.929 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:37:02.938 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:37:02.940 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:37:02.940 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:37:02.940 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:37:02.941 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:37:02.945 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:37:02.945 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:37:02.945 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:37:02.946 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:37:02.946 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:37:02.946 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:37:02.947 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:37:02.947 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:37:02.948 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:37:02.949 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:37:02.949 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:37:02.949 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:37:02.949 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:37:02.950 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:37:02.950 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:37:02.950 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:37:02.951 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:37:02.951 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:37:02.951 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:37:02.952 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:37:02.952 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:37:02.952 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:37:02.952 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:37:02.952 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:37:02.955 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:37:02.955 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:37:02.955 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:37:02.955 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:37:02.955 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:37:02.955 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:37:02.955 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:37:02.955 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:37:02.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:37:02.955 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:37:02.955 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:37:02.955 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:37:02.955 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:37:02.955 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:37:02.955 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:37:02.955 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:37:02.955 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:37:02.955 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:37:02.955 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:37:02.956 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:37:02.956 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:37:02.956 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:37:02.956 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:37:02.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:37:02.956 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:37:02.956 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:37:02.956 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:37:02.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:37:02.956 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:37:02.956 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:37:02.956 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:37:02.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:37:02.956 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:37:02.956 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:37:02.956 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:37:02.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:37:02.956 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:37:02.956 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:37:02.956 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:37:02.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:37:02.956 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:37:02.957 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:37:02.957 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:37:02.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:37:02.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:37:02.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:37:02.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:37:02.960 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:37:03.444 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:37:03.477 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:37:03.477 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:37:03.478 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:37:03.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:37:03.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:37:03.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:37:03.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:37:03.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:37:03.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:37:03.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:37:03.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:37:03.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:37:03.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:37:03.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:37:03.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:37:03.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:37:03.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:37:03.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:37:03.529 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:37:03.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:37:03.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:37:03.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:37:03.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:37:03.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:37:03.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:37:03.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:37:03.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:37:03.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:37:03.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:37:03.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:37:03.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:37:03.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:37:03.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:37:03.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:37:03.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:37:03.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:37:03.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:37:03.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:37:03.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:37:03.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:37:03.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:37:03.572 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:37:03.572 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:37:03.572 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:37:03.572 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:37:03.574 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:37:03.574 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:37:03.574 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:37:03.575 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:37:03.575 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:37:03.575 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:37:03.575 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:37:03.575 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=132 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:37:03.575 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=132 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:37:03.575 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=132 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:37:03.575 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=132 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:37:03.575 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=132 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:37:03.575 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=132 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:37:08.577 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:37:08.577 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:37:08.580 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:37:08.580 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:37:08.580 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:37:08.580 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:37:08.589 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:37:08.591 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:37:08.591 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:37:08.591 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:37:08.591 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:37:08.595 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:37:08.595 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:37:08.595 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:37:08.595 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:37:08.596 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:37:08.596 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:37:08.596 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:37:08.596 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:37:08.598 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:37:08.598 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:37:08.598 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:37:08.598 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:37:08.598 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:37:08.598 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:37:08.599 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:37:08.599 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:37:08.601 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:37:08.601 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:37:08.601 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:37:08.601 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:37:08.601 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:37:08.601 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:37:08.602 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:37:08.602 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:37:08.605 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:37:08.605 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:37:08.605 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:37:08.605 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:37:08.605 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:37:08.605 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:37:08.605 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:37:08.605 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:37:08.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:37:08.606 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:37:08.606 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:37:08.606 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:37:08.606 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:37:08.606 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:37:08.606 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:37:08.606 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:37:08.606 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:37:08.606 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:37:08.606 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:37:08.606 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:37:08.606 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:37:08.606 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:37:08.606 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:37:08.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:37:08.607 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:37:08.607 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:37:08.607 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:37:08.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:37:08.607 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:37:08.607 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:37:08.607 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:37:08.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:37:08.607 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:37:08.607 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:37:08.607 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:37:08.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:37:08.607 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:37:08.607 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:37:08.607 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:37:08.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:37:08.607 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:37:08.607 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:37:08.607 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:37:08.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:37:08.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:37:08.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:37:08.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:37:08.611 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:37:09.096 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:37:09.133 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:37:09.134 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:37:09.134 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:37:09.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:37:09.136 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:37:09.136 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:37:09.137 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:37:09.137 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:37:09.137 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:37:09.137 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:37:09.137 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:37:09.137 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:37:09.573 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:37:09.609 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:37:09.610 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:37:09.611 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:37:09.615 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:37:10.051 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:37:10.529 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:37:10.610 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:37:10.611 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:37:10.612 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:37:10.616 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:37:11.007 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:37:11.485 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:37:11.611 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:37:11.611 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:37:11.614 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:37:11.618 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:37:11.963 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:37:12.441 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:37:12.612 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:37:12.612 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:37:12.613 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:37:12.613 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:37:12.621 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:37:12.622 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:37:12.622 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:37:12.631 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:37:12.633 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:37:12.633 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:37:12.633 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:37:12.633 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:37:12.633 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:37:12.633 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:37:12.634 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:37:12.634 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=856 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:37:12.634 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=856 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:37:12.634 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=856 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:37:12.634 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=856 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:37:12.634 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=856 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:37:12.635 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=856 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:37:12.635 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=857 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:37:12.635 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=857 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:37:12.635 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=857 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:37:12.635 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=857 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:37:12.635 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=857 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:37:12.635 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=857 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:37:12.635 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=857 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:37:12.635 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=857 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:37:12.635 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=858 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:37:12.636 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=858 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:37:12.636 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=858 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:37:12.636 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=858 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:37:12.636 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=858 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:37:12.636 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=858 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:37:12.636 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=858 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:37:12.636 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=858 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:37:12.636 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=859 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:37:12.636 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=859 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:37:12.636 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=859 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:37:12.636 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=859 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:37:12.636 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=859 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:37:12.636 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=859 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:37:12.636 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=859 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:37:12.637 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=859 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:37:17.630 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:37:17.630 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:37:17.630 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:37:17.630 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:37:17.630 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:37:17.630 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:37:17.634 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:37:17.634 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:37:17.634 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:37:17.634 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:37:17.634 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:37:17.636 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:37:17.636 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:37:17.636 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:37:17.636 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:37:17.636 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:37:17.637 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:37:17.637 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:37:17.637 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:37:17.638 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:37:17.638 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:37:17.638 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:37:17.638 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:37:17.638 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:37:17.638 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:37:17.638 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:37:17.638 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:37:17.639 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:37:17.640 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:37:17.640 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:37:17.640 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:37:17.640 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:37:17.640 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:37:17.640 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:37:17.640 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:37:17.642 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:37:17.642 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:37:17.642 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:37:17.642 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:37:17.642 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:37:17.642 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:37:17.642 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:37:17.642 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:37:17.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:37:17.642 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:37:17.642 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:37:17.642 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:37:17.642 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:37:17.642 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:37:17.642 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:37:17.642 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:37:17.642 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:37:17.642 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:37:17.642 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:37:17.642 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:37:17.642 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:37:17.642 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:37:17.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:37:17.643 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:37:17.643 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:37:17.643 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:37:17.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:37:17.643 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:37:17.643 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:37:17.643 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:37:17.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:37:17.643 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:37:17.643 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:37:17.643 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:37:17.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:37:17.643 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:37:17.643 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:37:17.643 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:37:17.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:37:17.643 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:37:17.643 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:37:17.643 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:37:17.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:37:17.643 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:37:17.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:37:17.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:37:17.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:37:17.647 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:37:18.130 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:37:18.166 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:37:18.168 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:37:18.170 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:37:18.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:37:18.192 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:37:18.192 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:37:18.193 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:37:18.197 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:37:18.198 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:37:18.198 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:37:18.199 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:37:18.199 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:37:18.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD HANDOVER
2026-01-09 02:37:18.233 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:37:18.234 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:37:18.234 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:37:18.235 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:37:18.608 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:37:18.645 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:37:18.646 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:37:18.647 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:37:18.648 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:37:18.731 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:37:18.731 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:37:18.731 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:37:18.731 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:37:18.732 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:37:18.732 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:37:18.732 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:37:18.732 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:37:18.732 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:37:18.745 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:37:18.749 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:37:18.749 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:37:18.762 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:37:18.762 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:37:18.763 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:37:18.763 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:37:18.771 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:37:18.771 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:37:18.771 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:37:18.771 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:37:18.771 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:37:18.771 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:37:18.771 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:37:18.771 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=240 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:37:18.771 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=240 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:37:18.771 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=240 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:37:18.771 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=240 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:37:18.771 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=240 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:37:18.771 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=240 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:37:18.771 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=241 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:37:18.771 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=241 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:37:18.771 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=241 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:37:18.771 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=241 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:37:18.771 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=241 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:37:18.771 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=241 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:37:18.771 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=241 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:37:18.771 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=241 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:37:23.763 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:37:23.764 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:37:23.765 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:37:23.765 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:37:23.766 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:37:23.766 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:37:23.776 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:37:23.777 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:37:23.778 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:37:23.778 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:37:23.778 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:37:23.782 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:37:23.783 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:37:23.783 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:37:23.783 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:37:23.783 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:37:23.784 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:37:23.784 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:37:23.784 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:37:23.785 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:37:23.786 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:37:23.786 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:37:23.786 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:37:23.786 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:37:23.786 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:37:23.786 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:37:23.786 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:37:23.788 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:37:23.788 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:37:23.788 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:37:23.788 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:37:23.788 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:37:23.788 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:37:23.788 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:37:23.788 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:37:23.791 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:37:23.791 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:37:23.791 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:37:23.791 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:37:23.791 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:37:23.791 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:37:23.791 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:37:23.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:37:23.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:37:23.792 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:37:23.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:37:23.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:37:23.792 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:37:23.792 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:37:23.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:37:23.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:37:23.792 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:37:23.792 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:37:23.792 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:37:23.792 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:37:23.792 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:37:23.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:37:23.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:37:23.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:37:23.792 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:37:23.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:37:23.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:37:23.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:37:23.792 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:37:23.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:37:23.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:37:23.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:37:23.792 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:37:23.793 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:37:23.793 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:37:23.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:37:23.793 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:37:23.793 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:37:23.793 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:37:23.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:37:23.793 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:37:23.793 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:37:23.793 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:37:23.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:37:23.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:37:23.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:37:23.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:37:23.797 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:37:24.280 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:37:24.313 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:37:24.315 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:37:24.316 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:37:24.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:37:24.339 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:37:24.339 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:37:24.339 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:37:24.343 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:37:24.343 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:37:24.344 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:37:24.344 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:37:24.344 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:37:24.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD HANDOVER
2026-01-09 02:37:24.382 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:37:24.383 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:37:24.383 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:37:24.383 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:37:24.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:37:24.496 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:37:24.496 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:37:24.496 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:37:24.496 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:37:24.497 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:37:24.497 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:37:24.497 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:37:24.497 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:37:24.497 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:37:24.750 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:37:24.794 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:37:24.794 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:37:24.795 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:37:24.796 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:37:25.219 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:37:25.695 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:37:25.795 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:37:25.796 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:37:25.796 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:37:25.797 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:37:26.173 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:37:26.650 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:37:26.796 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:37:26.797 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:37:26.797 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:37:26.798 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:37:27.129 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:37:27.607 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:37:27.797 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:37:27.798 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:37:27.798 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:37:27.799 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:37:28.086 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:37:28.564 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 02:37:28.798 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:37:28.799 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:37:28.799 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:37:28.799 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:37:29.042 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 02:37:29.520 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 02:37:29.999 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 02:37:30.477 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 02:37:30.954 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 02:37:31.433 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 02:37:31.911 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 02:37:32.389 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 02:37:32.867 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 02:37:33.346 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 02:37:33.824 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 02:37:34.302 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 02:37:34.780 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 02:37:35.258 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 02:37:35.736 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 02:37:36.214 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 02:37:36.692 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-09 02:37:37.171 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-09 02:37:37.648 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-09 02:37:38.127 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-09 02:37:38.604 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-09 02:37:39.083 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-09 02:37:39.561 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-09 02:37:39.857 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:37:39.858 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:37:39.858 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:37:39.858 [WARNING] transceiver.py:250 (MS@172.18.122.22:6700) RX TRXD message (fn=3432 tn=4 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:37:39.858 [WARNING] transceiver.py:250 (MS@172.18.122.22:6700) RX TRXD message (fn=3432 tn=5 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:37:39.859 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:37:39.878 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:37:39.878 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:37:39.878 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:37:39.878 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:37:39.878 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:37:39.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:37:39.887 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:37:39.887 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:37:39.893 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:37:39.894 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:37:39.894 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:37:39.894 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:37:39.895 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:37:39.895 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:37:39.895 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:37:39.895 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:37:39.895 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:37:39.895 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:37:39.895 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:37:39.896 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3440 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:37:39.896 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3440 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:37:44.898 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:37:44.898 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:37:44.901 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:37:44.901 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:37:44.901 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:37:44.901 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:37:44.910 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:37:44.912 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:37:44.912 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:37:44.912 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:37:44.913 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:37:44.917 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:37:44.917 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:37:44.918 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:37:44.918 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:37:44.918 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:37:44.918 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:37:44.918 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:37:44.918 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:37:44.921 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:37:44.921 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:37:44.922 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:37:44.922 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:37:44.922 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:37:44.922 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:37:44.923 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:37:44.923 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:37:44.924 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:37:44.924 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:37:44.924 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:37:44.924 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:37:44.925 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:37:44.925 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:37:44.925 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:37:44.925 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:37:44.927 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:37:44.928 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:37:44.928 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:37:44.928 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:37:44.928 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:37:44.928 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:37:44.928 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:37:44.928 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:37:44.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:37:44.928 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:37:44.928 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:37:44.928 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:37:44.928 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:37:44.928 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:37:44.928 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:37:44.928 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:37:44.928 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:37:44.928 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:37:44.928 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:37:44.929 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:37:44.929 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:37:44.929 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:37:44.929 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:37:44.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:37:44.929 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:37:44.929 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:37:44.929 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:37:44.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:37:44.929 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:37:44.929 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:37:44.929 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:37:44.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:37:44.929 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:37:44.929 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:37:44.929 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:37:44.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:37:44.929 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:37:44.929 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:37:44.929 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:37:44.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:37:44.929 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:37:44.929 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:37:44.930 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:37:44.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:37:44.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:37:44.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:37:44.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:37:44.933 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:37:45.417 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:37:45.449 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:37:45.451 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:37:45.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:37:45.452 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:37:45.463 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:37:45.463 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:37:45.464 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:37:45.467 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:37:45.467 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:37:45.467 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:37:45.467 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:37:45.467 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:37:45.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD HANDOVER
2026-01-09 02:37:45.518 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:37:45.518 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:37:45.518 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:37:45.518 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:37:45.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:37:45.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD HANDOVER
2026-01-09 02:37:45.811 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:37:45.811 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:37:45.811 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:37:45.812 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:37:45.812 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:37:45.812 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:37:45.812 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:37:45.812 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:37:45.812 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:37:45.835 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:37:45.838 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:37:45.838 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:37:45.851 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:37:45.851 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:37:45.851 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:37:45.851 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:37:45.860 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:37:45.861 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:37:45.861 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:37:45.861 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:37:45.861 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:37:45.861 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:37:45.861 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:37:45.862 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=197 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:37:45.863 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=197 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:37:50.855 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:37:50.856 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:37:50.858 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:37:50.860 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:37:50.860 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:37:50.860 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:37:50.868 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:37:50.869 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:37:50.869 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:37:50.870 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:37:50.870 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:37:50.873 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:37:50.873 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:37:50.874 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:37:50.874 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:37:50.874 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:37:50.874 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:37:50.874 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:37:50.874 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:37:50.876 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:37:50.876 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:37:50.876 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:37:50.876 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:37:50.876 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:37:50.876 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:37:50.876 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:37:50.876 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:37:50.878 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:37:50.879 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:37:50.879 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:37:50.879 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:37:50.879 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:37:50.879 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:37:50.879 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:37:50.879 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:37:50.881 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:37:50.881 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:37:50.881 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:37:50.881 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:37:50.881 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:37:50.881 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:37:50.881 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:37:50.882 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:37:50.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:37:50.882 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:37:50.882 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:37:50.882 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:37:50.882 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:37:50.882 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:37:50.882 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:37:50.882 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:37:50.882 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:37:50.882 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:37:50.882 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:37:50.882 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:37:50.882 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:37:50.882 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:37:50.882 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:37:50.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:37:50.882 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:37:50.882 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:37:50.882 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:37:50.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:37:50.882 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:37:50.882 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:37:50.883 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:37:50.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:37:50.883 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:37:50.883 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:37:50.883 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:37:50.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:37:50.883 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:37:50.883 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:37:50.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:37:50.883 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:37:50.883 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:37:50.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:37:50.883 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:37:50.883 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:37:50.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:37:50.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:37:50.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:37:50.887 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:37:51.371 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:37:51.400 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:37:51.401 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:37:51.401 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:37:51.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:37:51.412 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:37:51.412 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:37:51.412 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:37:51.415 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:37:51.415 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:37:51.415 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:37:51.415 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:37:51.415 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:37:51.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD HANDOVER
2026-01-09 02:37:51.469 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:37:51.470 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:37:51.470 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:37:51.471 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:37:51.849 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:37:51.885 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:37:51.885 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:37:51.885 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:37:51.887 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:37:52.327 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:37:52.805 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:37:52.886 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:37:52.887 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:37:52.887 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:37:52.888 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:37:53.284 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:37:53.475 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:37:53.476 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:37:53.476 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:37:53.476 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:37:53.493 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:37:53.493 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:37:53.493 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:37:53.493 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:37:53.493 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:37:53.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:37:53.521 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:37:53.521 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:37:53.530 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:37:53.530 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:37:53.530 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:37:53.530 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:37:53.531 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:37:53.532 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:37:53.532 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:37:53.532 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:37:53.532 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:37:53.532 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:37:53.532 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:37:53.532 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=565 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:37:53.532 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=565 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:37:53.532 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=565 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:37:58.531 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:37:58.531 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:37:58.532 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:37:58.532 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:37:58.532 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:37:58.533 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:37:58.537 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:37:58.537 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:37:58.537 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:37:58.537 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:37:58.537 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:37:58.538 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:37:58.538 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:37:58.538 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:37:58.538 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:37:58.538 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:37:58.538 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:37:58.538 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:37:58.538 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:37:58.539 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:37:58.539 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:37:58.539 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:37:58.539 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:37:58.539 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:37:58.539 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:37:58.539 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:37:58.539 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:37:58.540 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:37:58.540 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:37:58.540 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:37:58.540 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:37:58.540 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:37:58.540 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:37:58.540 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:37:58.540 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:37:58.541 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:37:58.541 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:37:58.541 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:37:58.542 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:37:58.542 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:37:58.542 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:37:58.542 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:37:58.542 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:37:58.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:37:58.542 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:37:58.542 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:37:58.542 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:37:58.542 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:37:58.542 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:37:58.542 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:37:58.542 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:37:58.542 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:37:58.542 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:37:58.542 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:37:58.542 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:37:58.542 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:37:58.542 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:37:58.542 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:37:58.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:37:58.542 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:37:58.542 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:37:58.542 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:37:58.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:37:58.542 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:37:58.542 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:37:58.542 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:37:58.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:37:58.542 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:37:58.542 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:37:58.542 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:37:58.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:37:58.542 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:37:58.542 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:37:58.542 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:37:58.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:37:58.543 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:37:58.543 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:37:58.543 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:37:58.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:37:58.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:37:58.543 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:37:58.543 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:37:58.543 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:37:58.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:37:58.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:37:58.543 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:37:58.543 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:37:58.543 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:37:58.543 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:38:03.544 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:38:03.545 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:38:03.545 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:38:03.545 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:38:03.546 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:38:03.546 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:38:03.549 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:38:03.550 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:38:03.550 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:38:03.550 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:38:03.550 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:38:03.551 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:38:03.551 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:38:03.551 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:38:03.551 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:38:03.551 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:38:03.551 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:38:03.551 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:38:03.551 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:38:03.552 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:38:03.552 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:38:03.552 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:38:03.552 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:38:03.552 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:38:03.552 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:38:03.552 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:38:03.552 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:38:03.553 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:38:03.553 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:38:03.553 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:38:03.553 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:38:03.553 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:38:03.553 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:38:03.553 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:38:03.553 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:38:03.554 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:38:03.554 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:38:03.554 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:38:03.554 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:38:03.554 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:38:03.554 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:38:03.554 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:38:03.554 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:38:03.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:38:03.555 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:38:03.555 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:38:03.555 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:38:03.555 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:38:03.555 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:38:03.555 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:38:03.555 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:38:03.555 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:38:03.555 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:38:03.555 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:38:03.555 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:38:03.555 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:38:03.555 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:38:03.555 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:38:03.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:38:03.555 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:38:03.555 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:38:03.555 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:38:03.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:38:03.555 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:38:03.555 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:38:03.555 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:38:03.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:38:03.555 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:38:03.555 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:38:03.555 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:38:03.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:38:03.555 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:38:03.555 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:38:03.555 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:38:03.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:38:03.555 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:38:03.555 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:38:03.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:38:03.555 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:38:03.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:38:03.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:38:03.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:38:03.556 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:38:03.556 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:38:03.556 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:38:03.556 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:38:03.556 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:38:03.556 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:38:03.556 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:38:08.538 [INFO] transceiver.py:125 Init transceiver 'BTS@172.18.122.20:5700'
2026-01-09 02:38:08.538 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5702 <-> R:172.18.122.20:5802)
2026-01-09 02:38:08.538 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5701 <-> R:172.18.122.20:5801)
2026-01-09 02:38:08.538 [INFO] transceiver.py:125 Init transceiver 'MS@172.18.122.22:6700'
2026-01-09 02:38:08.538 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:6702 <-> R:172.18.122.22:6802)
2026-01-09 02:38:08.538 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:6701 <-> R:172.18.122.22:6801)
2026-01-09 02:38:08.538 [INFO] transceiver.py:125 Init transceiver 'TRX1@172.18.122.20:5700/1'
2026-01-09 02:38:08.538 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5704 <-> R:172.18.122.20:5804)
2026-01-09 02:38:08.538 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5703 <-> R:172.18.122.20:5803)
2026-01-09 02:38:08.538 [INFO] transceiver.py:125 Init transceiver 'TRX2@172.18.122.20:5700/2'
2026-01-09 02:38:08.538 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5706 <-> R:172.18.122.20:5806)
2026-01-09 02:38:08.538 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5705 <-> R:172.18.122.20:5805)
2026-01-09 02:38:08.538 [INFO] transceiver.py:125 Init transceiver 'TRX3@172.18.122.20:5700/3'
2026-01-09 02:38:08.538 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5708 <-> R:172.18.122.20:5808)
2026-01-09 02:38:08.538 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5707 <-> R:172.18.122.20:5807)
2026-01-09 02:38:08.538 [INFO] fake_trx.py:424 Init complete
2026-01-09 02:38:08.538 [INFO] fake_trx.py:455 Setting real time process scheduler to SCHED_RR, priority 30
2026-01-09 02:38:10.108 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:38:10.108 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:38:10.108 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:38:10.109 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:38:10.109 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:38:10.109 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:38:21.180 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:38:21.180 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:38:21.180 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:38:21.180 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:38:26.189 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:38:26.189 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:38:26.189 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:38:26.189 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:38:26.190 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:38:26.193 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:38:26.211 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:38:26.212 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:38:26.212 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:38:26.212 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:38:31.220 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:38:31.220 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:38:31.220 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:38:31.221 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:38:31.223 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:38:31.224 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:38:31.247 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:38:31.247 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:38:31.247 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:38:31.247 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:38:36.256 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:38:36.256 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:38:36.256 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:38:36.256 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:38:36.259 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:38:36.262 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:38:36.286 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:38:36.286 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:38:36.286 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:38:36.287 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:38:41.296 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:38:41.296 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:38:41.296 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:38:41.297 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:38:41.297 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:38:41.298 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:38:41.318 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:38:41.318 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:38:41.318 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:38:41.318 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:38:46.327 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:38:46.328 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:38:46.328 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:38:46.328 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:38:46.330 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:38:46.332 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:38:46.354 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:38:46.354 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:38:46.354 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:38:46.354 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:38:51.364 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:38:51.364 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:38:51.364 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:38:51.364 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:38:51.366 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:38:51.368 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:38:51.390 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:38:51.390 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:38:51.390 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:38:51.390 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:38:56.398 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:38:56.398 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:38:56.398 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:38:56.398 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:38:56.400 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:38:56.403 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:38:56.426 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:38:56.426 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:38:56.426 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:38:56.426 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:39:01.437 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:39:01.438 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:39:01.438 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:39:01.438 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:39:01.438 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:39:01.438 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:39:01.453 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:39:01.453 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:39:01.453 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:39:01.453 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:39:06.462 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:39:06.463 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:39:06.463 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:39:06.463 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:39:06.465 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:39:06.467 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:39:06.488 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:39:06.488 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:39:06.488 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:39:06.488 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:39:11.498 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:39:11.499 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:39:11.501 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:39:11.502 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:39:11.503 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:39:11.503 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:39:11.520 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:39:11.520 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:39:11.520 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:39:11.520 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:39:11.520 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:39:11.520 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:39:11.520 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:39:11.521 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:39:11.521 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:39:11.521 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:39:11.521 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:39:11.521 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:39:11.521 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:39:11.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:39:11.521 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:39:11.521 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 0 -> 1
2026-01-09 02:39:11.521 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:39:11.521 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 0 -> 1
2026-01-09 02:39:11.521 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:39:11.521 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 0 -> 1
2026-01-09 02:39:11.521 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:39:11.521 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:39:11.521 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 0 -> 1
2026-01-09 02:39:11.525 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:39:11.525 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:39:11.525 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:39:11.525 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:39:16.534 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:39:16.534 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:39:16.534 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:39:16.534 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:39:16.536 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:39:16.538 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:39:16.560 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:39:16.560 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:39:16.560 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:39:16.560 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:39:21.570 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:39:21.570 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:39:21.574 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:39:21.574 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:39:21.574 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:39:21.574 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:39:21.574 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:39:21.574 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:39:21.574 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:39:21.574 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:39:21.597 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:39:21.597 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:39:21.598 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:39:21.598 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:39:26.607 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:39:26.607 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:39:26.607 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:39:26.608 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:39:26.610 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:39:26.612 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:39:26.633 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:39:26.633 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:39:26.633 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:39:26.633 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:39:31.646 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:39:31.647 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:39:31.647 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:39:31.647 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:39:31.647 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:39:31.647 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:39:31.668 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:39:31.668 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:39:31.668 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:39:31.668 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:39:36.678 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:39:36.678 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:39:36.678 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:39:36.678 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:39:36.680 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:39:36.682 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:39:36.707 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:39:36.707 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:39:36.707 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:39:36.707 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:39:41.716 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:39:41.716 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:39:41.716 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:39:41.716 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:39:41.718 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:39:41.721 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:39:41.745 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:39:41.745 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:39:41.745 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:39:41.745 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:39:48.677 [INFO] transceiver.py:125 Init transceiver 'BTS@172.18.122.20:5700'
2026-01-09 02:39:48.677 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5702 <-> R:172.18.122.20:5802)
2026-01-09 02:39:48.677 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5701 <-> R:172.18.122.20:5801)
2026-01-09 02:39:48.677 [INFO] transceiver.py:125 Init transceiver 'MS@172.18.122.22:6700'
2026-01-09 02:39:48.677 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:6702 <-> R:172.18.122.22:6802)
2026-01-09 02:39:48.677 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:6701 <-> R:172.18.122.22:6801)
2026-01-09 02:39:48.677 [INFO] transceiver.py:125 Init transceiver 'TRX1@172.18.122.20:5700/1'
2026-01-09 02:39:48.677 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5704 <-> R:172.18.122.20:5804)
2026-01-09 02:39:48.677 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5703 <-> R:172.18.122.20:5803)
2026-01-09 02:39:48.677 [INFO] transceiver.py:125 Init transceiver 'TRX2@172.18.122.20:5700/2'
2026-01-09 02:39:48.677 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5706 <-> R:172.18.122.20:5806)
2026-01-09 02:39:48.677 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5705 <-> R:172.18.122.20:5805)
2026-01-09 02:39:48.677 [INFO] transceiver.py:125 Init transceiver 'TRX3@172.18.122.20:5700/3'
2026-01-09 02:39:48.677 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5708 <-> R:172.18.122.20:5808)
2026-01-09 02:39:48.677 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5707 <-> R:172.18.122.20:5807)
2026-01-09 02:39:48.677 [INFO] fake_trx.py:424 Init complete
2026-01-09 02:39:48.677 [INFO] fake_trx.py:455 Setting real time process scheduler to SCHED_RR, priority 30
2026-01-09 02:39:50.199 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:39:50.200 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:39:50.200 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:39:50.200 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:39:50.200 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:39:50.200 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:39:53.214 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:39:53.216 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:39:53.216 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:39:53.216 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:39:53.216 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 0 -> 1
2026-01-09 02:39:53.217 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:39:53.218 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:39:53.218 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:39:53.218 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:39:53.219 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:39:53.219 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:39:53.220 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:39:53.220 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 0 -> 1
2026-01-09 02:39:53.222 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:39:53.223 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:39:53.223 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:39:53.223 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:39:53.223 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:39:53.223 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:39:53.224 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:39:53.224 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 0 -> 1
2026-01-09 02:39:53.226 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:39:53.227 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:39:53.227 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:39:53.227 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:39:53.227 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:39:53.227 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:39:53.227 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:39:53.227 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 0 -> 1
2026-01-09 02:39:53.230 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:39:53.230 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:39:53.230 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:39:53.230 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:39:53.230 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:39:53.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:39:53.231 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:39:53.231 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:39:53.231 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:39:53.231 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:39:53.231 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:39:53.231 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:39:53.232 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:39:53.232 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:39:53.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:39:53.232 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:39:53.232 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:39:53.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:39:53.232 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:39:53.232 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:39:53.232 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:39:53.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:39:53.232 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:39:53.232 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:39:53.232 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:39:53.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:39:53.232 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:39:53.233 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:39:53.233 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:39:53.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:39:53.233 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:39:53.233 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:39:53.233 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:39:53.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:39:53.233 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:39:53.233 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:39:53.233 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:39:53.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:39:53.233 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:39:53.233 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:39:53.233 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:39:53.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:39:53.233 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:39:53.233 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:39:53.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:39:53.233 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:39:53.233 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:39:53.236 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:39:53.714 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:39:53.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:39:53.767 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:39:53.770 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:39:53.770 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:39:53.780 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:39:53.780 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:39:53.780 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:39:53.782 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:39:53.783 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:39:53.783 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:39:53.783 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:39:53.783 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:39:53.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:39:53.986 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:39:53.987 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:39:53.987 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:39:53.987 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:39:54.191 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:39:54.236 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:39:54.237 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:39:54.237 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:39:54.237 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:39:54.391 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:39:54.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:39:54.397 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:39:54.397 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:39:54.418 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:39:54.418 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:39:54.418 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:39:54.420 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:39:54.420 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:39:54.420 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:39:54.420 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:39:54.420 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:39:54.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:39:54.490 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:39:54.491 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:39:54.491 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:39:54.491 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:39:54.669 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:39:54.888 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:39:54.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:39:54.892 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:39:54.893 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:39:54.912 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:39:54.912 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:39:54.912 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:39:54.913 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:39:54.913 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:39:54.913 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:39:54.913 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:39:54.913 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:39:54.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:39:55.147 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:39:55.183 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:39:55.183 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:39:55.183 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:39:55.184 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:39:55.237 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:39:55.238 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:39:55.238 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:39:55.238 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:39:55.583 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:39:55.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:39:55.589 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:39:55.589 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:39:55.608 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:39:55.608 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:39:55.608 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:39:55.609 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:39:55.609 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:39:55.609 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:39:55.610 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:39:55.610 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:39:55.625 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:39:55.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:39:55.689 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:39:55.690 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:39:55.690 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:39:55.690 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:39:56.080 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:39:56.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:39:56.085 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:39:56.085 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:39:56.103 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:39:56.104 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:39:56.105 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:39:56.105 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:39:56.106 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:39:56.106 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:39:56.106 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:39:56.106 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:39:56.106 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:39:56.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:39:56.238 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:39:56.239 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:39:56.239 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:39:56.239 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:39:56.375 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:39:56.375 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:39:56.376 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:39:56.376 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:39:56.581 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:39:57.060 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:39:57.122 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:39:57.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:39:57.126 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:39:57.126 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:39:57.144 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:39:57.144 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:39:57.145 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:39:57.146 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:39:57.146 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:39:57.146 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:39:57.146 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:39:57.146 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:39:57.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:39:57.240 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:39:57.240 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:39:57.240 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:39:57.240 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:39:57.332 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:39:57.332 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-01-09 02:39:57.333 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:39:57.333 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:39:57.535 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:39:58.014 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 02:39:58.155 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:39:58.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:39:58.160 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:39:58.160 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:39:58.160 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:39:58.178 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:39:58.178 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:39:58.178 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:39:58.179 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:39:58.179 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:39:58.180 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:39:58.180 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:39:58.180 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:39:58.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:39:58.286 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:39:58.286 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-01-09 02:39:58.287 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:39:58.287 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:39:58.486 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 02:39:58.695 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:39:58.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:39:58.701 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:39:58.701 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:39:58.701 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:39:58.719 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:39:58.719 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:39:58.719 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:39:58.720 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:39:58.720 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:39:58.720 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:39:58.720 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:39:58.720 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:39:58.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:39:58.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:39:58.960 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 02:39:58.992 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:39:58.992 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:39:58.992 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:39:58.992 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:39:59.439 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 02:39:59.728 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:39:59.730 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:39:59.733 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:39:59.734 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:39:59.748 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:39:59.748 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:39:59.748 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:39:59.749 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:39:59.749 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:39:59.749 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:39:59.750 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:39:59.750 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:39:59.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:39:59.917 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 02:39:59.954 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:39:59.955 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:39:59.955 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:39:59.956 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:40:00.396 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 02:40:00.763 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:40:00.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:00.768 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:40:00.768 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:40:00.777 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:40:00.777 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:40:00.777 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:40:00.778 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:40:00.778 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:40:00.778 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:40:00.778 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:40:00.778 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:40:00.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:40:00.839 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:00.874 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 02:40:00.911 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:40:00.912 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:40:00.912 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:40:00.913 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:40:01.353 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 02:40:01.679 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:40:01.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:01.684 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:40:01.684 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:40:01.702 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:40:01.702 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:40:01.702 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:40:01.703 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:40:01.704 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:40:01.704 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:40:01.704 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:40:01.704 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:40:01.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:01.831 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 02:40:01.868 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:40:01.868 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-09 02:40:01.869 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:40:01.869 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:40:02.310 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 02:40:02.654 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:40:02.655 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:02.659 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:40:02.659 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:40:02.659 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:40:02.672 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:40:02.672 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:40:02.672 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:40:02.674 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:40:02.674 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:40:02.674 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:40:02.674 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:40:02.674 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:40:02.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:02.789 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 02:40:02.826 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:40:02.826 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-09 02:40:02.827 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:40:02.827 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:40:03.201 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:40:03.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:03.207 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:40:03.207 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:40:03.207 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:40:03.226 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:40:03.226 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:40:03.226 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:40:03.227 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:40:03.227 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:40:03.227 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:40:03.227 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:40:03.227 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:40:03.267 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 02:40:03.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:03.332 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:40:03.332 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 02:40:03.332 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:40:03.332 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:40:03.423 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:40:03.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:03.428 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:40:03.428 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:40:03.428 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:40:03.444 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:40:03.444 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:40:03.444 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:40:03.446 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:40:03.446 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:40:03.446 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:40:03.446 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:40:03.446 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:40:03.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:03.539 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:40:03.539 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 02:40:03.540 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:40:03.540 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:40:03.740 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 02:40:03.912 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:40:03.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:03.917 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:40:03.917 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:40:03.917 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:40:03.936 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:40:03.936 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:40:03.936 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:40:03.937 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:40:03.937 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:40:03.937 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:40:03.937 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:40:03.937 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:40:03.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:04.037 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:40:04.038 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 02:40:04.038 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:40:04.038 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:40:04.211 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 02:40:04.401 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:40:04.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:04.405 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:40:04.405 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:40:04.405 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:40:04.423 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:40:04.423 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:40:04.423 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:40:04.424 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:40:04.424 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:40:04.424 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:40:04.424 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:40:04.424 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:40:04.463 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:04.508 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:40:04.508 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 02:40:04.509 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:40:04.509 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:40:04.682 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 02:40:04.890 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:40:04.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:04.894 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:40:04.895 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:40:04.895 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:40:04.904 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:40:04.904 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:40:04.904 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:40:04.905 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:40:04.905 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:40:04.905 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:40:04.905 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:40:04.905 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:40:04.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:04.980 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:40:04.980 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 02:40:04.980 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:40:04.980 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:40:05.070 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:40:05.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:05.074 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:40:05.075 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:40:05.075 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:40:05.094 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:40:05.094 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:40:05.095 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:40:05.096 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:40:05.096 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:40:05.097 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:40:05.097 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:40:05.097 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:40:05.158 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 02:40:05.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:05.222 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:40:05.222 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 02:40:05.222 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:40:05.222 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:40:05.567 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:40:05.569 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:05.571 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:40:05.571 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:40:05.572 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:40:05.591 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:40:05.592 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:40:05.592 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:40:05.593 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:40:05.593 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:40:05.593 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:40:05.593 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:40:05.593 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:40:05.635 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 02:40:05.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:05.700 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:40:05.700 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 02:40:05.700 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:40:05.701 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:40:06.063 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:40:06.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:06.069 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:40:06.069 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:40:06.069 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:40:06.090 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:40:06.090 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:40:06.090 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:40:06.091 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:40:06.091 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:40:06.091 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:40:06.091 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:40:06.091 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:40:06.110 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-09 02:40:06.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:06.170 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:40:06.171 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 02:40:06.171 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:40:06.171 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:40:06.553 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:40:06.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:06.558 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:40:06.559 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:40:06.559 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:40:06.571 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:40:06.572 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:40:06.572 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:40:06.572 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:40:06.579 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:40:06.579 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:40:06.579 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:40:06.579 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:40:06.579 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:40:06.580 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:40:06.580 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:40:06.580 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2856 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:40:06.580 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2856 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:40:11.602 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:40:11.602 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:40:11.604 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:40:11.605 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:40:11.606 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:40:11.606 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:40:11.614 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:40:11.614 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:40:11.614 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:40:11.614 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:40:11.614 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:40:11.615 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:40:11.615 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:40:11.615 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:40:11.615 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:40:11.615 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:40:11.615 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:40:11.615 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:40:11.615 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:40:11.617 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:40:11.617 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:40:11.617 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:40:11.617 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:40:11.617 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:40:11.617 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:40:11.617 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:40:11.617 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:40:11.620 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:40:11.620 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:40:11.620 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:40:11.620 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:40:11.620 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:40:11.620 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:40:11.620 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:40:11.620 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:40:11.623 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:40:11.623 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:40:11.623 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:40:11.624 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:40:11.624 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:40:11.624 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:40:11.624 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:40:11.624 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:40:11.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:40:11.624 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:40:11.624 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:40:11.624 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:40:11.624 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:40:11.624 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:40:11.624 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:40:11.624 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:40:11.624 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:40:11.624 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:40:11.624 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:40:11.625 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:40:11.625 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:40:11.625 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:40:11.625 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:40:11.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:40:11.625 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:40:11.625 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:40:11.625 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:40:11.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:40:11.625 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:40:11.625 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:40:11.625 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:40:11.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:40:11.626 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:40:11.626 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:40:11.626 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:40:11.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:40:11.626 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:40:11.626 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:40:11.626 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:40:11.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:40:11.626 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:40:11.626 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:40:11.626 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:40:11.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:40:11.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:40:11.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:40:11.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:40:11.629 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:40:12.112 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:40:12.152 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:40:12.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.154 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:40:12.154 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:40:12.172 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:40:12.172 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:40:12.172 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:40:12.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.258 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.275 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.301 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.301 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.318 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.322 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.322 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
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2026-01-09 02:40:12.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.544 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.544 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.569 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.572 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.581 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:40:12.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.603 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.616 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.616 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.618 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.618 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.620 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.620 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.623 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.623 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.627 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:40:12.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.628 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:40:12.628 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:40:12.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.631 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:40:12.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.645 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.645 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
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2026-01-09 02:40:12.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.835 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.837 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.837 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.839 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.840 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.840 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.862 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.862 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.863 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.863 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:12.884 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:40:12.884 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:40:12.884 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:40:12.884 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:40:12.888 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:40:12.888 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:40:12.888 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:40:12.888 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:40:12.888 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:40:12.888 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:40:12.888 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:40:12.888 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=272 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:40:12.888 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=272 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:40:12.888 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=272 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:40:12.888 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=272 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:40:17.889 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:40:17.889 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:40:17.891 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:40:17.891 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:40:17.891 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:40:17.892 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:40:17.897 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:40:17.898 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:40:17.898 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:40:17.899 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:40:17.899 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:40:17.901 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:40:17.901 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:40:17.901 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:40:17.901 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:40:17.901 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:40:17.902 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:40:17.902 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:40:17.902 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:40:17.903 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:40:17.903 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:40:17.903 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:40:17.903 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:40:17.904 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:40:17.904 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:40:17.904 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:40:17.904 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:40:17.905 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:40:17.905 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:40:17.905 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:40:17.906 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:40:17.906 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:40:17.906 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:40:17.906 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:40:17.906 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:40:17.908 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:40:17.908 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:40:17.908 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:40:17.908 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:40:17.908 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:40:17.908 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:40:17.908 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:40:17.908 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:40:17.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:40:17.908 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:40:17.908 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:40:17.908 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:40:17.908 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:40:17.908 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:40:17.908 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:40:17.908 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:40:17.908 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:40:17.908 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:40:17.908 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:40:17.909 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:40:17.909 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:40:17.909 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:40:17.909 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:40:17.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:40:17.909 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:40:17.909 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:40:17.909 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:40:17.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:40:17.909 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:40:17.909 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:40:17.909 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:40:17.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:40:17.909 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:40:17.909 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:40:17.909 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:40:17.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:40:17.909 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:40:17.909 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:40:17.909 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:40:17.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:40:17.909 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:40:17.909 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:40:17.909 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:40:17.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:40:17.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:40:17.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:40:17.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:40:17.913 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:40:18.393 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:40:18.437 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:40:18.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:18.441 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:40:18.442 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:40:18.462 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:40:18.462 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:40:18.463 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:40:18.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:18.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:18.479 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:40:18.479 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:40:18.479 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:40:18.479 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:40:18.482 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:40:18.482 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:40:18.482 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:40:18.482 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:40:18.482 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:40:18.482 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:40:18.482 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:40:18.482 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=122 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:40:18.482 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=122 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:40:18.482 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=122 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:40:18.482 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=122 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:40:18.482 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=122 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:40:18.482 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=122 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:40:18.482 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=122 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:40:18.482 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=122 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:40:23.486 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:40:23.486 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:40:23.487 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:40:23.487 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:40:23.487 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:40:23.487 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:40:23.494 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:40:23.496 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:40:23.496 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:40:23.497 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:40:23.497 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:40:23.500 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:40:23.501 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:40:23.501 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:40:23.501 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:40:23.502 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:40:23.502 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:40:23.503 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:40:23.503 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:40:23.504 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:40:23.505 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:40:23.505 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:40:23.505 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:40:23.505 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:40:23.506 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:40:23.506 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:40:23.506 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:40:23.507 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:40:23.508 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:40:23.508 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:40:23.508 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:40:23.508 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:40:23.508 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:40:23.508 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:40:23.508 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:40:23.511 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:40:23.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:40:23.511 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:40:23.511 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:40:23.511 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:40:23.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:40:23.511 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:40:23.511 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:40:23.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:40:23.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:40:23.511 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:40:23.511 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:40:23.512 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:40:23.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:40:23.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:40:23.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:40:23.512 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:40:23.512 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:40:23.512 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:40:23.512 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:40:23.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:40:23.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:40:23.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:40:23.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:40:23.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:40:23.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:40:23.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:40:23.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:40:23.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:40:23.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:40:23.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:40:23.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:40:23.513 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:40:23.513 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:40:23.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:40:23.513 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:40:23.513 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:40:23.513 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:40:23.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:40:23.513 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:40:23.513 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:40:23.513 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:40:23.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:40:23.513 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:40:23.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:40:23.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:40:23.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:40:23.517 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:40:24.001 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:40:24.036 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:40:24.039 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:40:24.040 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:24.041 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:40:24.068 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:40:24.068 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:40:24.069 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:40:24.089 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:40:24.090 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:40:24.090 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:40:24.090 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:40:24.092 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:40:24.092 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:40:24.092 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:40:24.092 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:40:24.092 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:40:24.092 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:40:24.092 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:40:24.093 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=122 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:40:24.093 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=122 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:40:24.093 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=122 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:40:24.093 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=122 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:40:24.093 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=122 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:40:24.093 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=123 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:40:24.093 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=123 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:40:24.093 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=123 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:40:24.093 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=123 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:40:24.093 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=123 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:40:24.093 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=123 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:40:24.093 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=123 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:40:24.093 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=123 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:40:29.095 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:40:29.095 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:40:29.096 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:40:29.097 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:40:29.097 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:40:29.098 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:40:29.103 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:40:29.104 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:40:29.104 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:40:29.104 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:40:29.104 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:40:29.107 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:40:29.107 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:40:29.107 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:40:29.107 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:40:29.107 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:40:29.108 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:40:29.108 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:40:29.108 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:40:29.111 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:40:29.111 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:40:29.111 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:40:29.111 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:40:29.112 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:40:29.112 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:40:29.112 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:40:29.112 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:40:29.114 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:40:29.114 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:40:29.114 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:40:29.114 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:40:29.114 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:40:29.115 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:40:29.115 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:40:29.115 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:40:29.117 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:40:29.117 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:40:29.117 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:40:29.117 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:40:29.117 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:40:29.117 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:40:29.118 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:40:29.118 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:40:29.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:40:29.118 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:40:29.118 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:40:29.118 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:40:29.118 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:40:29.118 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:40:29.118 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:40:29.118 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:40:29.118 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:40:29.118 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:40:29.118 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:40:29.118 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:40:29.118 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:40:29.118 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:40:29.118 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:40:29.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:40:29.119 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:40:29.119 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:40:29.119 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:40:29.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:40:29.119 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:40:29.119 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:40:29.119 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:40:29.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:40:29.119 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:40:29.119 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:40:29.119 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:40:29.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:40:29.119 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:40:29.119 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:40:29.119 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:40:29.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:40:29.119 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:40:29.119 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:40:29.119 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:40:29.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:40:29.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:40:29.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:40:29.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:40:29.123 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:40:29.608 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:40:29.645 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:40:29.647 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:40:29.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:29.649 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:40:29.677 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:40:29.677 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:40:29.677 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:40:29.701 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:40:29.701 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:40:29.701 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:40:29.710 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:40:29.710 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:40:29.710 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:40:29.718 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:40:29.718 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:40:29.718 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:40:29.726 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:40:29.726 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:40:29.726 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:40:29.734 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:40:29.734 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:40:29.734 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:40:29.741 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:40:29.741 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:40:29.741 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:40:29.749 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:40:29.749 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:40:29.749 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:40:29.757 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:40:29.757 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:40:29.757 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:40:29.764 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:40:29.764 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:40:29.764 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:40:29.772 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:40:29.772 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:40:29.772 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:40:29.780 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:40:29.780 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:40:29.780 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:40:29.788 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:40:29.788 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:40:29.788 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:40:29.793 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:40:29.793 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:40:29.793 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:40:29.793 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:40:29.794 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:40:29.794 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:40:29.794 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:40:29.794 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:40:29.794 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:40:29.794 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:40:29.794 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:40:29.794 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=144 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:40:29.794 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=144 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:40:29.794 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=144 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:40:29.794 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=144 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:40:29.794 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=144 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:40:29.794 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=144 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:40:34.797 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:40:34.797 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:40:34.799 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:40:34.801 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:40:34.803 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:40:34.806 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:40:34.815 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:40:34.816 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:40:34.816 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:40:34.817 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:40:34.817 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:40:34.818 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:40:34.819 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:40:34.819 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:40:34.819 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:40:34.819 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:40:34.819 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:40:34.819 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:40:34.820 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:40:34.820 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:40:34.821 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:40:34.821 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:40:34.821 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:40:34.821 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:40:34.821 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:40:34.821 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:40:34.821 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:40:34.822 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:40:34.822 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:40:34.822 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:40:34.822 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:40:34.822 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:40:34.822 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:40:34.822 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:40:34.822 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:40:34.824 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:40:34.824 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:40:34.824 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:40:34.824 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:40:34.824 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:40:34.824 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:40:34.824 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:40:34.824 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:40:34.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:40:34.825 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:40:34.825 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:40:34.825 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:40:34.825 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:40:34.825 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:40:34.825 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:40:34.825 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:40:34.825 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:40:34.825 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:40:34.825 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:40:34.825 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:40:34.825 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:40:34.825 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:40:34.825 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:40:34.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:40:34.825 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:40:34.825 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:40:34.825 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:40:34.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:40:34.825 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:40:34.825 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:40:34.825 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:40:34.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:40:34.825 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:40:34.825 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:40:34.825 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:40:34.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:40:34.826 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:40:34.826 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:40:34.826 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:40:34.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:40:34.826 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:40:34.826 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:40:34.826 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:40:34.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:40:34.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:40:34.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:40:34.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:40:34.829 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:40:35.312 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:40:35.351 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:40:35.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:35.355 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:40:35.359 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:40:35.384 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:40:35.384 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:40:35.385 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:40:35.388 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:40:35.388 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:40:35.389 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:40:35.389 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:40:35.389 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:40:35.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:35.414 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:40:35.414 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:40:35.414 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:40:35.415 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:40:35.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:35.789 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:40:35.827 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:40:35.827 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:40:35.828 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:40:35.829 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:40:36.267 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:40:36.745 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:40:36.828 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:40:36.828 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:40:36.828 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:40:36.830 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:40:37.224 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:40:37.702 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:40:37.828 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:40:37.829 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:40:37.829 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:40:37.831 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:40:38.181 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:40:38.653 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:40:38.830 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:40:38.830 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:40:38.830 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:40:38.832 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:40:39.131 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:40:39.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:39.518 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:40:39.519 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:40:39.519 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:40:39.533 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:40:39.533 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:40:39.533 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:40:39.534 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:40:39.534 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:40:39.534 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:40:39.535 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:40:39.535 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:40:39.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:39.553 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:40:39.554 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:40:39.554 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:40:39.554 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:40:39.609 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 02:40:39.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:39.831 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:40:39.831 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:40:39.831 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:40:39.834 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:40:40.087 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 02:40:40.565 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 02:40:41.043 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 02:40:41.522 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 02:40:41.999 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 02:40:42.478 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 02:40:42.956 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 02:40:43.434 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 02:40:43.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:43.834 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:40:43.835 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:40:43.835 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:40:43.852 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:40:43.852 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:40:43.853 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:40:43.854 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:40:43.854 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:40:43.854 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:40:43.854 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:40:43.854 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:40:43.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:43.908 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:40:43.908 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:40:43.909 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:40:43.909 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:40:43.911 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 02:40:44.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:44.380 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 02:40:44.849 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 02:40:45.325 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 02:40:45.803 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 02:40:46.281 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 02:40:46.760 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 02:40:47.238 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 02:40:47.716 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-09 02:40:48.194 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-09 02:40:48.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:48.353 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:40:48.353 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:40:48.353 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:40:48.371 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:40:48.371 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:40:48.372 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:40:48.373 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:40:48.373 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:40:48.373 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:40:48.373 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:40:48.373 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:40:48.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:48.376 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:40:48.376 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:40:48.376 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:40:48.376 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:40:48.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:48.668 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-09 02:40:49.146 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-09 02:40:49.625 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-09 02:40:50.104 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-09 02:40:50.582 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-09 02:40:51.061 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-09 02:40:51.539 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-09 02:40:52.018 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-09 02:40:52.496 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-09 02:40:52.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:52.653 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:40:52.654 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:40:52.654 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:40:52.671 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:40:52.671 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:40:52.671 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:40:52.673 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:40:52.673 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:40:52.673 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:40:52.673 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:40:52.673 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:40:52.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:52.678 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:40:52.679 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:40:52.679 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:40:52.679 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:40:52.973 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-09 02:40:53.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:53.451 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-09 02:40:53.930 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-09 02:40:54.408 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-09 02:40:54.886 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-09 02:40:55.363 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-09 02:40:55.842 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-01-09 02:40:56.320 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-01-09 02:40:56.799 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-01-09 02:40:57.278 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-01-09 02:40:57.318 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:57.321 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:40:57.322 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:40:57.322 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:40:57.340 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:40:57.340 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:40:57.340 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:40:57.341 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:40:57.341 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:40:57.341 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:40:57.341 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:40:57.341 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:40:57.374 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:57.378 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:40:57.378 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-01-09 02:40:57.379 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:40:57.379 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:40:57.756 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-01-09 02:40:57.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:40:58.234 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-01-09 02:40:58.713 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-01-09 02:40:59.191 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-01-09 02:40:59.671 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-01-09 02:41:00.149 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-01-09 02:41:00.628 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-01-09 02:41:01.107 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-01-09 02:41:01.586 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-01-09 02:41:01.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:41:01.784 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:41:01.785 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:41:01.785 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:41:01.785 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:41:01.804 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:41:01.804 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:41:01.804 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:41:01.805 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:41:01.805 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:41:01.805 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:41:01.805 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:41:01.805 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:41:01.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:41:01.822 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:41:01.822 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-01-09 02:41:01.822 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:41:01.822 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:41:02.063 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-01-09 02:41:02.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:41:02.542 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-01-09 02:41:03.020 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-01-09 02:41:03.500 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-01-09 02:41:03.979 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-01-09 02:41:04.458 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-01-09 02:41:04.938 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-01-09 02:41:05.417 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-01-09 02:41:05.896 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-01-09 02:41:06.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:41:06.225 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:41:06.225 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:41:06.225 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:41:06.225 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:41:06.237 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:41:06.237 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:41:06.237 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:41:06.239 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:41:06.239 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:41:06.239 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:41:06.239 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:41:06.239 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:41:06.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:41:06.274 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:41:06.278 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:41:06.278 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:41:06.278 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:41:06.278 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:41:06.373 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-01-09 02:41:06.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:41:06.851 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-01-09 02:41:07.330 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-01-09 02:41:07.809 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-01-09 02:41:08.287 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-01-09 02:41:08.765 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-01-09 02:41:09.244 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-01-09 02:41:09.722 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-01-09 02:41:10.201 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-01-09 02:41:10.675 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:41:10.678 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:41:10.678 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:41:10.678 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:41:10.680 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-01-09 02:41:10.696 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:41:10.697 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:41:10.697 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:41:10.698 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:41:10.698 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:41:10.698 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:41:10.698 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:41:10.698 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:41:10.730 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:41:10.735 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:41:10.736 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:41:10.737 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:41:10.737 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:41:11.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:41:11.158 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-01-09 02:41:11.636 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-01-09 02:41:12.115 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-01-09 02:41:12.593 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-01-09 02:41:13.072 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-01-09 02:41:13.551 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-01-09 02:41:14.029 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-01-09 02:41:14.508 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-01-09 02:41:14.987 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-01-09 02:41:15.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:41:15.127 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:41:15.127 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:41:15.127 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:41:15.142 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:41:15.142 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:41:15.142 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:41:15.143 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:41:15.143 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:41:15.143 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:41:15.143 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:41:15.143 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:41:15.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:41:15.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:41:15.178 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:41:15.179 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:41:15.179 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:41:15.179 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:41:15.461 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-01-09 02:41:15.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:41:15.939 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-01-09 02:41:16.418 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-01-09 02:41:16.896 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-01-09 02:41:17.375 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-01-09 02:41:17.853 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-01-09 02:41:18.332 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-01-09 02:41:18.809 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-01-09 02:41:19.288 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-01-09 02:41:19.766 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-01-09 02:41:19.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:41:19.939 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:41:19.939 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:41:19.940 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:41:19.956 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:41:19.956 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:41:19.956 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:41:19.957 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:41:19.957 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:41:19.957 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:41:19.957 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:41:19.957 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:41:20.003 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:41:20.005 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:41:20.005 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-09 02:41:20.006 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:41:20.006 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:41:20.245 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-01-09 02:41:20.724 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-01-09 02:41:20.820 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:41:21.199 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-01-09 02:41:21.668 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-01-09 02:41:22.138 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-01-09 02:41:22.608 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-01-09 02:41:23.079 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-01-09 02:41:23.556 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-01-09 02:41:24.035 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-01-09 02:41:24.514 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-01-09 02:41:24.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:41:24.827 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:41:24.828 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:41:24.828 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:41:24.828 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:41:24.846 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:41:24.846 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:41:24.847 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:41:24.848 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:41:24.848 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:41:24.848 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:41:24.848 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:41:24.848 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:41:24.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:41:24.893 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:41:24.893 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-09 02:41:24.894 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:41:24.894 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:41:24.992 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-01-09 02:41:25.471 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-01-09 02:41:25.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:41:25.950 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-01-09 02:41:26.429 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-01-09 02:41:26.908 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-01-09 02:41:27.386 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-01-09 02:41:27.866 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-01-09 02:41:28.344 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-01-09 02:41:28.824 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-01-09 02:41:29.303 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-01-09 02:41:29.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:41:29.727 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:41:29.727 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:41:29.728 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:41:29.728 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:41:29.740 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:41:29.740 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:41:29.740 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:41:29.742 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:41:29.742 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:41:29.742 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:41:29.742 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:41:29.742 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:41:29.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:41:29.781 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-01-09 02:41:29.782 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:41:29.782 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 02:41:29.783 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:41:29.783 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:41:29.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:41:30.250 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-01-09 02:41:30.719 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-01-09 02:41:31.199 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-01-09 02:41:31.676 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-01-09 02:41:32.155 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-01-09 02:41:32.633 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-01-09 02:41:33.112 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-01-09 02:41:33.589 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-01-09 02:41:33.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:41:33.942 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:41:33.943 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:41:33.943 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:41:33.943 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:41:33.962 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:41:33.962 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:41:33.962 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:41:33.963 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:41:33.963 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:41:33.963 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:41:33.964 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:41:33.964 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:41:34.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:41:34.019 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:41:34.019 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 02:41:34.019 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:41:34.020 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:41:34.066 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-01-09 02:41:34.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:41:34.544 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-01-09 02:41:35.023 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-01-09 02:41:35.502 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-01-09 02:41:35.980 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-01-09 02:41:36.459 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-01-09 02:41:36.938 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-01-09 02:41:37.416 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-01-09 02:41:37.895 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-01-09 02:41:38.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:41:38.244 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:41:38.245 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:41:38.245 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:41:38.245 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:41:38.254 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:41:38.254 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:41:38.254 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:41:38.255 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:41:38.255 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:41:38.255 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:41:38.255 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:41:38.255 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:41:38.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:41:38.269 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:41:38.269 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 02:41:38.269 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:41:38.269 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:41:38.372 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-01-09 02:41:38.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:41:38.841 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-01-09 02:41:39.310 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-01-09 02:41:39.789 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-01-09 02:41:40.268 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-01-09 02:41:40.746 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-01-09 02:41:41.225 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-01-09 02:41:41.704 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-01-09 02:41:42.183 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-01-09 02:41:42.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:41:42.569 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:41:42.570 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:41:42.570 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:41:42.570 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:41:42.589 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:41:42.589 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:41:42.589 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:41:42.590 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:41:42.591 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:41:42.591 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:41:42.591 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:41:42.591 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:41:42.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:41:42.601 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:41:42.601 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 02:41:42.601 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:41:42.601 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:41:42.662 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-01-09 02:41:42.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:41:43.140 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-01-09 02:41:43.619 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-01-09 02:41:44.097 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-01-09 02:41:44.576 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-01-09 02:41:45.055 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-01-09 02:41:45.534 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-01-09 02:41:46.012 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-01-09 02:41:46.491 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-01-09 02:41:46.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:41:46.879 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:41:46.879 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:41:46.879 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:41:46.879 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:41:46.899 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:41:46.899 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:41:46.899 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:41:46.900 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:41:46.900 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:41:46.900 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:41:46.900 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:41:46.900 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:41:46.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:41:46.910 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:41:46.911 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 02:41:46.911 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:41:46.911 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:41:46.968 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-01-09 02:41:47.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:41:47.446 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-01-09 02:41:47.925 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-01-09 02:41:48.403 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-01-09 02:41:48.882 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-01-09 02:41:49.361 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-01-09 02:41:49.839 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-01-09 02:41:50.318 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-01-09 02:41:50.797 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-01-09 02:41:51.275 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-01-09 02:41:51.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:41:51.365 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:41:51.366 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:41:51.366 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:41:51.366 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:41:51.385 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:41:51.385 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:41:51.385 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:41:51.387 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:41:51.387 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:41:51.387 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:41:51.387 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:41:51.387 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:41:51.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:41:51.422 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:41:51.423 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 02:41:51.423 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:41:51.424 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:41:51.686 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:41:51.754 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-01-09 02:41:52.232 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-01-09 02:41:52.711 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-01-09 02:41:53.190 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-01-09 02:41:53.668 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-01-09 02:41:54.147 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-01-09 02:41:54.625 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-01-09 02:41:55.104 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-01-09 02:41:55.583 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-01-09 02:41:55.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:41:55.690 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:41:55.691 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:41:55.691 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:41:55.691 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:41:55.711 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:41:55.711 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:41:55.711 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:41:55.713 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:41:55.713 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:41:55.713 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:41:55.713 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:41:55.713 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:41:55.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:41:55.720 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:41:55.720 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 02:41:55.720 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:41:55.720 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:41:56.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:41:56.062 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-01-09 02:41:56.540 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-01-09 02:41:57.019 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2026-01-09 02:41:57.497 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2026-01-09 02:41:57.976 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2026-01-09 02:41:58.455 [DEBUG] clck_gen.py:113 IND CLOCK 17850
2026-01-09 02:41:58.933 [DEBUG] clck_gen.py:113 IND CLOCK 17952
2026-01-09 02:41:59.412 [DEBUG] clck_gen.py:113 IND CLOCK 18054
2026-01-09 02:41:59.891 [DEBUG] clck_gen.py:113 IND CLOCK 18156
2026-01-09 02:42:00.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:00.017 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:00.017 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:42:00.017 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:42:00.017 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:42:00.036 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:42:00.036 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:42:00.036 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:42:00.037 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:00.038 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:42:00.038 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:42:00.038 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:42:00.038 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:42:00.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:00.083 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:42:00.084 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 02:42:00.084 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:00.084 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:00.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:00.369 [DEBUG] clck_gen.py:113 IND CLOCK 18258
2026-01-09 02:42:00.848 [DEBUG] clck_gen.py:113 IND CLOCK 18360
2026-01-09 02:42:01.327 [DEBUG] clck_gen.py:113 IND CLOCK 18462
2026-01-09 02:42:01.805 [DEBUG] clck_gen.py:113 IND CLOCK 18564
2026-01-09 02:42:02.284 [DEBUG] clck_gen.py:113 IND CLOCK 18666
2026-01-09 02:42:02.762 [DEBUG] clck_gen.py:113 IND CLOCK 18768
2026-01-09 02:42:03.240 [DEBUG] clck_gen.py:113 IND CLOCK 18870
2026-01-09 02:42:03.719 [DEBUG] clck_gen.py:113 IND CLOCK 18972
2026-01-09 02:42:04.198 [DEBUG] clck_gen.py:113 IND CLOCK 19074
2026-01-09 02:42:04.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:04.338 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:04.338 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:42:04.339 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:42:04.339 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:42:04.344 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:42:04.344 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:42:04.344 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:42:04.344 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:42:04.346 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:42:04.346 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:42:04.346 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:42:04.346 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:42:04.346 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:42:04.346 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:42:04.346 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:42:04.346 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=19108 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:42:04.346 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=19108 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:42:04.346 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=19108 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:42:04.346 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=19108 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:42:04.346 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=19108 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:42:04.346 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=19108 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:42:04.346 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=19108 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:42:04.347 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=19108 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:42:09.349 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:42:09.349 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:42:09.351 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:42:09.353 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:42:09.358 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:42:09.358 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:42:09.367 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:42:09.367 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:42:09.367 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:42:09.368 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:42:09.368 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:42:09.370 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:42:09.370 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:42:09.370 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:42:09.370 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:42:09.371 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:42:09.371 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:42:09.371 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:42:09.371 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:42:09.372 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:42:09.372 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:42:09.373 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:42:09.373 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:42:09.373 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:42:09.373 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:42:09.373 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:42:09.373 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:42:09.374 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:42:09.375 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:42:09.375 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:42:09.375 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:42:09.375 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:42:09.375 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:42:09.375 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:42:09.375 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:42:09.377 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:42:09.377 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:42:09.377 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:42:09.377 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:42:09.377 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:42:09.378 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:42:09.378 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:42:09.378 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:42:09.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:42:09.378 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:42:09.378 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:42:09.378 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:42:09.378 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:42:09.378 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:42:09.378 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:42:09.378 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:42:09.378 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:42:09.378 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:42:09.378 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:42:09.378 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:42:09.378 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:42:09.378 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:42:09.378 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:42:09.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:42:09.379 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:42:09.379 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:42:09.379 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:42:09.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:42:09.380 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:42:09.380 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:42:09.380 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:42:09.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:42:09.380 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:42:09.380 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:42:09.380 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:42:09.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:42:09.380 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:42:09.380 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:42:09.380 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:42:09.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:42:09.380 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:42:09.380 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:42:09.380 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:42:09.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:42:09.380 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:42:09.380 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:42:09.380 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:42:09.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:42:09.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:42:09.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:42:09.380 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:42:09.380 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:42:09.380 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:42:09.380 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:42:14.388 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:42:14.388 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:42:14.388 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:42:14.388 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:42:14.388 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:42:14.388 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:42:14.402 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:42:14.404 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:42:14.404 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:42:14.404 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:42:14.404 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:42:14.408 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:42:14.408 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:42:14.408 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:42:14.408 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:42:14.409 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:42:14.409 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:42:14.409 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:42:14.409 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:42:14.411 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:42:14.411 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:42:14.412 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:42:14.412 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:42:14.412 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:42:14.412 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:42:14.412 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:42:14.412 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:42:14.414 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:42:14.414 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:42:14.414 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:42:14.414 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:42:14.414 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:42:14.414 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:42:14.415 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:42:14.415 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:42:14.417 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:42:14.418 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:42:14.418 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:42:14.418 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:42:14.418 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:42:14.418 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:42:14.418 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:42:14.418 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:42:14.418 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:42:14.418 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:42:14.418 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:42:14.418 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:42:14.418 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:42:14.418 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:42:14.418 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:42:14.418 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:42:14.418 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:42:14.418 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:42:14.418 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:42:14.419 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:42:14.419 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:42:14.419 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:42:14.419 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:42:14.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:42:14.419 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:42:14.419 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:42:14.419 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:42:14.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:42:14.419 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:42:14.419 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:42:14.419 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:42:14.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:42:14.419 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:42:14.419 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:42:14.419 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:42:14.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:42:14.420 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:42:14.420 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:42:14.420 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:42:14.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:42:14.420 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:42:14.420 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:42:14.420 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:42:14.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:42:14.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:42:14.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:42:14.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:42:14.423 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:42:14.908 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:42:14.952 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:42:14.955 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:42:14.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:14.958 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:42:14.982 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:42:14.983 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:42:14.983 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:42:14.994 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:14.994 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:42:14.995 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:42:14.996 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:42:14.996 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:42:15.003 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:15.008 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:42:15.009 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:42:15.009 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:15.009 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:15.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:15.113 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:15.114 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:42:15.114 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:42:15.133 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:42:15.133 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:42:15.133 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:42:15.135 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:15.135 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:42:15.135 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:42:15.135 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:42:15.135 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:42:15.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:15.183 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:42:15.183 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:42:15.183 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:15.184 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:15.380 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:42:15.421 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:42:15.422 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:42:15.423 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:42:15.427 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:42:15.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:15.602 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:15.602 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:42:15.603 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:42:15.622 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:42:15.622 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:42:15.622 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:42:15.624 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:15.624 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:42:15.624 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:42:15.624 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:42:15.624 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:42:15.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:15.676 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:42:15.677 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:42:15.677 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:15.677 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:15.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:15.820 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:15.821 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:42:15.821 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:42:15.831 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:42:15.831 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:42:15.831 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:42:15.833 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:15.833 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:42:15.833 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:42:15.833 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:42:15.833 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:42:15.855 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:42:15.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:15.879 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:42:15.880 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:42:15.880 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:15.880 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:16.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:16.314 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:16.314 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:42:16.314 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:42:16.332 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:42:16.332 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:42:16.332 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:42:16.333 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:42:16.334 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:16.334 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:42:16.334 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:42:16.334 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:42:16.334 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:42:16.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:16.386 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:42:16.386 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:42:16.386 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:16.387 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:16.422 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:42:16.422 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:42:16.424 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:42:16.428 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:42:16.811 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:42:16.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:16.850 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:16.850 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:42:16.850 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:42:16.868 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:42:16.868 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:42:16.868 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:42:16.870 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:16.870 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:42:16.871 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:42:16.871 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:42:16.871 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:42:16.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:16.923 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:42:16.924 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-01-09 02:42:16.924 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:16.924 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:17.285 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:42:17.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:17.389 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:17.390 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:42:17.390 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:42:17.390 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:42:17.409 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:42:17.409 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:42:17.409 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:42:17.411 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:17.411 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:42:17.411 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:42:17.411 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:42:17.411 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:42:17.423 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:42:17.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:17.423 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:42:17.425 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:42:17.425 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-01-09 02:42:17.425 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:17.425 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:17.425 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:42:17.429 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:42:17.755 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:42:17.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:17.930 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:17.931 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:42:17.931 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:42:17.931 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:42:17.949 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:42:17.949 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:42:17.949 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:42:17.951 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:17.951 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:42:17.951 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:42:17.951 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:42:17.951 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:42:17.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:42:17.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:18.000 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:42:18.000 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:42:18.000 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:18.000 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:18.225 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:42:18.424 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:42:18.424 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:42:18.426 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:42:18.430 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:42:18.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:18.470 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:18.471 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:42:18.471 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:42:18.480 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:42:18.480 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:42:18.481 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:42:18.483 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:18.483 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:42:18.483 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:42:18.483 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:42:18.483 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:42:18.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:18.532 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:42:18.532 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:42:18.533 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:18.533 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:18.695 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:42:19.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:19.011 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:19.011 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:42:19.011 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:42:19.024 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:42:19.024 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:42:19.025 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:42:19.027 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:19.027 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:42:19.027 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:42:19.027 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:42:19.027 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:42:19.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:42:19.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:19.077 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:42:19.077 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:42:19.078 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:19.078 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:19.174 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 02:42:19.425 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:42:19.425 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:42:19.426 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:42:19.431 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:42:19.652 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 02:42:19.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:19.928 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:19.928 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:42:19.929 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:42:19.937 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:42:19.937 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:42:19.937 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:42:19.939 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:19.939 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:42:19.939 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:42:19.939 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:42:19.939 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:42:19.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:19.992 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:42:19.993 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-09 02:42:19.993 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:19.993 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:20.131 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 02:42:20.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:20.416 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:20.416 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:42:20.416 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:42:20.416 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:42:20.434 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:42:20.435 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:42:20.435 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:42:20.437 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:20.437 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:42:20.437 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:42:20.437 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:42:20.437 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:42:20.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:20.484 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:42:20.484 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-09 02:42:20.484 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:20.485 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:20.607 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 02:42:20.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:20.961 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:20.961 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:42:20.961 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:42:20.961 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:42:20.980 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:42:20.980 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:42:20.980 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:42:20.983 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:20.983 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:42:20.983 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:42:20.983 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:42:20.983 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:42:21.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:21.033 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:42:21.033 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 02:42:21.033 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:21.034 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:21.076 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 02:42:21.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:21.233 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:21.234 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:42:21.234 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:42:21.234 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:42:21.253 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:42:21.253 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:42:21.253 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:42:21.255 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:21.255 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:42:21.255 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:42:21.255 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:42:21.255 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:42:21.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:21.315 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:42:21.316 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 02:42:21.316 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:21.316 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:21.546 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 02:42:21.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:21.720 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:21.721 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:42:21.721 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:42:21.721 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:42:21.730 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:42:21.730 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:42:21.730 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:42:21.732 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:21.732 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:42:21.732 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:42:21.732 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:42:21.732 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:42:21.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:21.786 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:42:21.786 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 02:42:21.786 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:21.786 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:22.018 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 02:42:22.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:22.211 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:22.212 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:42:22.212 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:42:22.212 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:42:22.232 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:42:22.232 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:42:22.232 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:42:22.234 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:22.234 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:42:22.234 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:42:22.234 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:42:22.234 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:42:22.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:22.289 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:42:22.289 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 02:42:22.289 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:22.290 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:22.493 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 02:42:22.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:22.708 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:22.708 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:42:22.709 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:42:22.709 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:42:22.727 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:42:22.728 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:42:22.728 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:42:22.730 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:22.730 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:42:22.730 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:42:22.730 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:42:22.730 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:42:22.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:22.781 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:42:22.781 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 02:42:22.781 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:22.781 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:22.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:22.888 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:22.889 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:42:22.889 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:42:22.889 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:42:22.901 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:42:22.901 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:42:22.901 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:42:22.904 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:22.904 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:42:22.904 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:42:22.904 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:42:22.904 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:42:22.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:22.953 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:42:22.953 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 02:42:22.953 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:22.953 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:22.967 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 02:42:23.374 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:23.376 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:23.377 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:42:23.377 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:42:23.377 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:42:23.393 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:42:23.393 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:42:23.393 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:42:23.395 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:23.395 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:42:23.395 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:42:23.395 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:42:23.395 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:42:23.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:23.436 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 02:42:23.442 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:42:23.442 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 02:42:23.442 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:23.442 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:23.863 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:23.867 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:23.867 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:42:23.868 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:42:23.868 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:42:23.888 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:42:23.888 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:42:23.888 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:42:23.890 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:23.890 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:42:23.891 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:42:23.891 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:42:23.891 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:42:23.911 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 02:42:23.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:23.941 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:42:23.941 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 02:42:23.941 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:23.942 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:24.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:24.361 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:24.362 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:42:24.362 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:42:24.362 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:42:24.372 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:42:24.372 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:42:24.372 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:42:24.373 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:42:24.374 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:42:24.374 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:42:24.374 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:42:24.374 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:42:24.374 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:42:24.374 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:42:24.374 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:42:24.374 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2141 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:42:24.374 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2141 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:42:29.377 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:42:29.377 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:42:29.380 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:42:29.380 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:42:29.380 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:42:29.380 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:42:29.389 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:42:29.391 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:42:29.391 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:42:29.391 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:42:29.391 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:42:29.395 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:42:29.395 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:42:29.396 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:42:29.396 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:42:29.396 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:42:29.396 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:42:29.397 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:42:29.397 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:42:29.398 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:42:29.399 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:42:29.399 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:42:29.399 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:42:29.399 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:42:29.399 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:42:29.399 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:42:29.399 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:42:29.401 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:42:29.401 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:42:29.401 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:42:29.402 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:42:29.402 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:42:29.402 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:42:29.402 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:42:29.402 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:42:29.404 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:42:29.404 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:42:29.404 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:42:29.405 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:42:29.405 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:42:29.405 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:42:29.405 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:42:29.405 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:42:29.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:42:29.405 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:42:29.405 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:42:29.405 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:42:29.405 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:42:29.405 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:42:29.405 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:42:29.405 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:42:29.405 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:42:29.405 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:42:29.405 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:42:29.405 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:42:29.405 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:42:29.405 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:42:29.405 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:42:29.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:42:29.406 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:42:29.406 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:42:29.406 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:42:29.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:42:29.406 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:42:29.406 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:42:29.406 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:42:29.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:42:29.406 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:42:29.406 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:42:29.406 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:42:29.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:42:29.406 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:42:29.406 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:42:29.406 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:42:29.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:42:29.406 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:42:29.406 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:42:29.406 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:42:29.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:42:29.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:42:29.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:42:29.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:42:29.410 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:42:29.894 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:42:29.927 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:42:29.928 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:42:29.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:29.929 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:42:29.946 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:42:29.946 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:42:29.946 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:42:29.952 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:29.952 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:42:29.952 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:42:29.952 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:42:29.952 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:42:29.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:29.996 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:42:29.996 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:42:29.997 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:29.997 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:30.371 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:42:30.409 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:42:30.409 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:42:30.410 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:42:30.413 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:42:30.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:30.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:30.850 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:42:31.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:31.056 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:31.056 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:42:31.056 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:42:31.066 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:42:31.066 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:42:31.066 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:42:31.068 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:31.068 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:42:31.068 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:42:31.068 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:42:31.068 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:42:31.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:31.116 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:42:31.116 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:42:31.116 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:31.116 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:31.328 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:42:31.410 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:42:31.410 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:42:31.411 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:42:31.415 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:42:31.806 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:42:32.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:32.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:32.284 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:42:32.411 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:42:32.411 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:42:32.411 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:42:32.416 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:42:32.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:32.507 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:32.507 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:42:32.508 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:42:32.516 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:42:32.516 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:42:32.516 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:42:32.518 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:32.518 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:42:32.518 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:42:32.518 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:42:32.518 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:42:32.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:32.572 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:42:32.573 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:42:32.573 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:32.573 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:32.761 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:42:33.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:33.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:33.239 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:42:33.412 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:42:33.413 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:42:33.413 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:42:33.417 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:42:33.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:33.679 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:33.680 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:42:33.680 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:42:33.690 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:42:33.690 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:42:33.690 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:42:33.692 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:33.692 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:42:33.692 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:42:33.692 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:42:33.692 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:42:33.716 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:42:33.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:33.740 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:42:33.740 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:42:33.741 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:33.741 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:34.195 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 02:42:34.413 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:42:34.413 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:42:34.413 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:42:34.418 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:42:34.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:34.655 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:34.673 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 02:42:35.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:35.132 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:35.133 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:42:35.133 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:42:35.149 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:42:35.149 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:42:35.149 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:42:35.151 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:35.151 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:42:35.151 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:42:35.151 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:42:35.151 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:42:35.151 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 02:42:35.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:35.203 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:42:35.204 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:42:35.204 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:35.204 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:35.621 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 02:42:36.090 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 02:42:36.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:36.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:36.564 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 02:42:36.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:36.690 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:36.691 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:42:36.691 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:42:36.710 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:42:36.710 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:42:36.710 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:42:36.712 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:36.712 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:42:36.712 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:42:36.712 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:42:36.712 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:42:36.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:36.761 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:42:36.761 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-01-09 02:42:36.761 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:36.761 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:37.042 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 02:42:37.520 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 02:42:37.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:37.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:37.998 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 02:42:38.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:38.217 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:38.218 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:42:38.218 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:42:38.218 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:42:38.236 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:42:38.236 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:42:38.236 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:42:38.238 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:38.238 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:42:38.238 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:42:38.238 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:42:38.238 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:42:38.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:38.287 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:42:38.287 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-01-09 02:42:38.287 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:38.287 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:38.472 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 02:42:38.943 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 02:42:39.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:39.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:39.412 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 02:42:39.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:39.712 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:39.712 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:42:39.712 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:42:39.712 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:42:39.718 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:42:39.718 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:42:39.719 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:42:39.721 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:39.721 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:42:39.721 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:42:39.721 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:42:39.721 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:42:39.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:42:39.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:39.768 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:42:39.768 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:42:39.768 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:39.769 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:39.883 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 02:42:40.359 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 02:42:40.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:40.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:40.835 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 02:42:41.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:41.229 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:41.230 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:42:41.230 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:42:41.248 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:42:41.248 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:42:41.249 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:42:41.251 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:41.251 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:42:41.251 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:42:41.251 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:42:41.251 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:42:41.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:41.308 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 02:42:41.312 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:42:41.313 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:42:41.313 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:41.313 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:41.782 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 02:42:42.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:42.258 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-09 02:42:42.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:42.728 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-09 02:42:42.730 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:42.731 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:42.731 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:42:42.731 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:42:42.739 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:42:42.739 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:42:42.739 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:42:42.741 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:42.741 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:42:42.741 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:42:42.741 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:42:42.741 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:42:42.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:42:42.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:42.784 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:42:42.784 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:42:42.784 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:42.784 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:43.196 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-09 02:42:43.670 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-09 02:42:44.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:44.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:44.146 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-09 02:42:44.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:44.600 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:44.600 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:42:44.600 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:42:44.608 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:42:44.608 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:42:44.608 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:42:44.611 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:44.611 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:42:44.611 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:42:44.611 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:42:44.611 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:42:44.620 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-09 02:42:44.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:44.659 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:42:44.659 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-09 02:42:44.660 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:44.660 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:45.089 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-09 02:42:45.557 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-09 02:42:45.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:45.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:46.025 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-09 02:42:46.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:46.035 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:46.035 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:42:46.035 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:42:46.035 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:42:46.042 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:42:46.042 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:42:46.042 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:42:46.044 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:46.044 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:42:46.044 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:42:46.044 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:42:46.044 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:42:46.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:46.091 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:42:46.091 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-09 02:42:46.091 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:46.091 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:46.497 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-09 02:42:46.966 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-09 02:42:47.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:47.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:47.440 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-09 02:42:47.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:47.540 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:47.540 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:42:47.540 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:42:47.540 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:42:47.552 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:42:47.552 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:42:47.552 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:42:47.554 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:47.554 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:42:47.554 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:42:47.554 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:42:47.554 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:42:47.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:47.604 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:42:47.604 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 02:42:47.604 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:47.604 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:47.908 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-09 02:42:48.376 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-09 02:42:48.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:48.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:48.844 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-09 02:42:49.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:49.005 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:49.006 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:42:49.006 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:42:49.006 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:42:49.022 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:42:49.022 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:42:49.022 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:42:49.026 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:49.026 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:42:49.026 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:42:49.026 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:42:49.026 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:42:49.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:49.087 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:42:49.087 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 02:42:49.087 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:49.087 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:49.313 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-09 02:42:49.788 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-09 02:42:49.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:49.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:50.264 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-01-09 02:42:50.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:50.439 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:50.440 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:42:50.440 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:42:50.440 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:42:50.449 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:42:50.449 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:42:50.450 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:42:50.451 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:50.451 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:42:50.451 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:42:50.451 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:42:50.451 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:42:50.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:50.507 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:42:50.507 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 02:42:50.507 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:50.507 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:50.734 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-01-09 02:42:51.211 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-01-09 02:42:51.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:51.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:51.686 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-01-09 02:42:51.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:51.873 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:51.873 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:42:51.873 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:42:51.873 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:42:51.882 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:42:51.882 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:42:51.882 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:42:51.883 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:51.884 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:42:51.884 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:42:51.884 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:42:51.884 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:42:51.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:51.932 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:42:51.932 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 02:42:51.933 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:51.933 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:52.160 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-01-09 02:42:52.635 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-01-09 02:42:52.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:52.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:53.103 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-01-09 02:42:53.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:53.318 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:53.318 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:42:53.318 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:42:53.319 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:42:53.340 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:42:53.340 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:42:53.340 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:42:53.342 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:53.342 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:42:53.342 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:42:53.342 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:42:53.342 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:42:53.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:53.390 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:42:53.390 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 02:42:53.390 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:53.390 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:53.572 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-01-09 02:42:53.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:53.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:54.040 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-01-09 02:42:54.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:54.428 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:54.429 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:42:54.429 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:42:54.429 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:42:54.435 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:42:54.435 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:42:54.435 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:42:54.437 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:54.437 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:42:54.437 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:42:54.437 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:42:54.437 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:42:54.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:54.484 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:42:54.484 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 02:42:54.484 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:54.484 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:54.508 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-01-09 02:42:54.976 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-01-09 02:42:55.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:55.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:55.444 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-01-09 02:42:55.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:55.850 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:55.850 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:42:55.850 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:42:55.850 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:42:55.856 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:42:55.857 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:42:55.857 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:42:55.858 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:55.858 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:42:55.858 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:42:55.858 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:42:55.858 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:42:55.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:55.911 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:42:55.911 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 02:42:55.911 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:55.911 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:55.913 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-01-09 02:42:56.388 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-01-09 02:42:56.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:56.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:56.864 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-01-09 02:42:57.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:57.291 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:57.291 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:42:57.291 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:42:57.291 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:42:57.307 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:42:57.307 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:42:57.307 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:42:57.310 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:57.310 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:42:57.310 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:42:57.310 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:42:57.310 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:42:57.339 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-01-09 02:42:57.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:57.353 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:42:57.353 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 02:42:57.353 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:57.353 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:57.807 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-01-09 02:42:58.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:58.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:58.283 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-01-09 02:42:58.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:42:58.734 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:42:58.734 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:42:58.734 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:42:58.734 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:42:58.740 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:42:58.740 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:42:58.740 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:42:58.740 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:42:58.741 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:42:58.741 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:42:58.741 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:42:58.741 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:42:58.741 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:42:58.741 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:42:58.741 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:42:58.741 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=6323 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:42:58.741 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=6323 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:42:58.741 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=6323 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:42:58.741 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=6323 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:42:58.741 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=6323 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:42:58.741 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=6323 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:42:58.741 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=6323 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:43:03.745 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:43:03.745 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:43:03.753 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:43:03.753 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:43:03.753 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:43:03.754 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:43:03.761 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:43:03.762 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:43:03.763 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:43:03.763 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:43:03.763 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:43:03.765 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:43:03.766 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:43:03.766 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:43:03.766 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:43:03.766 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:43:03.766 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:43:03.766 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:43:03.766 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:43:03.768 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:43:03.769 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:43:03.769 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:43:03.769 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:43:03.769 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:43:03.769 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:43:03.769 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:43:03.769 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:43:03.771 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:43:03.771 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:43:03.771 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:43:03.771 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:43:03.771 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:43:03.772 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:43:03.772 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:43:03.772 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:43:03.774 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:43:03.774 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:43:03.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:43:03.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:43:03.775 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:43:03.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:43:03.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:43:03.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:43:03.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:43:03.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:43:03.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:43:03.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:43:03.775 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:43:03.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:43:03.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:43:03.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:43:03.775 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:43:03.775 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:43:03.775 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:43:03.776 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:43:03.776 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:43:03.776 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:43:03.776 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:43:03.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:43:03.776 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:43:03.776 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:43:03.776 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:43:03.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:43:03.776 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:43:03.776 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:43:03.776 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:43:03.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:43:03.776 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:43:03.776 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:43:03.776 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:43:03.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:43:03.777 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:43:03.777 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:43:03.777 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:43:03.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:43:03.777 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:43:03.777 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:43:03.777 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:43:03.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:43:03.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:43:03.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:43:03.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:43:03.780 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:43:04.259 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:43:04.300 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:43:04.303 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:43:04.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:43:04.305 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:43:04.331 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:43:04.331 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:43:04.331 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:43:04.337 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:43:04.337 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:43:04.337 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:43:04.338 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:43:04.338 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:43:04.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:43:04.350 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:43:04.350 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:43:04.350 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:43:04.350 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:43:04.733 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:43:04.778 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:43:04.779 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:43:04.779 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:43:04.782 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:43:05.203 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:43:05.672 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:43:05.780 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:43:05.780 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:43:05.780 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:43:05.782 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:43:06.147 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:43:06.625 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:43:06.781 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:43:06.781 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:43:06.782 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:43:06.783 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:43:07.104 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:43:07.582 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:43:07.782 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:43:07.782 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:43:07.782 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:43:07.784 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:43:08.060 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:43:08.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:43:08.265 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:43:08.266 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:43:08.266 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:43:08.283 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:43:08.283 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:43:08.283 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:43:08.286 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:43:08.286 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:43:08.286 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:43:08.286 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:43:08.286 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:43:08.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:43:08.336 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:43:08.336 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:43:08.336 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:43:08.336 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:43:08.537 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 02:43:08.783 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:43:08.783 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:43:08.783 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:43:08.785 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:43:09.015 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 02:43:09.492 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 02:43:09.970 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 02:43:10.448 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 02:43:10.926 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 02:43:11.404 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 02:43:11.882 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 02:43:12.360 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 02:43:12.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:43:12.583 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:43:12.584 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:43:12.584 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:43:12.599 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:43:12.599 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:43:12.599 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:43:12.602 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:43:12.602 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:43:12.602 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:43:12.602 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:43:12.602 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:43:12.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:43:12.652 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:43:12.653 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:43:12.653 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:43:12.654 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:43:12.837 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 02:43:13.315 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 02:43:13.792 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 02:43:14.271 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 02:43:14.748 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 02:43:15.226 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 02:43:15.704 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 02:43:16.182 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 02:43:16.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:43:16.622 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:43:16.623 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:43:16.623 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:43:16.634 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:43:16.634 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:43:16.634 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:43:16.636 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:43:16.636 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:43:16.636 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:43:16.636 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:43:16.636 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:43:16.659 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-09 02:43:16.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:43:16.683 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:43:16.684 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:43:16.684 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:43:16.684 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:43:17.128 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-09 02:43:17.597 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-09 02:43:18.073 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-09 02:43:18.551 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-09 02:43:19.029 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-09 02:43:19.506 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-09 02:43:19.984 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-09 02:43:20.462 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-09 02:43:20.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:43:20.921 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:43:20.921 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:43:20.921 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:43:20.937 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:43:20.938 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:43:20.938 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:43:20.939 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-09 02:43:20.940 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:43:20.940 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:43:20.940 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:43:20.940 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:43:20.940 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:43:20.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:43:20.992 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:43:20.992 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:43:20.992 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:43:20.993 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:43:21.417 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-09 02:43:21.895 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-09 02:43:22.373 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-09 02:43:22.851 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-09 02:43:23.329 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-09 02:43:23.807 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-09 02:43:24.285 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-09 02:43:24.763 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-01-09 02:43:25.240 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-01-09 02:43:25.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:43:25.648 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:43:25.649 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:43:25.649 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:43:25.665 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:43:25.665 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:43:25.665 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:43:25.667 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:43:25.667 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:43:25.668 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:43:25.668 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:43:25.668 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:43:25.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:43:25.715 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:43:25.715 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-01-09 02:43:25.715 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:43:25.715 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:43:25.718 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-01-09 02:43:26.187 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-01-09 02:43:26.657 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-01-09 02:43:27.130 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-01-09 02:43:27.609 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-01-09 02:43:28.086 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-01-09 02:43:28.556 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-01-09 02:43:29.023 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-01-09 02:43:29.492 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-01-09 02:43:29.962 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-01-09 02:43:30.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:43:30.040 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:43:30.041 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:43:30.041 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:43:30.041 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:43:30.054 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:43:30.054 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:43:30.054 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:43:30.056 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:43:30.056 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:43:30.056 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:43:30.056 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:43:30.056 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:43:30.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:43:30.105 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:43:30.106 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-01-09 02:43:30.106 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:43:30.106 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:43:30.441 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-01-09 02:43:30.921 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-01-09 02:43:31.399 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-01-09 02:43:31.878 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-01-09 02:43:32.356 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-01-09 02:43:32.836 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-01-09 02:43:33.315 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-01-09 02:43:33.793 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-01-09 02:43:34.272 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-01-09 02:43:34.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:43:34.495 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:43:34.496 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:43:34.496 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:43:34.496 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:43:34.515 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:43:34.515 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:43:34.515 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:43:34.517 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:43:34.517 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:43:34.518 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:43:34.518 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:43:34.518 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:43:34.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:43:34.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:43:34.564 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:43:34.564 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:43:34.564 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:43:34.564 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:43:34.746 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-01-09 02:43:35.215 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-01-09 02:43:35.690 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-01-09 02:43:36.168 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-01-09 02:43:36.646 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-01-09 02:43:37.125 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-01-09 02:43:37.603 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-01-09 02:43:38.081 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-01-09 02:43:38.559 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-01-09 02:43:38.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:43:38.925 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:43:38.926 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:43:38.926 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:43:38.944 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:43:38.944 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:43:38.944 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:43:38.946 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:43:38.946 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:43:38.946 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:43:38.946 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:43:38.946 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:43:38.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:43:38.995 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:43:38.996 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:43:38.996 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:43:38.996 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:43:39.036 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-01-09 02:43:39.514 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-01-09 02:43:39.992 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-01-09 02:43:40.471 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-01-09 02:43:40.949 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-01-09 02:43:41.427 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-01-09 02:43:41.906 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-01-09 02:43:42.384 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-01-09 02:43:42.861 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-01-09 02:43:43.340 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-01-09 02:43:43.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:43:43.380 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:43:43.380 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:43:43.380 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:43:43.397 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:43:43.397 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:43:43.397 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:43:43.400 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:43:43.400 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:43:43.400 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:43:43.400 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:43:43.400 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:43:43.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:43:43.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:43:43.450 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:43:43.450 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:43:43.450 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:43:43.450 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:43:43.817 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-01-09 02:43:44.296 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-01-09 02:43:44.774 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-01-09 02:43:45.252 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-01-09 02:43:45.730 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-01-09 02:43:46.208 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-01-09 02:43:46.686 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-01-09 02:43:47.165 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-01-09 02:43:47.642 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-01-09 02:43:47.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:43:47.705 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:43:47.705 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:43:47.706 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:43:47.721 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:43:47.721 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:43:47.722 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:43:47.724 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:43:47.724 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:43:47.724 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:43:47.724 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:43:47.724 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:43:47.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:43:47.777 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:43:47.777 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-09 02:43:47.778 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:43:47.778 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:43:48.120 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-01-09 02:43:48.599 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-01-09 02:43:49.078 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-01-09 02:43:49.557 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-01-09 02:43:50.036 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-01-09 02:43:50.515 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-01-09 02:43:50.994 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-01-09 02:43:51.473 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-01-09 02:43:51.952 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-01-09 02:43:52.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:43:52.098 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:43:52.098 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:43:52.098 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:43:52.098 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:43:52.116 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:43:52.116 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:43:52.116 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:43:52.118 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:43:52.118 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:43:52.118 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:43:52.118 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:43:52.118 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:43:52.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:43:52.168 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:43:52.169 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-09 02:43:52.169 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:43:52.169 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:43:52.430 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-01-09 02:43:52.908 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-01-09 02:43:53.387 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-01-09 02:43:53.857 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-01-09 02:43:54.326 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-01-09 02:43:54.796 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-01-09 02:43:55.267 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-01-09 02:43:55.738 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-01-09 02:43:56.209 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-01-09 02:43:56.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:43:56.497 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:43:56.497 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:43:56.497 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:43:56.497 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:43:56.516 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:43:56.516 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:43:56.516 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:43:56.519 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:43:56.519 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:43:56.519 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:43:56.519 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:43:56.519 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:43:56.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:43:56.568 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:43:56.569 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 02:43:56.569 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:43:56.569 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:43:56.681 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-01-09 02:43:57.160 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-01-09 02:43:57.638 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-01-09 02:43:58.112 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-01-09 02:43:58.582 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-01-09 02:43:59.060 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-01-09 02:43:59.538 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-01-09 02:44:00.017 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-01-09 02:44:00.495 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-01-09 02:44:00.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:44:00.654 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:44:00.655 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:44:00.655 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:44:00.655 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:44:00.675 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:44:00.675 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:44:00.675 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:44:00.677 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:44:00.677 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:44:00.677 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:44:00.677 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:44:00.677 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:44:00.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:44:00.737 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:44:00.737 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 02:44:00.737 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:44:00.738 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:44:00.973 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-01-09 02:44:01.453 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-01-09 02:44:01.931 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-01-09 02:44:02.409 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-01-09 02:44:02.887 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-01-09 02:44:03.366 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-01-09 02:44:03.845 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-01-09 02:44:04.324 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-01-09 02:44:04.803 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-01-09 02:44:04.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:44:04.981 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:44:04.982 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:44:04.982 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:44:04.982 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:44:05.001 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:44:05.001 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:44:05.001 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:44:05.004 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:44:05.004 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:44:05.004 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:44:05.005 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:44:05.005 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:44:05.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:44:05.072 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:44:05.072 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 02:44:05.072 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:44:05.073 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:44:05.276 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-01-09 02:44:05.747 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-01-09 02:44:06.225 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-01-09 02:44:06.704 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-01-09 02:44:07.182 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-01-09 02:44:07.661 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-01-09 02:44:08.140 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-01-09 02:44:08.617 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-01-09 02:44:09.096 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-01-09 02:44:09.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:44:09.293 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:44:09.293 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:44:09.294 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:44:09.294 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:44:09.312 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:44:09.312 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:44:09.312 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:44:09.315 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:44:09.315 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:44:09.315 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:44:09.315 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:44:09.315 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:44:09.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:44:09.369 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:44:09.369 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 02:44:09.369 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:44:09.370 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:44:09.574 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-01-09 02:44:10.053 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-01-09 02:44:10.531 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-01-09 02:44:11.009 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-01-09 02:44:11.487 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-01-09 02:44:11.965 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-01-09 02:44:12.444 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-01-09 02:44:12.922 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-01-09 02:44:13.400 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-01-09 02:44:13.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:44:13.615 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:44:13.616 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:44:13.616 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:44:13.616 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:44:13.634 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:44:13.634 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:44:13.634 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:44:13.636 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:44:13.636 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:44:13.636 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:44:13.636 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:44:13.636 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:44:13.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:44:13.689 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:44:13.689 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 02:44:13.689 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:44:13.690 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:44:13.878 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-01-09 02:44:14.356 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-01-09 02:44:14.835 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-01-09 02:44:15.313 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-01-09 02:44:15.791 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-01-09 02:44:16.270 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-01-09 02:44:16.748 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-01-09 02:44:17.226 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-01-09 02:44:17.618 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:44:17.622 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:44:17.622 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:44:17.622 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:44:17.623 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:44:17.641 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:44:17.641 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:44:17.641 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:44:17.644 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:44:17.644 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:44:17.644 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:44:17.644 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:44:17.644 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:44:17.698 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:44:17.703 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:44:17.704 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 02:44:17.704 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:44:17.704 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-01-09 02:44:17.704 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:44:18.183 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-01-09 02:44:18.662 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-01-09 02:44:19.140 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-01-09 02:44:19.619 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-01-09 02:44:20.097 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-01-09 02:44:20.576 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-01-09 02:44:21.054 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-01-09 02:44:21.533 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-01-09 02:44:21.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:44:21.947 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:44:21.947 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:44:21.947 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:44:21.948 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:44:21.966 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:44:21.966 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:44:21.966 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:44:21.968 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:44:21.968 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:44:21.968 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:44:21.969 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:44:21.969 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:44:22.010 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-01-09 02:44:22.011 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:44:22.015 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:44:22.016 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 02:44:22.016 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:44:22.016 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:44:22.479 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-01-09 02:44:22.949 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-01-09 02:44:23.424 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-01-09 02:44:23.893 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-01-09 02:44:24.362 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-01-09 02:44:24.840 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-01-09 02:44:25.319 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-01-09 02:44:25.798 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2026-01-09 02:44:26.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:44:26.230 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:44:26.230 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:44:26.230 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:44:26.230 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:44:26.249 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:44:26.249 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:44:26.249 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:44:26.252 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:44:26.252 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:44:26.252 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:44:26.252 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:44:26.252 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:44:26.276 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2026-01-09 02:44:26.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:44:26.301 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:44:26.302 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 02:44:26.302 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:44:26.302 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:44:26.755 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2026-01-09 02:44:27.233 [DEBUG] clck_gen.py:113 IND CLOCK 17850
2026-01-09 02:44:27.712 [DEBUG] clck_gen.py:113 IND CLOCK 17952
2026-01-09 02:44:28.190 [DEBUG] clck_gen.py:113 IND CLOCK 18054
2026-01-09 02:44:28.669 [DEBUG] clck_gen.py:113 IND CLOCK 18156
2026-01-09 02:44:29.148 [DEBUG] clck_gen.py:113 IND CLOCK 18258
2026-01-09 02:44:29.626 [DEBUG] clck_gen.py:113 IND CLOCK 18360
2026-01-09 02:44:30.104 [DEBUG] clck_gen.py:113 IND CLOCK 18462
2026-01-09 02:44:30.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:44:30.555 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:44:30.555 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:44:30.555 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:44:30.556 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:44:30.570 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:44:30.570 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:44:30.570 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:44:30.570 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:44:30.573 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:44:30.573 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:44:30.573 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:44:30.573 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:44:30.573 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:44:30.573 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:44:30.573 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:44:30.573 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=18564 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:44:30.573 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=18564 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:44:30.573 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=18564 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:44:30.573 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=18564 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:44:30.573 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=18564 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:44:30.573 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=18564 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:44:30.573 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=18564 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:44:35.575 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:44:35.575 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:44:35.577 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:44:35.577 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:44:35.578 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:44:35.578 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:44:35.585 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:44:35.585 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:44:35.585 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:44:35.586 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:44:35.586 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:44:35.586 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:44:35.586 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:44:35.587 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:44:35.587 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:44:35.587 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:44:35.587 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:44:35.587 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:44:35.587 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:44:35.589 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:44:35.589 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:44:35.589 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:44:35.589 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:44:35.589 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:44:35.589 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:44:35.589 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:44:35.589 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:44:35.591 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:44:35.591 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:44:35.591 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:44:35.591 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:44:35.591 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:44:35.591 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:44:35.591 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:44:35.591 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:44:35.594 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:44:35.594 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:44:35.594 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:44:35.594 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:44:35.594 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:44:35.594 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:44:35.594 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:44:35.594 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:44:35.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:44:35.594 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:44:35.594 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:44:35.594 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:44:35.594 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:44:35.594 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:44:35.594 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:44:35.594 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:44:35.594 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:44:35.594 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:44:35.594 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:44:35.595 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:44:35.595 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:44:35.595 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:44:35.595 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:44:35.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:44:35.595 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:44:35.595 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:44:35.595 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:44:35.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:44:35.596 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:44:35.596 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:44:35.596 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:44:35.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:44:35.596 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:44:35.596 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:44:35.596 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:44:35.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:44:35.596 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:44:35.596 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:44:35.596 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:44:35.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:44:35.596 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:44:35.596 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:44:35.596 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:44:35.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:44:35.596 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:44:35.596 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:44:35.596 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:44:35.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:44:35.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:44:35.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:44:35.597 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:44:35.597 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:44:35.597 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:44:35.597 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:44:40.601 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:44:40.601 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:44:40.603 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:44:40.603 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:44:40.603 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:44:40.604 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:44:40.613 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:44:40.614 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:44:40.614 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:44:40.614 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:44:40.614 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:44:40.617 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:44:40.617 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:44:40.617 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:44:40.617 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:44:40.617 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:44:40.617 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:44:40.617 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:44:40.617 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:44:40.620 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:44:40.620 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:44:40.620 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:44:40.620 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:44:40.620 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:44:40.620 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:44:40.620 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:44:40.620 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:44:40.622 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:44:40.622 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:44:40.622 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:44:40.622 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:44:40.622 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:44:40.622 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:44:40.622 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:44:40.622 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:44:40.624 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:44:40.625 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:44:40.625 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:44:40.625 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:44:40.625 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:44:40.625 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:44:40.625 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:44:40.625 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:44:40.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:44:40.625 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:44:40.625 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:44:40.625 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:44:40.625 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:44:40.625 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:44:40.625 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:44:40.625 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:44:40.625 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:44:40.625 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:44:40.625 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:44:40.625 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:44:40.625 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:44:40.625 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:44:40.625 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:44:40.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:44:40.626 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:44:40.626 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:44:40.626 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:44:40.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:44:40.626 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:44:40.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:44:40.626 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:44:40.626 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:44:40.626 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:44:40.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:44:40.626 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:44:40.626 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:44:40.626 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:44:40.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:44:40.626 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:44:40.626 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:44:40.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:44:40.626 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:44:40.626 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:44:40.626 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:44:40.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:44:40.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:44:40.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:44:40.630 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:44:41.113 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:44:41.149 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:44:41.151 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:44:41.153 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:44:41.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:44:41.178 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:44:41.178 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:44:41.178 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:44:41.182 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:44:41.182 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:44:41.182 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:44:41.183 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:44:41.183 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:44:41.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:44:41.213 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:44:41.213 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:44:41.213 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:44:41.213 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:44:41.591 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:44:41.628 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:44:41.653 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:44:41.654 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:44:41.654 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:44:42.069 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:44:42.547 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:44:42.654 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:44:42.655 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:44:42.655 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:44:42.655 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:44:43.025 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:44:43.503 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:44:43.655 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:44:43.656 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:44:43.656 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:44:43.656 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:44:43.981 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:44:44.459 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:44:44.656 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:44:44.657 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:44:44.657 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:44:44.657 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:44:44.938 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:44:45.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:44:45.274 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:44:45.274 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:44:45.275 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:44:45.288 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:44:45.288 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:44:45.288 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:44:45.290 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:44:45.290 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:44:45.290 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:44:45.291 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:44:45.291 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:44:45.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:44:45.340 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:44:45.340 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:44:45.341 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:44:45.341 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:44:45.415 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 02:44:45.658 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:44:45.658 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:44:45.658 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:44:45.658 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:44:45.893 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 02:44:46.371 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 02:44:46.848 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 02:44:47.326 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 02:44:47.804 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 02:44:48.282 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 02:44:48.760 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 02:44:49.238 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 02:44:49.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:44:49.595 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:44:49.595 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:44:49.595 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:44:49.615 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:44:49.615 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:44:49.615 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:44:49.617 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:44:49.617 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:44:49.617 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:44:49.617 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:44:49.617 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:44:49.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:44:49.680 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:44:49.681 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:44:49.681 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:44:49.681 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:44:49.716 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 02:44:50.194 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 02:44:50.671 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 02:44:51.149 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 02:44:51.627 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 02:44:52.104 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 02:44:52.582 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 02:44:53.060 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 02:44:53.535 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-09 02:44:54.005 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-09 02:44:54.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:44:54.113 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:44:54.113 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:44:54.114 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:44:54.131 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:44:54.131 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:44:54.131 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:44:54.133 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:44:54.133 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:44:54.133 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:44:54.133 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:44:54.133 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:44:54.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:44:54.179 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:44:54.180 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:44:54.181 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:44:54.181 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:44:54.483 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-09 02:44:54.961 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-09 02:44:55.440 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-09 02:44:55.918 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-09 02:44:56.396 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-09 02:44:56.873 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-09 02:44:57.351 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-09 02:44:57.829 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-09 02:44:58.307 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-09 02:44:58.418 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:44:58.421 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:44:58.421 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:44:58.421 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:44:58.440 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:44:58.440 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:44:58.440 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:44:58.442 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:44:58.442 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:44:58.442 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:44:58.442 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:44:58.442 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:44:58.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:44:58.498 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:44:58.499 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:44:58.499 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:44:58.500 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:44:58.785 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-09 02:44:59.263 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-09 02:44:59.742 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-09 02:45:00.220 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-09 02:45:00.698 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-09 02:45:01.176 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-09 02:45:01.654 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-01-09 02:45:02.132 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-01-09 02:45:02.610 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-01-09 02:45:03.088 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-01-09 02:45:03.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:45:03.105 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:45:03.105 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:45:03.106 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:45:03.125 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:45:03.126 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:45:03.126 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:45:03.128 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:45:03.128 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:45:03.128 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:45:03.128 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:45:03.128 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:45:03.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:45:03.176 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:45:03.176 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-01-09 02:45:03.177 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:45:03.177 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:45:03.566 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-01-09 02:45:04.045 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-01-09 02:45:04.524 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-01-09 02:45:05.003 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-01-09 02:45:05.481 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-01-09 02:45:05.960 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-01-09 02:45:06.438 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-01-09 02:45:06.917 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-01-09 02:45:07.395 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-01-09 02:45:07.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:45:07.559 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:45:07.560 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:45:07.560 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:45:07.560 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:45:07.578 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:45:07.578 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:45:07.578 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:45:07.580 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:45:07.580 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:45:07.580 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:45:07.580 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:45:07.580 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:45:07.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:45:07.637 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:45:07.637 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-01-09 02:45:07.638 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:45:07.638 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:45:07.874 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-01-09 02:45:08.352 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-01-09 02:45:08.821 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-01-09 02:45:09.291 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-01-09 02:45:09.761 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-01-09 02:45:10.232 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-01-09 02:45:10.703 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-01-09 02:45:11.173 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-01-09 02:45:11.644 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-01-09 02:45:11.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:45:11.996 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:45:11.997 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:45:11.997 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:45:11.997 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:45:12.009 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:45:12.009 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:45:12.009 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:45:12.011 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:45:12.012 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:45:12.012 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:45:12.012 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:45:12.012 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:45:12.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:45:12.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:45:12.062 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:45:12.062 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:45:12.062 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:45:12.062 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:45:12.115 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-01-09 02:45:12.593 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-01-09 02:45:13.072 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-01-09 02:45:13.549 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-01-09 02:45:14.027 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-01-09 02:45:14.506 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-01-09 02:45:14.983 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-01-09 02:45:15.461 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-01-09 02:45:15.939 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-01-09 02:45:16.417 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-01-09 02:45:16.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:45:16.881 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:45:16.881 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:45:16.882 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:45:16.895 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-01-09 02:45:16.899 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:45:16.899 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:45:16.900 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:45:16.902 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:45:16.902 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:45:16.902 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:45:16.902 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:45:16.902 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:45:16.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:45:16.948 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:45:16.948 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:45:16.948 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:45:16.948 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:45:17.373 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-01-09 02:45:17.852 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-01-09 02:45:18.330 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-01-09 02:45:18.809 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-01-09 02:45:19.287 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-01-09 02:45:19.765 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-01-09 02:45:20.243 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-01-09 02:45:20.721 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-01-09 02:45:21.199 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-01-09 02:45:21.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:45:21.326 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:45:21.326 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:45:21.326 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:45:21.347 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:45:21.347 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:45:21.347 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:45:21.349 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:45:21.349 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:45:21.349 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:45:21.350 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:45:21.350 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:45:21.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:45:21.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:45:21.396 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:45:21.396 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:45:21.396 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:45:21.397 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:45:21.677 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-01-09 02:45:22.154 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-01-09 02:45:22.632 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-01-09 02:45:23.110 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-01-09 02:45:23.584 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-01-09 02:45:24.054 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-01-09 02:45:24.526 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-01-09 02:45:25.004 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-01-09 02:45:25.482 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-01-09 02:45:25.960 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-01-09 02:45:26.438 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-01-09 02:45:26.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:45:26.625 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:45:26.626 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:45:26.626 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:45:26.667 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:45:26.667 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:45:26.667 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:45:26.674 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:45:26.674 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:45:26.675 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:45:26.675 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:45:26.675 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:45:26.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:45:26.727 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:45:26.727 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-09 02:45:26.728 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:45:26.728 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:45:26.916 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-01-09 02:45:27.394 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-01-09 02:45:27.873 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-01-09 02:45:28.351 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-01-09 02:45:28.831 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-01-09 02:45:29.310 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-01-09 02:45:29.788 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-01-09 02:45:30.267 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-01-09 02:45:30.746 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-01-09 02:45:31.225 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-01-09 02:45:31.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:45:31.489 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:45:31.490 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:45:31.490 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:45:31.490 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:45:31.508 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:45:31.508 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:45:31.508 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:45:31.510 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:45:31.510 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:45:31.510 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:45:31.510 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:45:31.510 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:45:31.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:45:31.561 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:45:31.561 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-09 02:45:31.562 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:45:31.562 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:45:31.703 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-01-09 02:45:32.182 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-01-09 02:45:32.661 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-01-09 02:45:33.140 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-01-09 02:45:33.619 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-01-09 02:45:34.098 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-01-09 02:45:34.577 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-01-09 02:45:35.056 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-01-09 02:45:35.535 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-01-09 02:45:35.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:45:35.941 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:45:35.942 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:45:35.942 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:45:35.942 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:45:35.960 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:45:35.960 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:45:35.961 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:45:35.963 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:45:35.963 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:45:35.963 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:45:35.963 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:45:35.963 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:45:36.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:45:36.012 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:45:36.012 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 02:45:36.013 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:45:36.013 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-01-09 02:45:36.013 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:45:36.489 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-01-09 02:45:36.968 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-01-09 02:45:37.446 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-01-09 02:45:37.924 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-01-09 02:45:38.403 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-01-09 02:45:38.881 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-01-09 02:45:39.359 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-01-09 02:45:39.838 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-01-09 02:45:40.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:45:40.128 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:45:40.128 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:45:40.128 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:45:40.129 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:45:40.140 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:45:40.140 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:45:40.141 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:45:40.143 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:45:40.143 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:45:40.143 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:45:40.143 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:45:40.143 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:45:40.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:45:40.192 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:45:40.192 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 02:45:40.192 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:45:40.192 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:45:40.313 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-01-09 02:45:40.782 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-01-09 02:45:41.251 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-01-09 02:45:41.722 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-01-09 02:45:42.193 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-01-09 02:45:42.672 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-01-09 02:45:43.151 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-01-09 02:45:43.629 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-01-09 02:45:44.108 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-01-09 02:45:44.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:45:44.428 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:45:44.429 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:45:44.429 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:45:44.429 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:45:44.449 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:45:44.449 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:45:44.450 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:45:44.452 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:45:44.452 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:45:44.452 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:45:44.452 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:45:44.452 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:45:44.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:45:44.501 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:45:44.501 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 02:45:44.502 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:45:44.502 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:45:44.586 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-01-09 02:45:45.064 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-01-09 02:45:45.543 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-01-09 02:45:46.022 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-01-09 02:45:46.501 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-01-09 02:45:46.979 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-01-09 02:45:47.457 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-01-09 02:45:47.936 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-01-09 02:45:48.414 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-01-09 02:45:48.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:45:48.740 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:45:48.740 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:45:48.741 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:45:48.741 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:45:48.760 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:45:48.760 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:45:48.760 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:45:48.762 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:45:48.762 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:45:48.762 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:45:48.762 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:45:48.762 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:45:48.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:45:48.813 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:45:48.813 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 02:45:48.813 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:45:48.814 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:45:48.892 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-01-09 02:45:49.365 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-01-09 02:45:49.838 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-01-09 02:45:50.316 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-01-09 02:45:50.794 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-01-09 02:45:51.272 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-01-09 02:45:51.750 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-01-09 02:45:52.229 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-01-09 02:45:52.708 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-01-09 02:45:53.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:45:53.049 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:45:53.049 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:45:53.049 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:45:53.050 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:45:53.070 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:45:53.071 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:45:53.071 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:45:53.073 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:45:53.073 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:45:53.073 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:45:53.073 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:45:53.073 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:45:53.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:45:53.121 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:45:53.121 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 02:45:53.122 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:45:53.122 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:45:53.185 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-01-09 02:45:53.658 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-01-09 02:45:54.128 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-01-09 02:45:54.599 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-01-09 02:45:55.075 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-01-09 02:45:55.554 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-01-09 02:45:56.031 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-01-09 02:45:56.510 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-01-09 02:45:56.984 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-01-09 02:45:57.453 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-01-09 02:45:57.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:45:57.521 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:45:57.522 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:45:57.522 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:45:57.522 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:45:57.522 [WARNING] transceiver.py:250 (MS@172.18.122.22:6700) RX TRXD message (fn=16439 tn=4 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:45:57.541 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:45:57.541 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:45:57.541 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:45:57.543 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:45:57.543 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:45:57.543 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:45:57.543 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:45:57.544 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:45:57.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:45:57.597 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:45:57.597 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 02:45:57.597 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:45:57.597 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:45:57.923 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-01-09 02:45:58.399 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-01-09 02:45:58.878 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-01-09 02:45:59.357 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-01-09 02:45:59.835 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-01-09 02:46:00.314 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-01-09 02:46:00.792 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-01-09 02:46:01.271 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-01-09 02:46:01.749 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-01-09 02:46:01.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:46:01.813 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:46:01.813 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:46:01.814 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:46:01.814 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:46:01.827 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:46:01.827 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:46:01.827 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:46:01.829 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:46:01.829 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:46:01.829 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:46:01.829 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:46:01.829 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:46:01.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:46:01.876 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:46:01.876 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 02:46:01.876 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:46:01.876 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:46:02.226 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-01-09 02:46:02.695 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2026-01-09 02:46:03.164 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2026-01-09 02:46:03.637 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2026-01-09 02:46:04.116 [DEBUG] clck_gen.py:113 IND CLOCK 17850
2026-01-09 02:46:04.594 [DEBUG] clck_gen.py:113 IND CLOCK 17952
2026-01-09 02:46:05.073 [DEBUG] clck_gen.py:113 IND CLOCK 18054
2026-01-09 02:46:05.551 [DEBUG] clck_gen.py:113 IND CLOCK 18156
2026-01-09 02:46:06.029 [DEBUG] clck_gen.py:113 IND CLOCK 18258
2026-01-09 02:46:06.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:46:06.123 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:46:06.124 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:46:06.124 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:46:06.124 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:46:06.143 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:46:06.143 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:46:06.143 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:46:06.145 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:46:06.146 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:46:06.146 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:46:06.146 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:46:06.146 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:46:06.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:46:06.193 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:46:06.193 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 02:46:06.193 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:46:06.193 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:46:06.507 [DEBUG] clck_gen.py:113 IND CLOCK 18360
2026-01-09 02:46:06.986 [DEBUG] clck_gen.py:113 IND CLOCK 18462
2026-01-09 02:46:07.464 [DEBUG] clck_gen.py:113 IND CLOCK 18564
2026-01-09 02:46:07.942 [DEBUG] clck_gen.py:113 IND CLOCK 18666
2026-01-09 02:46:08.420 [DEBUG] clck_gen.py:113 IND CLOCK 18768
2026-01-09 02:46:08.898 [DEBUG] clck_gen.py:113 IND CLOCK 18870
2026-01-09 02:46:09.377 [DEBUG] clck_gen.py:113 IND CLOCK 18972
2026-01-09 02:46:09.855 [DEBUG] clck_gen.py:113 IND CLOCK 19074
2026-01-09 02:46:10.334 [DEBUG] clck_gen.py:113 IND CLOCK 19176
2026-01-09 02:46:10.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:46:10.437 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:46:10.438 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:46:10.438 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:46:10.438 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:46:10.454 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:46:10.454 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:46:10.455 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:46:10.455 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:46:10.457 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:46:10.457 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:46:10.457 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:46:10.457 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:46:10.457 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:46:10.457 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:46:10.457 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:46:15.457 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:46:15.457 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:46:15.459 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:46:15.459 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:46:15.459 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:46:15.460 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:46:15.474 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:46:15.474 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:46:15.474 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:46:15.475 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:46:15.475 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:46:15.476 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:46:15.476 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:46:15.476 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:46:15.476 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:46:15.477 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:46:15.477 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:46:15.477 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:46:15.477 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:46:15.478 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:46:15.478 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:46:15.478 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:46:15.478 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:46:15.478 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:46:15.478 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:46:15.478 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:46:15.478 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:46:15.479 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:46:15.479 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:46:15.479 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:46:15.479 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:46:15.479 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:46:15.479 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:46:15.479 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:46:15.479 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:46:15.481 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:46:15.481 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:46:15.481 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:46:15.481 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:46:15.481 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:46:15.481 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:46:15.481 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:46:15.481 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:46:15.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:46:15.481 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:46:15.481 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:46:15.481 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:46:15.481 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:46:15.481 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:46:15.481 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:46:15.481 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:46:15.481 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:46:15.481 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:46:15.481 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:46:15.482 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:46:15.482 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:46:15.482 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:46:15.482 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:46:15.482 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:46:15.482 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:46:15.482 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:46:15.482 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:46:15.482 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:46:15.482 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:46:15.482 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:46:15.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:46:15.483 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:46:15.483 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:46:20.487 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:46:20.487 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:46:20.489 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:46:20.489 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:46:20.489 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:46:20.490 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:46:20.500 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:46:20.501 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:46:20.501 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:46:20.502 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:46:20.502 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:46:20.506 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:46:20.506 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:46:20.506 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:46:20.506 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:46:20.506 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:46:20.506 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:46:20.507 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:46:20.507 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:46:20.509 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:46:20.510 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:46:20.510 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:46:20.510 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:46:20.510 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:46:20.510 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:46:20.510 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:46:20.510 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:46:20.513 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:46:20.513 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:46:20.513 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:46:20.513 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:46:20.513 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:46:20.513 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:46:20.513 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:46:20.513 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:46:20.516 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:46:20.516 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:46:20.516 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:46:20.516 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:46:20.516 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:46:20.517 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:46:20.517 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:46:20.517 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:46:20.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:46:20.517 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:46:20.517 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:46:20.517 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:46:20.517 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:46:20.517 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:46:20.517 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:46:20.517 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:46:20.517 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:46:20.517 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:46:20.517 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:46:20.517 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:46:20.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:46:20.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:46:20.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:46:20.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:46:20.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:46:20.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:46:20.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:46:20.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:46:20.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:46:20.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:46:20.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:46:20.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:46:20.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:46:20.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:46:20.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:46:20.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:46:20.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:46:20.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:46:20.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:46:20.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:46:20.519 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:46:20.519 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:46:20.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:46:20.519 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:46:20.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:46:20.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:46:20.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:46:20.522 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:46:21.004 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:46:21.047 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:46:21.049 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:46:21.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:46:21.051 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:46:21.069 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:46:21.070 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:46:21.070 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:46:21.078 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:46:21.078 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:46:21.078 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:46:21.078 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:46:21.078 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:46:21.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:46:21.106 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:46:21.106 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:46:21.107 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:46:21.107 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:46:21.481 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:46:21.521 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:46:21.522 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:46:21.522 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:46:21.522 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:46:21.959 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:46:22.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:46:22.164 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:46:22.165 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:46:22.165 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:46:22.181 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:46:22.181 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:46:22.181 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:46:22.183 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:46:22.183 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:46:22.183 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:46:22.183 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:46:22.183 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:46:22.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:46:22.231 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:46:22.232 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:46:22.232 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:46:22.233 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:46:22.432 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:46:22.522 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:46:22.522 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:46:22.522 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:46:22.523 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:46:22.904 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:46:23.382 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:46:23.522 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:46:23.523 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:46:23.523 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:46:23.523 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:46:23.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:46:23.607 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:46:23.607 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:46:23.607 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:46:23.627 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:46:23.627 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:46:23.627 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:46:23.630 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:46:23.630 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:46:23.630 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:46:23.630 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:46:23.630 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:46:23.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:46:23.681 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:46:23.681 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:46:23.681 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:46:23.681 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:46:23.859 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:46:24.337 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:46:24.523 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:46:24.524 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:46:24.524 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:46:24.524 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:46:24.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:46:24.778 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:46:24.778 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:46:24.778 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:46:24.794 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:46:24.794 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:46:24.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:46:24.796 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:46:24.797 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:46:24.797 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:46:24.797 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:46:24.797 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:46:24.814 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:46:24.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:46:24.847 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:46:24.848 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:46:24.848 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:46:24.848 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:46:25.283 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 02:46:25.525 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:46:25.525 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:46:25.525 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:46:25.525 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:46:25.752 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 02:46:26.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:46:26.210 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:46:26.210 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:46:26.210 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:46:26.228 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 02:46:26.229 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:46:26.229 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:46:26.229 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:46:26.232 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:46:26.232 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:46:26.232 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:46:26.232 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:46:26.232 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:46:26.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:46:26.282 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:46:26.282 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:46:26.282 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:46:26.283 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:46:26.705 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 02:46:27.183 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 02:46:27.661 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 02:46:27.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:46:27.793 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:46:27.794 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:46:27.794 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:46:27.811 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:46:27.811 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:46:27.811 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:46:27.813 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:46:27.813 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:46:27.813 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:46:27.813 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:46:27.813 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:46:27.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:46:27.860 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:46:27.860 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-01-09 02:46:27.860 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:46:27.860 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:46:28.139 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 02:46:28.617 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 02:46:29.096 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 02:46:29.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:46:29.315 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:46:29.315 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:46:29.316 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:46:29.316 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:46:29.333 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:46:29.333 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:46:29.334 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:46:29.336 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:46:29.336 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:46:29.336 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:46:29.336 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:46:29.336 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:46:29.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:46:29.384 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:46:29.384 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-01-09 02:46:29.385 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:46:29.385 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:46:29.574 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 02:46:30.053 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 02:46:30.347 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:46:30.350 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:46:30.351 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:46:30.351 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:46:30.351 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:46:30.369 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:46:30.369 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:46:30.369 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:46:30.371 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:46:30.371 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:46:30.372 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:46:30.372 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:46:30.372 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:46:30.414 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:46:30.414 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:46:30.418 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:46:30.419 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:46:30.419 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:46:30.419 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:46:30.531 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 02:46:31.009 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 02:46:31.487 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 02:46:31.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:46:31.874 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:46:31.874 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:46:31.874 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:46:31.892 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:46:31.892 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:46:31.892 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:46:31.895 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:46:31.895 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:46:31.895 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:46:31.895 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:46:31.895 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:46:31.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:46:31.944 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:46:31.944 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:46:31.944 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:46:31.945 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:46:31.964 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 02:46:32.442 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 02:46:32.920 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 02:46:33.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:46:33.394 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:46:33.395 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:46:33.395 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:46:33.398 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-09 02:46:33.418 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:46:33.418 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:46:33.418 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:46:33.420 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:46:33.420 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:46:33.420 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:46:33.420 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:46:33.420 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:46:33.463 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:46:33.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:46:33.468 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:46:33.469 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:46:33.469 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:46:33.470 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:46:33.876 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-09 02:46:34.353 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-09 02:46:34.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:46:34.794 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:46:34.794 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:46:34.795 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:46:34.813 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:46:34.813 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:46:34.813 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:46:34.815 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:46:34.815 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:46:34.815 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:46:34.816 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:46:34.816 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:46:34.831 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-09 02:46:34.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:46:34.864 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:46:34.864 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-09 02:46:34.865 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:46:34.865 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:46:35.310 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-09 02:46:35.789 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-09 02:46:36.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:46:36.257 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:46:36.258 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:46:36.258 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:46:36.258 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:46:36.268 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-09 02:46:36.276 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:46:36.276 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:46:36.276 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:46:36.279 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:46:36.279 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:46:36.279 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:46:36.279 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:46:36.279 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:46:36.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:46:36.328 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:46:36.328 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-09 02:46:36.329 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:46:36.329 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:46:36.746 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-09 02:46:37.224 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-09 02:46:37.703 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-09 02:46:37.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:46:37.790 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:46:37.791 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:46:37.791 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:46:37.791 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:46:37.810 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:46:37.810 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:46:37.811 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:46:37.813 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:46:37.813 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:46:37.813 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:46:37.813 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:46:37.813 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:46:37.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:46:37.860 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:46:37.860 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 02:46:37.860 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:46:37.861 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:46:38.178 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-09 02:46:38.657 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-09 02:46:39.131 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-09 02:46:39.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:46:39.286 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:46:39.287 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:46:39.287 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:46:39.287 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:46:39.305 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:46:39.305 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:46:39.305 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:46:39.307 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:46:39.307 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:46:39.307 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:46:39.307 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:46:39.307 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:46:39.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:46:39.356 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:46:39.356 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 02:46:39.356 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:46:39.356 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:46:39.600 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-09 02:46:40.070 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-09 02:46:40.546 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-09 02:46:40.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:46:40.725 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:46:40.725 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:46:40.726 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:46:40.726 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:46:40.744 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:46:40.744 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:46:40.744 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:46:40.746 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:46:40.746 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:46:40.747 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:46:40.747 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:46:40.747 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:46:40.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:46:40.796 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:46:40.797 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 02:46:40.797 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:46:40.797 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:46:41.024 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-09 02:46:41.502 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-01-09 02:46:41.981 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-01-09 02:46:42.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:46:42.177 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:46:42.178 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:46:42.178 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:46:42.178 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:46:42.187 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:46:42.187 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:46:42.187 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:46:42.189 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:46:42.189 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:46:42.189 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:46:42.189 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:46:42.189 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:46:42.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:46:42.237 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:46:42.237 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 02:46:42.237 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:46:42.238 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:46:42.459 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-01-09 02:46:42.938 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-01-09 02:46:43.416 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-01-09 02:46:43.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:46:43.632 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:46:43.632 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:46:43.633 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:46:43.633 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:46:43.651 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:46:43.651 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:46:43.651 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:46:43.653 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:46:43.653 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:46:43.653 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:46:43.653 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:46:43.653 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:46:43.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:46:43.704 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:46:43.705 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 02:46:43.705 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:46:43.706 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:46:43.894 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-01-09 02:46:44.372 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-01-09 02:46:44.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:46:44.767 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:46:44.768 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:46:44.768 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:46:44.768 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:46:44.783 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:46:44.783 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:46:44.783 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:46:44.785 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:46:44.785 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:46:44.785 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:46:44.785 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:46:44.785 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:46:44.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:46:44.832 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:46:44.832 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 02:46:44.833 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:46:44.833 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:46:44.850 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-01-09 02:46:45.328 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-01-09 02:46:45.807 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-01-09 02:46:46.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:46:46.221 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:46:46.221 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:46:46.221 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:46:46.221 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:46:46.241 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:46:46.241 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:46:46.241 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:46:46.244 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:46:46.244 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:46:46.244 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:46:46.244 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:46:46.244 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:46:46.285 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-01-09 02:46:46.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:46:46.292 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:46:46.292 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 02:46:46.292 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:46:46.292 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:46:46.763 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-01-09 02:46:47.242 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-01-09 02:46:47.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:46:47.673 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:46:47.674 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:46:47.674 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:46:47.674 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:46:47.694 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:46:47.694 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:46:47.695 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:46:47.697 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:46:47.697 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:46:47.697 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:46:47.697 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:46:47.697 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:46:47.720 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-01-09 02:46:47.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:46:47.745 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:46:47.745 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 02:46:47.745 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:46:47.746 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:46:48.198 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-01-09 02:46:48.676 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-01-09 02:46:49.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:46:49.128 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:46:49.129 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:46:49.129 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:46:49.130 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:46:49.137 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:46:49.137 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:46:49.137 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:46:49.137 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:46:49.138 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:46:49.138 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:46:49.138 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:46:49.138 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:46:49.138 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:46:49.138 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:46:49.138 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:46:49.139 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=6120 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:46:49.139 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=6120 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:46:49.139 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=6120 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:46:49.139 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=6120 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:46:49.139 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=6120 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:46:49.139 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=6120 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:46:54.141 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:46:54.141 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:46:54.144 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:46:54.144 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:46:54.144 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:46:54.144 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:46:54.156 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:46:54.158 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:46:54.158 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:46:54.158 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:46:54.158 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:46:54.161 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:46:54.161 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:46:54.161 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:46:54.161 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:46:54.161 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:46:54.162 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:46:54.162 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:46:54.162 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:46:54.164 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:46:54.164 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:46:54.164 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:46:54.164 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:46:54.165 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:46:54.165 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:46:54.165 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:46:54.165 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:46:54.166 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:46:54.166 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:46:54.166 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:46:54.166 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:46:54.166 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:46:54.167 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:46:54.167 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:46:54.167 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:46:54.169 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:46:54.169 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:46:54.169 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:46:54.169 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:46:54.169 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:46:54.169 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:46:54.169 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:46:54.169 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:46:54.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:46:54.170 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:46:54.170 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:46:54.170 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:46:54.170 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:46:54.170 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:46:54.170 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:46:54.170 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:46:54.170 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:46:54.170 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:46:54.170 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:46:54.170 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:46:54.170 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:46:54.170 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:46:54.170 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:46:54.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:46:54.170 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:46:54.170 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:46:54.170 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:46:54.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:46:54.170 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:46:54.170 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:46:54.170 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:46:54.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:46:54.171 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:46:54.171 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:46:54.171 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:46:54.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:46:54.171 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:46:54.171 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:46:54.171 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:46:54.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:46:54.171 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:46:54.171 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:46:54.171 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:46:54.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:46:54.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:46:54.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:46:54.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:46:54.175 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:46:54.655 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:46:54.698 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:46:54.701 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:46:54.702 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:46:54.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:46:54.727 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:46:54.727 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:46:54.727 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:46:54.732 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:46:54.732 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:46:54.732 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:46:54.732 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:46:54.732 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:46:54.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD HANDOVER
2026-01-09 02:46:54.755 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:46:54.756 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:46:54.756 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:46:54.756 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:46:55.132 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:46:55.173 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:46:55.173 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:46:55.173 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:46:55.176 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:46:55.610 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:46:56.088 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:46:56.174 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:46:56.175 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:46:56.175 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:46:56.176 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:46:56.567 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:46:57.045 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:46:57.175 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:46:57.176 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:46:57.176 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:46:57.177 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:46:57.523 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:46:57.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:46:58.002 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:46:58.176 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:46:58.176 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:46:58.176 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:46:58.178 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:46:58.480 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:46:58.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:46:58.556 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:46:58.556 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:46:58.556 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:46:58.557 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:46:58.557 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:46:58.558 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:46:58.558 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:46:58.558 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:46:58.558 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:46:58.572 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD HANDOVER
2026-01-09 02:46:58.575 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:46:58.575 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:46:58.576 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:46:58.576 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:46:58.958 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 02:46:59.177 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:46:59.177 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:46:59.177 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:46:59.179 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:46:59.436 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 02:46:59.914 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 02:47:00.392 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 02:47:00.870 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 02:47:01.348 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 02:47:01.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:47:01.827 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 02:47:02.305 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 02:47:02.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:47:02.455 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:47:02.456 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:47:02.456 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:47:02.473 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:47:02.473 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:47:02.473 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:47:02.475 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:47:02.475 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:47:02.476 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:47:02.476 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:47:02.476 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:47:02.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD HANDOVER
2026-01-09 02:47:02.524 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:47:02.524 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-09 02:47:02.524 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:47:02.525 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:47:02.783 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 02:47:03.262 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 02:47:03.741 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 02:47:04.219 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 02:47:04.698 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 02:47:05.176 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 02:47:05.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:47:05.656 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 02:47:06.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:47:06.111 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:47:06.112 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:47:06.112 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:47:06.112 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:47:06.112 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:47:06.112 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:47:06.112 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:47:06.113 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:47:06.113 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:47:06.113 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:47:06.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD HANDOVER
2026-01-09 02:47:06.130 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:47:06.130 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-09 02:47:06.131 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:47:06.131 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:47:06.134 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 02:47:06.613 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 02:47:07.092 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-09 02:47:07.572 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-09 02:47:08.051 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-09 02:47:08.529 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-09 02:47:09.008 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-09 02:47:09.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:47:09.486 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-09 02:47:09.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:47:09.536 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:47:09.536 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:47:09.537 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:47:09.537 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:47:09.556 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:47:09.556 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:47:09.556 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:47:09.558 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:47:09.558 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:47:09.558 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:47:09.559 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:47:09.559 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:47:09.603 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD HANDOVER
2026-01-09 02:47:09.609 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:47:09.609 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:47:09.610 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:47:09.610 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:47:09.964 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-09 02:47:10.442 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-09 02:47:10.919 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-09 02:47:11.397 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-09 02:47:11.875 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-09 02:47:12.353 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-09 02:47:12.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:47:12.857 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-09 02:47:13.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:47:13.297 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:47:13.298 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:47:13.298 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:47:13.299 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:47:13.299 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:47:13.300 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:47:13.300 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:47:13.301 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:47:13.301 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:47:13.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD HANDOVER
2026-01-09 02:47:13.331 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:47:13.331 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:47:13.331 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:47:13.332 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:47:13.335 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-09 02:47:13.814 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-09 02:47:14.291 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-09 02:47:14.769 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-09 02:47:15.246 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-01-09 02:47:15.724 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-01-09 02:47:16.202 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-01-09 02:47:16.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:47:16.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:47:16.642 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:47:16.642 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:47:16.643 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:47:16.660 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:47:16.660 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:47:16.660 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:47:16.662 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:47:16.662 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:47:16.662 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:47:16.662 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:47:16.662 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:47:16.679 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-01-09 02:47:16.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD HANDOVER
2026-01-09 02:47:16.716 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:47:16.716 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 02:47:16.717 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:47:16.717 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:47:17.158 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-01-09 02:47:17.637 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-01-09 02:47:18.115 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-01-09 02:47:18.594 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-01-09 02:47:19.071 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-01-09 02:47:19.550 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-01-09 02:47:19.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:47:20.029 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-01-09 02:47:20.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:47:20.424 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:47:20.424 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:47:20.424 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:47:20.424 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:47:20.424 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:47:20.425 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:47:20.425 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:47:20.425 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:47:20.425 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:47:20.425 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:47:20.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD HANDOVER
2026-01-09 02:47:20.452 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:47:20.452 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 02:47:20.453 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:47:20.453 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:47:20.508 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-01-09 02:47:20.986 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-01-09 02:47:21.464 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-01-09 02:47:21.943 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-01-09 02:47:22.421 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-01-09 02:47:22.899 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-01-09 02:47:23.378 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-01-09 02:47:23.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:47:23.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:47:23.772 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:47:23.773 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:47:23.773 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:47:23.773 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:47:23.780 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:47:23.781 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:47:23.781 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:47:23.781 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:47:23.782 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:47:23.782 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:47:23.782 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:47:23.782 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:47:23.782 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:47:23.782 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:47:23.782 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:47:23.782 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=6311 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:47:23.782 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=6311 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:47:23.782 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=6311 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:47:23.782 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=6311 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:47:23.782 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=6311 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:47:23.782 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=6311 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:47:23.782 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=6311 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:47:23.782 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=6311 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:47:28.785 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:47:28.786 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:47:28.788 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:47:28.788 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:47:28.788 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:47:28.788 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:47:28.797 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:47:28.799 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:47:28.799 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:47:28.800 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:47:28.800 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:47:28.804 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:47:28.804 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:47:28.805 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:47:28.805 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:47:28.805 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:47:28.805 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:47:28.805 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:47:28.806 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:47:28.808 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:47:28.808 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:47:28.808 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:47:28.808 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:47:28.808 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:47:28.808 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:47:28.809 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:47:28.809 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:47:28.810 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:47:28.810 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:47:28.811 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:47:28.811 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:47:28.811 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:47:28.811 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:47:28.811 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:47:28.811 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:47:28.814 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:47:28.814 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:47:28.814 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:47:28.814 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:47:28.814 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:47:28.814 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:47:28.814 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:47:28.814 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:47:28.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:47:28.814 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:47:28.814 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:47:28.814 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:47:28.814 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:47:28.814 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:47:28.814 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:47:28.814 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:47:28.814 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:47:28.814 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:47:28.815 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:47:28.815 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:47:28.815 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:47:28.815 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:47:28.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:47:28.815 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:47:28.815 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:47:28.815 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:47:28.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:47:28.815 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:47:28.815 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:47:28.815 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:47:28.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:47:28.815 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:47:28.815 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:47:28.815 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:47:28.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:47:28.816 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:47:28.816 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:47:28.816 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:47:28.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:47:28.816 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:47:28.816 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:47:28.816 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:47:28.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:47:28.816 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:47:28.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:47:28.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:47:28.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:47:28.819 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:47:29.304 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:47:29.329 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:47:29.329 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:47:29.330 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:47:29.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:47:29.337 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:47:29.337 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:47:29.337 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:47:29.341 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:47:29.341 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:47:29.341 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:47:29.341 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:47:29.341 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:47:29.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD HANDOVER
2026-01-09 02:47:29.353 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:47:29.354 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:47:29.354 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:47:29.354 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:47:29.781 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:47:29.818 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:47:29.818 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:47:29.818 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:47:29.818 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:47:30.259 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:47:30.737 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:47:30.818 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:47:30.819 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:47:30.819 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:47:30.819 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:47:31.214 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:47:31.692 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:47:31.820 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:47:31.820 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:47:31.820 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:47:31.820 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:47:32.170 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:47:32.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:47:32.648 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:47:32.820 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:47:32.821 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:47:32.821 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:47:32.821 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:47:33.126 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:47:33.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:47:33.203 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:47:33.203 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:47:33.203 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:47:33.204 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:47:33.204 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:47:33.204 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:47:33.205 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:47:33.205 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:47:33.205 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:47:33.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD HANDOVER
2026-01-09 02:47:33.221 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:47:33.222 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:47:33.222 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:47:33.223 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:47:33.604 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 02:47:33.822 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:47:33.822 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:47:33.822 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:47:33.822 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:47:34.082 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 02:47:34.560 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 02:47:35.039 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 02:47:35.517 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 02:47:35.995 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 02:47:36.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:47:36.473 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 02:47:36.951 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 02:47:37.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:47:37.101 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:47:37.101 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:47:37.101 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:47:37.102 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:47:37.102 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:47:37.102 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:47:37.102 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:47:37.103 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:47:37.103 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:47:37.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD HANDOVER
2026-01-09 02:47:37.138 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:47:37.139 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:47:37.139 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:47:37.139 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:47:37.430 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 02:47:37.907 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 02:47:38.409 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 02:47:38.879 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 02:47:39.354 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 02:47:39.832 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 02:47:40.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:47:40.311 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 02:47:40.789 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 02:47:41.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:47:41.012 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:47:41.012 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:47:41.012 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:47:41.012 [WARNING] transceiver.py:250 (MS@172.18.122.22:6700) RX TRXD message (fn=2600 tn=5 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:47:41.012 [WARNING] transceiver.py:250 (MS@172.18.122.22:6700) RX TRXD message (fn=2600 tn=6 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:47:41.013 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:47:41.013 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:47:41.013 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:47:41.013 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:47:41.013 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:47:41.013 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:47:41.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD HANDOVER
2026-01-09 02:47:41.026 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:47:41.026 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:47:41.026 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:47:41.026 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:47:41.266 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 02:47:41.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:47:41.744 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-09 02:47:41.983 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:47:41.986 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:47:41.987 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:47:41.987 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:47:42.004 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:47:42.004 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:47:42.004 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:47:42.007 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:47:42.007 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:47:42.007 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:47:42.007 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:47:42.007 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:47:42.054 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD HANDOVER
2026-01-09 02:47:42.060 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:47:42.060 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-09 02:47:42.060 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:47:42.060 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:47:42.222 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-09 02:47:42.701 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-09 02:47:43.180 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-09 02:47:43.658 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-09 02:47:44.138 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-09 02:47:44.617 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-09 02:47:45.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:47:45.095 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-09 02:47:45.574 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-09 02:47:45.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:47:45.651 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:47:45.652 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:47:45.652 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:47:45.652 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:47:45.653 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:47:45.653 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:47:45.654 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:47:45.654 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:47:45.655 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:47:45.655 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:47:45.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD HANDOVER
2026-01-09 02:47:45.670 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:47:45.670 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-09 02:47:45.671 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:47:45.671 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:47:46.053 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-09 02:47:46.532 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-09 02:47:47.005 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-09 02:47:47.475 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-09 02:47:47.946 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-09 02:47:48.416 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-09 02:47:48.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:47:48.887 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-09 02:47:49.357 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-09 02:47:49.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:47:49.508 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:47:49.508 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:47:49.508 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:47:49.508 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:47:49.508 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:47:49.509 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:47:49.509 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:47:49.509 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:47:49.510 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:47:49.510 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:47:49.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD HANDOVER
2026-01-09 02:47:49.543 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:47:49.543 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-09 02:47:49.543 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:47:49.543 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:47:49.829 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-01-09 02:47:50.299 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-01-09 02:47:50.770 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-01-09 02:47:51.241 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-01-09 02:47:51.712 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-01-09 02:47:52.182 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-01-09 02:47:52.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:47:52.653 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-01-09 02:47:53.124 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-01-09 02:47:53.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:47:53.342 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:47:53.342 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:47:53.342 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:47:53.342 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:47:53.342 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:47:53.342 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:47:53.342 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:47:53.342 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:47:53.342 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:47:53.342 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:47:53.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD HANDOVER
2026-01-09 02:47:53.360 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:47:53.360 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-09 02:47:53.360 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:47:53.360 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:47:53.597 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-01-09 02:47:53.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:47:54.076 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-01-09 02:47:54.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:47:54.319 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:47:54.319 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:47:54.319 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:47:54.320 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:47:54.338 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:47:54.338 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:47:54.338 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:47:54.340 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:47:54.340 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:47:54.340 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:47:54.341 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:47:54.341 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:47:54.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD HANDOVER
2026-01-09 02:47:54.392 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:47:54.392 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:47:54.392 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:47:54.393 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:47:54.550 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-01-09 02:47:55.024 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-01-09 02:47:55.502 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-01-09 02:47:55.980 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-01-09 02:47:56.458 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-01-09 02:47:56.936 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-01-09 02:47:57.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:47:57.413 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-01-09 02:47:57.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:47:57.855 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:47:57.855 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:47:57.855 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:47:57.856 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:47:57.857 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:47:57.857 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:47:57.857 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:47:57.858 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:47:57.858 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:47:57.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD HANDOVER
2026-01-09 02:47:57.888 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:47:57.888 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:47:57.888 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:47:57.888 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:47:57.891 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-01-09 02:47:58.369 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-01-09 02:47:58.847 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-01-09 02:47:59.325 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-01-09 02:47:59.802 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-01-09 02:48:00.280 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-01-09 02:48:00.758 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-01-09 02:48:00.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:48:01.195 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:48:01.198 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:48:01.198 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:48:01.198 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:48:01.199 [WARNING] transceiver.py:250 (MS@172.18.122.22:6700) RX TRXD message (fn=6931 tn=5 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:48:01.199 [WARNING] transceiver.py:250 (MS@172.18.122.22:6700) RX TRXD message (fn=6931 tn=6 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:48:01.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:48:01.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:48:01.199 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:48:01.199 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:48:01.200 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:48:01.200 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:48:01.228 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD HANDOVER
2026-01-09 02:48:01.231 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:48:01.231 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:48:01.232 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:48:01.233 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:48:01.236 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-01-09 02:48:01.714 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-01-09 02:48:02.192 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-01-09 02:48:02.670 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-01-09 02:48:03.147 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-01-09 02:48:03.625 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-01-09 02:48:04.103 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-01-09 02:48:04.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:48:04.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:48:04.543 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:48:04.543 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:48:04.543 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:48:04.543 [WARNING] transceiver.py:250 (MS@172.18.122.22:6700) RX TRXD message (fn=7645 tn=7 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:48:04.544 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:48:04.545 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:48:04.545 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:48:04.546 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:48:04.546 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:48:04.546 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:48:04.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD HANDOVER
2026-01-09 02:48:04.576 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:48:04.576 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:48:04.576 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:48:04.577 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:48:04.581 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-01-09 02:48:05.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:48:05.058 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-01-09 02:48:05.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:48:05.499 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:48:05.499 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:48:05.499 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:48:05.517 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:48:05.517 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:48:05.517 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:48:05.519 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:48:05.519 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:48:05.519 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:48:05.519 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:48:05.519 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:48:05.535 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-01-09 02:48:05.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD HANDOVER
2026-01-09 02:48:05.568 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:48:05.568 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 02:48:05.568 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:48:05.569 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:48:06.014 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-01-09 02:48:06.492 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-01-09 02:48:06.970 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-01-09 02:48:07.449 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-01-09 02:48:07.927 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-01-09 02:48:08.405 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-01-09 02:48:08.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:48:08.883 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-01-09 02:48:09.275 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:48:09.278 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:48:09.278 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:48:09.279 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:48:09.279 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:48:09.279 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:48:09.280 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:48:09.280 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:48:09.281 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:48:09.281 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:48:09.281 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:48:09.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD HANDOVER
2026-01-09 02:48:09.305 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:48:09.306 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 02:48:09.306 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:48:09.306 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:48:09.360 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-01-09 02:48:09.829 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-01-09 02:48:10.298 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-01-09 02:48:10.773 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-01-09 02:48:11.252 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-01-09 02:48:11.730 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-01-09 02:48:12.208 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-01-09 02:48:12.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:48:12.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:48:12.604 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:48:12.605 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:48:12.605 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:48:12.605 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:48:12.606 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:48:12.606 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:48:12.607 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:48:12.607 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:48:12.608 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:48:12.608 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:48:12.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD HANDOVER
2026-01-09 02:48:12.631 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:48:12.631 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 02:48:12.632 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:48:12.632 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:48:12.686 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-01-09 02:48:13.165 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-01-09 02:48:13.643 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-01-09 02:48:14.122 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-01-09 02:48:14.600 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-01-09 02:48:15.078 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-01-09 02:48:15.557 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-01-09 02:48:15.698 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:48:15.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:48:15.951 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:48:15.951 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:48:15.951 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:48:15.951 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:48:15.951 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:48:15.951 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:48:15.951 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:48:15.951 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:48:15.951 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:48:15.951 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:48:15.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD HANDOVER
2026-01-09 02:48:15.979 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:48:15.979 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 02:48:15.979 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:48:15.980 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:48:16.034 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-01-09 02:48:16.512 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-01-09 02:48:16.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:48:16.905 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:48:16.907 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:48:16.908 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:48:16.908 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:48:16.908 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:48:16.916 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:48:16.916 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:48:16.916 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:48:16.916 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:48:16.923 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:48:16.923 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:48:16.923 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:48:16.923 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:48:16.923 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:48:16.923 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:48:16.924 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:48:16.924 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=10290 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:48:16.924 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=10290 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:48:16.924 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=10290 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:48:16.924 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=10290 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:48:16.924 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=10290 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:48:16.925 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=10290 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:48:16.925 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=10291 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:48:16.925 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=10291 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:48:16.925 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=10291 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:48:16.925 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=10291 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:48:16.925 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=10291 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:48:16.925 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=10291 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:48:16.925 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=10291 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:48:16.925 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=10291 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:48:21.921 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:48:21.921 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:48:21.923 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:48:21.924 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:48:21.924 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:48:21.925 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:48:21.933 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:48:21.934 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:48:21.934 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:48:21.934 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:48:21.934 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:48:21.936 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:48:21.936 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:48:21.936 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:48:21.936 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:48:21.937 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:48:21.937 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:48:21.937 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:48:21.937 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:48:21.938 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:48:21.938 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:48:21.938 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:48:21.938 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:48:21.939 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:48:21.939 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:48:21.939 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:48:21.939 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:48:21.940 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:48:21.940 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:48:21.940 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:48:21.940 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:48:21.940 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:48:21.940 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:48:21.940 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:48:21.940 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:48:21.942 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:48:21.942 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:48:21.942 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:48:21.942 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:48:21.942 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:48:21.943 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:48:21.943 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:48:21.943 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:48:21.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:48:21.943 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:48:21.943 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:48:21.943 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:48:21.943 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:48:21.943 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:48:21.943 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:48:21.943 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:48:21.943 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:48:21.943 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:48:21.943 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:48:21.943 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:48:21.943 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:48:21.943 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:48:21.943 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:48:21.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:48:21.943 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:48:21.943 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:48:21.943 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:48:21.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:48:21.943 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:48:21.943 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:48:21.943 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:48:21.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:48:21.944 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:48:21.944 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:48:21.944 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:48:21.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:48:21.944 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:48:21.944 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:48:21.944 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:48:21.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:48:21.944 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:48:21.944 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:48:21.944 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:48:21.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:48:21.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:48:21.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:48:21.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:48:21.948 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:48:22.425 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:48:22.458 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:48:22.459 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:48:22.459 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:48:22.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:48:22.460 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:48:22.460 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:48:22.460 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:48:22.461 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:48:22.461 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:48:22.461 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:48:22.461 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:48:22.461 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:48:22.895 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:48:22.945 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:48:22.945 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:48:22.945 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:48:22.947 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:48:23.365 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:48:23.835 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:48:23.946 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:48:23.946 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:48:23.946 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:48:23.947 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:48:24.306 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:48:24.776 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:48:24.946 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:48:24.947 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:48:24.947 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:48:24.949 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:48:25.247 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:48:25.718 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:48:25.947 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:48:25.947 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:48:25.947 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:48:25.950 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:48:26.188 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:48:26.659 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 02:48:26.948 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:48:26.948 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:48:26.948 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:48:26.950 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:48:27.133 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 02:48:27.603 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 02:48:28.073 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 02:48:28.542 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 02:48:29.013 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 02:48:29.484 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 02:48:29.955 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 02:48:30.428 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 02:48:30.898 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 02:48:31.211 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:48:31.211 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:48:31.217 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:48:31.218 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:48:31.218 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:48:31.218 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:48:31.223 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:48:31.223 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:48:31.224 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:48:31.224 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:48:31.224 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:48:31.224 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:48:31.224 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:48:31.225 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2010 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:48:31.225 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2010 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:48:31.225 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2010 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:48:31.225 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2010 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:48:31.225 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2010 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:48:31.225 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2010 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:48:31.225 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2010 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:48:31.225 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2011 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:48:31.225 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2011 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:48:31.226 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2011 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:48:31.226 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2011 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:48:31.226 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2011 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:48:31.226 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2011 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:48:31.226 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2011 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:48:31.226 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2011 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:48:36.220 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:48:36.221 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:48:36.223 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:48:36.224 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:48:36.224 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:48:36.225 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:48:36.233 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:48:36.233 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:48:36.233 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:48:36.234 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:48:36.234 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:48:36.236 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:48:36.236 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:48:36.236 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:48:36.236 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:48:36.236 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:48:36.237 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:48:36.237 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:48:36.237 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:48:36.239 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:48:36.239 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:48:36.239 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:48:36.239 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:48:36.239 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:48:36.239 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:48:36.239 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:48:36.239 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:48:36.241 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:48:36.241 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:48:36.242 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:48:36.242 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:48:36.242 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:48:36.242 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:48:36.242 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:48:36.242 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:48:36.244 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:48:36.245 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:48:36.245 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:48:36.245 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:48:36.245 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:48:36.245 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:48:36.245 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:48:36.245 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:48:36.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:48:36.245 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:48:36.245 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:48:36.245 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:48:36.245 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:48:36.245 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:48:36.245 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:48:36.245 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:48:36.245 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:48:36.245 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:48:36.245 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:48:36.246 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:48:36.246 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:48:36.246 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:48:36.246 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:48:36.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:48:36.246 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:48:36.246 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:48:36.246 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:48:36.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:48:36.246 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:48:36.246 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:48:36.246 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:48:36.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:48:36.246 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:48:36.246 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:48:36.246 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:48:36.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:48:36.246 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:48:36.247 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:48:36.247 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:48:36.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:48:36.247 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:48:36.247 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:48:36.247 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:48:36.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:48:36.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:48:36.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:48:36.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:48:36.250 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:48:36.731 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:48:36.779 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:48:36.781 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:48:36.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:48:36.782 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:48:36.785 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:48:36.785 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:48:36.786 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:48:36.787 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:48:36.787 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:48:36.788 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:48:36.788 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:48:36.788 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:48:37.208 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:48:37.248 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:48:37.249 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:48:37.249 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:48:37.253 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:48:37.680 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:48:38.151 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:48:38.249 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:48:38.250 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:48:38.250 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:48:38.254 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:48:38.622 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:48:39.095 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:48:39.251 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:48:39.251 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:48:39.251 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:48:39.255 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:48:39.564 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:48:40.036 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:48:40.251 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:48:40.252 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:48:40.252 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:48:40.256 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:48:40.515 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:48:40.993 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 02:48:41.252 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:48:41.252 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:48:41.253 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:48:41.256 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:48:41.465 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 02:48:41.937 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 02:48:42.407 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 02:48:42.877 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 02:48:43.348 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 02:48:43.820 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 02:48:44.290 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 02:48:44.760 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 02:48:45.231 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 02:48:45.586 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:48:45.587 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:48:45.593 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:48:45.593 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:48:45.593 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:48:45.593 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:48:45.595 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:48:45.595 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:48:45.595 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:48:45.595 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:48:45.595 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:48:45.595 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:48:45.595 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:48:45.595 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2018 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:48:45.595 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2018 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:48:45.595 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2018 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:48:50.597 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:48:50.598 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:48:50.600 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:48:50.601 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:48:50.601 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:48:50.602 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:48:50.613 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:48:50.614 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:48:50.614 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:48:50.615 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:48:50.615 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:48:50.618 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:48:50.618 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:48:50.618 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:48:50.618 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:48:50.619 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:48:50.619 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:48:50.619 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:48:50.619 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:48:50.621 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:48:50.621 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:48:50.621 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:48:50.621 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:48:50.621 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:48:50.621 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:48:50.621 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:48:50.621 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:48:50.623 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:48:50.623 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:48:50.623 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:48:50.623 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:48:50.623 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:48:50.623 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:48:50.623 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:48:50.623 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:48:50.624 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:48:50.625 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:48:50.625 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:48:50.625 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:48:50.625 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:48:50.625 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:48:50.625 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:48:50.625 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:48:50.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:48:50.625 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:48:50.625 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:48:50.625 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:48:50.625 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:48:50.625 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:48:50.625 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:48:50.625 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:48:50.625 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:48:50.625 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:48:50.625 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:48:50.625 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:48:50.625 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:48:50.625 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:48:50.625 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:48:50.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:48:50.625 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:48:50.626 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:48:50.626 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:48:50.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:48:50.626 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:48:50.626 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:48:50.626 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:48:50.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:48:50.626 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:48:50.626 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:48:50.626 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:48:50.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:48:50.626 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:48:50.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:48:50.626 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:48:50.626 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:48:50.626 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:48:50.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:48:50.626 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:48:50.626 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:48:50.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:48:50.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:48:50.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:48:50.630 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:48:51.105 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:48:51.155 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:48:51.157 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:48:51.159 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:48:51.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:48:51.162 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:48:51.162 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:48:51.162 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:48:51.573 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:48:51.627 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:48:51.628 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:48:51.629 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:48:51.632 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:48:52.043 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:48:52.164 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:48:52.164 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:48:52.164 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:48:52.165 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:48:52.165 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:48:52.514 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:48:52.628 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:48:52.629 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:48:52.630 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:48:52.632 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:48:52.985 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:48:53.455 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:48:53.629 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:48:53.630 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:48:53.630 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:48:53.633 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:48:53.926 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:48:54.397 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:48:54.631 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:48:54.631 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:48:54.631 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:48:54.634 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:48:54.868 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:48:55.343 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 02:48:55.632 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:48:55.632 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:48:55.632 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:48:55.634 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:48:55.813 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 02:48:56.282 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 02:48:56.753 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 02:48:57.225 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 02:48:57.695 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 02:48:58.167 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 02:48:58.642 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 02:48:59.112 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 02:48:59.582 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 02:49:00.052 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 02:49:00.523 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 02:49:00.992 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 02:49:01.468 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 02:49:01.946 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 02:49:02.424 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 02:49:02.902 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 02:49:03.380 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-09 02:49:03.858 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-09 02:49:03.992 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:49:03.992 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:49:03.999 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:49:04.000 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:49:04.000 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:49:04.000 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:49:04.005 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:49:04.005 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:49:04.005 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:49:04.005 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:49:04.005 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:49:04.005 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:49:04.006 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:49:04.006 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2889 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:49:04.006 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2889 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:49:04.006 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2889 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:49:04.006 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2889 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:49:04.006 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2889 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:49:04.007 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2889 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:49:04.007 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2889 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:49:04.007 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2889 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:49:04.007 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2890 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:49:04.007 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2890 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:49:09.006 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:49:09.006 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:49:09.006 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:49:09.006 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:49:09.006 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:49:09.006 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:49:09.013 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:49:09.014 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:49:09.014 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:49:09.014 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:49:09.014 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:49:09.017 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:49:09.018 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:49:09.018 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:49:09.018 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:49:09.018 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:49:09.018 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:49:09.018 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:49:09.018 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:49:09.021 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:49:09.021 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:49:09.021 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:49:09.021 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:49:09.021 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:49:09.022 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:49:09.022 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:49:09.022 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:49:09.024 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:49:09.024 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:49:09.024 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:49:09.024 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:49:09.025 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:49:09.025 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:49:09.025 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:49:09.025 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:49:09.028 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:49:09.028 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:49:09.028 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:49:09.028 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:49:09.028 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:49:09.028 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:49:09.028 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:49:09.028 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:49:09.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:49:09.029 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:49:09.029 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:49:09.029 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:49:09.029 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:49:09.029 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:49:09.029 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:49:09.029 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:49:09.029 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:49:09.029 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:49:09.029 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:49:09.029 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:49:09.029 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:49:09.029 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:49:09.029 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:49:09.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:49:09.029 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:49:09.029 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:49:09.029 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:49:09.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:49:09.030 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:49:09.030 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:49:09.030 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:49:09.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:49:09.030 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:49:09.030 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:49:09.030 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:49:09.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:49:09.030 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:49:09.030 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:49:09.030 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:49:09.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:49:09.030 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:49:09.030 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:49:09.030 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:49:09.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:49:09.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:49:09.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:49:09.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:49:09.034 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:49:09.514 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:49:09.560 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:49:09.562 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:49:09.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:49:09.565 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:49:09.567 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:49:09.568 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:49:09.568 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:49:09.568 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:49:09.568 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:49:09.568 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:49:09.569 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:49:09.569 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:49:09.991 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:49:10.032 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:49:10.033 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:49:10.034 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:49:10.036 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:49:10.469 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:49:10.604 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:49:10.947 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:49:11.034 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:49:11.034 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:49:11.034 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:49:11.037 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:49:11.151 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:49:11.420 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:49:11.667 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:49:11.892 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:49:12.035 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:49:12.036 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:49:12.036 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:49:12.038 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:49:12.370 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:49:12.848 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:49:13.036 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:49:13.037 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:49:13.037 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:49:13.039 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:49:13.326 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:49:13.681 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:49:13.804 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 02:49:14.037 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:49:14.038 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:49:14.038 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:49:14.039 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:49:14.190 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:49:14.281 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 02:49:14.719 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:49:14.758 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 02:49:15.237 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 02:49:15.250 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:49:15.714 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 02:49:16.192 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 02:49:16.670 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 02:49:17.148 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 02:49:17.272 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:49:17.626 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 02:49:18.103 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 02:49:18.581 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 02:49:19.059 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 02:49:19.285 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:49:19.285 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:49:19.291 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:49:19.291 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:49:19.291 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:49:19.292 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:49:19.297 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:49:19.298 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:49:19.298 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:49:19.298 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:49:19.298 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:49:19.298 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:49:19.298 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:49:19.299 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2194 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:49:19.299 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2194 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:49:19.299 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2194 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:49:24.296 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:49:24.296 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:49:24.298 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:49:24.299 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:49:24.299 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:49:24.300 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:49:24.308 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:49:24.308 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:49:24.308 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:49:24.308 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:49:24.308 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:49:24.310 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:49:24.310 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:49:24.310 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:49:24.310 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:49:24.310 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:49:24.310 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:49:24.311 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:49:24.311 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:49:24.312 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:49:24.312 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:49:24.312 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:49:24.312 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:49:24.312 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:49:24.312 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:49:24.312 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:49:24.312 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:49:24.314 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:49:24.314 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:49:24.314 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:49:24.314 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:49:24.314 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:49:24.315 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:49:24.315 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:49:24.315 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:49:24.317 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:49:24.317 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:49:24.317 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:49:24.317 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:49:24.317 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:49:24.317 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:49:24.317 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:49:24.317 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:49:24.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:49:24.318 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:49:24.318 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:49:24.318 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:49:24.318 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:49:24.318 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:49:24.318 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:49:24.318 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:49:24.318 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:49:24.318 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:49:24.318 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:49:24.318 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:49:24.318 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:49:24.318 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:49:24.318 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:49:24.318 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:49:24.318 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:49:24.318 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:49:24.318 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:49:24.318 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:49:24.318 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:49:24.318 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:49:24.318 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:49:24.319 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:49:24.319 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:49:24.319 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:49:24.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:49:24.319 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:49:24.319 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:49:24.319 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:49:24.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:49:24.319 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:49:24.319 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:49:24.319 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:49:24.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:49:24.319 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:49:24.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:49:24.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:49:24.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:49:24.323 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:49:24.799 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:49:24.845 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:49:24.847 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:49:24.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:49:24.850 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:49:24.870 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:49:24.870 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:49:24.870 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:49:24.875 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:49:24.876 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:49:24.876 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:49:24.876 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:49:24.876 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:49:24.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD HANDOVER
2026-01-09 02:49:24.902 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:49:24.902 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:49:24.902 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:49:24.902 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:49:24.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:49:24.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:49:24.968 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:49:24.969 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:49:24.969 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:49:24.987 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:49:24.987 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:49:24.987 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:49:24.988 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:49:24.988 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:49:24.988 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:49:24.988 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:49:24.988 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:49:25.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD HANDOVER
2026-01-09 02:49:25.042 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:49:25.043 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:49:25.043 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:49:25.043 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:49:25.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:49:25.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:49:25.222 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:49:25.222 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:49:25.222 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:49:25.240 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:49:25.241 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:49:25.241 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:49:25.242 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:49:25.242 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:49:25.242 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:49:25.242 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:49:25.242 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:49:25.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD HANDOVER
2026-01-09 02:49:25.274 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:49:25.278 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:49:25.279 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:49:25.279 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:49:25.279 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:49:25.321 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:49:25.322 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:49:25.322 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:49:25.325 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:49:25.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:49:25.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:49:25.487 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:49:25.488 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:49:25.488 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:49:25.506 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:49:25.506 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:49:25.506 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:49:25.507 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:49:25.508 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:49:25.508 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:49:25.508 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:49:25.508 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:49:25.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD HANDOVER
2026-01-09 02:49:25.561 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:49:25.562 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:49:25.562 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:49:25.562 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:49:25.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:49:25.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:49:25.739 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:49:25.740 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:49:25.740 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:49:25.752 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:49:25.758 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:49:25.758 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:49:25.758 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:49:25.759 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:49:25.759 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:49:25.759 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:49:25.759 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:49:25.759 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:49:25.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD HANDOVER
2026-01-09 02:49:25.805 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:49:25.805 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:49:25.806 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:49:25.806 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:49:25.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:49:25.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:49:25.815 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:49:25.815 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:49:25.815 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:49:25.834 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:49:25.834 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:49:25.834 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:49:25.835 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:49:25.835 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:49:25.835 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:49:25.835 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:49:25.835 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:49:25.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD HANDOVER
2026-01-09 02:49:25.843 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:49:25.843 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-01-09 02:49:25.843 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:49:25.843 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:49:25.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:49:25.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:49:25.846 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:49:25.846 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:49:25.846 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:49:25.846 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:49:25.857 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:49:25.857 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:49:25.857 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:49:25.858 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:49:25.859 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:49:25.859 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:49:25.859 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:49:25.859 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:49:25.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD HANDOVER
2026-01-09 02:49:25.898 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:49:25.899 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-01-09 02:49:25.899 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:49:25.899 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:49:25.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:49:25.905 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:49:25.908 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:49:25.908 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:49:25.909 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:49:25.909 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:49:25.926 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:49:25.926 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:49:25.927 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:49:25.928 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:49:25.928 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:49:25.928 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:49:25.928 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:49:25.928 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:49:25.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:49:25.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD HANDOVER
2026-01-09 02:49:25.935 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:49:25.935 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:49:25.935 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:49:25.935 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:49:25.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:49:25.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:49:25.940 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:49:25.940 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:49:25.940 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:49:25.949 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:49:25.949 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:49:25.949 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:49:25.950 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:49:25.950 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:49:25.950 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:49:25.950 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:49:25.950 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:49:25.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD HANDOVER
2026-01-09 02:49:25.996 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:49:25.996 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:49:25.996 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:49:25.996 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:49:26.003 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:49:26.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:49:26.010 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:49:26.010 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:49:26.010 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:49:26.025 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:49:26.025 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:49:26.025 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:49:26.027 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:49:26.027 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:49:26.027 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:49:26.027 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:49:26.027 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:49:26.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:49:26.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD HANDOVER
2026-01-09 02:49:26.031 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:49:26.032 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:49:26.032 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:49:26.032 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:49:26.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:49:26.035 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:49:26.035 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:49:26.035 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:49:26.035 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:49:26.041 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:49:26.041 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:49:26.041 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:49:26.042 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:49:26.042 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:49:26.042 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:49:26.042 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:49:26.042 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:49:26.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD HANDOVER
2026-01-09 02:49:26.087 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:49:26.087 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-09 02:49:26.088 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:49:26.088 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:49:26.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:49:26.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:49:26.097 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:49:26.098 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:49:26.098 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:49:26.098 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:49:26.118 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:49:26.118 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:49:26.118 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:49:26.119 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:49:26.120 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:49:26.120 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:49:26.120 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:49:26.120 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:49:26.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD HANDOVER
2026-01-09 02:49:26.124 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:49:26.124 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-09 02:49:26.124 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:49:26.124 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:49:26.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:49:26.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:49:26.140 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:49:26.140 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:49:26.140 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:49:26.140 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:49:26.153 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:49:26.153 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:49:26.154 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:49:26.155 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:49:26.155 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:49:26.155 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:49:26.155 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:49:26.155 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:49:26.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD HANDOVER
2026-01-09 02:49:26.173 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:49:26.173 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 02:49:26.173 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:49:26.173 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:49:26.223 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:49:26.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:49:26.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:49:26.293 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:49:26.293 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:49:26.293 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:49:26.294 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:49:26.312 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:49:26.312 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:49:26.312 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:49:26.314 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:49:26.314 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:49:26.314 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:49:26.314 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:49:26.314 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:49:26.322 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:49:26.323 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:49:26.323 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:49:26.327 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:49:26.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD HANDOVER
2026-01-09 02:49:26.369 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:49:26.369 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 02:49:26.369 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:49:26.370 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:49:26.538 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:49:26.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:49:26.545 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:49:26.545 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:49:26.545 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:49:26.545 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:49:26.563 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:49:26.563 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:49:26.564 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:49:26.565 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:49:26.565 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:49:26.565 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:49:26.565 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:49:26.565 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:49:26.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD HANDOVER
2026-01-09 02:49:26.599 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:49:26.599 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 02:49:26.599 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:49:26.599 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:49:26.694 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:49:26.802 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:49:26.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:49:26.812 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:49:26.812 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:49:26.812 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:49:26.812 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:49:26.826 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:49:26.826 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:49:26.826 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:49:26.827 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:49:26.827 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:49:26.827 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:49:26.827 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:49:26.828 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:49:26.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD HANDOVER
2026-01-09 02:49:26.886 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:49:26.887 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 02:49:26.887 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:49:26.887 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:49:27.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:49:27.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:49:27.052 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:49:27.053 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:49:27.053 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:49:27.053 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:49:27.063 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:49:27.063 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:49:27.063 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:49:27.064 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:49:27.064 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:49:27.064 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:49:27.064 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:49:27.064 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:49:27.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD HANDOVER
2026-01-09 02:49:27.120 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:49:27.121 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 02:49:27.121 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:49:27.121 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:49:27.165 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:49:27.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:49:27.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:49:27.307 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:49:27.308 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:49:27.308 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:49:27.308 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:49:27.323 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:49:27.324 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:49:27.324 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:49:27.327 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:49:27.328 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:49:27.328 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:49:27.328 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:49:27.329 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:49:27.329 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:49:27.329 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:49:27.330 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:49:27.330 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:49:27.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD HANDOVER
2026-01-09 02:49:27.351 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:49:27.351 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 02:49:27.351 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:49:27.352 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:49:27.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:49:27.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:49:27.561 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:49:27.562 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:49:27.562 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:49:27.562 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:49:27.580 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:49:27.580 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:49:27.580 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:49:27.581 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:49:27.582 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:49:27.582 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:49:27.582 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:49:27.582 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:49:27.638 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:49:27.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD HANDOVER
2026-01-09 02:49:27.644 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:49:27.644 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 02:49:27.644 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:49:27.644 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:49:27.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:49:27.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:49:27.824 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:49:27.824 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:49:27.825 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:49:27.825 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:49:27.843 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:49:27.844 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:49:27.844 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:49:27.845 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:49:27.845 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:49:27.845 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:49:27.845 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:49:27.845 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:49:27.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD HANDOVER
2026-01-09 02:49:27.878 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:49:27.878 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 02:49:27.878 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:49:27.879 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:49:28.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:49:28.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:49:28.068 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:49:28.069 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:49:28.069 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:49:28.069 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:49:28.080 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:49:28.081 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:49:28.081 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:49:28.081 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:49:28.081 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:49:28.082 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:49:28.082 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:49:28.082 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:49:28.082 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:49:28.082 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:49:28.082 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:49:33.084 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:49:33.084 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:49:33.086 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:49:33.088 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:49:33.091 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:49:33.094 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:49:33.110 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:49:33.111 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:49:33.111 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:49:33.111 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:49:33.111 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:49:33.114 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:49:33.115 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:49:33.115 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:49:33.115 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:49:33.116 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:49:33.116 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:49:33.116 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:49:33.116 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:49:33.119 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:49:33.119 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:49:33.119 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:49:33.119 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:49:33.120 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:49:33.120 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:49:33.120 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:49:33.120 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:49:33.123 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:49:33.123 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:49:33.123 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:49:33.123 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:49:33.123 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:49:33.124 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:49:33.124 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:49:33.124 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:49:33.127 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:49:33.127 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:49:33.127 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:49:33.127 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:49:33.128 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:49:33.128 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:49:33.128 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:49:33.128 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:49:33.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:49:33.128 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:49:33.128 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:49:33.128 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:49:33.128 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:49:33.128 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:49:33.128 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:49:33.128 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:49:33.129 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:49:33.129 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:49:33.129 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:49:33.129 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:49:33.129 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:49:33.129 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:49:33.129 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:49:33.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:49:33.129 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:49:33.129 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:49:33.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:49:33.129 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:49:33.129 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:49:33.129 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:49:33.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:49:33.130 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:49:33.130 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:49:33.130 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:49:33.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:49:33.130 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:49:33.130 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:49:33.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:49:33.130 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:49:33.130 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:49:33.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:49:33.130 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:49:33.130 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:49:33.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:49:33.130 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:49:33.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:49:33.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:49:33.134 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:49:33.612 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:49:33.654 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:49:33.656 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:49:33.657 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:49:33.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:49:33.677 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:49:33.677 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:49:33.678 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:49:33.681 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:49:33.681 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:49:33.681 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:49:33.681 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:49:33.682 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:49:33.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD HANDOVER
2026-01-09 02:49:33.715 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:49:33.715 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:49:33.716 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:49:33.716 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:49:33.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:49:34.088 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:49:34.133 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:49:34.133 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:49:34.133 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:49:34.134 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:49:34.558 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:49:35.027 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:49:35.134 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:49:35.134 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:49:35.135 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:49:35.135 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:49:35.502 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:49:35.774 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:49:35.774 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:49:35.779 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:49:35.779 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:49:35.779 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:49:35.779 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:49:35.782 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:49:35.782 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:49:35.782 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:49:35.782 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:49:35.782 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:49:35.782 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:49:35.782 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:49:35.782 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=571 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:49:35.782 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=571 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:49:40.784 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:49:40.784 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:49:40.786 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:49:40.786 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:49:40.786 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:49:40.787 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:49:40.796 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:49:40.797 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:49:40.797 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:49:40.798 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:49:40.798 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:49:40.800 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:49:40.800 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:49:40.800 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:49:40.800 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:49:40.800 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:49:40.801 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:49:40.801 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:49:40.801 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:49:40.802 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:49:40.803 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:49:40.803 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:49:40.803 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:49:40.803 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:49:40.803 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:49:40.803 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:49:40.803 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:49:40.805 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:49:40.805 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:49:40.805 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:49:40.805 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:49:40.805 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:49:40.805 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:49:40.805 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:49:40.805 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:49:40.808 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:49:40.808 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:49:40.808 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:49:40.808 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:49:40.808 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:49:40.808 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:49:40.808 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:49:40.808 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:49:40.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:49:40.808 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:49:40.808 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:49:40.808 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:49:40.808 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:49:40.808 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:49:40.808 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:49:40.808 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:49:40.809 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:49:40.809 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:49:40.809 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:49:40.809 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:49:40.809 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:49:40.809 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:49:40.809 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:49:40.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:49:40.809 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:49:40.809 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:49:40.809 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:49:40.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:49:40.810 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:49:40.810 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:49:40.810 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:49:40.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:49:40.810 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:49:40.810 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:49:40.810 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:49:40.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:49:40.810 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:49:40.810 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:49:40.810 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:49:40.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:49:40.810 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:49:40.810 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:49:40.811 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:49:40.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:49:40.811 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:49:40.811 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:49:40.811 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:49:40.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:49:40.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:49:40.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:49:40.811 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:49:40.811 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:49:40.811 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:49:40.811 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:49:45.815 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:49:45.815 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:49:45.817 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:49:45.817 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:49:45.817 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:49:45.818 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:49:45.830 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:49:45.831 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:49:45.831 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:49:45.831 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:49:45.831 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:49:45.834 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:49:45.834 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:49:45.834 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:49:45.834 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:49:45.834 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:49:45.835 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:49:45.835 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:49:45.835 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:49:45.837 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:49:45.837 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:49:45.837 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:49:45.837 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:49:45.837 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:49:45.837 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:49:45.837 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:49:45.838 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:49:45.839 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:49:45.840 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:49:45.840 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:49:45.840 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:49:45.840 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:49:45.840 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:49:45.840 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:49:45.840 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:49:45.843 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:49:45.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:49:45.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:49:45.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:49:45.843 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:49:45.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:49:45.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:49:45.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:49:45.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:49:45.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:49:45.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:49:45.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:49:45.843 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:49:45.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:49:45.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:49:45.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:49:45.844 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:49:45.844 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:49:45.844 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:49:45.844 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:49:45.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:49:45.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:49:45.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:49:45.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:49:45.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:49:45.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:49:45.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:49:45.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:49:45.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:49:45.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:49:45.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:49:45.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:49:45.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:49:45.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:49:45.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:49:45.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:49:45.845 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:49:45.845 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:49:45.845 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:49:45.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:49:45.845 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:49:45.845 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:49:45.845 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:49:45.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:49:45.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:49:45.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:49:45.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:49:45.848 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:49:46.329 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:49:46.374 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:49:46.376 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:49:46.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:49:46.379 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:49:46.808 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:49:46.847 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:49:46.847 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:49:46.847 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:49:46.850 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:49:47.285 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:49:47.763 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:49:47.848 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:49:47.849 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:49:47.849 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:49:47.851 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:49:48.237 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:49:48.706 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:49:48.850 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:49:48.850 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:49:48.850 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:49:48.853 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:49:49.180 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:49:49.659 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:49:49.852 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:49:49.852 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:49:49.852 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:49:49.853 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:49:50.138 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:49:50.613 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 02:49:50.853 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:49:50.853 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:49:50.854 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:49:50.854 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:49:51.081 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 02:49:51.552 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 02:49:51.866 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:49:51.866 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:49:51.866 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:49:51.866 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:49:51.867 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:49:51.868 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:49:51.868 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:49:51.868 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:49:51.868 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:49:51.868 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:49:51.868 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:49:56.868 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:49:56.868 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:49:56.870 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:49:56.872 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:49:56.872 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:49:56.873 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:49:56.881 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:49:56.881 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:49:56.881 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:49:56.882 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:49:56.882 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:49:56.883 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:49:56.884 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:49:56.884 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:49:56.884 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:49:56.884 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:49:56.884 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:49:56.884 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:49:56.884 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:49:56.886 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:49:56.886 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:49:56.886 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:49:56.886 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:49:56.886 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:49:56.886 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:49:56.886 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:49:56.886 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:49:56.888 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:49:56.888 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:49:56.889 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:49:56.889 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:49:56.889 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:49:56.889 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:49:56.889 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:49:56.889 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:49:56.893 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:49:56.893 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:49:56.893 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:49:56.893 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:49:56.893 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:49:56.893 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:49:56.893 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:49:56.893 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:49:56.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:49:56.894 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:49:56.894 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:49:56.894 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:49:56.894 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:49:56.894 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:49:56.894 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:49:56.894 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:49:56.894 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:49:56.894 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:49:56.894 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:49:56.894 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:49:56.894 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:49:56.894 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:49:56.894 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:49:56.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:49:56.895 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:49:56.895 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:49:56.895 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:49:56.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:49:56.895 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:49:56.895 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:49:56.895 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:49:56.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:49:56.895 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:49:56.895 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:49:56.895 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:49:56.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:49:56.895 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:49:56.895 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:49:56.895 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:49:56.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:49:56.895 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:49:56.895 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:49:56.896 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:49:56.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:49:56.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:49:56.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:49:56.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:49:56.899 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:49:57.379 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:49:57.413 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:49:57.414 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:49:57.414 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:49:57.415 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:49:57.847 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:49:57.897 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:49:57.898 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:49:57.898 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:49:57.901 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:49:58.353 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:49:58.832 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:49:58.899 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:49:58.899 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:49:58.900 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:49:58.903 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:49:59.310 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:49:59.783 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:49:59.899 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:49:59.900 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:49:59.901 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:49:59.905 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:50:00.253 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:50:00.731 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:50:00.901 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:50:00.901 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:50:00.902 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:50:00.906 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:50:01.210 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:50:01.688 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 02:50:01.903 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:50:01.903 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:50:01.903 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:50:01.907 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:50:02.166 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 02:50:02.427 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:50:02.427 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:50:02.427 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:50:02.427 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:50:02.428 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:50:02.428 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:50:02.428 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:50:02.428 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:50:02.428 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:50:02.428 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:50:02.428 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:50:02.428 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1180 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:50:02.428 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1180 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:50:02.428 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1180 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:50:02.428 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1180 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:50:02.428 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1180 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:50:02.428 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1180 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:50:02.428 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1180 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:50:07.432 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:50:07.432 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:50:07.434 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:50:07.434 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:50:07.434 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:50:07.435 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:50:07.443 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:50:07.445 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:50:07.445 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:50:07.445 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:50:07.445 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:50:07.447 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:50:07.448 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:50:07.448 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:50:07.448 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:50:07.448 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:50:07.449 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:50:07.449 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:50:07.449 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:50:07.450 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:50:07.450 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:50:07.451 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:50:07.451 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:50:07.451 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:50:07.451 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:50:07.451 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:50:07.451 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:50:07.452 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:50:07.452 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:50:07.452 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:50:07.452 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:50:07.453 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:50:07.453 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:50:07.453 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:50:07.453 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:50:07.455 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:50:07.455 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:50:07.455 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:50:07.455 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:50:07.455 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:50:07.455 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:50:07.455 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:50:07.455 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:50:07.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:50:07.455 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:50:07.455 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:50:07.455 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:50:07.455 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:50:07.455 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:50:07.455 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:50:07.455 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:50:07.455 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:50:07.456 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:50:07.456 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:50:07.456 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:50:07.456 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:50:07.456 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:50:07.456 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:50:07.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:50:07.456 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:50:07.456 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:50:07.456 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:50:07.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:50:07.457 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:50:07.457 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:50:07.457 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:50:07.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:50:07.457 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:50:07.457 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:50:07.457 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:50:07.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:50:07.457 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:50:07.457 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:50:07.457 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:50:07.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:50:07.457 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:50:07.457 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:50:07.457 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:50:07.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:50:07.457 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:50:07.457 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:50:07.457 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:50:07.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:50:07.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:50:07.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:50:07.457 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:50:07.457 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:50:07.457 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:50:07.457 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:50:12.461 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:50:12.461 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:50:12.463 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:50:12.463 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:50:12.464 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:50:12.464 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:50:12.473 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:50:12.474 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:50:12.474 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:50:12.474 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:50:12.474 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:50:12.476 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:50:12.477 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:50:12.477 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:50:12.477 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:50:12.477 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:50:12.477 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:50:12.478 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:50:12.478 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:50:12.479 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:50:12.479 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:50:12.479 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:50:12.479 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:50:12.479 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:50:12.479 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:50:12.479 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:50:12.480 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:50:12.482 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:50:12.482 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:50:12.482 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:50:12.482 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:50:12.482 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:50:12.482 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:50:12.482 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:50:12.482 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:50:12.484 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:50:12.484 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:50:12.484 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:50:12.484 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:50:12.485 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:50:12.485 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:50:12.485 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:50:12.485 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:50:12.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:50:12.485 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:50:12.485 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:50:12.485 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:50:12.485 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:50:12.485 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:50:12.485 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:50:12.485 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:50:12.485 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:50:12.485 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:50:12.485 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:50:12.485 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:50:12.485 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:50:12.485 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:50:12.485 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:50:12.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:50:12.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:50:12.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:50:12.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:50:12.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:50:12.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:50:12.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:50:12.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:50:12.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:50:12.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:50:12.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:50:12.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:50:12.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:50:12.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:50:12.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:50:12.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:50:12.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:50:12.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:50:12.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:50:12.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:50:12.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:50:12.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:50:12.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:50:12.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:50:12.490 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:50:12.970 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:50:13.014 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:50:13.016 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:50:13.019 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:50:13.020 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:50:13.023 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:50:13.023 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:50:13.024 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:50:13.440 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:50:13.488 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:50:13.488 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:50:13.488 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:50:13.489 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:50:13.908 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:50:14.025 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:50:14.025 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:50:14.025 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:50:14.026 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:50:14.026 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:50:14.384 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:50:14.489 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:50:14.490 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:50:14.490 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:50:14.490 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:50:14.861 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:50:15.334 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:50:15.490 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:50:15.491 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:50:15.491 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:50:15.491 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:50:15.804 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:50:16.276 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:50:16.491 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:50:16.491 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:50:16.492 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:50:16.492 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:50:16.746 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:50:17.217 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 02:50:17.492 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:50:17.492 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:50:17.492 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:50:17.493 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:50:17.689 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 02:50:18.160 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 02:50:18.639 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 02:50:19.117 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 02:50:19.593 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 02:50:20.065 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 02:50:20.536 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 02:50:21.007 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 02:50:21.478 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 02:50:21.948 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 02:50:22.419 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 02:50:22.890 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 02:50:23.364 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 02:50:23.842 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 02:50:24.319 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 02:50:24.797 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 02:50:25.274 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-09 02:50:25.751 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-09 02:50:26.229 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-09 02:50:26.707 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-09 02:50:27.185 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-09 02:50:27.663 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-09 02:50:27.902 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:50:27.902 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:50:27.910 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:50:27.910 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:50:27.910 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:50:27.910 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:50:27.912 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:50:27.912 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:50:27.912 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:50:27.912 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:50:27.912 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:50:27.912 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:50:27.912 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:50:27.912 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3319 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:50:27.912 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3319 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:50:27.912 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3319 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:50:27.912 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3319 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:50:27.912 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3319 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:50:27.912 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3319 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:50:27.912 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3319 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:50:27.912 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3319 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:50:32.914 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:50:32.914 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:50:32.916 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:50:32.916 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:50:32.917 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:50:32.917 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:50:32.924 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:50:32.925 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:50:32.925 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:50:32.925 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:50:32.925 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:50:32.928 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:50:32.928 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:50:32.928 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:50:32.929 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:50:32.929 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:50:32.929 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:50:32.929 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:50:32.929 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:50:32.932 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:50:32.932 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:50:32.932 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:50:32.932 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:50:32.933 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:50:32.933 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:50:32.933 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:50:32.933 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:50:32.935 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:50:32.936 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:50:32.936 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:50:32.936 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:50:32.936 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:50:32.936 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:50:32.936 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:50:32.936 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:50:32.940 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:50:32.940 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:50:32.940 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:50:32.940 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:50:32.940 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:50:32.940 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:50:32.940 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:50:32.940 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:50:32.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:50:32.940 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:50:32.941 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:50:32.941 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:50:32.941 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:50:32.941 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:50:32.941 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:50:32.941 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:50:32.941 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:50:32.941 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:50:32.941 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:50:32.941 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:50:32.941 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:50:32.941 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:50:32.941 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:50:32.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:50:32.942 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:50:32.942 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:50:32.942 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:50:32.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:50:32.942 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:50:32.942 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:50:32.942 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:50:32.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:50:32.942 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:50:32.942 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:50:32.942 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:50:32.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:50:32.942 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:50:32.942 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:50:32.942 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:50:32.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:50:32.942 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:50:32.942 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:50:32.942 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:50:32.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:50:32.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:50:32.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:50:32.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:50:32.946 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:50:33.429 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:50:33.468 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:50:33.470 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:50:33.472 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:50:33.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:50:33.501 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:50:33.501 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:50:33.501 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:50:33.507 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:50:33.507 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:50:33.507 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:50:33.508 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:50:33.508 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:50:33.521 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:50:33.524 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:50:33.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:50:33.537 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:50:33.538 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:50:33.538 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:50:33.538 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:50:33.907 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:50:33.944 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:50:33.945 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:50:33.945 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:50:33.949 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:50:34.385 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:50:34.408 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:50:34.408 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:50:34.412 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:50:34.413 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:50:34.413 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:50:34.413 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:50:34.414 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:50:34.414 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:50:34.414 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:50:34.414 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:50:34.414 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:50:34.414 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:50:34.414 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:50:34.414 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=313 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:50:34.414 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=313 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:50:39.417 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:50:39.417 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:50:39.420 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:50:39.420 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:50:39.420 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:50:39.420 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:50:39.429 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:50:39.431 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:50:39.431 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:50:39.431 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:50:39.432 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:50:39.435 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:50:39.435 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:50:39.436 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:50:39.436 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:50:39.436 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:50:39.436 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:50:39.437 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:50:39.437 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:50:39.439 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:50:39.439 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:50:39.439 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:50:39.439 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:50:39.439 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:50:39.440 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:50:39.440 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:50:39.440 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:50:39.441 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:50:39.441 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:50:39.442 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:50:39.442 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:50:39.442 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:50:39.442 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:50:39.442 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:50:39.442 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:50:39.444 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:50:39.445 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:50:39.445 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:50:39.445 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:50:39.445 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:50:39.445 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:50:39.445 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:50:39.445 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:50:39.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:50:39.445 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:50:39.445 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:50:39.445 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:50:39.445 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:50:39.445 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:50:39.445 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:50:39.445 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:50:39.445 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:50:39.445 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:50:39.445 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:50:39.446 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:50:39.446 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:50:39.446 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:50:39.446 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:50:39.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:50:39.446 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:50:39.446 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:50:39.446 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:50:39.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:50:39.446 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:50:39.446 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:50:39.446 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:50:39.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:50:39.446 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:50:39.446 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:50:39.446 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:50:39.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:50:39.446 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:50:39.446 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:50:39.446 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:50:39.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:50:39.446 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:50:39.447 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:50:39.447 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:50:39.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:50:39.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:50:39.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:50:39.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:50:39.450 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:50:39.933 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:50:39.959 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:50:39.961 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:50:39.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:50:39.962 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:50:39.973 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:50:39.973 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:50:39.974 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:50:39.978 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:50:39.978 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:50:39.978 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:50:39.978 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:50:39.978 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:50:40.025 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:50:40.029 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:50:40.035 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:50:40.039 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:50:40.039 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:50:40.040 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:50:40.040 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:50:40.403 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:50:40.448 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:50:40.448 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:50:40.448 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:50:40.451 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:50:40.872 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:50:41.343 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:50:41.449 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:50:41.449 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:50:41.449 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:50:41.452 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:50:41.821 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:50:42.299 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:50:42.450 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:50:42.450 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:50:42.450 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:50:42.453 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:50:42.777 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:50:43.255 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:50:43.450 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:50:43.451 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:50:43.451 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:50:43.453 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:50:43.731 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:50:44.206 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 02:50:44.451 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:50:44.451 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:50:44.452 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:50:44.454 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:50:44.676 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 02:50:45.145 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 02:50:45.621 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 02:50:46.099 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 02:50:46.577 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 02:50:47.055 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 02:50:47.533 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 02:50:48.012 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 02:50:48.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:50:48.046 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:50:48.047 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:50:48.047 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:50:48.057 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:50:48.058 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:50:48.058 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:50:48.058 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:50:48.064 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:50:48.064 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:50:48.064 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:50:48.064 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:50:48.064 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:50:48.064 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:50:48.065 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:50:48.065 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1847 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:50:48.065 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1847 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:50:53.063 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:50:53.063 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:50:53.064 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:50:53.065 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:50:53.065 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:50:53.066 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:50:53.070 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:50:53.070 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:50:53.071 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:50:53.071 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:50:53.071 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:50:53.072 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:50:53.073 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:50:53.073 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:50:53.073 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:50:53.073 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:50:53.073 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:50:53.073 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:50:53.073 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:50:53.074 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:50:53.075 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:50:53.075 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:50:53.075 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:50:53.075 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:50:53.075 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:50:53.075 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:50:53.075 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:50:53.076 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:50:53.076 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:50:53.076 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:50:53.076 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:50:53.076 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:50:53.076 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:50:53.076 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:50:53.076 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:50:53.078 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:50:53.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:50:53.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:50:53.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:50:53.078 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:50:53.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:50:53.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:50:53.079 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:50:53.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:50:53.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:50:53.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:50:53.079 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:50:53.079 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:50:53.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:50:53.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:50:53.079 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:50:53.079 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:50:53.079 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:50:53.079 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:50:53.079 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:50:53.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:50:53.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:50:53.079 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:50:53.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:50:53.080 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:50:53.080 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:50:53.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:50:53.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:50:53.080 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:50:53.080 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:50:53.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:50:53.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:50:53.080 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:50:53.080 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:50:53.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:50:53.080 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:50:53.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:50:53.080 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:50:53.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:50:53.080 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:50:53.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:50:53.080 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:50:53.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:50:53.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:50:53.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:50:53.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:50:53.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:50:53.084 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:50:53.566 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:50:53.605 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:50:53.607 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:50:53.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:50:53.609 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:50:53.635 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:50:53.635 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:50:53.635 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:50:53.640 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:50:53.640 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:50:53.641 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:50:53.641 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:50:53.641 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:50:53.658 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:50:53.662 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:50:53.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:50:53.672 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:50:53.672 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-09 02:50:53.672 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:50:53.672 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:50:54.044 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:50:54.082 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:50:54.082 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:50:54.083 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:50:54.083 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:50:54.517 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:50:54.718 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:50:54.718 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:50:54.718 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:50:54.723 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:50:54.723 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:50:54.723 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:50:54.723 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:50:54.724 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:50:54.724 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:50:54.724 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:50:54.724 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:50:54.724 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:50:54.724 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:50:54.724 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:50:54.724 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=353 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:50:54.724 [WARNING] transceiver.py:250 (TRX2@172.18.122.20:5700/2) RX TRXD message (ver=1 fn=353 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:50:54.724 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=353 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:50:54.724 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=353 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:50:54.724 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=353 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:50:54.724 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=353 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:50:54.724 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=353 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:50:54.724 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=353 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:50:54.724 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=353 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:50:59.728 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:50:59.728 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:50:59.731 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:50:59.734 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:50:59.737 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:50:59.741 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:50:59.747 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:50:59.747 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:50:59.748 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:50:59.748 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:50:59.748 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:50:59.749 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:50:59.750 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:50:59.750 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:50:59.750 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:50:59.750 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:50:59.750 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:50:59.750 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:50:59.750 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:50:59.751 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:50:59.751 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:50:59.751 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:50:59.751 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:50:59.752 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:50:59.752 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:50:59.752 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:50:59.752 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:50:59.753 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:50:59.753 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:50:59.753 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:50:59.753 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:50:59.753 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:50:59.753 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:50:59.753 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:50:59.753 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:50:59.756 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:50:59.756 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:50:59.756 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:50:59.756 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:50:59.756 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:50:59.756 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:50:59.756 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:50:59.756 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:50:59.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:50:59.756 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:50:59.756 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:50:59.756 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:50:59.756 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:50:59.756 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:50:59.756 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:50:59.756 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:50:59.756 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:50:59.756 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:50:59.756 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:50:59.756 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:50:59.756 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:50:59.756 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:50:59.756 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:50:59.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:50:59.757 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:50:59.757 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:50:59.757 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:50:59.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:50:59.757 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:50:59.757 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:50:59.757 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:50:59.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:50:59.757 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:50:59.757 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:50:59.757 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:50:59.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:50:59.757 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:50:59.757 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:50:59.757 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:50:59.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:50:59.757 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:50:59.757 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:50:59.757 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:50:59.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:50:59.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:50:59.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:50:59.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:50:59.761 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:51:00.243 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:51:00.282 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:51:00.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:51:00.286 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:51:00.288 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:51:00.309 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:51:00.309 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:51:00.310 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:51:00.316 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:51:00.316 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:51:00.316 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:51:00.316 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:51:00.316 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:51:00.335 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:51:00.339 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:51:00.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:51:00.349 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:51:00.349 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-09 02:51:00.349 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:51:00.349 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:51:00.715 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:51:00.760 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:51:00.760 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:51:00.760 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:51:00.761 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:51:01.186 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:51:01.387 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:51:01.387 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:51:01.387 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:51:01.394 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:51:01.394 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:51:01.394 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:51:01.394 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:51:01.399 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:51:01.400 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:51:01.400 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:51:01.400 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:51:01.400 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:51:01.400 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:51:01.400 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:51:01.401 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=354 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:51:01.401 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=354 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:51:01.401 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=354 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:51:01.401 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=354 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:51:01.401 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=354 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:51:01.401 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=354 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:51:01.401 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=354 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:51:01.401 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=354 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:51:06.396 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:51:06.396 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:51:06.398 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:51:06.401 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:51:06.403 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:51:06.406 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:51:06.415 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:51:06.415 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:51:06.415 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:51:06.415 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:51:06.416 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:51:06.417 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:51:06.417 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:51:06.417 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:51:06.417 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:51:06.417 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:51:06.417 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:51:06.418 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:51:06.418 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:51:06.419 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:51:06.419 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:51:06.419 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:51:06.419 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:51:06.419 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:51:06.419 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:51:06.419 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:51:06.419 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:51:06.420 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:51:06.420 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:51:06.420 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:51:06.420 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:51:06.420 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:51:06.420 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:51:06.420 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:51:06.420 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:51:06.422 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:51:06.422 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:51:06.422 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:51:06.422 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:51:06.422 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:51:06.422 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:51:06.422 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:51:06.422 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:51:06.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:51:06.423 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:51:06.423 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:51:06.423 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:51:06.423 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:51:06.423 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:51:06.423 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:51:06.423 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:51:06.423 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:51:06.423 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:51:06.423 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:51:06.423 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:51:06.423 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:51:06.423 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:51:06.423 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:51:06.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:51:06.423 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:51:06.423 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:51:06.423 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:51:06.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:51:06.423 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:51:06.423 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:51:06.423 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:51:06.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:51:06.423 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:51:06.423 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:51:06.423 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:51:06.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:51:06.423 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:51:06.423 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:51:06.423 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:51:06.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:51:06.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:51:06.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:51:06.424 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:51:06.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:51:06.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:51:06.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:51:06.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:51:06.427 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:51:06.909 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:51:06.937 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:51:06.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:51:06.938 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:51:06.939 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:51:06.952 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:51:06.952 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:51:06.953 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:51:06.958 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:51:06.958 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:51:06.959 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:51:06.959 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:51:06.959 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:51:07.001 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:51:07.005 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:51:07.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:51:07.018 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:51:07.018 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-09 02:51:07.019 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:51:07.019 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:51:07.379 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:51:07.426 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:51:07.426 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:51:07.426 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:51:07.427 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:51:07.858 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:51:08.060 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:51:08.060 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:51:08.060 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:51:08.065 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:51:08.066 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:51:08.066 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:51:08.066 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:51:08.068 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:51:08.068 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:51:08.068 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:51:08.068 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:51:08.068 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:51:08.068 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:51:08.068 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:51:08.068 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=352 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:51:08.068 [WARNING] transceiver.py:250 (TRX2@172.18.122.20:5700/2) RX TRXD message (ver=1 fn=353 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:51:08.068 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=352 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:51:13.070 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:51:13.070 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:51:13.073 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:51:13.073 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:51:13.073 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:51:13.073 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:51:13.082 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:51:13.083 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:51:13.083 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:51:13.084 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:51:13.084 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:51:13.088 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:51:13.088 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:51:13.088 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:51:13.088 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:51:13.089 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:51:13.089 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:51:13.089 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:51:13.089 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:51:13.091 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:51:13.091 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:51:13.091 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:51:13.091 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:51:13.092 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:51:13.092 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:51:13.092 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:51:13.092 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:51:13.094 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:51:13.094 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:51:13.094 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:51:13.094 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:51:13.094 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:51:13.094 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:51:13.094 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:51:13.094 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:51:13.097 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:51:13.097 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:51:13.097 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:51:13.097 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:51:13.097 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:51:13.097 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:51:13.097 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:51:13.097 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:51:13.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:51:13.097 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:51:13.097 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:51:13.097 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:51:13.097 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:51:13.097 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:51:13.097 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:51:13.097 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:51:13.097 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:51:13.097 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:51:13.097 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:51:13.098 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:51:13.098 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:51:13.098 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:51:13.098 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:51:13.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:51:13.098 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:51:13.098 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:51:13.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:51:13.098 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:51:13.098 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:51:13.098 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:51:13.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:51:13.098 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:51:13.098 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:51:13.098 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:51:13.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:51:13.098 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:51:13.098 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:51:13.098 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:51:13.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:51:13.098 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:51:13.098 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:51:13.098 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:51:13.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:51:13.098 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:51:13.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:51:13.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:51:13.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:51:13.102 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:51:13.581 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:51:13.613 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:51:13.614 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:51:13.615 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:51:13.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:51:13.629 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:51:13.629 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:51:13.629 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:51:13.632 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:51:13.633 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:51:13.633 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:51:13.633 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:51:13.633 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:51:13.673 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:51:13.677 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:51:13.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:51:13.691 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:51:13.692 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:51:13.692 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:51:13.692 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:51:14.051 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:51:14.100 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:51:14.100 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:51:14.101 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:51:14.103 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:51:14.521 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:51:14.541 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:51:14.541 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:51:14.547 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:51:14.547 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:51:14.547 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:51:14.547 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:51:14.553 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:51:14.554 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:51:14.554 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:51:14.554 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:51:14.554 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:51:14.554 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:51:14.554 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:51:14.555 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=313 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:51:14.555 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=313 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:51:14.555 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=313 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:51:14.555 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=314 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:51:14.555 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=314 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:51:19.552 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:51:19.552 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:51:19.554 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:51:19.554 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:51:19.554 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:51:19.555 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:51:19.563 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:51:19.565 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:51:19.565 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:51:19.565 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:51:19.565 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:51:19.567 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:51:19.567 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:51:19.568 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:51:19.568 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:51:19.568 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:51:19.568 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:51:19.568 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:51:19.568 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:51:19.569 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:51:19.570 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:51:19.570 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:51:19.570 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:51:19.570 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:51:19.570 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:51:19.570 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:51:19.570 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:51:19.572 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:51:19.572 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:51:19.572 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:51:19.572 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:51:19.572 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:51:19.572 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:51:19.572 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:51:19.572 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:51:19.574 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:51:19.574 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:51:19.574 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:51:19.574 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:51:19.574 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:51:19.574 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:51:19.574 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:51:19.574 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:51:19.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:51:19.574 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:51:19.575 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:51:19.575 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:51:19.575 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:51:19.575 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:51:19.575 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:51:19.575 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:51:19.575 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:51:19.575 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:51:19.575 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:51:19.575 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:51:19.575 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:51:19.575 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:51:19.575 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:51:19.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:51:19.575 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:51:19.575 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:51:19.575 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:51:19.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:51:19.575 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:51:19.575 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:51:19.575 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:51:19.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:51:19.575 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:51:19.575 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:51:19.575 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:51:19.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:51:19.575 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:51:19.575 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:51:19.575 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:51:19.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:51:19.576 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:51:19.576 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:51:19.576 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:51:19.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:51:19.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:51:19.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:51:19.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:51:19.579 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:51:20.064 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:51:20.100 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:51:20.101 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:51:20.103 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:51:20.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:51:20.127 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:51:20.127 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:51:20.128 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:51:20.132 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:51:20.132 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:51:20.132 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:51:20.133 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:51:20.133 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:51:20.157 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:51:20.160 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:51:20.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:51:20.173 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:51:20.174 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-09 02:51:20.174 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:51:20.174 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:51:20.542 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:51:20.578 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:51:20.578 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:51:20.578 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:51:20.580 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:51:21.021 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:51:21.223 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:51:21.223 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:51:21.223 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:51:21.229 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:51:21.229 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:51:21.229 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:51:21.229 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:51:21.235 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:51:21.235 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:51:21.235 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:51:21.235 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:51:21.235 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:51:21.236 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:51:21.236 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:51:21.236 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=354 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:51:21.236 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=354 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:51:21.236 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=354 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:51:21.236 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=354 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:51:21.237 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=354 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:51:21.237 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=354 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:51:26.232 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:51:26.232 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:51:26.234 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:51:26.235 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:51:26.235 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:51:26.236 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:51:26.244 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:51:26.245 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:51:26.245 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:51:26.245 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:51:26.246 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:51:26.248 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:51:26.248 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:51:26.248 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:51:26.249 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:51:26.249 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:51:26.249 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:51:26.250 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:51:26.250 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:51:26.251 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:51:26.252 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:51:26.252 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:51:26.252 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:51:26.252 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:51:26.252 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:51:26.253 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:51:26.253 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:51:26.255 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:51:26.255 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:51:26.255 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:51:26.255 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:51:26.255 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:51:26.255 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:51:26.255 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:51:26.255 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:51:26.259 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:51:26.259 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:51:26.259 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:51:26.259 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:51:26.259 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:51:26.259 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:51:26.259 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:51:26.259 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:51:26.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:51:26.259 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:51:26.259 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:51:26.259 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:51:26.260 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:51:26.260 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:51:26.260 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:51:26.260 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:51:26.260 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:51:26.260 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:51:26.260 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:51:26.260 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:51:26.260 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:51:26.260 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:51:26.260 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:51:26.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:51:26.260 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:51:26.260 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:51:26.260 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:51:26.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:51:26.260 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:51:26.260 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:51:26.260 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:51:26.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:51:26.261 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:51:26.261 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:51:26.261 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:51:26.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:51:26.261 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:51:26.261 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:51:26.261 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:51:26.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:51:26.261 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:51:26.261 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:51:26.261 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:51:26.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:51:26.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:51:26.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:51:26.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:51:26.265 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:51:26.747 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:51:26.786 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:51:26.788 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:51:26.789 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:51:26.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:51:26.820 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:51:26.820 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:51:26.820 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:51:26.824 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:51:26.824 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:51:26.824 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:51:26.825 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:51:26.825 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:51:26.839 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:51:26.842 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:51:26.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:51:26.855 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:51:26.855 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:51:26.855 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:51:26.855 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:51:27.217 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:51:27.262 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:51:27.263 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:51:27.264 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:51:27.268 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:51:27.686 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:51:28.160 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:51:28.263 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:51:28.263 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:51:28.265 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:51:28.269 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:51:28.638 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:51:29.115 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:51:29.264 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:51:29.264 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:51:29.266 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:51:29.270 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:51:29.594 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:51:30.072 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:51:30.265 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:51:30.265 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:51:30.267 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:51:30.271 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:51:30.550 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:51:31.028 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 02:51:31.266 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:51:31.266 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:51:31.268 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:51:31.272 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:51:31.506 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 02:51:31.979 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 02:51:32.450 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 02:51:32.929 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 02:51:33.406 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 02:51:33.885 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 02:51:34.363 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 02:51:34.840 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 02:51:34.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:51:34.860 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:51:34.860 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:51:34.860 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:51:34.861 [WARNING] transceiver.py:250 (MS@172.18.122.22:6700) RX TRXD message (fn=1842 tn=4 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:51:34.878 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:51:34.879 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:51:34.879 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:51:34.880 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:51:34.881 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:51:34.881 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:51:34.881 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:51:34.881 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:51:34.883 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:51:34.883 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:51:34.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:51:34.886 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:51:34.886 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:51:34.886 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:51:34.886 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:51:35.317 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 02:51:35.795 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 02:51:36.273 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 02:51:36.751 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 02:51:37.229 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 02:51:37.707 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 02:51:38.185 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 02:51:38.662 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 02:51:39.140 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-09 02:51:39.618 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-09 02:51:40.096 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-09 02:51:40.574 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-09 02:51:41.052 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-09 02:51:41.530 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-09 02:51:42.008 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-09 02:51:42.486 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-09 02:51:42.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:51:42.891 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:51:42.892 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:51:42.892 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:51:42.910 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:51:42.911 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:51:42.911 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:51:42.912 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:51:42.912 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:51:42.912 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:51:42.912 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:51:42.912 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:51:42.957 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:51:42.958 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:51:42.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:51:42.963 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-09 02:51:42.965 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:51:42.966 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:51:42.966 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:51:42.966 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:51:43.441 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-09 02:51:43.919 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-09 02:51:44.397 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-09 02:51:44.875 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-09 02:51:45.353 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-09 02:51:45.831 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-09 02:51:46.309 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-09 02:51:46.787 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-09 02:51:47.265 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-01-09 02:51:47.743 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-01-09 02:51:48.221 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-01-09 02:51:48.699 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-01-09 02:51:49.177 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-01-09 02:51:49.654 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-01-09 02:51:50.132 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-01-09 02:51:50.610 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-01-09 02:51:50.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:51:50.972 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:51:50.972 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:51:50.972 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:51:50.982 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:51:50.982 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:51:50.982 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:51:50.984 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:51:50.984 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:51:50.984 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:51:50.984 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:51:50.984 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:51:51.030 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:51:51.036 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:51:51.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:51:51.046 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:51:51.046 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:51:51.046 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:51:51.046 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:51:51.088 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-01-09 02:51:51.566 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-01-09 02:51:52.044 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-01-09 02:51:52.522 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-01-09 02:51:53.000 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-01-09 02:51:53.477 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-01-09 02:51:53.955 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-01-09 02:51:54.432 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-01-09 02:51:54.910 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-01-09 02:51:55.388 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-01-09 02:51:55.866 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-01-09 02:51:56.344 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-01-09 02:51:56.822 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-01-09 02:51:57.300 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-01-09 02:51:57.778 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-01-09 02:51:58.255 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-01-09 02:51:58.732 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-01-09 02:51:59.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:51:59.052 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:51:59.053 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:51:59.053 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:51:59.066 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:51:59.066 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:51:59.066 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:51:59.067 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:51:59.069 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:51:59.069 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:51:59.069 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:51:59.069 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:51:59.069 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:51:59.069 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:51:59.069 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:51:59.069 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=7010 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:51:59.069 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=7010 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:51:59.070 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=7010 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:51:59.070 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=7010 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:51:59.070 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=7010 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:51:59.070 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=7010 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:51:59.070 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=7010 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:51:59.070 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=7010 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:52:04.074 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:52:04.074 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:52:04.075 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:52:04.075 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:52:04.075 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:52:04.075 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:52:04.082 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:52:04.083 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:52:04.083 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:52:04.083 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:52:04.083 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:52:04.086 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:52:04.086 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:52:04.086 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:52:04.087 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:52:04.087 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:52:04.087 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:52:04.087 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:52:04.087 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:52:04.089 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:52:04.090 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:52:04.090 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:52:04.090 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:52:04.090 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:52:04.090 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:52:04.090 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:52:04.090 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:52:04.092 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:52:04.092 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:52:04.092 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:52:04.092 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:52:04.093 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:52:04.093 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:52:04.093 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:52:04.093 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:52:04.095 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:52:04.095 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:52:04.095 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:52:04.095 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:52:04.095 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:52:04.095 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:52:04.095 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:52:04.096 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:52:04.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:52:04.096 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:52:04.096 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:52:04.096 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:52:04.096 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:52:04.096 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:52:04.096 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:52:04.096 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:52:04.096 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:52:04.096 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:52:04.096 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:52:04.096 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:52:04.096 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:52:04.096 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:52:04.096 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:52:04.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:52:04.096 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:52:04.096 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:52:04.097 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:52:04.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:52:04.097 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:52:04.097 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:52:04.097 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:52:04.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:52:04.097 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:52:04.097 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:52:04.097 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:52:04.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:52:04.097 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:52:04.097 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:52:04.097 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:52:04.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:52:04.097 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:52:04.097 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:52:04.097 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:52:04.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:52:04.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:52:04.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:52:04.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:52:04.101 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:52:04.583 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:52:04.623 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:52:04.625 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:52:04.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:52:04.627 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:52:04.647 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:52:04.647 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:52:04.648 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:52:04.652 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:52:04.653 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:52:04.653 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:52:04.653 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:52:04.653 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:52:04.675 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:52:04.679 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:52:04.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:52:04.692 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:52:04.692 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 02:52:04.692 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:52:04.692 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:52:05.060 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:52:05.098 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:52:05.098 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:52:05.100 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:52:05.102 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:52:05.539 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:52:06.017 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:52:06.099 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:52:06.100 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:52:06.101 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:52:06.103 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:52:06.496 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:52:06.974 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:52:07.100 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:52:07.101 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:52:07.101 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:52:07.104 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:52:07.204 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:52:07.204 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:52:07.204 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:52:07.207 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:52:07.207 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:52:07.207 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:52:07.207 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:52:07.208 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:52:07.208 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:52:07.208 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:52:07.208 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:52:07.208 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:52:07.208 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:52:07.208 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:52:12.211 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:52:12.211 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:52:12.213 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:52:12.213 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:52:12.213 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:52:12.214 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:52:12.225 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:52:12.226 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:52:12.226 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:52:12.226 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:52:12.227 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:52:12.229 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:52:12.230 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:52:12.230 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:52:12.230 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:52:12.230 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:52:12.230 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:52:12.231 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:52:12.231 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:52:12.232 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:52:12.232 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:52:12.232 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:52:12.232 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:52:12.232 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:52:12.232 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:52:12.232 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:52:12.232 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:52:12.234 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:52:12.234 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:52:12.234 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:52:12.234 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:52:12.234 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:52:12.234 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:52:12.235 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:52:12.235 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:52:12.237 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:52:12.237 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:52:12.237 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:52:12.237 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:52:12.237 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:52:12.237 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:52:12.237 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:52:12.237 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:52:12.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:52:12.237 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:52:12.237 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:52:12.237 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:52:12.237 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:52:12.237 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:52:12.237 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:52:12.237 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:52:12.237 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:52:12.237 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:52:12.237 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:52:12.237 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:52:12.238 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:52:12.238 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:52:12.238 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:52:12.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:52:12.238 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:52:12.238 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:52:12.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:52:12.238 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:52:12.238 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:52:12.238 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:52:12.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:52:12.238 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:52:12.238 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:52:12.238 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:52:12.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:52:12.238 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:52:12.238 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:52:12.238 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:52:12.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:52:12.238 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:52:12.238 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:52:12.238 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:52:12.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:52:12.238 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:52:12.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:52:12.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:52:12.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:52:12.242 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:52:12.726 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:52:12.755 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:52:12.756 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:52:12.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:52:12.757 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:52:12.766 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:52:12.766 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:52:12.766 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:52:12.770 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:52:12.770 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:52:12.770 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:52:12.771 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:52:12.771 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:52:12.818 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:52:12.820 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:52:12.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:52:12.834 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:52:12.834 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-09 02:52:12.834 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:52:12.835 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:52:13.196 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:52:13.240 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:52:13.240 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:52:13.240 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:52:13.241 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:52:13.665 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:52:13.865 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:52:13.865 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:52:13.865 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:52:13.870 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:52:13.875 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:52:13.876 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:52:13.876 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:52:13.877 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:52:13.877 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:52:13.877 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:52:13.878 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:52:13.878 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:52:13.878 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:52:13.878 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:52:13.878 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=352 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:52:13.878 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=352 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:52:13.879 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=352 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:52:13.879 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=352 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:52:13.879 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=352 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:52:13.879 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=352 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:52:13.879 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=353 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:52:13.879 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=353 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:52:13.879 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=353 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:52:13.879 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=353 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:52:13.879 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=353 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:52:13.879 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=353 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:52:13.880 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=353 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:52:13.880 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=353 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:52:13.880 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=354 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:52:13.880 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=354 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:52:13.880 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=354 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:52:13.880 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=354 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:52:13.880 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=354 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:52:13.880 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=354 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:52:13.880 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=354 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:52:13.880 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=354 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:52:18.874 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:52:18.874 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:52:18.878 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:52:18.878 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:52:18.878 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:52:18.878 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:52:18.888 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:52:18.889 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:52:18.889 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:52:18.890 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:52:18.890 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:52:18.893 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:52:18.893 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:52:18.893 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:52:18.893 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:52:18.893 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:52:18.893 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:52:18.893 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:52:18.893 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:52:18.896 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:52:18.896 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:52:18.896 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:52:18.896 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:52:18.896 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:52:18.896 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:52:18.896 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:52:18.896 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:52:18.898 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:52:18.898 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:52:18.898 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:52:18.898 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:52:18.898 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:52:18.898 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:52:18.898 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:52:18.898 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:52:18.901 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:52:18.901 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:52:18.901 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:52:18.901 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:52:18.901 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:52:18.901 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:52:18.901 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:52:18.901 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:52:18.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:52:18.901 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:52:18.901 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:52:18.901 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:52:18.901 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:52:18.901 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:52:18.901 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:52:18.901 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:52:18.902 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:52:18.902 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:52:18.902 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:52:18.902 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:52:18.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:52:18.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:52:18.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:52:18.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:52:18.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:52:18.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:52:18.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:52:18.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:52:18.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:52:18.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:52:18.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:52:18.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:52:18.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:52:18.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:52:18.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:52:18.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:52:18.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:52:18.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:52:18.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:52:18.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:52:18.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:52:18.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:52:18.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:52:18.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:52:18.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:52:18.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:52:18.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:52:18.906 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:52:19.388 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:52:19.429 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:52:19.431 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:52:19.433 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:52:19.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:52:19.454 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:52:19.454 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:52:19.455 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:52:19.458 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:52:19.459 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:52:19.459 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:52:19.460 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:52:19.460 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:52:19.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:52:19.491 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:52:19.491 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:52:19.491 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:52:19.492 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:52:19.865 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:52:19.904 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:52:19.904 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:52:19.904 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:52:19.907 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:52:20.344 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:52:20.814 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:52:20.905 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:52:20.905 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:52:20.906 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:52:20.907 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:52:21.283 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:52:21.754 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:52:21.906 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:52:21.906 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:52:21.906 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:52:21.909 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:52:22.233 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:52:22.711 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:52:22.907 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:52:22.907 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:52:22.907 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:52:22.910 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:52:23.190 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:52:23.667 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 02:52:23.908 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:52:23.908 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:52:23.908 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:52:23.911 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:52:24.146 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 02:52:24.624 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 02:52:25.102 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 02:52:25.579 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 02:52:26.057 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 02:52:26.535 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 02:52:27.014 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 02:52:27.491 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 02:52:27.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:52:27.500 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:52:27.502 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:52:27.502 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:52:27.518 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:52:27.518 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:52:27.518 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:52:27.518 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:52:27.519 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:52:27.519 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:52:27.519 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:52:27.519 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:52:27.519 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:52:27.519 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:52:27.520 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:52:27.520 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1844 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:52:27.520 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1844 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:52:27.520 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1844 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:52:27.520 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1844 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:52:27.520 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1844 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:52:27.520 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1844 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:52:27.520 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1844 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:52:27.520 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1844 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:52:32.523 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:52:32.523 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:52:32.525 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:52:32.525 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:52:32.526 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:52:32.526 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:52:32.534 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:52:32.534 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:52:32.534 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:52:32.535 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:52:32.535 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:52:32.537 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:52:32.537 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:52:32.537 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:52:32.537 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:52:32.537 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:52:32.537 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:52:32.537 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:52:32.537 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:52:32.539 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:52:32.539 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:52:32.540 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:52:32.540 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:52:32.540 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:52:32.540 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:52:32.540 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:52:32.540 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:52:32.542 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:52:32.542 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:52:32.542 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:52:32.542 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:52:32.542 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:52:32.542 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:52:32.542 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:52:32.542 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:52:32.545 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:52:32.545 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:52:32.545 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:52:32.545 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:52:32.545 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:52:32.545 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:52:32.545 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:52:32.545 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:52:32.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:52:32.545 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:52:32.545 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:52:32.545 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:52:32.545 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:52:32.545 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:52:32.545 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:52:32.545 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:52:32.545 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:52:32.545 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:52:32.545 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:52:32.546 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:52:32.546 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:52:32.546 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:52:32.546 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:52:32.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:52:32.546 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:52:32.546 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:52:32.546 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:52:32.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:52:32.546 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:52:32.546 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:52:32.546 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:52:32.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:52:32.546 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:52:32.546 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:52:32.546 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:52:32.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:52:32.546 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:52:32.546 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:52:32.547 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:52:32.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:52:32.547 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:52:32.547 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:52:32.547 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:52:32.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:52:32.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:52:32.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:52:32.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:52:32.550 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:52:33.034 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:52:33.069 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:52:33.071 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:52:33.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:52:33.071 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:52:33.089 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:52:33.089 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:52:33.089 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:52:33.092 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:52:33.092 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:52:33.092 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:52:33.092 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:52:33.092 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:52:33.131 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:52:33.137 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:52:33.137 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-09 02:52:33.138 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:52:33.138 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:52:33.503 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:52:33.548 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:52:33.548 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:52:33.550 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:52:33.551 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:52:33.973 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:52:34.446 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:52:34.549 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:52:34.549 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:52:34.551 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:52:34.552 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:52:34.923 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:52:35.393 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:52:35.550 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:52:35.550 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:52:35.552 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:52:35.553 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:52:35.862 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:52:36.332 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:52:36.551 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:52:36.552 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:52:36.553 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:52:36.554 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:52:36.803 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:52:37.274 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 02:52:37.553 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:52:37.553 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:52:37.555 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:52:37.555 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:52:37.745 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 02:52:38.215 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 02:52:38.686 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 02:52:39.157 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 02:52:39.632 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 02:52:40.111 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 02:52:40.590 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 02:52:41.068 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 02:52:41.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:52:41.146 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:52:41.148 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:52:41.148 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:52:41.148 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:52:41.166 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:52:41.166 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:52:41.166 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:52:41.167 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:52:41.168 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:52:41.168 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:52:41.168 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:52:41.169 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:52:41.169 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:52:41.169 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:52:41.169 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:52:41.169 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1859 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:52:41.169 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1859 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:52:41.169 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1859 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:52:41.169 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1859 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:52:41.169 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1859 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:52:41.169 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1859 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:52:41.169 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1859 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:52:41.169 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1859 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:52:46.170 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:52:46.171 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:52:46.172 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:52:46.172 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:52:46.173 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:52:46.173 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:52:46.178 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:52:46.179 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:52:46.179 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:52:46.179 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:52:46.179 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:52:46.181 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:52:46.181 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:52:46.181 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:52:46.181 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:52:46.181 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:52:46.181 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:52:46.181 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:52:46.181 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:52:46.183 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:52:46.183 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:52:46.184 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:52:46.184 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:52:46.184 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:52:46.184 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:52:46.184 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:52:46.184 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:52:46.186 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:52:46.186 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:52:46.186 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:52:46.186 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:52:46.186 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:52:46.186 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:52:46.186 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:52:46.186 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:52:46.190 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:52:46.190 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:52:46.190 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:52:46.190 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:52:46.190 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:52:46.190 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:52:46.190 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:52:46.190 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:52:46.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:52:46.191 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:52:46.191 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:52:46.191 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:52:46.191 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:52:46.191 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:52:46.191 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:52:46.191 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:52:46.191 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:52:46.191 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:52:46.191 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:52:46.191 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:52:46.191 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:52:46.191 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:52:46.191 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:52:46.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:52:46.192 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:52:46.192 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:52:46.192 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:52:46.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:52:46.192 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:52:46.192 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:52:46.192 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:52:46.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:52:46.192 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:52:46.192 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:52:46.192 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:52:46.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:52:46.192 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:52:46.192 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:52:46.192 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:52:46.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:52:46.192 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:52:46.192 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:52:46.193 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:52:46.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:52:46.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:52:46.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:52:46.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:52:46.196 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:52:46.679 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:52:46.718 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:52:46.721 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:52:46.723 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:52:46.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:52:46.749 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:52:46.750 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:52:46.750 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:52:46.754 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:52:46.754 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:52:46.754 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:52:46.754 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:52:46.754 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:52:47.156 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:52:47.194 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:52:47.194 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:52:47.195 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:52:47.199 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:52:47.634 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:52:48.112 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:52:48.194 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:52:48.195 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:52:48.195 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:52:48.200 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:52:48.590 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:52:49.068 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:52:49.195 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:52:49.196 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:52:49.196 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:52:49.201 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:52:49.546 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:52:50.023 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:52:50.196 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:52:50.196 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:52:50.197 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:52:50.202 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:52:50.502 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:52:50.979 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 02:52:51.197 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:52:51.197 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:52:51.198 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:52:51.202 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:52:51.457 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 02:52:51.935 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 02:52:52.413 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 02:52:52.890 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 02:52:53.231 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:52:53.231 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:52:53.238 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:52:53.238 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:52:53.238 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:52:53.238 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:52:53.239 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:52:53.239 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:52:53.239 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:52:53.239 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:52:53.239 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:52:53.239 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:52:53.239 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:52:58.242 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:52:58.242 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:52:58.244 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:52:58.244 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:52:58.244 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:52:58.245 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:52:58.253 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:52:58.253 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:52:58.253 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:52:58.254 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:52:58.254 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:52:58.257 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:52:58.257 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:52:58.257 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:52:58.257 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:52:58.257 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:52:58.257 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:52:58.258 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:52:58.258 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:52:58.260 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:52:58.260 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:52:58.260 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:52:58.260 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:52:58.261 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:52:58.261 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:52:58.261 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:52:58.261 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:52:58.263 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:52:58.263 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:52:58.263 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:52:58.263 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:52:58.263 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:52:58.263 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:52:58.264 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:52:58.264 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:52:58.266 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:52:58.266 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:52:58.266 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:52:58.266 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:52:58.266 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:52:58.267 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:52:58.267 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:52:58.267 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:52:58.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:52:58.267 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:52:58.267 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:52:58.267 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:52:58.267 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:52:58.267 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:52:58.267 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:52:58.267 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:52:58.267 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:52:58.267 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:52:58.267 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:52:58.267 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:52:58.267 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:52:58.267 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:52:58.267 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:52:58.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:52:58.268 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:52:58.268 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:52:58.268 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:52:58.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:52:58.268 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:52:58.268 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:52:58.268 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:52:58.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:52:58.268 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:52:58.268 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:52:58.268 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:52:58.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:52:58.268 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:52:58.268 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:52:58.268 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:52:58.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:52:58.268 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:52:58.268 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:52:58.268 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:52:58.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:52:58.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:52:58.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:52:58.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:52:58.272 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:52:58.755 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:52:58.797 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:52:58.799 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:52:58.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:52:58.800 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:52:58.817 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:52:58.817 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:52:58.818 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:52:58.825 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:52:58.825 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:52:58.826 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:52:58.826 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:52:58.826 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:52:59.232 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:52:59.270 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:52:59.270 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:52:59.271 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:52:59.274 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:52:59.709 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:53:00.187 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:53:00.271 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:53:00.271 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:53:00.271 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:53:00.275 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:53:00.664 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:53:01.143 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:53:01.272 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:53:01.273 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:53:01.273 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:53:01.276 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:53:01.620 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:53:02.098 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:53:02.274 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:53:02.275 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:53:02.275 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:53:02.277 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:53:02.576 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:53:03.054 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 02:53:03.275 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:53:03.276 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:53:03.276 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:53:03.278 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:53:03.313 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:53:03.313 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:53:03.313 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:53:03.313 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:53:03.314 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:53:03.315 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:53:03.315 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:53:03.315 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:53:03.315 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:53:03.315 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:53:03.315 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1078 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:53:03.315 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1078 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:53:03.315 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1078 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:53:03.315 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1078 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:53:03.315 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1078 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:53:03.315 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1078 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:53:03.534 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 02:53:04.018 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 02:53:04.501 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 02:53:04.985 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 02:53:05.466 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 02:53:05.944 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 02:53:06.423 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 02:53:06.905 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 02:53:07.384 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 02:53:07.863 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 02:53:08.317 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:53:08.318 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:53:08.319 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:53:08.319 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:53:08.319 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:53:08.320 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:53:08.322 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:53:08.324 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:53:08.325 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:53:08.334 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:53:08.335 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:53:08.335 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:53:08.335 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:53:08.335 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:53:08.337 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:53:08.337 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:53:08.337 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:53:08.337 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:53:08.337 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:53:08.337 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:53:08.337 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:53:08.337 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:53:08.339 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:53:08.339 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:53:08.339 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:53:08.339 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:53:08.339 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:53:08.339 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:53:08.339 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:53:08.339 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:53:08.340 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:53:08.340 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:53:08.340 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:53:08.340 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:53:08.340 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:53:08.340 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:53:08.340 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:53:08.340 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:53:08.342 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:53:08.342 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:53:08.342 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:53:08.342 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:53:08.342 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:53:08.343 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:53:08.343 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:53:08.343 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:53:08.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:53:08.343 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:53:08.343 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:53:08.343 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:53:08.343 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:53:08.343 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:53:08.343 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:53:08.343 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:53:08.343 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:53:08.343 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:53:08.343 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:53:08.343 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:53:08.343 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:53:08.343 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:53:08.343 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:53:08.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:53:08.343 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:53:08.343 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:53:08.343 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:53:08.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:53:08.344 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:53:08.344 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:53:08.344 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:53:08.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:53:08.344 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:53:08.344 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:53:08.344 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:53:08.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:53:08.344 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:53:08.344 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:53:08.344 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:53:08.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:53:08.344 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:53:08.344 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:53:08.344 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:53:08.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:53:08.344 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:53:08.344 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:53:08.345 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:53:08.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:53:08.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:53:08.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:53:08.345 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:53:08.345 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:53:08.345 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:53:08.345 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:53:13.349 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:53:13.349 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:53:13.352 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:53:13.352 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:53:13.352 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:53:13.352 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:53:13.361 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:53:13.362 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:53:13.362 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:53:13.363 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:53:13.363 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:53:13.366 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:53:13.367 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:53:13.367 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:53:13.367 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:53:13.368 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:53:13.368 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:53:13.368 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:53:13.368 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:53:13.370 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:53:13.370 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:53:13.370 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:53:13.370 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:53:13.371 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:53:13.371 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:53:13.371 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:53:13.371 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:53:13.372 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:53:13.372 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:53:13.373 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:53:13.373 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:53:13.373 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:53:13.373 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:53:13.373 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:53:13.373 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:53:13.375 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:53:13.375 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:53:13.376 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:53:13.376 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:53:13.376 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:53:13.376 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:53:13.376 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:53:13.376 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:53:13.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:53:13.376 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:53:13.376 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:53:13.376 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:53:13.376 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:53:13.376 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:53:13.376 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:53:13.376 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:53:13.376 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:53:13.376 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:53:13.376 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:53:13.376 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:53:13.376 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:53:13.376 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:53:13.376 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:53:13.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:53:13.377 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:53:13.377 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:53:13.377 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:53:13.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:53:13.377 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:53:13.377 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:53:13.377 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:53:13.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:53:13.377 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:53:13.377 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:53:13.377 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:53:13.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:53:13.377 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:53:13.377 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:53:13.377 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:53:13.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:53:13.377 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:53:13.377 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:53:13.377 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:53:13.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:53:13.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:53:13.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:53:13.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:53:13.381 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:53:13.861 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:53:13.905 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:53:13.908 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:53:13.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:53:13.910 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:53:13.926 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:53:13.926 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:53:13.926 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:53:13.931 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:53:13.931 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:53:13.931 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:53:13.932 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:53:13.932 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:53:14.338 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:53:14.379 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:53:14.380 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:53:14.380 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:53:14.381 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:53:14.816 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:53:15.294 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:53:15.381 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:53:15.381 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:53:15.381 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:53:15.382 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:53:15.772 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:53:16.249 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:53:16.382 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:53:16.383 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:53:16.383 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:53:16.383 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:53:16.727 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:53:17.205 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:53:17.383 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:53:17.384 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:53:17.384 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:53:17.384 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:53:17.683 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:53:18.161 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 02:53:18.384 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:53:18.384 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:53:18.384 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:53:18.385 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:53:18.639 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 02:53:19.117 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 02:53:19.417 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:53:19.595 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 02:53:20.073 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 02:53:20.418 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:53:20.551 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 02:53:21.029 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 02:53:21.419 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:53:21.507 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 02:53:21.985 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 02:53:22.420 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:53:22.463 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 02:53:22.940 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 02:53:23.419 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 02:53:23.421 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:53:23.421 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:53:23.898 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 02:53:24.377 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 02:53:24.856 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 02:53:25.337 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 02:53:25.818 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 02:53:26.298 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-09 02:53:26.483 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:53:26.777 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-09 02:53:27.255 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-09 02:53:27.484 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:53:27.733 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-09 02:53:28.211 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-09 02:53:28.485 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:53:28.689 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-09 02:53:29.167 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-09 02:53:29.486 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:53:29.644 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-09 02:53:30.122 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-09 02:53:30.487 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:53:30.600 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-09 02:53:31.078 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-09 02:53:31.488 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:53:31.556 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-09 02:53:32.034 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-09 02:53:32.512 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-09 02:53:32.991 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-09 02:53:33.468 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-09 02:53:33.573 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:53:33.573 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:53:33.586 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:53:33.587 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:53:33.587 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:53:33.587 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:53:33.592 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:53:33.592 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:53:33.593 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:53:33.593 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:53:33.593 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:53:33.593 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:53:33.593 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:53:33.593 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4312 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:53:33.594 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4312 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:53:33.594 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4312 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:53:33.594 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4312 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:53:33.594 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4312 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:53:33.594 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4312 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:53:33.594 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4313 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:53:33.594 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4313 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:53:38.589 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:53:38.589 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:53:38.591 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:53:38.591 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:53:38.592 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:53:38.593 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:53:38.604 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:53:38.605 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:53:38.605 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:53:38.605 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:53:38.605 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:53:38.607 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:53:38.607 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:53:38.607 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:53:38.607 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:53:38.608 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:53:38.608 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:53:38.608 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:53:38.608 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:53:38.609 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:53:38.610 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:53:38.610 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:53:38.610 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:53:38.610 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:53:38.610 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:53:38.610 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:53:38.610 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:53:38.611 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:53:38.611 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:53:38.611 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:53:38.611 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:53:38.611 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:53:38.611 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:53:38.611 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:53:38.611 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:53:38.613 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:53:38.613 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:53:38.613 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:53:38.613 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:53:38.613 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:53:38.614 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:53:38.614 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:53:38.614 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:53:38.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:53:38.614 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:53:38.614 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:53:38.614 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:53:38.614 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:53:38.614 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:53:38.614 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:53:38.614 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:53:38.614 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:53:38.614 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:53:38.614 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:53:38.614 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:53:38.614 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:53:38.614 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:53:38.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:53:38.615 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:53:38.615 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:53:38.615 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:53:38.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:53:38.615 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:53:38.615 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:53:38.615 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:53:38.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:53:38.615 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:53:38.615 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:53:38.615 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:53:38.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:53:38.615 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:53:38.615 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:53:38.615 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:53:38.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:53:38.615 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:53:38.615 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:53:38.615 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:53:38.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:53:38.615 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:53:38.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:53:38.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:53:38.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:53:38.619 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:53:39.097 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:53:39.137 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:53:39.138 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:53:39.139 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:53:39.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:53:39.159 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:53:39.159 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:53:39.159 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:53:39.163 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:53:39.163 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:53:39.163 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:53:39.163 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:53:39.163 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:53:39.189 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:53:39.193 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:53:39.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD NOHANDOVER
2026-01-09 02:53:39.205 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:53:39.205 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:53:39.205 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:53:39.205 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:53:39.227 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=132 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 02:53:39.241 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=135 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 02:53:39.255 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=138 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 02:53:39.269 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=141 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 02:53:39.283 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=144 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 02:53:39.297 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=147 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 02:53:39.310 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=150 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 02:53:39.324 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=153 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 02:53:39.338 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=156 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 02:53:39.352 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=159 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 02:53:39.366 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=162 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 02:53:39.380 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=165 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 02:53:39.407 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=171 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 02:53:39.421 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=174 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 02:53:39.435 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=177 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 02:53:39.449 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=180 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 02:53:39.463 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=183 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 02:53:39.477 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=186 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 02:53:39.490 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=189 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 02:53:39.504 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=192 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 02:53:39.518 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=195 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 02:53:39.532 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=198 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 02:53:39.546 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=201 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 02:53:39.560 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=204 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 02:53:39.567 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:53:39.583 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=210 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 02:53:39.596 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=213 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 02:53:39.610 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=216 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 02:53:39.617 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:53:39.617 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:53:39.618 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:53:39.619 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:53:40.036 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:53:40.477 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD NOHANDOVER
2026-01-09 02:53:40.480 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:53:40.480 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:53:40.480 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:53:40.493 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:53:40.494 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:53:40.494 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:53:40.494 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:53:40.499 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:53:40.499 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:53:40.499 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:53:40.499 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:53:40.499 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:53:40.500 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:53:40.500 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:53:40.500 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=408 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:53:40.500 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=408 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:53:40.500 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=408 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:53:40.500 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=408 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:53:40.501 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=408 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:53:40.501 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=408 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:53:40.501 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=408 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:53:40.501 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=408 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:53:45.497 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:53:45.497 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:53:45.499 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:53:45.501 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:53:45.506 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:53:45.506 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:53:45.516 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:53:45.517 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:53:45.517 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:53:45.518 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:53:45.518 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:53:45.521 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:53:45.521 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:53:45.521 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:53:45.522 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:53:45.522 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:53:45.522 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:53:45.522 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:53:45.522 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:53:45.524 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:53:45.524 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:53:45.524 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:53:45.524 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:53:45.525 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:53:45.525 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:53:45.525 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:53:45.525 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:53:45.526 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:53:45.526 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:53:45.526 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:53:45.526 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:53:45.527 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:53:45.527 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:53:45.527 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:53:45.527 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:53:45.529 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:53:45.529 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:53:45.529 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:53:45.529 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:53:45.529 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:53:45.529 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:53:45.529 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:53:45.529 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:53:45.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:53:45.530 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:53:45.530 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:53:45.530 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:53:45.530 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:53:45.530 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:53:45.530 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:53:45.530 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:53:45.530 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:53:45.530 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:53:45.530 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:53:45.530 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:53:45.530 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:53:45.530 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:53:45.530 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:53:45.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:53:45.530 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:53:45.530 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:53:45.530 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:53:45.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:53:45.530 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:53:45.530 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:53:45.530 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:53:45.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:53:45.531 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:53:45.531 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:53:45.531 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:53:45.531 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:53:45.531 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:53:45.531 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:53:45.531 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:53:45.531 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:53:45.531 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:53:45.531 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:53:45.531 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:53:45.531 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:53:45.531 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:53:45.531 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:53:45.531 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:53:45.535 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:53:46.016 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:53:46.054 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:53:46.056 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:53:46.057 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:53:46.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:53:46.075 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:53:46.076 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:53:46.076 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:53:46.079 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:53:46.079 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:53:46.079 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:53:46.079 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:53:46.079 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:53:46.108 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:53:46.112 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:53:46.119 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD NOHANDOVER
2026-01-09 02:53:46.125 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:53:46.125 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:53:46.125 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:53:46.125 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:53:46.146 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=132 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 02:53:46.160 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=135 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 02:53:46.174 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=138 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 02:53:46.188 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=141 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 02:53:46.202 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=144 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 02:53:46.215 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=147 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 02:53:46.229 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=150 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 02:53:46.243 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=153 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 02:53:46.257 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=156 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 02:53:46.271 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=159 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 02:53:46.285 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=162 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 02:53:46.298 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=165 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 02:53:46.326 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=171 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 02:53:46.340 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=174 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 02:53:46.354 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=177 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 02:53:46.368 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=180 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 02:53:46.382 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=183 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 02:53:46.395 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=186 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 02:53:46.409 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=189 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 02:53:46.423 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=192 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 02:53:46.437 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=195 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 02:53:46.451 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=198 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 02:53:46.465 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=201 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 02:53:46.478 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=204 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 02:53:46.485 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:53:46.502 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=210 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 02:53:46.516 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=213 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 02:53:46.529 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=216 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-09 02:53:46.533 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:53:46.533 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:53:46.533 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:53:46.535 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:53:46.954 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:53:47.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD NOHANDOVER
2026-01-09 02:53:47.400 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:53:47.400 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:53:47.400 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:53:47.411 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:53:47.411 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:53:47.411 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:53:47.411 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:53:47.417 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:53:47.417 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:53:47.417 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:53:47.418 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:53:47.418 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:53:47.418 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:53:47.418 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:53:47.418 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=406 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:53:47.418 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=406 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:53:47.419 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=406 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:53:47.419 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=406 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:53:47.419 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=406 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:53:47.419 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=407 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:53:47.419 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=407 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:53:52.416 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:53:52.416 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:53:52.418 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:53:52.420 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:53:52.420 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:53:52.420 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:53:52.428 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:53:52.429 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:53:52.429 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:53:52.430 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:53:52.430 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:53:52.432 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:53:52.433 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:53:52.433 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:53:52.433 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:53:52.433 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:53:52.434 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:53:52.434 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:53:52.434 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:53:52.435 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:53:52.436 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:53:52.436 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:53:52.436 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:53:52.436 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:53:52.436 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:53:52.436 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:53:52.436 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:53:52.438 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:53:52.438 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:53:52.438 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:53:52.438 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:53:52.438 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:53:52.438 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:53:52.439 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:53:52.439 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:53:52.441 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:53:52.441 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:53:52.441 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:53:52.441 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:53:52.441 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:53:52.441 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:53:52.441 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:53:52.441 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:53:52.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:53:52.441 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:53:52.441 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:53:52.441 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:53:52.441 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:53:52.441 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:53:52.441 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:53:52.441 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:53:52.442 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:53:52.442 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:53:52.442 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:53:52.442 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:53:52.442 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:53:52.442 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:53:52.442 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:53:52.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:53:52.442 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:53:52.442 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:53:52.442 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:53:52.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:53:52.442 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:53:52.442 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:53:52.442 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:53:52.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:53:52.442 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:53:52.442 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:53:52.442 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:53:52.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:53:52.442 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:53:52.442 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:53:52.442 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:53:52.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:53:52.443 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:53:52.443 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:53:52.443 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:53:52.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:53:52.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:53:52.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:53:52.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:53:52.446 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:53:52.930 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:53:52.964 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:53:52.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:53:52.966 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:53:52.967 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:53:52.986 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:53:52.986 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:53:52.987 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:53:52.991 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:53:52.992 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:53:52.992 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:53:52.993 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:53:52.993 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:53:53.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:53:53.033 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:53:53.033 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:53:53.034 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:53:53.034 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:53:53.407 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:53:53.409 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:53:53.409 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:53:53.415 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:53:53.416 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:53:53.416 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:53:53.416 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:53:53.422 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:53:53.422 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:53:53.423 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:53:53.423 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:53:53.423 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:53:53.423 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:53:53.424 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:53:53.424 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=208 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:53:53.424 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=208 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:53:53.424 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=208 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:53:53.424 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=208 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:53:53.424 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=208 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:53:53.424 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=208 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:53:53.425 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=208 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:53:53.425 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=209 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:53:53.425 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=209 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:53:53.425 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=209 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:53:53.425 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=209 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:53:53.425 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=209 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:53:53.425 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=209 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:53:53.425 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=209 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:53:53.425 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=209 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:53:58.423 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:53:58.423 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:53:58.423 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:53:58.424 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:53:58.424 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:53:58.424 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:53:58.432 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:53:58.433 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:53:58.433 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:53:58.434 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:53:58.434 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:53:58.438 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:53:58.438 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:53:58.438 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:53:58.439 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:53:58.439 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:53:58.439 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:53:58.440 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:53:58.440 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:53:58.442 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:53:58.442 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:53:58.442 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:53:58.442 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:53:58.443 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:53:58.443 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:53:58.443 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:53:58.443 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:53:58.445 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:53:58.445 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:53:58.445 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:53:58.445 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:53:58.446 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:53:58.446 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:53:58.446 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:53:58.446 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:53:58.448 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:53:58.449 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:53:58.449 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:53:58.449 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:53:58.449 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:53:58.449 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:53:58.449 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:53:58.449 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:53:58.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:53:58.449 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:53:58.449 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:53:58.449 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:53:58.449 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:53:58.449 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:53:58.449 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:53:58.449 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:53:58.449 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:53:58.449 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:53:58.449 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:53:58.450 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:53:58.450 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:53:58.450 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:53:58.450 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:53:58.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:53:58.450 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:53:58.450 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:53:58.450 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:53:58.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:53:58.450 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:53:58.450 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:53:58.450 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:53:58.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:53:58.450 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:53:58.450 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:53:58.450 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:53:58.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:53:58.450 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:53:58.450 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:53:58.450 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:53:58.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:53:58.450 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:53:58.450 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:53:58.450 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:53:58.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:53:58.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:53:58.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:53:58.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:53:58.454 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:53:58.935 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:53:58.969 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:53:58.970 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:53:58.971 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:53:58.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:53:58.997 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:53:58.998 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:53:58.998 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:53:59.003 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:53:59.005 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:53:59.006 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:53:59.006 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:53:59.006 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:53:59.006 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:53:59.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:53:59.038 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:53:59.039 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:53:59.039 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:53:59.039 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:53:59.413 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:53:59.453 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:53:59.453 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:53:59.453 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:53:59.456 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:53:59.891 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:54:00.368 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:54:00.454 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:54:00.455 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:54:00.455 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:54:00.456 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:54:00.846 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:54:01.324 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:54:01.455 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:54:01.455 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:54:01.456 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:54:01.457 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:54:01.800 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:54:02.274 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:54:02.456 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:54:02.456 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:54:02.456 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:54:02.458 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:54:02.742 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:54:03.209 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 02:54:03.457 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:54:03.457 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:54:03.457 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:54:03.458 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:54:03.684 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 02:54:04.162 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 02:54:04.636 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 02:54:05.108 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 02:54:05.579 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 02:54:06.049 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 02:54:06.519 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 02:54:06.987 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 02:54:07.454 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 02:54:07.924 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 02:54:08.391 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 02:54:08.859 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 02:54:09.328 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 02:54:09.415 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:54:09.418 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:54:09.419 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:54:09.419 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:54:09.431 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:54:09.431 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:54:09.431 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:54:09.432 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:54:09.434 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:54:09.434 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:54:09.434 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:54:09.434 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:54:09.434 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:54:09.434 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:54:09.435 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:54:09.435 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2370 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:54:09.435 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2370 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:54:09.435 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2370 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:54:14.435 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:54:14.436 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:54:14.437 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:54:14.440 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:54:14.442 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:54:14.445 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:54:14.458 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:54:14.459 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:54:14.459 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:54:14.459 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:54:14.459 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:54:14.464 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:54:14.464 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:54:14.464 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:54:14.464 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:54:14.464 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:54:14.464 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:54:14.464 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:54:14.464 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:54:14.466 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:54:14.466 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:54:14.466 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:54:14.466 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:54:14.466 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:54:14.466 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:54:14.466 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:54:14.466 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:54:14.468 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:54:14.468 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:54:14.468 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:54:14.468 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:54:14.468 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:54:14.468 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:54:14.468 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:54:14.468 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:54:14.470 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:54:14.470 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:54:14.470 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:54:14.471 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:54:14.471 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:54:14.471 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:54:14.471 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:54:14.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:54:14.471 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:54:14.471 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:54:14.471 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:54:14.471 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:54:14.471 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:54:14.471 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:54:14.471 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:54:14.471 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:54:14.471 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:54:14.471 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:54:14.471 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:54:14.471 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:54:14.471 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:54:14.471 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:54:14.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:54:14.471 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:54:14.471 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:54:14.471 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:54:14.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:54:14.471 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:54:14.471 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:54:14.471 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:54:14.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:54:14.471 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:54:14.471 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:54:14.471 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:54:14.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:54:14.471 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:54:14.472 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:54:14.472 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:54:14.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:54:14.472 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:54:14.472 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:54:14.472 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:54:14.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:54:14.472 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:54:14.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:54:14.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:54:14.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:54:14.476 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:54:14.952 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:54:14.983 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:54:14.984 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:54:14.984 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:54:14.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:54:14.992 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:54:14.992 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:54:14.992 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:54:14.994 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:54:14.995 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:54:14.995 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:54:14.995 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:54:14.995 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:54:14.995 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:54:15.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:54:15.048 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:54:15.048 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:54:15.048 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:54:15.048 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:54:15.426 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:54:15.475 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:54:15.475 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:54:15.475 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:54:15.475 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:54:15.901 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:54:16.373 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:54:16.476 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:54:16.476 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:54:16.476 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:54:16.477 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:54:16.844 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:54:17.314 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:54:17.477 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:54:17.477 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:54:17.478 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:54:17.478 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:54:17.785 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:54:18.255 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:54:18.478 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:54:18.478 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:54:18.478 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:54:18.478 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:54:18.727 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:54:19.198 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 02:54:19.478 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:54:19.479 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:54:19.479 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:54:19.479 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:54:19.670 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 02:54:20.139 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 02:54:20.610 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 02:54:21.079 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 02:54:21.551 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 02:54:22.023 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 02:54:22.495 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 02:54:22.967 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 02:54:23.435 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 02:54:23.911 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 02:54:24.389 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 02:54:24.863 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 02:54:25.331 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 02:54:25.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:54:25.431 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:54:25.432 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:54:25.432 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:54:25.435 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:54:25.435 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:54:25.435 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:54:25.435 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:54:25.436 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:54:25.436 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:54:25.436 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:54:25.436 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:54:25.436 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:54:25.436 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:54:25.436 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:54:30.439 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:54:30.440 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:54:30.442 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:54:30.444 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:54:30.446 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:54:30.449 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:54:30.456 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:54:30.457 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:54:30.457 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:54:30.457 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:54:30.457 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:54:30.458 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:54:30.458 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:54:30.458 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:54:30.458 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:54:30.458 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:54:30.458 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:54:30.458 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:54:30.458 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:54:30.460 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:54:30.460 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:54:30.460 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:54:30.460 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:54:30.460 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:54:30.460 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:54:30.460 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:54:30.460 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:54:30.461 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:54:30.461 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:54:30.461 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:54:30.461 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:54:30.461 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:54:30.461 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:54:30.461 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:54:30.461 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:54:30.463 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:54:30.463 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:54:30.463 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:54:30.463 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:54:30.463 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:54:30.463 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:54:30.463 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:54:30.463 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:54:30.463 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:54:30.463 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:54:30.463 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:54:30.463 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:54:30.463 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:54:30.463 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:54:30.463 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:54:30.463 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:54:30.463 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:54:30.463 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:54:30.463 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:54:30.464 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:54:30.464 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:54:30.464 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:54:30.464 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:54:30.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:54:30.464 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:54:30.464 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:54:30.464 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:54:30.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:54:30.464 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:54:30.464 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:54:30.464 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:54:30.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:54:30.464 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:54:30.464 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:54:30.464 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:54:30.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:54:30.464 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:54:30.464 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:54:30.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:54:30.464 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:54:30.464 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:54:30.464 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:54:30.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:54:30.464 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:54:30.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:54:30.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:54:30.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:54:30.468 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:54:30.944 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:54:30.979 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:54:30.979 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:54:30.980 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:54:30.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:54:30.991 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:54:30.991 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:54:30.991 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:54:30.993 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:54:30.995 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:54:30.995 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:54:30.995 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:54:30.995 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:54:30.995 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:54:31.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:54:31.038 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:54:31.038 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:54:31.038 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:54:31.038 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:54:31.416 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:54:31.465 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:54:31.466 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:54:31.467 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:54:31.469 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:54:31.888 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:54:31.902 [DEBUG] fake_trx.py:264 (MS@172.18.122.22:6700) Recv SETTA cmd
2026-01-09 02:54:32.359 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:54:32.467 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:54:32.467 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:54:32.467 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:54:32.470 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:54:32.833 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:54:33.311 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:54:33.467 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:54:33.468 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:54:33.468 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:54:33.470 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:54:33.793 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:54:34.262 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:54:34.468 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:54:34.468 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:54:34.468 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:54:34.471 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:54:34.732 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:54:35.203 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 02:54:35.469 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:54:35.469 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:54:35.469 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:54:35.472 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:54:35.671 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 02:54:36.139 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 02:54:36.612 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 02:54:37.082 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 02:54:37.553 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 02:54:38.026 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 02:54:38.496 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 02:54:38.971 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 02:54:39.444 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 02:54:39.917 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 02:54:40.387 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 02:54:40.857 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 02:54:41.329 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 02:54:41.800 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 02:54:42.270 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 02:54:42.741 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 02:54:43.213 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-09 02:54:43.689 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-09 02:54:44.162 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-09 02:54:44.633 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-09 02:54:45.103 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-09 02:54:45.576 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-09 02:54:46.045 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-09 02:54:46.519 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-09 02:54:46.994 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-09 02:54:47.472 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-09 02:54:47.950 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-09 02:54:48.428 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-09 02:54:48.906 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-09 02:54:49.384 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-09 02:54:49.862 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-09 02:54:50.340 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-09 02:54:50.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:54:50.633 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:54:50.634 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:54:50.634 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:54:50.645 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:54:50.645 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:54:50.645 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:54:50.645 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:54:50.650 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:54:50.650 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:54:50.651 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:54:50.651 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:54:50.651 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:54:50.651 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:54:50.651 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:54:50.651 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4352 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:54:50.652 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4352 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:54:50.652 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4352 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:54:50.652 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4353 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:54:50.652 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4353 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:54:50.652 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4353 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:54:50.652 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4353 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:54:50.652 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4353 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:54:50.652 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4353 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:54:50.652 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4353 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:54:50.653 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4353 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:54:55.647 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:54:55.648 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:54:55.649 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:54:55.650 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:54:55.650 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:54:55.651 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:54:55.655 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:54:55.655 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:54:55.655 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:54:55.655 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:54:55.655 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:54:55.656 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:54:55.657 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:54:55.657 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:54:55.657 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:54:55.657 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:54:55.657 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:54:55.658 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:54:55.658 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:54:55.659 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:54:55.659 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:54:55.659 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:54:55.659 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:54:55.659 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:54:55.659 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:54:55.659 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:54:55.659 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:54:55.661 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:54:55.661 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:54:55.661 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:54:55.661 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:54:55.661 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:54:55.661 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:54:55.661 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:54:55.661 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:54:55.663 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:54:55.663 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:54:55.663 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:54:55.663 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:54:55.663 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:54:55.663 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:54:55.664 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:54:55.664 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:54:55.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:54:55.664 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:54:55.664 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:54:55.664 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:54:55.664 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:54:55.664 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:54:55.664 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:54:55.664 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:54:55.664 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:54:55.664 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:54:55.664 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:54:55.664 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:54:55.664 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:54:55.664 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:54:55.664 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:54:55.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:54:55.664 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:54:55.664 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:54:55.664 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:54:55.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:54:55.664 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:54:55.664 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:54:55.664 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:54:55.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:54:55.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:54:55.665 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:54:55.665 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:54:55.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:54:55.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:54:55.665 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:54:55.665 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:54:55.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:54:55.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:54:55.665 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:54:55.665 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:54:55.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:54:55.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:54:55.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:54:55.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:54:55.669 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:54:56.145 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:54:56.195 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:54:56.198 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:54:56.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:54:56.200 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:54:56.240 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:54:56.240 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:54:56.241 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:54:56.246 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:54:56.248 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:54:56.248 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:54:56.248 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:54:56.248 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:54:56.248 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:54:56.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:54:56.297 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:54:56.297 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:54:56.297 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:54:56.297 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:54:56.618 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:54:56.666 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:54:56.666 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:54:56.667 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:54:56.670 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:54:57.092 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:54:57.567 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:54:57.668 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:54:57.668 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:54:57.668 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:54:57.671 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:54:58.044 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:54:58.519 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:54:58.669 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:54:58.669 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:54:58.669 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:54:58.671 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:54:58.992 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:54:59.467 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:54:59.669 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:54:59.669 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:54:59.669 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:54:59.672 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:54:59.943 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:55:00.418 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 02:55:00.670 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:55:00.670 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:55:00.670 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:55:00.672 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:55:00.891 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 02:55:01.363 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 02:55:01.837 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 02:55:02.311 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 02:55:02.786 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 02:55:03.261 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 02:55:03.729 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 02:55:04.201 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 02:55:04.675 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 02:55:05.150 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 02:55:05.625 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 02:55:06.101 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 02:55:06.576 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 02:55:07.051 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 02:55:07.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:55:07.116 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:55:07.117 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:55:07.117 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:55:07.133 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:55:07.134 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:55:07.134 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:55:07.134 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:55:07.137 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:55:07.137 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:55:07.137 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:55:07.137 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:55:07.137 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:55:07.137 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:55:07.137 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:55:07.137 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2467 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:55:07.137 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2467 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:55:07.137 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2467 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:55:07.137 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2467 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:55:07.137 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2467 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:55:07.137 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2467 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:55:07.137 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2467 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:55:07.137 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2468 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:55:07.137 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2468 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:55:07.137 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2468 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:55:07.137 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2468 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:55:07.137 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2468 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:55:07.137 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2468 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:55:07.137 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2468 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:55:07.137 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2468 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:55:12.135 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:55:12.135 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:55:12.135 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:55:12.136 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:55:12.136 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:55:12.137 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:55:12.140 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:55:12.141 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:55:12.141 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:55:12.141 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:55:12.141 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:55:12.142 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:55:12.142 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:55:12.142 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:55:12.142 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:55:12.142 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:55:12.142 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:55:12.142 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:55:12.142 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:55:12.144 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:55:12.144 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:55:12.144 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:55:12.144 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:55:12.144 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:55:12.144 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:55:12.144 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:55:12.144 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:55:12.145 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:55:12.146 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:55:12.146 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:55:12.146 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:55:12.146 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:55:12.146 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:55:12.146 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:55:12.146 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:55:12.148 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:55:12.148 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:55:12.148 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:55:12.148 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:55:12.148 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:55:12.148 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:55:12.148 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:55:12.148 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:55:12.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:55:12.148 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:55:12.148 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:55:12.148 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:55:12.148 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:55:12.148 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:55:12.148 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:55:12.148 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:55:12.148 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:55:12.148 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:55:12.148 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:55:12.148 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:55:12.149 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:55:12.149 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:55:12.149 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:55:12.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:55:12.149 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:55:12.149 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:55:12.149 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:55:12.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:55:12.149 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:55:12.149 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:55:12.149 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:55:12.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:55:12.149 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:55:12.149 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:55:12.149 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:55:12.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:55:12.149 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:55:12.149 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:55:12.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:55:12.149 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:55:12.149 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:55:12.149 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:55:12.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:55:12.149 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:55:12.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:55:12.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:55:12.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:55:12.153 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:55:12.631 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:55:12.660 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:55:12.661 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:55:12.661 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:55:12.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:55:12.670 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:55:12.670 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:55:12.670 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:55:12.672 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:55:12.673 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:55:12.673 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:55:12.673 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:55:12.673 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:55:12.673 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:55:12.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:55:12.731 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:55:12.732 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:55:12.732 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:55:12.732 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:55:12.732 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:55:13.101 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:55:13.152 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:55:13.152 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:55:13.152 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:55:13.152 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:55:13.575 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:55:13.592 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:55:14.048 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:55:14.153 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:55:14.153 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:55:14.153 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:55:14.153 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:55:14.518 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:55:14.990 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:55:15.154 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:55:15.154 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:55:15.154 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:55:15.154 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:55:15.461 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:55:15.936 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:55:16.154 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:55:16.154 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:55:16.154 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:55:16.154 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:55:16.406 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:55:16.875 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 02:55:17.170 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:55:17.171 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:55:17.171 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:55:17.171 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:55:17.351 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 02:55:17.827 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 02:55:18.301 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 02:55:18.771 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 02:55:19.245 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 02:55:19.374 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:55:19.377 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:55:19.378 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:55:19.378 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:55:19.390 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:55:19.390 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:55:19.390 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:55:19.391 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:55:19.395 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:55:19.396 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:55:19.396 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:55:19.396 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:55:19.396 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:55:19.396 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:55:19.396 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:55:19.397 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1564 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:55:19.397 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1564 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:55:19.397 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1564 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:55:19.397 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1564 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:55:19.397 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1564 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:55:19.397 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1564 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:55:19.397 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1564 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:55:24.393 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:55:24.393 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:55:24.395 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:55:24.397 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:55:24.399 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:55:24.403 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:55:24.411 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:55:24.411 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:55:24.411 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:55:24.412 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:55:24.412 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:55:24.413 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:55:24.413 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:55:24.413 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:55:24.414 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:55:24.414 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:55:24.414 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:55:24.414 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:55:24.414 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:55:24.415 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:55:24.415 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:55:24.415 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:55:24.415 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:55:24.415 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:55:24.415 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:55:24.415 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:55:24.415 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:55:24.417 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:55:24.417 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:55:24.417 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:55:24.417 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:55:24.417 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:55:24.417 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:55:24.417 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:55:24.417 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:55:24.418 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:55:24.418 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:55:24.419 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:55:24.419 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:55:24.419 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:55:24.419 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:55:24.419 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:55:24.419 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:55:24.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:55:24.419 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:55:24.419 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:55:24.419 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:55:24.419 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:55:24.419 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:55:24.419 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:55:24.419 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:55:24.419 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:55:24.419 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:55:24.419 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:55:24.419 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:55:24.419 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:55:24.419 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:55:24.419 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:55:24.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:55:24.419 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:55:24.419 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:55:24.419 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:55:24.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:55:24.420 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:55:24.420 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:55:24.420 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:55:24.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:55:24.420 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:55:24.420 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:55:24.420 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:55:24.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:55:24.420 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:55:24.420 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:55:24.420 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:55:24.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:55:24.420 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:55:24.420 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:55:24.420 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:55:24.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:55:24.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:55:24.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:55:24.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:55:24.424 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:55:24.907 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:55:24.947 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:55:24.949 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:55:24.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:55:24.951 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:55:24.965 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:55:24.966 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:55:24.966 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:55:24.972 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:55:24.976 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:55:24.976 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:55:24.976 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:55:24.976 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:55:24.976 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:55:25.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:55:25.011 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:55:25.011 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:55:25.011 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:55:25.011 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:55:25.383 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:55:25.421 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:55:25.422 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:55:25.422 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:55:25.425 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:55:25.861 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:55:26.339 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:55:26.422 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:55:26.422 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:55:26.422 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:55:26.425 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:55:26.818 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:55:27.295 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:55:27.423 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:55:27.423 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:55:27.423 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:55:27.426 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:55:27.774 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:55:28.252 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:55:28.424 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:55:28.424 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:55:28.424 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:55:28.427 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:55:28.730 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:55:29.209 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 02:55:29.425 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:55:29.425 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:55:29.426 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:55:29.428 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:55:29.688 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 02:55:30.165 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 02:55:30.643 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 02:55:31.122 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 02:55:31.600 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 02:55:32.079 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 02:55:32.557 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 02:55:33.035 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 02:55:33.513 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 02:55:33.991 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 02:55:34.468 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 02:55:34.946 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 02:55:35.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:55:35.017 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:55:35.017 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:55:35.017 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:55:35.031 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:55:35.031 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:55:35.032 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:55:35.032 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:55:35.035 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:55:35.035 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:55:35.035 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:55:35.035 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:55:35.035 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:55:35.035 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:55:35.035 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:55:35.035 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2264 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:55:35.035 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2264 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:55:35.035 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2264 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:55:35.035 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2264 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:55:35.035 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2264 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:55:35.035 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2264 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:55:35.035 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2264 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:55:40.036 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:55:40.036 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:55:40.038 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:55:40.038 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:55:40.039 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:55:40.039 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:55:40.048 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:55:40.049 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:55:40.049 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:55:40.049 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:55:40.049 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:55:40.051 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:55:40.051 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:55:40.052 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:55:40.052 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:55:40.052 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:55:40.052 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:55:40.052 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:55:40.052 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:55:40.054 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:55:40.054 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:55:40.054 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:55:40.054 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:55:40.054 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:55:40.054 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:55:40.054 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:55:40.054 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:55:40.056 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:55:40.056 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:55:40.056 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:55:40.056 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:55:40.056 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:55:40.056 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:55:40.056 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:55:40.056 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:55:40.058 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:55:40.058 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:55:40.058 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:55:40.058 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:55:40.058 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:55:40.058 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:55:40.058 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:55:40.058 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:55:40.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:55:40.058 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:55:40.058 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:55:40.058 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:55:40.059 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:55:40.059 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:55:40.059 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:55:40.059 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:55:40.059 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:55:40.059 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:55:40.059 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:55:40.059 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:55:40.059 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:55:40.059 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:55:40.059 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:55:40.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:55:40.059 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:55:40.059 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:55:40.059 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:55:40.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:55:40.059 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:55:40.059 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:55:40.059 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:55:40.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:55:40.059 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:55:40.059 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:55:40.059 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:55:40.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:55:40.059 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:55:40.059 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:55:40.059 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:55:40.060 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:55:40.060 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:55:40.060 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:55:40.060 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:55:40.060 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:55:40.060 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:55:40.060 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:55:40.060 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:55:40.063 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:55:40.547 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:55:40.585 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:55:40.587 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:55:40.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:55:40.589 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:55:40.612 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:55:40.612 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:55:40.612 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:55:40.616 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:55:40.616 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:55:40.616 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:55:40.616 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:55:40.616 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:55:40.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:55:40.650 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:55:40.650 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:55:40.651 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:55:40.651 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:55:41.025 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:55:41.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:55:41.031 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:55:41.032 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:55:41.032 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:55:41.049 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:55:41.049 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:55:41.050 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:55:41.051 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:55:41.051 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:55:41.051 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:55:41.051 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:55:41.051 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:55:41.060 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:55:41.061 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:55:41.061 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:55:41.063 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:55:41.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:55:41.076 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:55:41.076 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-09 02:55:41.076 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:55:41.077 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:55:41.501 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:55:41.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:55:41.763 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:55:41.764 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:55:41.764 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:55:41.764 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:55:41.782 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:55:41.782 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:55:41.783 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:55:41.784 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:55:41.784 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:55:41.784 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:55:41.784 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:55:41.784 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:55:41.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:55:41.835 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:55:41.835 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:55:41.835 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:55:41.835 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:55:41.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:55:41.943 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:55:41.944 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:55:41.944 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:55:41.957 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:55:41.957 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:55:41.958 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:55:41.959 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:55:41.959 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:55:41.959 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:55:41.959 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:55:41.959 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:55:41.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:55:41.971 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:55:41.972 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 02:55:41.972 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:55:41.972 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:55:41.976 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:55:42.061 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:55:42.062 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:55:42.062 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:55:42.064 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:55:42.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:55:42.367 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:55:42.368 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:55:42.368 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:55:42.368 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:55:42.377 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:55:42.377 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:55:42.377 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:55:42.377 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:55:42.379 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:55:42.379 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:55:42.379 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:55:42.379 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:55:42.379 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:55:42.379 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:55:42.379 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:55:42.379 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=497 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:55:42.379 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=497 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:55:42.379 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=497 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:55:42.380 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=497 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:55:42.380 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=497 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:55:42.380 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=497 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:55:42.380 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=497 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:55:42.380 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=497 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:55:42.380 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=498 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:55:42.380 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=498 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:55:47.382 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:55:47.382 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:55:47.384 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:55:47.385 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:55:47.385 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:55:47.386 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:55:47.395 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:55:47.396 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:55:47.396 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:55:47.396 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:55:47.396 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:55:47.399 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:55:47.399 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:55:47.399 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:55:47.399 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:55:47.400 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:55:47.400 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:55:47.400 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:55:47.400 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:55:47.401 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:55:47.401 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:55:47.402 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:55:47.402 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:55:47.402 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:55:47.402 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:55:47.402 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:55:47.402 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:55:47.404 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:55:47.404 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:55:47.404 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:55:47.404 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:55:47.404 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:55:47.404 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:55:47.404 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:55:47.404 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:55:47.406 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:55:47.406 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:55:47.406 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:55:47.406 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:55:47.406 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:55:47.407 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:55:47.407 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:55:47.407 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:55:47.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:55:47.407 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:55:47.407 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:55:47.407 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:55:47.407 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:55:47.407 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:55:47.407 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:55:47.407 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:55:47.407 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:55:47.407 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:55:47.407 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:55:47.407 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:55:47.407 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:55:47.407 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:55:47.407 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:55:47.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:55:47.408 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:55:47.408 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:55:47.408 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:55:47.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:55:47.408 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:55:47.408 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:55:47.408 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:55:47.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:55:47.408 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:55:47.408 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:55:47.408 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:55:47.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:55:47.408 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:55:47.408 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:55:47.408 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:55:47.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:55:47.408 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:55:47.408 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:55:47.408 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:55:47.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:55:47.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:55:47.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:55:47.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:55:47.412 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:55:47.896 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:55:47.931 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:55:47.933 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:55:47.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:55:47.936 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:55:47.963 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:55:47.963 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:55:47.963 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:55:47.970 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:55:47.971 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:55:47.971 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:55:47.971 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:55:47.971 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:55:47.988 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:55:47.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:55:48.002 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:55:48.002 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:55:48.003 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:55:48.003 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:55:48.373 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:55:48.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:55:48.379 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:55:48.379 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:55:48.379 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:55:48.389 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:55:48.389 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:55:48.389 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:55:48.389 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:55:48.391 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:55:48.391 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:55:48.391 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:55:48.391 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:55:48.391 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:55:48.392 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:55:48.392 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:55:48.392 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=209 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:55:48.392 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=209 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:55:48.392 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=209 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:55:48.392 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=209 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:55:48.392 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=209 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:55:48.392 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=209 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:55:48.392 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=209 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:55:48.392 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=209 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:55:53.394 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:55:53.394 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:55:53.396 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:55:53.397 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:55:53.397 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:55:53.398 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:55:53.402 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:55:53.402 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:55:53.402 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:55:53.402 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:55:53.402 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:55:53.403 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:55:53.403 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:55:53.403 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:55:53.404 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:55:53.404 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:55:53.404 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:55:53.404 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:55:53.404 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:55:53.405 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:55:53.405 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:55:53.405 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:55:53.405 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:55:53.405 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:55:53.405 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:55:53.405 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:55:53.405 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:55:53.406 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:55:53.406 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:55:53.407 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:55:53.407 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:55:53.407 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:55:53.407 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:55:53.407 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:55:53.407 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:55:53.409 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:55:53.409 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:55:53.409 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:55:53.409 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:55:53.409 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:55:53.409 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:55:53.409 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:55:53.409 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:55:53.409 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:55:53.409 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:55:53.409 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:55:53.409 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:55:53.409 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:55:53.409 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:55:53.409 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:55:53.409 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:55:53.409 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:55:53.409 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:55:53.409 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:55:53.409 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:55:53.410 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:55:53.410 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:55:53.410 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:55:53.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:55:53.410 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:55:53.410 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:55:53.410 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:55:53.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:55:53.410 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:55:53.410 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:55:53.410 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:55:53.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:55:53.410 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:55:53.410 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:55:53.410 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:55:53.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:55:53.410 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:55:53.410 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:55:53.410 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:55:53.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:55:53.410 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:55:53.410 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:55:53.411 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:55:53.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:55:53.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:55:53.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:55:53.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:55:53.414 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:55:53.897 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:55:53.933 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:55:53.933 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:55:53.935 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:55:53.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:55:53.956 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:55:53.956 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:55:53.956 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:55:53.960 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:55:53.960 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:55:53.960 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:55:53.960 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:55:53.960 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:55:53.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:55:53.999 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:55:53.999 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:55:54.000 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:55:54.000 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:55:54.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:55:54.374 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:55:54.412 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:55:54.440 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:55:54.441 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:55:54.441 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:55:54.852 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:55:55.330 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:55:55.438 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:55:55.441 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:55:55.442 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:55:55.442 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:55:55.809 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:55:56.287 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:55:56.440 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:55:56.443 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:55:56.443 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:55:56.443 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:55:56.761 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:55:57.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:55:57.107 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:55:57.108 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:55:57.108 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:55:57.129 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:55:57.129 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:55:57.129 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:55:57.130 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:55:57.130 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:55:57.130 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:55:57.130 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:55:57.130 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:55:57.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:55:57.182 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:55:57.182 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-09 02:55:57.182 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:55:57.182 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:55:57.230 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:55:57.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:55:57.441 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:55:57.443 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:55:57.444 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:55:57.444 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:55:57.700 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:55:58.171 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 02:55:58.442 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:55:58.444 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:55:58.444 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:55:58.445 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:55:58.642 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 02:55:59.113 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 02:55:59.584 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 02:56:00.055 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 02:56:00.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:56:00.361 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:56:00.362 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:56:00.362 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:56:00.362 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:56:00.383 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:56:00.383 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:56:00.383 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:56:00.384 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:56:00.384 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:56:00.384 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:56:00.384 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:56:00.384 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:56:00.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:56:00.434 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:56:00.435 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:56:00.435 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:56:00.435 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:56:00.525 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 02:56:00.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:56:01.004 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 02:56:01.481 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 02:56:01.960 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 02:56:02.437 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 02:56:02.916 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 02:56:03.393 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 02:56:03.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:56:03.761 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:56:03.762 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:56:03.762 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:56:03.781 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:56:03.781 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:56:03.781 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:56:03.782 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:56:03.783 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:56:03.783 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:56:03.783 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:56:03.783 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:56:03.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:56:03.823 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:56:03.823 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 02:56:03.824 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:56:03.824 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:56:03.871 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 02:56:04.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:56:04.350 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 02:56:04.829 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 02:56:05.302 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 02:56:05.771 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 02:56:06.246 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-09 02:56:06.725 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-09 02:56:07.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:56:07.034 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:56:07.036 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:56:07.036 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:56:07.036 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:56:07.047 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:56:07.048 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:56:07.048 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:56:07.048 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:56:07.049 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:56:07.049 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:56:07.049 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:56:07.049 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:56:07.049 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:56:07.049 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:56:07.049 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:56:07.049 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2927 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:56:07.049 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2927 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:56:12.052 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:56:12.052 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:56:12.057 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:56:12.057 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:56:12.057 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:56:12.057 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:56:12.070 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:56:12.072 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:56:12.072 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:56:12.073 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:56:12.073 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:56:12.076 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:56:12.076 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:56:12.077 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:56:12.077 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:56:12.077 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:56:12.077 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:56:12.078 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:56:12.078 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:56:12.079 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:56:12.080 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:56:12.080 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:56:12.080 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:56:12.080 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:56:12.080 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:56:12.080 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:56:12.080 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:56:12.082 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:56:12.082 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:56:12.082 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:56:12.082 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:56:12.082 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:56:12.083 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:56:12.083 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:56:12.083 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:56:12.085 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:56:12.085 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:56:12.085 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:56:12.085 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:56:12.085 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:56:12.085 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:56:12.085 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:56:12.085 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:56:12.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:56:12.086 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:56:12.086 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:56:12.086 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:56:12.086 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:56:12.086 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:56:12.086 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:56:12.086 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:56:12.086 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:56:12.086 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:56:12.086 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:56:12.086 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:56:12.086 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:56:12.086 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:56:12.086 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:56:12.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:56:12.086 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:56:12.086 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:56:12.086 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:56:12.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:56:12.086 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:56:12.086 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:56:12.086 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:56:12.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:56:12.087 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:56:12.087 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:56:12.087 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:56:12.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:56:12.087 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:56:12.087 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:56:12.087 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:56:12.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:56:12.087 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:56:12.087 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:56:12.087 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:56:12.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:56:12.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:56:12.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:56:12.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:56:12.091 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:56:12.574 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:56:12.614 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:56:12.617 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:56:12.618 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:56:12.619 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:56:12.622 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:56:12.623 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:56:12.623 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:56:12.623 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:56:12.624 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:56:12.624 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:56:12.624 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:56:12.624 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:56:13.052 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:56:13.089 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:56:13.089 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:56:13.090 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:56:13.092 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:56:13.529 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:56:14.007 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:56:14.090 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:56:14.091 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:56:14.091 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:56:14.094 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:56:14.485 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:56:14.963 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:56:15.092 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:56:15.092 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:56:15.092 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:56:15.094 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:56:15.440 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:56:15.918 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:56:16.093 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:56:16.093 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:56:16.094 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:56:16.095 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:56:16.396 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:56:16.874 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 02:56:17.094 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:56:17.095 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:56:17.095 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:56:17.095 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:56:17.351 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 02:56:17.828 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 02:56:18.306 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 02:56:18.785 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 02:56:19.263 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 02:56:19.741 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 02:56:20.218 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 02:56:20.696 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 02:56:21.174 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 02:56:21.651 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 02:56:22.129 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 02:56:22.607 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 02:56:23.085 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 02:56:23.563 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 02:56:24.041 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 02:56:24.519 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 02:56:24.998 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-09 02:56:25.476 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-09 02:56:25.962 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-09 02:56:26.440 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-09 02:56:26.726 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:56:26.726 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:56:26.736 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:56:26.737 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:56:26.737 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:56:26.737 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:56:26.742 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:56:26.742 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:56:26.742 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:56:26.742 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:56:26.743 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:56:26.743 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:56:26.743 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:56:26.743 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3127 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:56:26.743 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3127 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:56:26.743 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3127 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:56:26.743 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3127 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:56:26.744 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3127 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:56:26.744 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3127 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:56:31.742 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:56:31.742 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:56:31.742 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:56:31.742 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:56:31.742 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:56:31.742 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:56:31.746 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:56:31.746 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:56:31.746 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:56:31.746 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:56:31.746 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:56:31.748 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:56:31.748 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:56:31.749 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:56:31.749 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:56:31.749 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:56:31.749 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:56:31.749 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:56:31.749 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:56:31.751 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:56:31.751 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:56:31.751 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:56:31.751 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:56:31.751 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:56:31.751 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:56:31.751 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:56:31.751 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:56:31.753 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:56:31.753 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:56:31.753 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:56:31.753 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:56:31.753 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:56:31.753 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:56:31.753 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:56:31.753 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:56:31.756 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:56:31.756 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:56:31.756 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:56:31.756 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:56:31.756 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:56:31.756 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:56:31.756 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:56:31.756 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:56:31.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:56:31.756 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:56:31.756 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:56:31.756 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:56:31.756 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:56:31.756 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:56:31.756 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:56:31.756 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:56:31.756 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:56:31.756 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:56:31.756 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:56:31.757 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:56:31.757 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:56:31.757 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:56:31.757 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:56:31.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:56:31.757 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:56:31.757 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:56:31.757 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:56:31.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:56:31.757 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:56:31.757 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:56:31.757 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:56:31.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:56:31.757 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:56:31.757 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:56:31.757 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:56:31.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:56:31.757 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:56:31.757 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:56:31.757 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:56:31.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:56:31.757 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:56:31.757 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:56:31.758 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:56:31.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:56:31.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:56:31.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:56:31.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:56:31.761 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:56:32.243 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:56:32.280 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:56:32.282 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:56:32.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:56:32.284 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:56:32.309 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:56:32.309 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:56:32.309 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:56:32.313 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:56:32.313 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:56:32.314 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:56:32.314 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:56:32.314 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:56:32.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:56:32.345 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 02:56:32.345 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 02:56:32.346 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:56:32.346 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:56:32.720 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:56:32.759 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:56:32.759 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:56:32.759 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:56:32.760 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:56:33.198 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:56:33.677 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:56:33.761 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:56:33.761 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:56:33.761 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:56:33.761 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:56:34.156 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:56:34.346 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:56:34.347 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:56:34.347 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:56:34.347 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 02:56:34.347 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:56:34.350 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:56:34.351 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:56:34.351 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:56:34.352 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:56:34.352 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:56:34.634 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:56:34.762 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:56:34.762 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:56:34.762 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:56:34.762 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:56:35.111 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:56:35.589 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:56:35.762 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:56:35.763 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:56:35.763 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:56:35.763 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:56:36.067 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:56:36.545 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 02:56:36.763 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:56:36.763 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:56:36.763 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:56:36.764 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:56:37.023 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 02:56:37.501 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 02:56:37.979 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 02:56:38.456 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 02:56:38.934 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 02:56:39.412 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 02:56:39.890 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 02:56:40.368 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 02:56:40.846 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 02:56:41.324 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 02:56:41.803 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 02:56:42.281 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 02:56:42.759 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 02:56:43.237 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 02:56:43.715 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 02:56:44.193 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 02:56:44.671 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-09 02:56:45.149 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-09 02:56:45.627 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-09 02:56:46.104 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-09 02:56:46.582 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-09 02:56:47.060 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-09 02:56:47.538 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-09 02:56:48.016 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-09 02:56:48.494 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-09 02:56:48.972 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-09 02:56:49.450 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-09 02:56:49.928 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-09 02:56:50.405 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-09 02:56:50.883 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-09 02:56:51.361 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-09 02:56:51.839 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-09 02:56:52.317 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-09 02:56:52.795 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-01-09 02:56:53.273 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-01-09 02:56:53.750 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-01-09 02:56:54.228 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-01-09 02:56:54.705 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-01-09 02:56:55.183 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-01-09 02:56:55.660 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-01-09 02:56:56.138 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-01-09 02:56:56.615 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-01-09 02:56:57.093 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-01-09 02:56:57.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:56:57.368 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:56:57.368 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:56:57.382 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:56:57.382 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:56:57.383 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:56:57.383 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:56:57.387 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:56:57.388 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:56:57.388 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:56:57.388 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:56:57.388 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:56:57.388 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:56:57.388 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:56:57.389 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=5470 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:56:57.389 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=5470 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:56:57.389 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=5470 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:56:57.389 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=5470 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:56:57.389 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=5470 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:56:57.389 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=5470 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:56:57.390 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=5470 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:56:57.390 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=5471 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:56:57.390 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=5471 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:56:57.390 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=5471 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:56:57.390 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=5471 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:56:57.390 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=5471 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:56:57.390 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=5471 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:56:57.390 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=5471 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:56:57.390 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=5471 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:57:02.387 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:57:02.387 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:57:02.389 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:57:02.391 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:57:02.391 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:57:02.391 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:57:02.400 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:57:02.401 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:57:02.401 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:57:02.401 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:57:02.401 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:57:02.404 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:57:02.404 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:57:02.404 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:57:02.405 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:57:02.405 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:57:02.405 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:57:02.405 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:57:02.405 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:57:02.407 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:57:02.407 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:57:02.407 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:57:02.407 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:57:02.407 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:57:02.407 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:57:02.407 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:57:02.407 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:57:02.409 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:57:02.409 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:57:02.409 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:57:02.409 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:57:02.409 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:57:02.409 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:57:02.409 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:57:02.409 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:57:02.411 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:57:02.411 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:57:02.411 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:57:02.411 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:57:02.411 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:57:02.411 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:57:02.411 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:57:02.411 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:57:02.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:57:02.411 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:57:02.411 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:57:02.411 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:57:02.411 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:57:02.411 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:57:02.411 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:57:02.411 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:57:02.411 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:57:02.411 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:57:02.411 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:57:02.411 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:57:02.411 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:57:02.411 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:57:02.411 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:57:02.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:57:02.412 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:57:02.412 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:57:02.412 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:57:02.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:57:02.412 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:57:02.412 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:57:02.412 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:57:02.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:57:02.412 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:57:02.412 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:57:02.412 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:57:02.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:57:02.412 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:57:02.412 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:57:02.412 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:57:02.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:57:02.412 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:57:02.412 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:57:02.412 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:57:02.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:57:02.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:57:02.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:57:02.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:57:02.416 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:57:02.900 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:57:02.932 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:57:02.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:57:02.934 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:57:02.934 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:57:02.936 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:57:02.936 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:57:02.936 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:57:02.937 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:57:02.937 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:57:02.937 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:57:02.937 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:57:02.937 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:57:03.370 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:57:03.413 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:57:03.414 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:57:03.414 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:57:03.414 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:57:03.839 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:57:04.314 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:57:04.415 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:57:04.415 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:57:04.415 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:57:04.415 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:57:04.792 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:57:05.270 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:57:05.416 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:57:05.416 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:57:05.417 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:57:05.417 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:57:05.748 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:57:06.226 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:57:06.418 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:57:06.418 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:57:06.418 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:57:06.418 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:57:06.704 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:57:07.182 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 02:57:07.419 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:57:07.419 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:57:07.419 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:57:07.419 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:57:07.659 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 02:57:08.137 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 02:57:08.614 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 02:57:09.092 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 02:57:09.571 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 02:57:10.048 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 02:57:10.526 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 02:57:11.004 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 02:57:11.482 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 02:57:11.959 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 02:57:12.437 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 02:57:12.914 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 02:57:13.392 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 02:57:13.870 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 02:57:14.349 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 02:57:14.827 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 02:57:15.305 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-09 02:57:15.783 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-09 02:57:16.288 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-09 02:57:16.766 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-09 02:57:17.244 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-09 02:57:17.722 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-09 02:57:18.200 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-09 02:57:18.678 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-09 02:57:19.156 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-09 02:57:19.634 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-09 02:57:20.111 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-09 02:57:20.579 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-09 02:57:21.050 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-09 02:57:21.528 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-09 02:57:22.005 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-09 02:57:22.483 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-09 02:57:22.961 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-09 02:57:23.439 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-01-09 02:57:23.917 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-01-09 02:57:24.394 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-01-09 02:57:24.433 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:57:24.433 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:57:24.440 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:57:24.440 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:57:24.440 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:57:24.440 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:57:24.445 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:57:24.445 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:57:24.445 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:57:24.445 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:57:24.446 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:57:24.446 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:57:24.446 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:57:24.446 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4704 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:57:24.452 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4704 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:57:29.443 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:57:29.444 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:57:29.446 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:57:29.448 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:57:29.450 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:57:29.453 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:57:29.468 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:57:29.469 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:57:29.469 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:57:29.470 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:57:29.470 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:57:29.474 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:57:29.475 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:57:29.475 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:57:29.475 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:57:29.476 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:57:29.476 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:57:29.476 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:57:29.476 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:57:29.478 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:57:29.478 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:57:29.479 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:57:29.479 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:57:29.479 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:57:29.479 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:57:29.479 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:57:29.479 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:57:29.481 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:57:29.481 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:57:29.482 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:57:29.482 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:57:29.482 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:57:29.482 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:57:29.482 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:57:29.482 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:57:29.485 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:57:29.485 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:57:29.485 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:57:29.485 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:57:29.485 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:57:29.485 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:57:29.485 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:57:29.485 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:57:29.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:57:29.485 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:57:29.485 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:57:29.485 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:57:29.485 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:57:29.485 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:57:29.485 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:57:29.485 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:57:29.486 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:57:29.486 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:57:29.486 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:57:29.486 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:57:29.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:57:29.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:57:29.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:57:29.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:57:29.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:57:29.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:57:29.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:57:29.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:57:29.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:57:29.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:57:29.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:57:29.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:57:29.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:57:29.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:57:29.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:57:29.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:57:29.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:57:29.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:57:29.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:57:29.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:57:29.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:57:29.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:57:29.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:57:29.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:57:29.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:57:29.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:57:29.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:57:29.490 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:57:29.965 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:57:30.013 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:57:30.014 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:57:30.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:57:30.016 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:57:30.018 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:57:30.018 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:57:30.019 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:57:30.019 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:57:30.019 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:57:30.019 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:57:30.019 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:57:30.020 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:57:30.442 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:57:30.489 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:57:30.489 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:57:30.490 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:57:30.492 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:57:30.920 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:57:31.399 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:57:31.490 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:57:31.490 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:57:31.491 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:57:31.492 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:57:31.877 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:57:32.355 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:57:32.492 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:57:32.492 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:57:32.492 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:57:32.494 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:57:32.833 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:57:33.311 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:57:33.494 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:57:33.494 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:57:33.494 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:57:33.494 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:57:33.788 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:57:34.265 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 02:57:34.494 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:57:34.495 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:57:34.495 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:57:34.495 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:57:34.743 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 02:57:35.222 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 02:57:35.699 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 02:57:36.174 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 02:57:36.643 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 02:57:37.114 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 02:57:37.593 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 02:57:38.070 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 02:57:38.547 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 02:57:39.026 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 02:57:39.504 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 02:57:39.979 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 02:57:40.448 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 02:57:40.918 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 02:57:41.397 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 02:57:41.874 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 02:57:42.352 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-09 02:57:42.830 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-09 02:57:43.308 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-09 02:57:43.785 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-09 02:57:44.263 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-09 02:57:44.741 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-09 02:57:45.219 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-09 02:57:45.697 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-09 02:57:46.175 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-09 02:57:46.653 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-09 02:57:47.131 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-09 02:57:47.609 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-09 02:57:48.087 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-09 02:57:48.564 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-09 02:57:49.042 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-09 02:57:49.519 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-09 02:57:49.998 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-09 02:57:50.477 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-01-09 02:57:50.955 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-01-09 02:57:51.432 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-01-09 02:57:51.502 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:57:51.502 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:57:51.504 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:57:51.504 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:57:51.504 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:57:51.504 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:57:51.505 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:57:51.505 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:57:51.505 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:57:51.505 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:57:51.505 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:57:51.505 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:57:51.506 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:57:56.508 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:57:56.509 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:57:56.510 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:57:56.511 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:57:56.511 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:57:56.512 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:57:56.519 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:57:56.519 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:57:56.519 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:57:56.519 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:57:56.519 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:57:56.521 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:57:56.521 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:57:56.521 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:57:56.521 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:57:56.522 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:57:56.522 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:57:56.522 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:57:56.522 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:57:56.523 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:57:56.523 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:57:56.523 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:57:56.523 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:57:56.523 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:57:56.523 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:57:56.524 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:57:56.524 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:57:56.525 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:57:56.525 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:57:56.525 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:57:56.525 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:57:56.525 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:57:56.525 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:57:56.525 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:57:56.525 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:57:56.527 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:57:56.527 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:57:56.527 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:57:56.527 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:57:56.528 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:57:56.528 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:57:56.528 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:57:56.528 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:57:56.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:57:56.528 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:57:56.528 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:57:56.528 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:57:56.528 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:57:56.528 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:57:56.528 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:57:56.528 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:57:56.528 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:57:56.528 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:57:56.528 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:57:56.528 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:57:56.528 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:57:56.528 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:57:56.528 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:57:56.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:57:56.529 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:57:56.529 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:57:56.529 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:57:56.529 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:57:56.529 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:57:56.529 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:57:56.529 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:57:56.529 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:57:56.529 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:57:56.529 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:57:56.529 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:57:56.529 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:57:56.529 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:57:56.529 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:57:56.529 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:57:56.529 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:57:56.529 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:57:56.529 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:57:56.529 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:57:56.529 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:57:56.529 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:57:56.529 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:57:56.529 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:57:56.533 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:57:57.017 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:57:57.055 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:57:57.057 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:57:57.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:57:57.059 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:57:57.061 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:57:57.061 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:57:57.062 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:57:57.062 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:57:57.062 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:57:57.062 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:57:57.062 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:57:57.062 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:57:57.494 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:57:57.531 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:57:57.531 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:57:57.532 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:57:57.535 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:57:57.972 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:57:58.450 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:57:58.532 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:57:58.532 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:57:58.532 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:57:58.536 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:57:58.927 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:57:59.406 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:57:59.533 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:57:59.533 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:57:59.533 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:57:59.538 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:57:59.878 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:58:00.356 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:58:00.534 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:58:00.534 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:58:00.535 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:58:00.539 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:58:00.833 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:58:01.311 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 02:58:01.535 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:58:01.535 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:58:01.535 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:58:01.540 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:58:01.790 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 02:58:02.268 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 02:58:02.746 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 02:58:03.224 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 02:58:03.702 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 02:58:04.180 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 02:58:04.658 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 02:58:05.135 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 02:58:05.614 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 02:58:06.091 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 02:58:06.568 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 02:58:07.046 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 02:58:07.524 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 02:58:08.002 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 02:58:08.479 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 02:58:08.957 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 02:58:09.435 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-09 02:58:09.913 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-09 02:58:10.391 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-09 02:58:10.868 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-09 02:58:11.346 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-09 02:58:11.824 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-09 02:58:12.302 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-09 02:58:12.780 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-09 02:58:13.258 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-09 02:58:13.736 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-09 02:58:14.213 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-09 02:58:14.692 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-09 02:58:15.170 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-09 02:58:15.648 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-09 02:58:16.126 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-09 02:58:16.604 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-09 02:58:17.082 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-09 02:58:17.561 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-01-09 02:58:18.038 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-01-09 02:58:18.516 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-01-09 02:58:18.994 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-01-09 02:58:19.472 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-01-09 02:58:19.950 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-01-09 02:58:20.428 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-01-09 02:58:20.906 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-01-09 02:58:21.384 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-01-09 02:58:21.862 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-01-09 02:58:22.340 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-01-09 02:58:22.818 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-01-09 02:58:23.296 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-01-09 02:58:23.772 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-01-09 02:58:24.250 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-01-09 02:58:24.728 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-01-09 02:58:25.206 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-01-09 02:58:25.685 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-01-09 02:58:26.163 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-01-09 02:58:26.641 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-01-09 02:58:27.119 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-01-09 02:58:27.596 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-01-09 02:58:28.075 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-01-09 02:58:28.553 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-01-09 02:58:29.060 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-01-09 02:58:29.537 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-01-09 02:58:30.015 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-01-09 02:58:30.494 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-01-09 02:58:30.554 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:58:30.554 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:58:30.556 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:58:30.557 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:58:30.557 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:58:30.557 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:58:30.558 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:58:30.558 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:58:30.558 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:58:30.558 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:58:30.558 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:58:30.558 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:58:30.558 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:58:35.561 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:58:35.561 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:58:35.563 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:58:35.564 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:58:35.564 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:58:35.565 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:58:35.574 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:58:35.575 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:58:35.575 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:58:35.575 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:58:35.575 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:58:35.578 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:58:35.578 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:58:35.578 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:58:35.578 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:58:35.578 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:58:35.579 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:58:35.579 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:58:35.579 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:58:35.581 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:58:35.581 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:58:35.581 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:58:35.581 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:58:35.581 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:58:35.581 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:58:35.581 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:58:35.581 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:58:35.583 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:58:35.583 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:58:35.583 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:58:35.583 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:58:35.583 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:58:35.583 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:58:35.583 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:58:35.583 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:58:35.585 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:58:35.586 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:58:35.586 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:58:35.586 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:58:35.586 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:58:35.586 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:58:35.586 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:58:35.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:58:35.586 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:58:35.586 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:58:35.586 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:58:35.586 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:58:35.586 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:58:35.586 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:58:35.586 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:58:35.586 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:58:35.586 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:58:35.586 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:58:35.586 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:58:35.586 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:58:35.586 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:58:35.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:58:35.587 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:58:35.587 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:58:35.587 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:58:35.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:58:35.587 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:58:35.587 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:58:35.587 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:58:35.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:58:35.587 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:58:35.587 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:58:35.587 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:58:35.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:58:35.587 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:58:35.587 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:58:35.587 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:58:35.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:58:35.587 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:58:35.587 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:58:35.587 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:58:35.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:58:35.587 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:58:35.587 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:58:35.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:58:35.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:58:35.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:58:35.591 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:58:36.073 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:58:36.114 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:58:36.115 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:58:36.117 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:58:36.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:58:36.119 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:58:36.119 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:58:36.119 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:58:36.120 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:58:36.120 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:58:36.120 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:58:36.120 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:58:36.120 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:58:36.551 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:58:36.588 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:58:36.589 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:58:36.589 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:58:36.590 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:58:37.028 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:58:37.506 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:58:37.590 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:58:37.590 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:58:37.591 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:58:37.591 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:58:37.984 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:58:38.462 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:58:38.591 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:58:38.591 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:58:38.592 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:58:38.592 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:58:38.939 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:58:39.417 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:58:39.592 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:58:39.592 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:58:39.592 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:58:39.593 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:58:39.896 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:58:40.373 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 02:58:40.593 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:58:40.594 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:58:40.594 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:58:40.594 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:58:40.851 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 02:58:41.329 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 02:58:41.807 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 02:58:42.285 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 02:58:42.764 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 02:58:43.242 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 02:58:43.719 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 02:58:44.197 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 02:58:44.672 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 02:58:45.150 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 02:58:45.628 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 02:58:46.106 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 02:58:46.584 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 02:58:47.062 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 02:58:47.539 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 02:58:48.017 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 02:58:48.495 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-09 02:58:48.973 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-09 02:58:49.451 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-09 02:58:49.929 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-09 02:58:50.407 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-09 02:58:50.885 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-09 02:58:51.363 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-09 02:58:51.841 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-09 02:58:52.318 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-09 02:58:52.787 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-09 02:58:53.257 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-09 02:58:53.731 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-09 02:58:54.209 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-09 02:58:54.687 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-09 02:58:55.165 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-09 02:58:55.642 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-09 02:58:56.120 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-09 02:58:56.598 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-01-09 02:58:57.067 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-01-09 02:58:57.536 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-01-09 02:58:58.012 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-01-09 02:58:58.490 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-01-09 02:58:58.968 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-01-09 02:58:59.446 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-01-09 02:58:59.923 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-01-09 02:59:00.401 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-01-09 02:59:00.878 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-01-09 02:59:01.350 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-01-09 02:59:01.825 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-01-09 02:59:02.303 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-01-09 02:59:02.781 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-01-09 02:59:03.259 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-01-09 02:59:03.607 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:59:03.607 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:59:03.613 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:59:03.613 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:59:03.613 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:59:03.613 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:59:03.619 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:59:03.620 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:59:03.620 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:59:03.620 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:59:03.620 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:59:03.620 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:59:03.620 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:59:03.621 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=5994 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:59:03.621 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=5994 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:59:03.621 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=5994 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:59:03.621 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=5994 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:59:03.621 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=5994 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:59:03.621 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=5994 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:59:03.621 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=5995 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:59:03.622 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=5995 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:59:03.622 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=5995 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:59:03.622 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=5995 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:59:03.622 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=5995 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:59:03.622 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=5995 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:59:03.622 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=5995 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:59:03.622 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=5995 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:59:03.622 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=5996 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:59:03.622 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=5996 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:59:03.622 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=5996 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:59:03.623 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=5996 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:59:03.623 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=5996 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:59:03.623 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=5996 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:59:03.623 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=5996 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:59:03.623 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=5996 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:59:08.617 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:59:08.618 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:59:08.620 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:59:08.621 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:59:08.621 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:59:08.622 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:59:08.629 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:59:08.630 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:59:08.630 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:59:08.630 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:59:08.630 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:59:08.632 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:59:08.632 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:59:08.632 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:59:08.632 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:59:08.632 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:59:08.633 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:59:08.633 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:59:08.633 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:59:08.634 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:59:08.634 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:59:08.634 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:59:08.634 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:59:08.634 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:59:08.634 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:59:08.635 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:59:08.635 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:59:08.636 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:59:08.636 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:59:08.636 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:59:08.636 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:59:08.636 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:59:08.636 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:59:08.636 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:59:08.636 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:59:08.639 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:59:08.639 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:59:08.639 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:59:08.639 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:59:08.639 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:59:08.639 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:59:08.639 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:59:08.639 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:59:08.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:59:08.639 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:59:08.639 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:59:08.639 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:59:08.639 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:59:08.639 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:59:08.639 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:59:08.639 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:59:08.639 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:59:08.639 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:59:08.639 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:59:08.639 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:59:08.640 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:59:08.640 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:59:08.640 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:59:08.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:59:08.640 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:59:08.640 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:59:08.640 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:59:08.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:59:08.640 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:59:08.640 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:59:08.640 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:59:08.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:59:08.640 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:59:08.640 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:59:08.640 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:59:08.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:59:08.640 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:59:08.640 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:59:08.640 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:59:08.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:59:08.640 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:59:08.640 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:59:08.640 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:59:08.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:59:08.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:59:08.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:59:08.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:59:08.644 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:59:09.127 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:59:09.163 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:59:09.164 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:59:09.165 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:59:09.165 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:59:09.174 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:59:09.175 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:59:09.175 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:59:09.175 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:59:09.177 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:59:09.177 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:59:09.177 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:59:09.177 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:59:09.177 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:59:09.177 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:59:09.177 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:59:09.177 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=114 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:59:09.177 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=114 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:59:09.177 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=114 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:59:09.177 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=114 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:59:09.178 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=114 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:59:09.178 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=114 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:59:09.178 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=114 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:59:09.178 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=114 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:59:14.179 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:59:14.179 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:59:14.181 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:59:14.182 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:59:14.182 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:59:14.183 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:59:14.190 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:59:14.191 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:59:14.191 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:59:14.191 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:59:14.191 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:59:14.193 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:59:14.193 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:59:14.193 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:59:14.193 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:59:14.193 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:59:14.194 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:59:14.194 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:59:14.194 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:59:14.195 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:59:14.195 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:59:14.195 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:59:14.195 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:59:14.195 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:59:14.195 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:59:14.196 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:59:14.196 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:59:14.197 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:59:14.197 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:59:14.197 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:59:14.197 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:59:14.197 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:59:14.197 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:59:14.197 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:59:14.197 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:59:14.199 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:59:14.200 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:59:14.200 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:59:14.200 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:59:14.200 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:59:14.200 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:59:14.200 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:59:14.200 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:59:14.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:59:14.200 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:59:14.200 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:59:14.200 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:59:14.200 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:59:14.200 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:59:14.200 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:59:14.200 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:59:14.200 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:59:14.200 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:59:14.200 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:59:14.200 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:59:14.200 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:59:14.200 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:59:14.200 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:59:14.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:59:14.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:59:14.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:59:14.201 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:59:14.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:59:14.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:59:14.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:59:14.201 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:59:14.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:59:14.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:59:14.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:59:14.201 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:59:14.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:59:14.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:59:14.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:59:14.201 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:59:14.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:59:14.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:59:14.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:59:14.201 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:59:14.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:59:14.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:59:14.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:59:14.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:59:14.205 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:59:14.688 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:59:14.719 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:59:14.720 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:59:14.721 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:59:14.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:59:14.728 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:59:14.728 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:59:14.728 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:59:14.729 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:59:14.731 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:59:14.732 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:59:14.732 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:59:14.732 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:59:14.732 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:59:14.732 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:59:14.732 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:59:14.732 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=112 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:59:14.732 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=112 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:59:19.733 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:59:19.733 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:59:19.736 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:59:19.737 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:59:19.737 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:59:19.737 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:59:19.745 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:59:19.746 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:59:19.747 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:59:19.747 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:59:19.747 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:59:19.750 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:59:19.751 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:59:19.751 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:59:19.751 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:59:19.752 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:59:19.752 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:59:19.752 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:59:19.752 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:59:19.754 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:59:19.754 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:59:19.754 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:59:19.754 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:59:19.755 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:59:19.755 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:59:19.755 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:59:19.755 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:59:19.757 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:59:19.757 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:59:19.757 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:59:19.757 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:59:19.757 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:59:19.757 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:59:19.757 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:59:19.757 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:59:19.760 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:59:19.760 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:59:19.760 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:59:19.760 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:59:19.760 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:59:19.760 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:59:19.760 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:59:19.760 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:59:19.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:59:19.760 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:59:19.760 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:59:19.760 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:59:19.760 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:59:19.760 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:59:19.760 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:59:19.760 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:59:19.760 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:59:19.760 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:59:19.760 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:59:19.761 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:59:19.761 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:59:19.761 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:59:19.761 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:59:19.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:59:19.761 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:59:19.761 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:59:19.761 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:59:19.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:59:19.761 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:59:19.761 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:59:19.761 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:59:19.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:59:19.761 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:59:19.761 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:59:19.761 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:59:19.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:59:19.761 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:59:19.761 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:59:19.761 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:59:19.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:59:19.762 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:59:19.762 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:59:19.762 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:59:19.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:59:19.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:59:19.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:59:19.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:59:19.765 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:59:20.247 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:59:20.278 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:59:20.279 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:59:20.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:59:20.281 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:59:20.291 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:59:20.291 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:59:20.292 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:59:20.292 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:59:20.294 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:59:20.294 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:59:20.294 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:59:20.294 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:59:20.294 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:59:20.294 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:59:20.294 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:59:20.294 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=113 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:59:20.294 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=113 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:59:25.296 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:59:25.296 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:59:25.297 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:59:25.298 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:59:25.298 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:59:25.299 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:59:25.310 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:59:25.311 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:59:25.311 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:59:25.312 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:59:25.312 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:59:25.315 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:59:25.316 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:59:25.316 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:59:25.316 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:59:25.316 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:59:25.317 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:59:25.317 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:59:25.317 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:59:25.318 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:59:25.318 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:59:25.318 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:59:25.318 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:59:25.319 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:59:25.319 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:59:25.319 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:59:25.319 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:59:25.320 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:59:25.320 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:59:25.321 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:59:25.321 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:59:25.321 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:59:25.321 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:59:25.321 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:59:25.321 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:59:25.323 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:59:25.323 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:59:25.323 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:59:25.323 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:59:25.323 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:59:25.323 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:59:25.323 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:59:25.323 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:59:25.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:59:25.324 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:59:25.324 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:59:25.324 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:59:25.324 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:59:25.324 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:59:25.324 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:59:25.324 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:59:25.324 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:59:25.324 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:59:25.324 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:59:25.324 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:59:25.324 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:59:25.324 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:59:25.324 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:59:25.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:59:25.324 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:59:25.324 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:59:25.324 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:59:25.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:59:25.324 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:59:25.324 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:59:25.324 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:59:25.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:59:25.324 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:59:25.324 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:59:25.324 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:59:25.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:59:25.325 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:59:25.325 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:59:25.325 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:59:25.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:59:25.325 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:59:25.325 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:59:25.325 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:59:25.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:59:25.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:59:25.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:59:25.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:59:25.329 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:59:25.813 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:59:25.845 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:59:25.845 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:59:25.846 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:59:25.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:59:25.847 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:59:25.847 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:59:25.848 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:59:25.848 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:59:25.848 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:59:25.848 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:59:25.848 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:59:25.848 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:59:26.291 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:59:26.326 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:59:26.326 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:59:26.327 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:59:26.329 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:59:26.769 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:59:27.246 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:59:27.327 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:59:27.327 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:59:27.327 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:59:27.330 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:59:27.724 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:59:28.202 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:59:28.327 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:59:28.328 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:59:28.328 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:59:28.331 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:59:28.680 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:59:29.157 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:59:29.328 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:59:29.329 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:59:29.329 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:59:29.332 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:59:29.635 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:59:30.113 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 02:59:30.329 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:59:30.330 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:59:30.330 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:59:30.334 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:59:30.591 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 02:59:31.068 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 02:59:31.546 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 02:59:32.023 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 02:59:32.501 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 02:59:32.978 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 02:59:33.451 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 02:59:33.863 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:59:33.863 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:59:33.869 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:59:33.869 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:59:33.869 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:59:33.869 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:59:33.871 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:59:33.871 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:59:33.871 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:59:33.871 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:59:33.871 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:59:33.871 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:59:33.871 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:59:33.871 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1826 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:59:33.871 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1826 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:59:38.871 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:59:38.871 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:59:38.872 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:59:38.872 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:59:38.872 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:59:38.873 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:59:38.877 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:59:38.878 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:59:38.878 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:59:38.878 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:59:38.878 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:59:38.879 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:59:38.879 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:59:38.879 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:59:38.879 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:59:38.879 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:59:38.879 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:59:38.879 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:59:38.879 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:59:38.880 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:59:38.880 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:59:38.880 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:59:38.880 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:59:38.880 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:59:38.880 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:59:38.880 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:59:38.880 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:59:38.881 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:59:38.881 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:59:38.881 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:59:38.881 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:59:38.881 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:59:38.881 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:59:38.881 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:59:38.881 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:59:38.883 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:59:38.883 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:59:38.883 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:59:38.883 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:59:38.883 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:59:38.883 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:59:38.883 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:59:38.883 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:59:38.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:59:38.883 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:59:38.883 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:59:38.883 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:59:38.884 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:59:38.884 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:59:38.884 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:59:38.884 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:59:38.884 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:59:38.884 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:59:38.884 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:59:38.884 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:59:38.884 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:59:38.884 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:59:38.884 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:59:38.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:59:38.884 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:59:38.884 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:59:38.884 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:59:38.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:59:38.884 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:59:38.884 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:59:38.884 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:59:38.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:59:38.884 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:59:38.884 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:59:38.884 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:59:38.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:59:38.884 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:59:38.884 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:59:38.884 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:59:38.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:59:38.885 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:59:38.885 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:59:38.885 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:59:38.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:59:38.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:59:38.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:59:38.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:59:38.888 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:59:39.364 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:59:39.399 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:59:39.401 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:59:39.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:59:39.401 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:59:39.403 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:59:39.403 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:59:39.403 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:59:39.403 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:59:39.403 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:59:39.403 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:59:39.403 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:59:39.403 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:59:39.834 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:59:39.885 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:59:39.886 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:59:39.887 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:59:39.888 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:59:40.301 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:59:40.772 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:59:40.886 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:59:40.886 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:59:40.888 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:59:40.888 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:59:41.242 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:59:41.713 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:59:41.887 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:59:41.888 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:59:41.889 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:59:41.889 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:59:42.185 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:59:42.656 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:59:42.888 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:59:42.888 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:59:42.890 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:59:42.890 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:59:43.124 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:59:43.592 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 02:59:43.888 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:59:43.888 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:59:43.890 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:59:43.890 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:59:44.060 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 02:59:44.528 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 02:59:44.995 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 02:59:45.468 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 02:59:45.944 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 02:59:46.418 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 02:59:46.892 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 02:59:47.363 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 02:59:47.416 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:59:47.417 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:59:47.423 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:59:47.423 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:59:47.423 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:59:47.423 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:59:47.424 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:59:47.424 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:59:47.424 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:59:47.424 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:59:47.424 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:59:47.424 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:59:47.424 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 02:59:47.424 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1852 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:59:47.424 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1852 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:59:47.424 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1852 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:59:47.424 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1852 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:59:47.424 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1852 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:59:47.425 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1852 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:59:47.425 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1852 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:59:47.425 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1852 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 02:59:52.426 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 02:59:52.426 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 02:59:52.428 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:59:52.435 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:59:52.435 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:59:52.436 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:59:52.447 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 02:59:52.447 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:59:52.447 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:59:52.447 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 02:59:52.447 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 02:59:52.448 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 02:59:52.448 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 02:59:52.448 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:59:52.448 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:59:52.448 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 02:59:52.448 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 02:59:52.448 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 02:59:52.448 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 02:59:52.450 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 02:59:52.450 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 02:59:52.450 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:59:52.450 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:59:52.450 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 02:59:52.450 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 02:59:52.450 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 02:59:52.450 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 02:59:52.452 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 02:59:52.452 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 02:59:52.452 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:59:52.452 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 02:59:52.452 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 02:59:52.452 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 02:59:52.452 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 02:59:52.453 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 02:59:52.456 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 02:59:52.456 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 02:59:52.456 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 02:59:52.456 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 02:59:52.456 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 02:59:52.456 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 02:59:52.456 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 02:59:52.456 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 02:59:52.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 02:59:52.456 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:59:52.456 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:59:52.456 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:59:52.456 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 02:59:52.456 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:59:52.456 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:59:52.456 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:59:52.456 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 02:59:52.457 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 02:59:52.457 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 02:59:52.457 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:59:52.457 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 02:59:52.457 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:59:52.457 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:59:52.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 02:59:52.457 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:59:52.457 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:59:52.457 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:59:52.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:59:52.457 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:59:52.457 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:59:52.457 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:59:52.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:59:52.457 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:59:52.457 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:59:52.458 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:59:52.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:59:52.458 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:59:52.458 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:59:52.458 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:59:52.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:59:52.458 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 02:59:52.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:59:52.458 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 02:59:52.458 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 02:59:52.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:59:52.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:59:52.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 02:59:52.461 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 02:59:52.940 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 02:59:52.994 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 02:59:52.996 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 02:59:52.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 02:59:52.998 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 02:59:53.000 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 02:59:53.000 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 02:59:53.000 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 02:59:53.000 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 02:59:53.001 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 02:59:53.001 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 02:59:53.001 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 02:59:53.001 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 02:59:53.416 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 02:59:53.461 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:59:53.461 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:59:53.461 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:59:53.461 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:59:53.894 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 02:59:54.364 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 02:59:54.462 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:59:54.462 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:59:54.463 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:59:54.463 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:59:54.842 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 02:59:55.319 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 02:59:55.462 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:59:55.463 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:59:55.463 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:59:55.463 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:59:55.796 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 02:59:56.274 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 02:59:56.463 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:59:56.464 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:59:56.464 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:59:56.464 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:59:56.751 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 02:59:57.225 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 02:59:57.465 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 02:59:57.465 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 02:59:57.465 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 02:59:57.465 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 02:59:57.702 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 02:59:58.179 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 02:59:58.654 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 02:59:59.123 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 02:59:59.594 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 03:00:00.072 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 03:00:00.550 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 03:00:01.028 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 03:00:01.040 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:00:01.040 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:00:01.047 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:00:01.047 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:00:01.047 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:00:01.047 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:00:01.052 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:00:01.052 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:00:01.052 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:00:01.052 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:00:01.052 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:00:01.052 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:00:01.053 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:00:01.053 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1842 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:00:01.053 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1842 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:00:06.049 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:00:06.049 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:00:06.049 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:00:06.049 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:00:06.050 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:00:06.050 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:00:06.058 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:00:06.058 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:00:06.058 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:00:06.058 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:00:06.058 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:00:06.059 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:00:06.059 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:00:06.060 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:00:06.060 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:00:06.060 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:00:06.060 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:00:06.060 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:00:06.060 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:00:06.062 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:00:06.062 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:00:06.062 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:00:06.062 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:00:06.062 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:00:06.062 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:00:06.062 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:00:06.062 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:00:06.064 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:00:06.064 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:00:06.064 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:00:06.064 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:00:06.064 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:00:06.064 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:00:06.064 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:00:06.064 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:00:06.067 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:00:06.067 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:00:06.067 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:00:06.067 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:00:06.067 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:00:06.067 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:00:06.067 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:00:06.067 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:00:06.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:00:06.067 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:00:06.067 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:00:06.067 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:00:06.067 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:00:06.067 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:00:06.067 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:00:06.067 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:00:06.068 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:00:06.068 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:00:06.068 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:00:06.068 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:00:06.068 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:00:06.068 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:00:06.068 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:00:06.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:00:06.068 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:00:06.068 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:00:06.068 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:00:06.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:00:06.068 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:00:06.068 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:00:06.068 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:00:06.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:00:06.068 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:00:06.068 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:00:06.068 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:00:06.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:00:06.068 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:00:06.068 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:00:06.068 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:00:06.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:00:06.069 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:00:06.069 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:00:06.069 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:00:06.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:00:06.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:00:06.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:00:06.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:00:06.072 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:00:06.550 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:00:06.586 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:00:06.587 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:00:06.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:00:06.588 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:00:06.589 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:00:06.589 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:00:06.589 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:00:06.590 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:00:06.590 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:00:06.590 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:00:06.590 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:00:06.590 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:00:07.020 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:00:07.071 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:00:07.071 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:00:07.071 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:00:07.075 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:00:07.490 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:00:07.959 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:00:08.071 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:00:08.072 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:00:08.072 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:00:08.076 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:00:08.433 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:00:08.911 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 03:00:09.072 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:00:09.072 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:00:09.073 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:00:09.077 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:00:09.388 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 03:00:09.863 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 03:00:10.074 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:00:10.074 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:00:10.074 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:00:10.078 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:00:10.336 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 03:00:10.813 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 03:00:11.075 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:00:11.075 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:00:11.075 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:00:11.080 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:00:11.290 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 03:00:11.767 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 03:00:12.244 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 03:00:12.722 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 03:00:13.200 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 03:00:13.678 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 03:00:14.156 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 03:00:14.605 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:00:14.605 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:00:14.610 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:00:14.610 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:00:14.611 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:00:14.611 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:00:14.616 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:00:14.617 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:00:14.617 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:00:14.617 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:00:14.617 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:00:14.617 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:00:14.617 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:00:14.618 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1834 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:00:14.618 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1834 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:00:19.615 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:00:19.615 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:00:19.617 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:00:19.621 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:00:19.624 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:00:19.628 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:00:19.642 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:00:19.642 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:00:19.642 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:00:19.643 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:00:19.643 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:00:19.646 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:00:19.646 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:00:19.647 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:00:19.647 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:00:19.647 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:00:19.647 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:00:19.647 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:00:19.647 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:00:19.650 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:00:19.650 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:00:19.650 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:00:19.650 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:00:19.651 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:00:19.651 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:00:19.651 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:00:19.651 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:00:19.652 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:00:19.653 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:00:19.653 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:00:19.653 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:00:19.653 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:00:19.653 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:00:19.653 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:00:19.653 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:00:19.656 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:00:19.656 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:00:19.656 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:00:19.656 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:00:19.656 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:00:19.656 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:00:19.656 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:00:19.656 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:00:19.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:00:19.656 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:00:19.656 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:00:19.656 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:00:19.656 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:00:19.656 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:00:19.656 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:00:19.656 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:00:19.656 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:00:19.657 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:00:19.657 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:00:19.657 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:00:19.657 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:00:19.657 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:00:19.657 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:00:19.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:00:19.657 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:00:19.657 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:00:19.657 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:00:19.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:00:19.657 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:00:19.657 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:00:19.657 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:00:19.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:00:19.657 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:00:19.657 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:00:19.657 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:00:19.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:00:19.658 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:00:19.658 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:00:19.658 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:00:19.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:00:19.658 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:00:19.658 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:00:19.658 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:00:19.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:00:19.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:00:19.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:00:19.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:00:19.661 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:00:20.139 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:00:20.186 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:00:20.187 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:00:20.188 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:00:20.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:00:20.189 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:00:20.190 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:00:20.190 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:00:20.190 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:00:20.190 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:00:20.190 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:00:20.190 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:00:20.190 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:00:20.616 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:00:20.659 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:00:20.660 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:00:20.661 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:00:20.664 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:00:21.090 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:00:21.559 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:00:21.660 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:00:21.660 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:00:21.662 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:00:21.665 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:00:22.030 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:00:22.508 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 03:00:22.661 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:00:22.661 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:00:22.662 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:00:22.666 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:00:22.985 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 03:00:23.458 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 03:00:23.662 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:00:23.662 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:00:23.664 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:00:23.667 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:00:23.935 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 03:00:24.412 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 03:00:24.663 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:00:24.663 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:00:24.664 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:00:24.667 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:00:24.884 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 03:00:25.357 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 03:00:25.835 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 03:00:26.308 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 03:00:26.782 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 03:00:27.255 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 03:00:27.727 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 03:00:28.201 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 03:00:28.237 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:00:28.238 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:00:28.244 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:00:28.244 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:00:28.244 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:00:28.245 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:00:28.252 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:00:28.252 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:00:28.252 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:00:28.252 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:00:28.252 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:00:28.253 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:00:28.253 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:00:28.253 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1847 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:00:28.253 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1847 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:00:28.253 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1847 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:00:28.253 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1847 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:00:28.253 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1847 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:00:28.253 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1847 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:00:28.253 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1847 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:00:28.254 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1848 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:00:28.254 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1848 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:00:28.254 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1848 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:00:28.254 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1848 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:00:28.254 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1848 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:00:28.254 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1848 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:00:28.254 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1848 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:00:28.254 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1848 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:00:28.254 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1849 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:00:28.254 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1849 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:00:33.246 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:00:33.246 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:00:33.246 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:00:33.246 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:00:33.247 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:00:33.247 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:00:33.253 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:00:33.253 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:00:33.253 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:00:33.253 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:00:33.253 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:00:33.254 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:00:33.254 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:00:33.254 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:00:33.254 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:00:33.254 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:00:33.254 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:00:33.254 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:00:33.255 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:00:33.255 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:00:33.255 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:00:33.256 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:00:33.256 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:00:33.256 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:00:33.256 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:00:33.256 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:00:33.256 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:00:33.257 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:00:33.257 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:00:33.257 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:00:33.257 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:00:33.257 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:00:33.257 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:00:33.257 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:00:33.257 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:00:33.258 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:00:33.259 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:00:33.259 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:00:33.259 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:00:33.259 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:00:33.259 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:00:33.259 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:00:33.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:00:33.259 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:00:33.259 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:00:33.259 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:00:33.259 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:00:33.259 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:00:33.259 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:00:33.259 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:00:33.259 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:00:33.259 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:00:33.259 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:00:33.259 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:00:33.259 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:00:33.259 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:00:33.259 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:00:33.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:00:33.259 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:00:33.259 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:00:33.259 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:00:33.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:00:33.260 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:00:33.260 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:00:33.260 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:00:33.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:00:33.260 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:00:33.260 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:00:33.260 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:00:33.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:00:33.260 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:00:33.260 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:00:33.260 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:00:33.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:00:33.260 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:00:33.260 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:00:33.260 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:00:33.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:00:33.260 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:00:33.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:00:33.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:00:33.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:00:33.264 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:00:33.738 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:00:33.784 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:00:33.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:00:33.787 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:00:33.788 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:00:33.790 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:00:33.791 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:00:33.791 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:00:33.791 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:00:33.791 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:00:33.791 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:00:33.792 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:00:33.792 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:00:34.215 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:00:34.261 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:00:34.262 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:00:34.262 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:00:34.263 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:00:34.689 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:00:35.162 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:00:35.262 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:00:35.262 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:00:35.263 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:00:35.264 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:00:35.639 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:00:36.111 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 03:00:36.263 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:00:36.263 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:00:36.264 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:00:36.265 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:00:36.582 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 03:00:37.054 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 03:00:37.264 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:00:37.264 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:00:37.264 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:00:37.265 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:00:37.525 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 03:00:38.000 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 03:00:38.265 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:00:38.265 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:00:38.265 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:00:38.266 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:00:38.473 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 03:00:38.943 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 03:00:39.414 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 03:00:39.886 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 03:00:40.358 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 03:00:40.833 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 03:00:41.307 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 03:00:41.776 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 03:00:42.249 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 03:00:42.719 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 03:00:43.190 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 03:00:43.660 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 03:00:44.137 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 03:00:44.614 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 03:00:45.089 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 03:00:45.559 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 03:00:46.026 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-09 03:00:46.496 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-09 03:00:46.965 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-09 03:00:47.433 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-09 03:00:47.903 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-09 03:00:48.372 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-09 03:00:48.847 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-09 03:00:49.321 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-09 03:00:49.790 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-09 03:00:49.845 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:00:49.845 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:00:49.851 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:00:49.851 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:00:49.852 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:00:49.852 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:00:49.857 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:00:49.857 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:00:49.857 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:00:49.857 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:00:49.858 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:00:49.858 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:00:49.858 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:00:49.858 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3586 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:00:49.858 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3586 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:00:49.858 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3586 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:00:49.858 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3586 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:00:49.859 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3586 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:00:49.859 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3586 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:00:49.859 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3586 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:00:49.859 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3586 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:00:54.855 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:00:54.855 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:00:54.857 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:00:54.859 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:00:54.861 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:00:54.864 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:00:54.874 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:00:54.874 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:00:54.874 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:00:54.874 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:00:54.874 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:00:54.876 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:00:54.876 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:00:54.876 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:00:54.876 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:00:54.876 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:00:54.876 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:00:54.876 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:00:54.876 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:00:54.877 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:00:54.877 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:00:54.877 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:00:54.877 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:00:54.877 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:00:54.877 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:00:54.877 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:00:54.877 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:00:54.878 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:00:54.878 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:00:54.879 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:00:54.879 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:00:54.879 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:00:54.879 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:00:54.879 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:00:54.879 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:00:54.880 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:00:54.880 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:00:54.880 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:00:54.880 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:00:54.880 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:00:54.881 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:00:54.881 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:00:54.881 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:00:54.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:00:54.881 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:00:54.881 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:00:54.881 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:00:54.881 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:00:54.881 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:00:54.881 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:00:54.881 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:00:54.881 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:00:54.881 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:00:54.881 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:00:54.881 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:00:54.881 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:00:54.881 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:00:54.881 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:00:54.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:00:54.881 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:00:54.881 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:00:54.881 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:00:54.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:00:54.881 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:00:54.882 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:00:54.882 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:00:54.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:00:54.882 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:00:54.882 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:00:54.882 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:00:54.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:00:54.882 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:00:54.882 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:00:54.882 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:00:54.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:00:54.882 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:00:54.882 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:00:54.882 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:00:54.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:00:54.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:00:54.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:00:54.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:00:54.886 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:00:55.360 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:00:55.394 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:00:55.394 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:00:55.394 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:00:55.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:00:55.397 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:00:55.397 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:00:55.397 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:00:55.398 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:00:55.398 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:00:55.398 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:00:55.398 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:00:55.398 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:00:55.829 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:00:55.883 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:00:55.883 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:00:55.884 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:00:55.885 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:00:56.300 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:00:56.775 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:00:56.884 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:00:56.884 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:00:56.885 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:00:56.886 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:00:57.244 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:00:57.714 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 03:00:57.884 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:00:57.885 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:00:57.886 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:00:57.887 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:00:58.187 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 03:00:58.665 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 03:00:58.885 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:00:58.886 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:00:58.887 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:00:58.888 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:00:59.141 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 03:00:59.618 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 03:00:59.887 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:00:59.887 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:00:59.888 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:00:59.888 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:01:00.095 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 03:01:00.572 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 03:01:01.049 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 03:01:01.527 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 03:01:02.005 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 03:01:02.482 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 03:01:02.958 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 03:01:03.410 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:01:03.410 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:01:03.422 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:01:03.423 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:01:03.423 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:01:03.423 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:01:03.426 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:01:03.427 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:01:03.427 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:01:03.427 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:01:03.427 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:01:03.427 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:01:03.427 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:01:03.428 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1836 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:01:03.428 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1836 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:01:03.428 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1836 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:01:08.426 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:01:08.427 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:01:08.429 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:01:08.431 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:01:08.433 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:01:08.436 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:01:08.445 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:01:08.445 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:01:08.445 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:01:08.445 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:01:08.445 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:01:08.447 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:01:08.448 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:01:08.448 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:01:08.448 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:01:08.448 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:01:08.448 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:01:08.449 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:01:08.449 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:01:08.450 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:01:08.450 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:01:08.450 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:01:08.450 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:01:08.450 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:01:08.450 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:01:08.450 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:01:08.450 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:01:08.451 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:01:08.451 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:01:08.451 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:01:08.451 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:01:08.452 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:01:08.452 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:01:08.452 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:01:08.452 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:01:08.453 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:01:08.453 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:01:08.453 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:01:08.453 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:01:08.453 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:01:08.453 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:01:08.454 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:01:08.454 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:01:08.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:01:08.454 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:01:08.454 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:01:08.454 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:01:08.454 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:01:08.454 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:01:08.454 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:01:08.454 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:01:08.454 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:01:08.454 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:01:08.454 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:01:08.454 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:01:08.454 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:01:08.454 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:01:08.454 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:01:08.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:01:08.454 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:01:08.454 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:01:08.454 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:01:08.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:01:08.454 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:01:08.454 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:01:08.454 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:01:08.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:01:08.454 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:01:08.454 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:01:08.454 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:01:08.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:01:08.455 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:01:08.455 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:01:08.455 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:01:08.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:01:08.455 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:01:08.455 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:01:08.455 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:01:08.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:01:08.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:01:08.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:01:08.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:01:08.459 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:01:08.932 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:01:08.970 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:01:08.971 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:01:08.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:01:08.972 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:01:08.977 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:01:08.977 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:01:08.977 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:01:08.977 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:01:08.977 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:01:08.978 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:01:08.978 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:01:08.978 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:01:09.401 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:01:09.456 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:01:09.456 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:01:09.457 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:01:09.459 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:01:09.872 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:01:10.349 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:01:10.457 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:01:10.457 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:01:10.459 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:01:10.460 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:01:10.826 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:01:11.302 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 03:01:11.458 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:01:11.458 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:01:11.459 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:01:11.461 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:01:11.774 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 03:01:12.247 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 03:01:12.459 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:01:12.459 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:01:12.460 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:01:12.461 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:01:12.719 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 03:01:13.196 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 03:01:13.459 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:01:13.460 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:01:13.461 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:01:13.462 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:01:13.665 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 03:01:14.136 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 03:01:14.607 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 03:01:15.078 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 03:01:15.545 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 03:01:16.016 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 03:01:16.484 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 03:01:16.957 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 03:01:17.435 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 03:01:17.913 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 03:01:18.390 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 03:01:18.868 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 03:01:19.346 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 03:01:19.824 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 03:01:20.302 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 03:01:20.780 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 03:01:21.258 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-09 03:01:21.735 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-09 03:01:22.211 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-09 03:01:22.680 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-09 03:01:23.150 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-09 03:01:23.622 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-09 03:01:24.101 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-09 03:01:24.579 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-09 03:01:25.035 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:01:25.035 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:01:25.051 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:01:25.051 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:01:25.051 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:01:25.051 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:01:25.053 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:01:25.054 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:01:25.054 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:01:25.054 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:01:25.054 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:01:25.054 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:01:25.054 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:01:25.054 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3572 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:01:25.054 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3572 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:01:25.054 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3572 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:01:25.055 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3572 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:01:25.055 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3572 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:01:25.055 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3572 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:01:25.055 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3572 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:01:25.055 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3572 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:01:25.055 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3573 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:01:30.056 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:01:30.056 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:01:30.059 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:01:30.059 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:01:30.059 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:01:30.059 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:01:30.068 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:01:30.070 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:01:30.071 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:01:30.071 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:01:30.071 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:01:30.075 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:01:30.076 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:01:30.076 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:01:30.076 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:01:30.077 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:01:30.077 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:01:30.077 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:01:30.077 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:01:30.079 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:01:30.079 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:01:30.080 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:01:30.080 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:01:30.080 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:01:30.080 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:01:30.080 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:01:30.080 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:01:30.082 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:01:30.082 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:01:30.083 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:01:30.083 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:01:30.083 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:01:30.083 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:01:30.083 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:01:30.083 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:01:30.086 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:01:30.086 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:01:30.086 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:01:30.086 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:01:30.086 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:01:30.087 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:01:30.087 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:01:30.087 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:01:30.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:01:30.087 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:01:30.087 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:01:30.087 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:01:30.087 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:01:30.087 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:01:30.087 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:01:30.087 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:01:30.087 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:01:30.087 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:01:30.087 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:01:30.088 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:01:30.088 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:01:30.088 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:01:30.088 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:01:30.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:01:30.088 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:01:30.088 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:01:30.088 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:01:30.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:01:30.088 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:01:30.088 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:01:30.088 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:01:30.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:01:30.088 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:01:30.088 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:01:30.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:01:30.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:01:30.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:01:30.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:01:30.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:01:30.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:01:30.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:01:30.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:01:30.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:01:30.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:01:30.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:01:30.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:01:30.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:01:30.092 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:01:30.571 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:01:30.616 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:01:30.617 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:01:30.618 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:01:30.618 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:01:30.639 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:01:30.639 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:01:30.640 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:01:30.662 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:01:30.662 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:01:30.662 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:01:30.662 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:01:30.667 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:01:30.667 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:01:30.668 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:01:30.668 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:01:30.668 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:01:30.668 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:01:30.668 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:01:30.668 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=124 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:01:30.669 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=124 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:01:30.669 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=124 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:01:30.669 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=124 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:01:30.669 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=124 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:01:30.669 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=124 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:01:30.669 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=124 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:01:30.669 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=124 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:01:35.665 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:01:35.665 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:01:35.668 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:01:35.668 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:01:35.668 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:01:35.668 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:01:35.677 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:01:35.679 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:01:35.679 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:01:35.679 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:01:35.680 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:01:35.683 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:01:35.684 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:01:35.684 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:01:35.684 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:01:35.684 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:01:35.685 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:01:35.685 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:01:35.685 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:01:35.687 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:01:35.687 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:01:35.687 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:01:35.687 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:01:35.688 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:01:35.688 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:01:35.688 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:01:35.688 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:01:35.689 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:01:35.690 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:01:35.690 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:01:35.690 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:01:35.690 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:01:35.690 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:01:35.690 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:01:35.690 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:01:35.693 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:01:35.693 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:01:35.693 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:01:35.693 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:01:35.693 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:01:35.693 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:01:35.693 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:01:35.693 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:01:35.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:01:35.693 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:01:35.693 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:01:35.693 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:01:35.693 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:01:35.693 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:01:35.693 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:01:35.693 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:01:35.693 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:01:35.693 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:01:35.693 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:01:35.694 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:01:35.694 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:01:35.694 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:01:35.694 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:01:35.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:01:35.694 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:01:35.694 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:01:35.694 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:01:35.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:01:35.694 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:01:35.694 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:01:35.694 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:01:35.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:01:35.694 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:01:35.694 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:01:35.694 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:01:35.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:01:35.694 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:01:35.694 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:01:35.694 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:01:35.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:01:35.695 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:01:35.695 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:01:35.695 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:01:35.695 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:01:35.695 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:01:35.695 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:01:35.695 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:01:35.698 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:01:36.183 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:01:36.218 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:01:36.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:01:36.221 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:01:36.225 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:01:36.254 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:01:36.254 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:01:36.254 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:01:36.280 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:01:36.280 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:01:36.280 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:01:36.280 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:01:36.287 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:01:36.287 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:01:36.287 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:01:36.288 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:01:36.288 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:01:36.288 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:01:36.288 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:01:36.288 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=124 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:01:36.288 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=124 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:01:36.288 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=124 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:01:36.289 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=124 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:01:36.289 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=124 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:01:36.289 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=124 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:01:36.289 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=125 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:01:36.289 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=125 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:01:36.289 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=125 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:01:36.289 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=125 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:01:36.289 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=125 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:01:36.289 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=125 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:01:36.289 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=125 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:01:36.290 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=125 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:01:36.290 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=126 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:01:36.290 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=126 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:01:36.290 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=126 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:01:36.290 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=126 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:01:36.290 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=126 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:01:36.290 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=126 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:01:36.290 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=126 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:01:36.290 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=126 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:01:41.285 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:01:41.285 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:01:41.287 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:01:41.287 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:01:41.288 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:01:41.288 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:01:41.296 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:01:41.297 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:01:41.297 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:01:41.297 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:01:41.298 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:01:41.300 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:01:41.300 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:01:41.300 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:01:41.300 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:01:41.301 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:01:41.301 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:01:41.301 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:01:41.301 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:01:41.303 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:01:41.303 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:01:41.303 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:01:41.303 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:01:41.303 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:01:41.303 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:01:41.303 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:01:41.303 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:01:41.305 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:01:41.305 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:01:41.306 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:01:41.306 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:01:41.306 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:01:41.306 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:01:41.306 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:01:41.306 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:01:41.309 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:01:41.309 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:01:41.309 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:01:41.309 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:01:41.309 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:01:41.309 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:01:41.309 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:01:41.309 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:01:41.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:01:41.309 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:01:41.309 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:01:41.309 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:01:41.309 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:01:41.309 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:01:41.309 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:01:41.309 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:01:41.309 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:01:41.309 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:01:41.309 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:01:41.310 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:01:41.310 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:01:41.310 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:01:41.310 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:01:41.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:01:41.310 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:01:41.310 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:01:41.310 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:01:41.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:01:41.310 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:01:41.310 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:01:41.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:01:41.310 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:01:41.310 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:01:41.310 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:01:41.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:01:41.310 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:01:41.310 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:01:41.310 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:01:41.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:01:41.310 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:01:41.310 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:01:41.311 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:01:41.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:01:41.311 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:01:41.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:01:41.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:01:41.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:01:41.314 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:01:41.799 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:01:41.831 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:01:41.832 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:01:41.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:01:41.833 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:01:41.851 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:01:41.851 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:01:41.851 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:01:41.884 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:01:41.884 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:01:41.884 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:01:41.884 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:01:41.885 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:01:41.885 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:01:41.885 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:01:41.885 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:01:41.885 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:01:41.885 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:01:41.885 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:01:41.885 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=122 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:01:41.885 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=122 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:01:41.885 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=122 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:01:41.885 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=122 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:01:41.885 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=122 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:01:41.885 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=122 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:01:41.885 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=122 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:01:46.891 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:01:46.891 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:01:46.891 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:01:46.891 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:01:46.891 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:01:46.891 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:01:46.899 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:01:46.901 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:01:46.901 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:01:46.902 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:01:46.902 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:01:46.905 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:01:46.906 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:01:46.906 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:01:46.906 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:01:46.907 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:01:46.907 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:01:46.907 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:01:46.908 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:01:46.909 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:01:46.910 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:01:46.910 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:01:46.910 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:01:46.910 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:01:46.910 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:01:46.910 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:01:46.910 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:01:46.913 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:01:46.913 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:01:46.913 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:01:46.913 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:01:46.913 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:01:46.913 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:01:46.913 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:01:46.913 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:01:46.916 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:01:46.917 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:01:46.917 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:01:46.917 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:01:46.917 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:01:46.917 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:01:46.917 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:01:46.917 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:01:46.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:01:46.917 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:01:46.917 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:01:46.917 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:01:46.917 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:01:46.917 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:01:46.917 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:01:46.917 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:01:46.918 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:01:46.918 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:01:46.918 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:01:46.918 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:01:46.918 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:01:46.918 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:01:46.918 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:01:46.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:01:46.918 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:01:46.918 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:01:46.918 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:01:46.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:01:46.918 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:01:46.918 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:01:46.918 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:01:46.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:01:46.919 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:01:46.919 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:01:46.919 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:01:46.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:01:46.919 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:01:46.919 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:01:46.919 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:01:46.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:01:46.919 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:01:46.919 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:01:46.919 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:01:46.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:01:46.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:01:46.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:01:46.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:01:46.923 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:01:47.406 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:01:47.439 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:01:47.440 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:01:47.441 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:01:47.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:01:47.456 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:01:47.456 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:01:47.456 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:01:47.476 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:01:47.477 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:01:47.477 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:01:47.477 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:01:47.480 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:01:47.480 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:01:47.480 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:01:47.480 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:01:47.480 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:01:47.480 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:01:47.480 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:01:47.480 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=119 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:01:47.480 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=119 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:01:47.480 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=119 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:01:47.480 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=119 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:01:47.480 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=119 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:01:47.480 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=119 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:01:47.480 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=120 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:01:47.480 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=120 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:01:47.480 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=120 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:01:47.480 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=120 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:01:47.480 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=120 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:01:47.480 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=120 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:01:47.480 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=120 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:01:47.480 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=120 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:01:52.482 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:01:52.482 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:01:52.484 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:01:52.485 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:01:52.485 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:01:52.486 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:01:52.498 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:01:52.499 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:01:52.499 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:01:52.499 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:01:52.499 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:01:52.503 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:01:52.503 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:01:52.503 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:01:52.503 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:01:52.504 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:01:52.504 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:01:52.504 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:01:52.504 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:01:52.506 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:01:52.506 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:01:52.506 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:01:52.506 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:01:52.506 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:01:52.506 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:01:52.506 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:01:52.506 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:01:52.508 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:01:52.508 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:01:52.508 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:01:52.508 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:01:52.508 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:01:52.508 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:01:52.508 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:01:52.508 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:01:52.510 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:01:52.510 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:01:52.510 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:01:52.510 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:01:52.510 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:01:52.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:01:52.511 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:01:52.511 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:01:52.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:01:52.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:01:52.511 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:01:52.511 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:01:52.511 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:01:52.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:01:52.511 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:01:52.511 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:01:52.511 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:01:52.511 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:01:52.511 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:01:52.511 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:01:52.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:01:52.511 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:01:52.511 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:01:52.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:01:52.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:01:52.511 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:01:52.511 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:01:52.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:01:52.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:01:52.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:01:52.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:01:52.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:01:52.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:01:52.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:01:52.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:01:52.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:01:52.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:01:52.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:01:52.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:01:52.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:01:52.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:01:52.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:01:52.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:01:52.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:01:52.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:01:52.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:01:52.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:01:52.516 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:01:52.995 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:01:53.034 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:01:53.035 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:01:53.036 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:01:53.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:01:53.057 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:01:53.058 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:01:53.058 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:01:53.077 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:01:53.077 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:01:53.077 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:01:53.080 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:01:53.080 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:01:53.080 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:01:53.081 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:01:53.082 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:01:53.082 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:01:53.082 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:01:53.082 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:01:53.082 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:01:53.082 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:01:53.082 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:01:58.085 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:01:58.085 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:01:58.087 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:01:58.087 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:01:58.087 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:01:58.088 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:01:58.099 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:01:58.100 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:01:58.100 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:01:58.101 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:01:58.101 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:01:58.104 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:01:58.104 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:01:58.105 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:01:58.105 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:01:58.105 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:01:58.105 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:01:58.105 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:01:58.105 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:01:58.108 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:01:58.108 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:01:58.108 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:01:58.108 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:01:58.109 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:01:58.109 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:01:58.109 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:01:58.109 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:01:58.111 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:01:58.111 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:01:58.111 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:01:58.112 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:01:58.112 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:01:58.112 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:01:58.112 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:01:58.112 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:01:58.116 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:01:58.116 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:01:58.116 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:01:58.116 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:01:58.116 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:01:58.116 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:01:58.116 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:01:58.116 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:01:58.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:01:58.116 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:01:58.116 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:01:58.117 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:01:58.117 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:01:58.117 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:01:58.117 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:01:58.117 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:01:58.117 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:01:58.117 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:01:58.117 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:01:58.117 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:01:58.117 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:01:58.117 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:01:58.117 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:01:58.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:01:58.118 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:01:58.118 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:01:58.118 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:01:58.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:01:58.118 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:01:58.118 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:01:58.118 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:01:58.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:01:58.118 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:01:58.118 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:01:58.118 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:01:58.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:01:58.118 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:01:58.118 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:01:58.118 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:01:58.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:01:58.119 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:01:58.119 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:01:58.119 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:01:58.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:01:58.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:01:58.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:01:58.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:01:58.122 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:01:58.606 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:01:58.651 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:01:58.655 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:01:58.655 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:01:58.658 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:01:58.682 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:01:58.682 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:01:58.682 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:01:58.717 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:01:58.717 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:01:58.717 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:01:58.723 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:01:58.723 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:01:58.723 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:01:58.723 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:01:58.724 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:01:58.724 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:01:58.724 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:01:58.724 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:01:58.724 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:01:58.724 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:01:58.725 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:02:03.728 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:02:03.728 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:02:03.737 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:02:03.737 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:02:03.738 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:02:03.738 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:02:03.746 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:02:03.747 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:02:03.747 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:02:03.747 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:02:03.747 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:02:03.748 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:02:03.748 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:02:03.748 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:02:03.748 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:02:03.749 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:02:03.749 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:02:03.749 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:02:03.749 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:02:03.750 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:02:03.750 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:02:03.750 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:02:03.750 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:02:03.750 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:02:03.750 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:02:03.750 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:02:03.750 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:02:03.751 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:02:03.751 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:02:03.752 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:02:03.752 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:02:03.752 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:02:03.752 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:02:03.752 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:02:03.752 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:02:03.754 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:02:03.754 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:02:03.754 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:02:03.754 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:02:03.754 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:02:03.754 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:02:03.754 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:02:03.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:02:03.754 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:02:03.754 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:02:03.754 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:02:03.754 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:02:03.754 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:02:03.754 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:02:03.754 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:02:03.754 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:02:03.754 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:02:03.754 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:02:03.754 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:02:03.754 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:02:03.754 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:02:03.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:02:03.755 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:02:03.755 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:02:03.755 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:02:03.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:02:03.755 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:02:03.755 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:02:03.755 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:02:03.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:02:03.755 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:02:03.755 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:02:03.755 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:02:03.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:02:03.755 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:02:03.755 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:02:03.755 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:02:03.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:02:03.755 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:02:03.755 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:02:03.755 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:02:03.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:02:03.755 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:02:03.755 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:02:03.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:02:03.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:02:03.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:02:03.759 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:02:04.241 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:02:04.275 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:02:04.277 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:02:04.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:02:04.279 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:02:04.285 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:02:04.285 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:02:04.285 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:02:04.286 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:02:04.286 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:02:04.286 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:02:04.286 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:02:04.286 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:02:04.719 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:02:04.756 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:02:04.757 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:02:04.757 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:02:04.758 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:02:05.197 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:02:05.675 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:02:05.757 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:02:05.758 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:02:05.758 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:02:05.758 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:02:06.153 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:02:06.631 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 03:02:06.758 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:02:06.759 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:02:06.759 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:02:06.759 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:02:07.109 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 03:02:07.586 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 03:02:07.759 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:02:07.760 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:02:07.760 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:02:07.760 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:02:08.064 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 03:02:08.539 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 03:02:08.760 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:02:08.760 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:02:08.761 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:02:08.761 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:02:09.008 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 03:02:09.481 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 03:02:09.959 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 03:02:10.437 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 03:02:10.915 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 03:02:11.392 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 03:02:11.870 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 03:02:12.348 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 03:02:12.825 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 03:02:13.303 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 03:02:13.781 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 03:02:14.259 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 03:02:14.738 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 03:02:15.216 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 03:02:15.694 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 03:02:16.172 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 03:02:16.649 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-09 03:02:17.127 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-09 03:02:17.605 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-09 03:02:18.083 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-09 03:02:18.561 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-09 03:02:19.040 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-09 03:02:19.518 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-09 03:02:19.996 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-09 03:02:20.474 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-09 03:02:20.953 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-09 03:02:21.430 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-09 03:02:21.908 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-09 03:02:22.386 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-09 03:02:22.864 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-09 03:02:23.342 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-09 03:02:23.819 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-09 03:02:24.297 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-09 03:02:24.776 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-01-09 03:02:25.253 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-01-09 03:02:25.731 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-01-09 03:02:26.209 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-01-09 03:02:26.687 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-01-09 03:02:27.165 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-01-09 03:02:27.642 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-01-09 03:02:28.120 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-01-09 03:02:28.598 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-01-09 03:02:29.076 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-01-09 03:02:29.555 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-01-09 03:02:30.032 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-01-09 03:02:30.510 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-01-09 03:02:30.988 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-01-09 03:02:31.466 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-01-09 03:02:31.944 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-01-09 03:02:32.421 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-01-09 03:02:32.899 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-01-09 03:02:33.377 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-01-09 03:02:33.855 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-01-09 03:02:34.332 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-01-09 03:02:34.807 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-01-09 03:02:35.285 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-01-09 03:02:35.763 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-01-09 03:02:36.240 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-01-09 03:02:36.718 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-01-09 03:02:37.196 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-01-09 03:02:37.674 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-01-09 03:02:37.776 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:02:37.776 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:02:37.782 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:02:37.783 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:02:37.783 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:02:37.783 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:02:37.787 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:02:37.788 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:02:37.788 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:02:37.788 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:02:37.788 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:02:37.788 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:02:37.788 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:02:37.789 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=7268 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:02:37.789 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=7268 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:02:37.789 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=7268 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:02:37.789 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=7268 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:02:37.789 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=7268 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:02:37.789 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=7268 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:02:37.789 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=7268 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:02:37.789 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=7268 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:02:42.785 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:02:42.785 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:02:42.789 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:02:42.789 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:02:42.789 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:02:42.789 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:02:42.798 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:02:42.799 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:02:42.799 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:02:42.800 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:02:42.800 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:02:42.804 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:02:42.805 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:02:42.805 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:02:42.805 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:02:42.805 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:02:42.805 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:02:42.805 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:02:42.805 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:02:42.808 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:02:42.808 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:02:42.809 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:02:42.809 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:02:42.809 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:02:42.809 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:02:42.809 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:02:42.809 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:02:42.811 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:02:42.811 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:02:42.812 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:02:42.812 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:02:42.812 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:02:42.812 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:02:42.812 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:02:42.812 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:02:42.815 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:02:42.815 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:02:42.815 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:02:42.815 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:02:42.815 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:02:42.815 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:02:42.815 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:02:42.815 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:02:42.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:02:42.815 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:02:42.816 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:02:42.816 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:02:42.816 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:02:42.816 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:02:42.816 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:02:42.816 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:02:42.816 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:02:42.816 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:02:42.816 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:02:42.816 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:02:42.816 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:02:42.816 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:02:42.816 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:02:42.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:02:42.816 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:02:42.816 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:02:42.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:02:42.816 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:02:42.816 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:02:42.817 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:02:42.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:02:42.817 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:02:42.817 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:02:42.817 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:02:42.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:02:42.817 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:02:42.817 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:02:42.817 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:02:42.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:02:42.817 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:02:42.817 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:02:42.817 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:02:42.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:02:42.817 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:02:42.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:02:42.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:02:42.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:02:42.821 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:02:43.306 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:02:43.346 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:02:43.349 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:02:43.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:02:43.351 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:02:43.783 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:02:43.819 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:02:43.820 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:02:43.820 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:02:43.824 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:02:44.262 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:02:44.740 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:02:44.820 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:02:44.820 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:02:44.822 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:02:44.825 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:02:45.221 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:02:45.702 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 03:02:45.821 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:02:45.821 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:02:45.823 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:02:45.826 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:02:46.183 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 03:02:46.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:02:46.373 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:02:46.374 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:02:46.374 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:02:46.374 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:02:46.375 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:02:46.375 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:02:46.375 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:02:46.375 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:02:46.375 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:02:46.375 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:02:46.375 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:02:51.377 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:02:51.377 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:02:51.380 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:02:51.380 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:02:51.380 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:02:51.380 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:02:51.388 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:02:51.389 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:02:51.389 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:02:51.389 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:02:51.389 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:02:51.392 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:02:51.393 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:02:51.393 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:02:51.393 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:02:51.393 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:02:51.393 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:02:51.393 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:02:51.393 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:02:51.396 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:02:51.396 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:02:51.396 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:02:51.396 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:02:51.396 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:02:51.396 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:02:51.396 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:02:51.396 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:02:51.398 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:02:51.398 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:02:51.398 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:02:51.398 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:02:51.398 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:02:51.398 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:02:51.398 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:02:51.398 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:02:51.401 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:02:51.401 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:02:51.401 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:02:51.401 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:02:51.401 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:02:51.402 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:02:51.402 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:02:51.402 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:02:51.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:02:51.402 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:02:51.402 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:02:51.402 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:02:51.402 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:02:51.402 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:02:51.402 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:02:51.402 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:02:51.402 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:02:51.402 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:02:51.402 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:02:51.402 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:02:51.403 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:02:51.403 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:02:51.403 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:02:51.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:02:51.403 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:02:51.403 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:02:51.403 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:02:51.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:02:51.403 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:02:51.403 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:02:51.403 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:02:51.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:02:51.403 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:02:51.403 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:02:51.403 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:02:51.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:02:51.403 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:02:51.404 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:02:51.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:02:51.404 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:02:51.404 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:02:51.404 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:02:51.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:02:51.404 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:02:51.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:02:51.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:02:51.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:02:51.407 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:02:51.887 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:02:51.930 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:02:51.932 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:02:51.934 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:02:51.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:02:52.365 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:02:52.406 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:02:52.406 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:02:52.406 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:02:52.408 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:02:52.846 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:02:53.326 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:02:53.407 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:02:53.407 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:02:53.407 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:02:53.409 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:02:53.801 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:02:54.279 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 03:02:54.408 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:02:54.409 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:02:54.409 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:02:54.411 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:02:54.755 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 03:02:55.223 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 03:02:55.410 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:02:55.410 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:02:55.410 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:02:55.412 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:02:55.693 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 03:02:56.165 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 03:02:56.411 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:02:56.412 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:02:56.412 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:02:56.414 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:02:56.639 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 03:02:57.107 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 03:02:57.586 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 03:02:57.951 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:02:57.951 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:02:57.951 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:02:57.951 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:02:57.952 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:02:57.952 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:02:57.952 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:02:57.952 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:02:57.952 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:02:57.952 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:02:57.953 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:02:57.953 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1406 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:02:57.953 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1406 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:02:57.953 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1406 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:03:02.958 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:03:02.958 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:03:02.958 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:03:02.958 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:03:02.958 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:03:02.958 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:03:02.966 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:03:02.967 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:03:02.967 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:03:02.968 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:03:02.968 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:03:02.971 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:03:02.971 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:03:02.971 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:03:02.972 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:03:02.972 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:03:02.972 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:03:02.973 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:03:02.973 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:03:02.974 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:03:02.975 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:03:02.975 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:03:02.975 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:03:02.975 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:03:02.975 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:03:02.976 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:03:02.976 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:03:02.977 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:03:02.977 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:03:02.977 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:03:02.977 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:03:02.978 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:03:02.978 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:03:02.978 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:03:02.978 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:03:02.980 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:03:02.980 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:03:02.980 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:03:02.981 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:03:02.981 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:03:02.981 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:03:02.981 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:03:02.981 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:03:02.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:03:02.981 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:03:02.981 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:03:02.981 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:03:02.981 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:03:02.981 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:03:02.981 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:03:02.981 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:03:02.981 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:03:02.981 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:03:02.981 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:03:02.981 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:03:02.981 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:03:02.982 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:03:02.982 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:03:02.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:03:02.982 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:03:02.982 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:03:02.982 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:03:02.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:03:02.982 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:03:02.982 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:03:02.982 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:03:02.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:03:02.982 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:03:02.982 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:03:02.982 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:03:02.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:03:02.982 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:03:02.982 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:03:02.982 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:03:02.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:03:02.982 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:03:02.982 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:03:02.982 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:03:02.983 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:03:02.983 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:03:02.983 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:03:02.983 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:03:02.986 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:03:03.468 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:03:03.496 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:03:03.497 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:03:03.497 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:03:03.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:03:03.937 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:03:03.984 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:03:03.984 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:03:03.984 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:03:03.985 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:03:04.406 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:03:04.876 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:03:04.985 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:03:04.985 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:03:04.985 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:03:04.985 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:03:05.345 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:03:05.815 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 03:03:05.986 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:03:05.987 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:03:05.987 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:03:05.987 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:03:06.294 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 03:03:06.772 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 03:03:06.988 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:03:06.988 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:03:06.988 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:03:06.989 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:03:07.250 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 03:03:07.729 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 03:03:07.989 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:03:07.990 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:03:07.990 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:03:07.990 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:03:08.208 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 03:03:08.680 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 03:03:09.155 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 03:03:09.508 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:03:09.508 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:03:09.508 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:03:09.508 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:03:09.509 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:03:09.509 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:03:09.509 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:03:09.509 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:03:09.509 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:03:09.509 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:03:09.509 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:03:09.509 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1404 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:03:09.509 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1404 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:03:09.509 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1404 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:03:09.509 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1404 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:03:09.509 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1404 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:03:09.509 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1404 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:03:09.509 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1404 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:03:09.509 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1404 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:03:14.513 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:03:14.513 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:03:14.515 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:03:14.515 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:03:14.516 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:03:14.516 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:03:14.525 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:03:14.526 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:03:14.526 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:03:14.526 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:03:14.527 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:03:14.530 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:03:14.530 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:03:14.530 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:03:14.530 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:03:14.531 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:03:14.531 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:03:14.531 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:03:14.531 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:03:14.533 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:03:14.533 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:03:14.533 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:03:14.533 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:03:14.533 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:03:14.533 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:03:14.533 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:03:14.533 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:03:14.535 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:03:14.535 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:03:14.535 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:03:14.535 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:03:14.535 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:03:14.535 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:03:14.535 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:03:14.535 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:03:14.538 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:03:14.538 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:03:14.538 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:03:14.538 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:03:14.538 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:03:14.538 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:03:14.538 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:03:14.538 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:03:14.538 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:03:14.538 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:03:14.538 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:03:14.538 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:03:14.538 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:03:14.538 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:03:14.538 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:03:14.538 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:03:14.538 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:03:14.538 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:03:14.538 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:03:14.538 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:03:14.539 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:03:14.539 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:03:14.539 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:03:14.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:03:14.539 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:03:14.539 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:03:14.539 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:03:14.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:03:14.539 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:03:14.539 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:03:14.539 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:03:14.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:03:14.539 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:03:14.539 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:03:14.539 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:03:14.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:03:14.540 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:03:14.540 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:03:14.540 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:03:14.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:03:14.540 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:03:14.540 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:03:14.540 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:03:14.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:03:14.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:03:14.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:03:14.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:03:14.543 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:03:15.025 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:03:15.067 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:03:15.069 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:03:15.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:03:15.072 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:03:15.505 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:03:15.542 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:03:15.542 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:03:15.542 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:03:15.544 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:03:15.986 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:03:16.459 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:03:16.542 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:03:16.543 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:03:16.543 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:03:16.545 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:03:16.929 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:03:17.409 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 03:03:17.544 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:03:17.544 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:03:17.544 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:03:17.547 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:03:17.887 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 03:03:18.365 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 03:03:18.546 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:03:18.546 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:03:18.546 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:03:18.549 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:03:18.844 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 03:03:19.322 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 03:03:19.547 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:03:19.547 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:03:19.547 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:03:19.550 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:03:19.802 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 03:03:20.283 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 03:03:20.757 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 03:03:21.090 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:03:21.091 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:03:21.091 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:03:21.091 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:03:21.097 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:03:21.097 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:03:21.097 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:03:21.097 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:03:21.097 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:03:21.098 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:03:21.098 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:03:21.098 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1400 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:03:21.098 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1400 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:03:26.095 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:03:26.095 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:03:26.097 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:03:26.097 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:03:26.098 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:03:26.098 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:03:26.106 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:03:26.107 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:03:26.107 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:03:26.108 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:03:26.108 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:03:26.111 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:03:26.111 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:03:26.111 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:03:26.111 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:03:26.111 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:03:26.111 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:03:26.112 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:03:26.112 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:03:26.114 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:03:26.114 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:03:26.114 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:03:26.114 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:03:26.114 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:03:26.114 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:03:26.115 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:03:26.115 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:03:26.117 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:03:26.117 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:03:26.117 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:03:26.117 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:03:26.117 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:03:26.118 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:03:26.118 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:03:26.118 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:03:26.121 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:03:26.121 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:03:26.121 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:03:26.121 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:03:26.121 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:03:26.122 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:03:26.122 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:03:26.122 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:03:26.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:03:26.122 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:03:26.122 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:03:26.122 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:03:26.122 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:03:26.122 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:03:26.122 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:03:26.122 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:03:26.122 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:03:26.122 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:03:26.122 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:03:26.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:03:26.122 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:03:26.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:03:26.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:03:26.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:03:26.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:03:26.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:03:26.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:03:26.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:03:26.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:03:26.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:03:26.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:03:26.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:03:26.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:03:26.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:03:26.124 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:03:26.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:03:26.124 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:03:26.124 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:03:26.124 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:03:26.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:03:26.124 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:03:26.124 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:03:26.124 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:03:26.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:03:26.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:03:26.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:03:26.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:03:26.127 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:03:26.612 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:03:26.657 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:03:26.659 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:03:26.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:03:26.662 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:03:27.089 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:03:27.126 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:03:27.126 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:03:27.126 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:03:27.131 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:03:27.568 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:03:28.047 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:03:28.127 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:03:28.127 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:03:28.128 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:03:28.133 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:03:28.529 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:03:29.009 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 03:03:29.129 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:03:29.129 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:03:29.129 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:03:29.134 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:03:29.487 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 03:03:29.967 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 03:03:30.130 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:03:30.130 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:03:30.130 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:03:30.136 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:03:30.446 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 03:03:30.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:03:30.925 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 03:03:31.131 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:03:31.131 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:03:31.132 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:03:31.138 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:03:31.402 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 03:03:31.882 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 03:03:32.362 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 03:03:32.838 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 03:03:33.307 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 03:03:33.776 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 03:03:34.255 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 03:03:34.700 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:03:34.700 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:03:34.701 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:03:34.701 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:03:34.702 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:03:34.702 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:03:34.702 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:03:34.702 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:03:34.702 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:03:34.702 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:03:34.702 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:03:34.702 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1832 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:03:34.702 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1832 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:03:34.702 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1832 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:03:34.702 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1832 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:03:34.702 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1832 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:03:34.702 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1832 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:03:34.702 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1832 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:03:34.702 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1832 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:03:39.704 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:03:39.704 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:03:39.706 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:03:39.709 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:03:39.709 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:03:39.710 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:03:39.718 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:03:39.719 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:03:39.719 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:03:39.720 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:03:39.720 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:03:39.723 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:03:39.723 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:03:39.723 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:03:39.723 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:03:39.724 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:03:39.724 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:03:39.725 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:03:39.725 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:03:39.726 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:03:39.727 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:03:39.727 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:03:39.727 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:03:39.727 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:03:39.727 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:03:39.727 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:03:39.727 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:03:39.729 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:03:39.729 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:03:39.729 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:03:39.730 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:03:39.730 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:03:39.730 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:03:39.730 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:03:39.730 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:03:39.733 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:03:39.733 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:03:39.733 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:03:39.733 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:03:39.733 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:03:39.733 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:03:39.733 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:03:39.733 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:03:39.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:03:39.733 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:03:39.733 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:03:39.733 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:03:39.734 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:03:39.734 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:03:39.734 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:03:39.734 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:03:39.734 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:03:39.734 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:03:39.734 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:03:39.734 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:03:39.734 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:03:39.734 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:03:39.734 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:03:39.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:03:39.734 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:03:39.734 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:03:39.734 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:03:39.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:03:39.734 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:03:39.734 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:03:39.734 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:03:39.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:03:39.735 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:03:39.735 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:03:39.735 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:03:39.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:03:39.735 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:03:39.735 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:03:39.735 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:03:39.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:03:39.735 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:03:39.735 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:03:39.735 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:03:39.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:03:39.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:03:39.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:03:39.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:03:39.739 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:03:40.224 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:03:40.258 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:03:40.261 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:03:40.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:03:40.263 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:03:40.693 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:03:40.737 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:03:40.737 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:03:40.737 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:03:40.740 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:03:41.162 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:03:41.638 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:03:41.738 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:03:41.739 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:03:41.739 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:03:41.741 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:03:42.119 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:03:42.597 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 03:03:42.740 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:03:42.740 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:03:42.740 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:03:42.743 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:03:43.074 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 03:03:43.552 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 03:03:43.742 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:03:43.742 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:03:43.742 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:03:43.745 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:03:44.031 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 03:03:44.281 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:03:44.281 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:03:44.281 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:03:44.281 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:03:44.283 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:03:44.284 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:03:44.284 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:03:44.284 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:03:44.284 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:03:44.284 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:03:44.284 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:03:44.284 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=973 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:03:44.284 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=973 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:03:44.284 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=973 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:03:44.284 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=973 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:03:44.284 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=973 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:03:44.284 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=973 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:03:49.285 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:03:49.286 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:03:49.288 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:03:49.288 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:03:49.289 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:03:49.289 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:03:49.297 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:03:49.298 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:03:49.298 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:03:49.298 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:03:49.298 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:03:49.300 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:03:49.300 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:03:49.301 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:03:49.301 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:03:49.301 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:03:49.301 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:03:49.302 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:03:49.302 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:03:49.303 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:03:49.303 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:03:49.304 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:03:49.304 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:03:49.304 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:03:49.304 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:03:49.304 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:03:49.304 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:03:49.306 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:03:49.306 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:03:49.306 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:03:49.306 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:03:49.306 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:03:49.306 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:03:49.307 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:03:49.307 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:03:49.309 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:03:49.309 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:03:49.309 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:03:49.309 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:03:49.309 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:03:49.309 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:03:49.310 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:03:49.310 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:03:49.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:03:49.310 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:03:49.310 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:03:49.310 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:03:49.310 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:03:49.310 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:03:49.310 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:03:49.310 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:03:49.310 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:03:49.310 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:03:49.310 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:03:49.310 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:03:49.310 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:03:49.310 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:03:49.310 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:03:49.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:03:49.311 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:03:49.311 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:03:49.311 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:03:49.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:03:49.311 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:03:49.311 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:03:49.311 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:03:49.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:03:49.311 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:03:49.311 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:03:49.311 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:03:49.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:03:49.311 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:03:49.311 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:03:49.311 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:03:49.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:03:49.311 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:03:49.311 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:03:49.311 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:03:49.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:03:49.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:03:49.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:03:49.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:03:49.315 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:03:49.799 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:03:49.841 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:03:49.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:03:49.844 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:03:49.847 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:03:49.859 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:03:49.860 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:03:49.860 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:03:49.860 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:03:49.863 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:03:49.863 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:03:49.863 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:03:49.863 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:03:49.863 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:03:49.863 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:03:49.863 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:03:49.863 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=117 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:03:49.863 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=117 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:03:49.863 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=117 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:03:49.863 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=117 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:03:49.863 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=117 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:03:49.863 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=117 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:03:49.863 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=117 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:03:54.864 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:03:54.864 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:03:54.866 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:03:54.866 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:03:54.866 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:03:54.867 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:03:54.876 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:03:54.877 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:03:54.877 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:03:54.877 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:03:54.878 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:03:54.880 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:03:54.880 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:03:54.880 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:03:54.880 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:03:54.881 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:03:54.881 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:03:54.881 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:03:54.881 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:03:54.882 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:03:54.882 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:03:54.882 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:03:54.882 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:03:54.883 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:03:54.883 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:03:54.883 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:03:54.883 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:03:54.884 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:03:54.884 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:03:54.884 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:03:54.884 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:03:54.884 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:03:54.884 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:03:54.885 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:03:54.885 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:03:54.887 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:03:54.887 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:03:54.887 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:03:54.887 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:03:54.887 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:03:54.887 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:03:54.887 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:03:54.887 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:03:54.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:03:54.887 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:03:54.887 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:03:54.887 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:03:54.887 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:03:54.887 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:03:54.887 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:03:54.887 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:03:54.887 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:03:54.887 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:03:54.887 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:03:54.887 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:03:54.887 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:03:54.887 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:03:54.887 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:03:54.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:03:54.888 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:03:54.888 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:03:54.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:03:54.888 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:03:54.888 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:03:54.888 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:03:54.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:03:54.888 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:03:54.888 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:03:54.888 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:03:54.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:03:54.888 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:03:54.888 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:03:54.888 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:03:54.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:03:54.888 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:03:54.888 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:03:54.888 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:03:54.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:03:54.888 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:03:54.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:03:54.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:03:54.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:03:54.892 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:03:55.375 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:03:55.409 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:03:55.411 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:03:55.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:03:55.413 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:03:55.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:03:55.429 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:03:55.429 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:03:55.430 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:03:55.430 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:03:55.433 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:03:55.433 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:03:55.433 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:03:55.433 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:03:55.433 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:03:55.434 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:03:55.434 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:03:55.434 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=116 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:03:55.434 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=116 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:03:55.434 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=116 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:03:55.434 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=116 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:03:55.434 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=116 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:03:55.434 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=116 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:03:55.434 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=116 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:04:00.433 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:04:00.433 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:04:00.435 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:04:00.436 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:04:00.437 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:04:00.437 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:04:00.448 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:04:00.448 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:04:00.448 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:04:00.449 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:04:00.449 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:04:00.450 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:04:00.450 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:04:00.451 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:04:00.451 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:04:00.451 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:04:00.451 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:04:00.451 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:04:00.451 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:04:00.452 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:04:00.452 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:04:00.452 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:04:00.452 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:04:00.452 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:04:00.452 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:04:00.453 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:04:00.453 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:04:00.454 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:04:00.454 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:04:00.454 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:04:00.454 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:04:00.454 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:04:00.454 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:04:00.454 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:04:00.454 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:04:00.456 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:04:00.456 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:04:00.456 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:04:00.456 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:04:00.457 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:04:00.457 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:04:00.457 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:04:00.457 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:04:00.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:04:00.457 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:04:00.457 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:04:00.457 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:04:00.457 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:04:00.457 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:04:00.457 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:04:00.457 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:04:00.457 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:04:00.457 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:04:00.457 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:04:00.457 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:04:00.457 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:04:00.457 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:04:00.457 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:04:00.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:04:00.457 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:04:00.457 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:04:00.457 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:04:00.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:04:00.457 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:04:00.457 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:04:00.457 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:04:00.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:04:00.457 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:04:00.457 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:04:00.458 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:04:00.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:04:00.458 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:04:00.458 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:04:00.458 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:04:00.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:04:00.458 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:04:00.458 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:04:00.458 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:04:00.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:04:00.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:04:00.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:04:00.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:04:00.462 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:04:00.944 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:04:00.979 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:04:00.980 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:04:00.982 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:04:00.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:04:00.994 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:04:00.994 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:04:00.994 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:04:00.994 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:04:00.996 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:04:00.996 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:04:00.996 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:04:00.996 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:04:00.996 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:04:00.996 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:04:00.996 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:04:00.996 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=114 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:04:00.996 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=114 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:04:05.999 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:04:05.999 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:04:06.001 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:04:06.002 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:04:06.002 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:04:06.003 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:04:06.010 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:04:06.010 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:04:06.010 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:04:06.010 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:04:06.010 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:04:06.012 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:04:06.012 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:04:06.012 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:04:06.013 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:04:06.013 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:04:06.013 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:04:06.013 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:04:06.013 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:04:06.015 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:04:06.015 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:04:06.015 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:04:06.015 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:04:06.015 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:04:06.015 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:04:06.015 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:04:06.015 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:04:06.016 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:04:06.016 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:04:06.017 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:04:06.017 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:04:06.017 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:04:06.017 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:04:06.017 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:04:06.017 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:04:06.019 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:04:06.019 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:04:06.019 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:04:06.019 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:04:06.019 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:04:06.019 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:04:06.019 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:04:06.019 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:04:06.019 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:04:06.019 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:04:06.019 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:04:06.019 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:04:06.019 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:04:06.019 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:04:06.019 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:04:06.019 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:04:06.019 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:04:06.019 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:04:06.019 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:04:06.019 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:04:06.020 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:04:06.020 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:04:06.020 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:04:06.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:04:06.020 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:04:06.020 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:04:06.020 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:04:06.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:04:06.020 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:04:06.020 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:04:06.020 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:04:06.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:04:06.020 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:04:06.020 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:04:06.020 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:04:06.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:04:06.020 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:04:06.020 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:04:06.020 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:04:06.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:04:06.020 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:04:06.020 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:04:06.020 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:04:06.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:04:06.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:04:06.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:04:06.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:04:06.024 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:04:06.508 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:04:06.539 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:04:06.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:04:06.541 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:04:06.543 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:04:06.547 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:04:06.547 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:04:06.547 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:04:06.548 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:04:06.548 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:04:06.548 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:04:06.548 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:04:06.548 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:04:06.977 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:04:07.021 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:04:07.022 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:04:07.023 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:04:07.024 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:04:07.446 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:04:07.920 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:04:08.023 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:04:08.023 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:04:08.024 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:04:08.025 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:04:08.398 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:04:08.876 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 03:04:09.024 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:04:09.024 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:04:09.024 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:04:09.025 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:04:09.354 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 03:04:09.556 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:04:09.556 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2026-01-09 03:04:09.556 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:04:09.556 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:04:09.605 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:04:09.606 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:04:09.606 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:04:09.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:04:09.612 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:04:09.613 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:04:09.613 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:04:09.613 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:04:09.614 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:04:09.614 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:04:09.614 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:04:09.614 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:04:09.614 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:04:09.614 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:04:09.614 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:04:09.614 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=771 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:04:09.614 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=771 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:04:09.614 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=771 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:04:09.614 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=771 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:04:09.614 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=772 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:04:09.614 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=772 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:04:09.614 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=772 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:04:09.614 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=772 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:04:09.614 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=772 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:04:09.614 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=772 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:04:09.614 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=772 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:04:09.614 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=772 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:04:14.617 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:04:14.617 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:04:14.619 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:04:14.619 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:04:14.619 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:04:14.620 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:04:14.629 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:04:14.630 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:04:14.630 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:04:14.630 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:04:14.630 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:04:14.632 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:04:14.632 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:04:14.633 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:04:14.633 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:04:14.633 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:04:14.633 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:04:14.633 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:04:14.633 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:04:14.634 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:04:14.634 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:04:14.635 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:04:14.635 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:04:14.635 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:04:14.635 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:04:14.635 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:04:14.635 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:04:14.636 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:04:14.636 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:04:14.636 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:04:14.636 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:04:14.636 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:04:14.636 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:04:14.637 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:04:14.637 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:04:14.638 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:04:14.638 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:04:14.638 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:04:14.638 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:04:14.638 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:04:14.638 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:04:14.638 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:04:14.638 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:04:14.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:04:14.639 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:04:14.639 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:04:14.639 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:04:14.639 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:04:14.639 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:04:14.639 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:04:14.639 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:04:14.639 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:04:14.639 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:04:14.639 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:04:14.639 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:04:14.639 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:04:14.639 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:04:14.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:04:14.639 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:04:14.639 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:04:14.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:04:14.639 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:04:14.639 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:04:14.639 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:04:14.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:04:14.639 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:04:14.639 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:04:14.639 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:04:14.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:04:14.639 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:04:14.639 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:04:14.639 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:04:14.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:04:14.639 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:04:14.639 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:04:14.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:04:14.640 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:04:14.640 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:04:14.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:04:14.640 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:04:14.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:04:14.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:04:14.644 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:04:15.126 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:04:15.158 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:04:15.159 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:04:15.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:04:15.160 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:04:15.163 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:04:15.163 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:04:15.163 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:04:15.163 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:04:15.163 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:04:15.163 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:04:15.164 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:04:15.164 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:04:15.595 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:04:15.641 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:04:15.641 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:04:15.641 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:04:15.643 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:04:16.071 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:04:16.549 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:04:16.642 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:04:16.642 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:04:16.642 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:04:16.645 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:04:17.027 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:04:17.505 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 03:04:17.643 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:04:17.643 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:04:17.643 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:04:17.646 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:04:17.983 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 03:04:18.184 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:04:18.184 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2026-01-09 03:04:18.185 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:04:18.186 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:04:18.461 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 03:04:18.644 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:04:18.644 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:04:18.645 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:04:18.647 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:04:18.939 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 03:04:18.951 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:04:18.951 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:04:18.951 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:04:18.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:04:18.960 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:04:18.960 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:04:18.960 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:04:18.960 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:04:18.961 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:04:18.961 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:04:18.961 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:04:18.961 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:04:18.961 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:04:18.961 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:04:18.961 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:04:23.966 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:04:23.972 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:04:23.972 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:04:23.972 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:04:23.972 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:04:23.972 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:04:23.974 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:04:23.974 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:04:23.974 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:04:23.975 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:04:23.975 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:04:23.978 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:04:23.979 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:04:23.979 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:04:23.979 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:04:23.980 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:04:23.980 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:04:23.981 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:04:23.981 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:04:23.983 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:04:23.983 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:04:23.984 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:04:23.984 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:04:23.984 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:04:23.985 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:04:23.985 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:04:23.985 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:04:23.987 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:04:23.987 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:04:23.988 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:04:23.988 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:04:23.988 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:04:23.988 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:04:23.988 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:04:23.988 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:04:23.992 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:04:23.992 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:04:23.992 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:04:23.992 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:04:23.992 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:04:23.992 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:04:23.992 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:04:23.992 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:04:23.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:04:23.993 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:04:23.993 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:04:23.993 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:04:23.993 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:04:23.993 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:04:23.993 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:04:23.993 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:04:23.993 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:04:23.993 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:04:23.993 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:04:23.993 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:04:23.993 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:04:23.993 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:04:23.993 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:04:23.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:04:23.994 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:04:23.994 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:04:23.994 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:04:23.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:04:23.994 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:04:23.994 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:04:23.994 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:04:23.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:04:23.994 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:04:23.994 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:04:23.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:04:23.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:04:23.995 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:04:23.995 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:04:23.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:04:23.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:04:23.995 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:04:23.995 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:04:23.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:04:23.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:04:23.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:04:23.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:04:23.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:04:23.998 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:04:24.481 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:04:24.520 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:04:24.521 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:04:24.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:04:24.522 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:04:24.525 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:04:24.525 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:04:24.525 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:04:24.526 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:04:24.526 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:04:24.527 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:04:24.527 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:04:24.527 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:04:24.958 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:04:24.996 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:04:24.997 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:04:24.999 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:04:25.001 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:04:25.436 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:04:25.915 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:04:25.998 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:04:25.998 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:04:25.999 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:04:26.002 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:04:26.392 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:04:26.870 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 03:04:26.999 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:04:27.000 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:04:27.000 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:04:27.003 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:04:27.348 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 03:04:27.591 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:04:27.591 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2026-01-09 03:04:27.591 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:04:27.592 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:04:27.826 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 03:04:28.000 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:04:28.001 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:04:28.001 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:04:28.005 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:04:28.304 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 03:04:28.782 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 03:04:29.001 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:04:29.001 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:04:29.002 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:04:29.006 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:04:29.261 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 03:04:29.739 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 03:04:30.218 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 03:04:30.695 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 03:04:31.174 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 03:04:31.652 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 03:04:32.130 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 03:04:32.594 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:04:32.594 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:04:32.595 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:04:32.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:04:32.609 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 03:04:32.613 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:04:32.613 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:04:32.613 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:04:32.613 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:04:32.616 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:04:32.616 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:04:32.616 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:04:32.616 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:04:32.616 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:04:32.616 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:04:32.616 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:04:37.618 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:04:37.618 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:04:37.625 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:04:37.626 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:04:37.626 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:04:37.626 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:04:37.635 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:04:37.636 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:04:37.636 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:04:37.637 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:04:37.637 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:04:37.639 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:04:37.640 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:04:37.640 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:04:37.640 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:04:37.641 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:04:37.641 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:04:37.641 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:04:37.641 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:04:37.643 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:04:37.643 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:04:37.643 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:04:37.643 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:04:37.643 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:04:37.643 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:04:37.643 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:04:37.643 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:04:37.645 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:04:37.645 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:04:37.645 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:04:37.645 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:04:37.645 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:04:37.645 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:04:37.645 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:04:37.646 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:04:37.648 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:04:37.648 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:04:37.648 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:04:37.648 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:04:37.648 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:04:37.648 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:04:37.648 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:04:37.648 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:04:37.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:04:37.648 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:04:37.648 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:04:37.649 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:04:37.649 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:04:37.649 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:04:37.649 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:04:37.649 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:04:37.649 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:04:37.649 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:04:37.649 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:04:37.649 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:04:37.649 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:04:37.649 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:04:37.649 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:04:37.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:04:37.649 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:04:37.649 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:04:37.649 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:04:37.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:04:37.649 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:04:37.649 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:04:37.649 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:04:37.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:04:37.649 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:04:37.650 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:04:37.650 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:04:37.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:04:37.650 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:04:37.650 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:04:37.650 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:04:37.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:04:37.650 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:04:37.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:04:37.650 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:04:37.650 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:04:37.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:04:37.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:04:37.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:04:37.653 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:04:38.135 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:04:38.174 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:04:38.176 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:04:38.179 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:04:38.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:04:38.186 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:04:38.186 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:04:38.186 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:04:38.186 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:04:38.186 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:04:38.186 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:04:38.187 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:04:38.187 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:04:38.608 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:04:38.651 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:04:38.653 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:04:38.655 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:04:38.657 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:04:39.080 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:04:39.559 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:04:39.652 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:04:39.654 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:04:39.656 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:04:39.657 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:04:40.037 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:04:40.515 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 03:04:40.654 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:04:40.655 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:04:40.657 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:04:40.658 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:04:40.993 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 03:04:41.236 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:04:41.236 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2026-01-09 03:04:41.236 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:04:41.236 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:04:41.471 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 03:04:41.655 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:04:41.656 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:04:41.657 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:04:41.659 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:04:41.949 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 03:04:42.427 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 03:04:42.655 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:04:42.657 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:04:42.658 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:04:42.660 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:04:42.905 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 03:04:43.383 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 03:04:43.862 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 03:04:44.340 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 03:04:44.818 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 03:04:45.297 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 03:04:45.775 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 03:04:46.239 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:04:46.239 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:04:46.239 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:04:46.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:04:46.254 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 03:04:46.259 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:04:46.259 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:04:46.259 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:04:46.259 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:04:46.261 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:04:46.261 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:04:46.261 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:04:46.261 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:04:46.261 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:04:46.261 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:04:46.261 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:04:51.264 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:04:51.264 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:04:51.266 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:04:51.266 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:04:51.266 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:04:51.267 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:04:51.274 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:04:51.275 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:04:51.275 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:04:51.275 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:04:51.275 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:04:51.278 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:04:51.278 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:04:51.278 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:04:51.278 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:04:51.278 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:04:51.278 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:04:51.278 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:04:51.278 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:04:51.280 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:04:51.280 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:04:51.280 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:04:51.280 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:04:51.280 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:04:51.280 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:04:51.281 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:04:51.281 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:04:51.282 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:04:51.282 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:04:51.282 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:04:51.282 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:04:51.282 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:04:51.282 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:04:51.282 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:04:51.283 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:04:51.285 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:04:51.285 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:04:51.285 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:04:51.285 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:04:51.285 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:04:51.285 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:04:51.285 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:04:51.285 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:04:51.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:04:51.285 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:04:51.285 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:04:51.285 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:04:51.285 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:04:51.285 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:04:51.285 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:04:51.285 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:04:51.285 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:04:51.285 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:04:51.285 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:04:51.285 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:04:51.286 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:04:51.286 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:04:51.286 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:04:51.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:04:51.286 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:04:51.286 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:04:51.286 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:04:51.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:04:51.286 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:04:51.286 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:04:51.286 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:04:51.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:04:51.286 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:04:51.286 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:04:51.286 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:04:51.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:04:51.286 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:04:51.286 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:04:51.286 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:04:51.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:04:51.286 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:04:51.286 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:04:51.286 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:04:51.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:04:51.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:04:51.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:04:51.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:04:51.290 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:04:51.774 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:04:51.800 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:04:51.800 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:04:51.801 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:04:51.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:04:51.803 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:04:51.803 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:04:51.803 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:04:51.803 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:04:51.803 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:04:51.803 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:04:51.803 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:04:51.803 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:04:52.243 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:04:52.287 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:04:52.288 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:04:52.289 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:04:52.291 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:04:52.712 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:04:53.188 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:04:53.288 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:04:53.289 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:04:53.290 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:04:53.292 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:04:53.665 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:04:54.144 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 03:04:54.289 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:04:54.290 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:04:54.291 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:04:54.293 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:04:54.621 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 03:04:54.822 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:04:54.822 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2026-01-09 03:04:54.823 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:04:54.823 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:04:55.099 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 03:04:55.291 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:04:55.291 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:04:55.293 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:04:55.295 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:04:55.577 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 03:04:56.056 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 03:04:56.292 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:04:56.292 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:04:56.293 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:04:56.295 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:04:56.534 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 03:04:57.009 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 03:04:57.478 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 03:04:57.948 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 03:04:58.423 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 03:04:58.902 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 03:04:59.380 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 03:04:59.825 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:04:59.826 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:04:59.826 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:04:59.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:04:59.842 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:04:59.842 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:04:59.842 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:04:59.843 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:04:59.846 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:04:59.846 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:04:59.846 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:04:59.846 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:04:59.846 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:04:59.846 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:04:59.846 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:04:59.846 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1836 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:04:59.846 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1836 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:04:59.846 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1836 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:04:59.846 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1836 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:04:59.846 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1836 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:04:59.846 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1836 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:04:59.846 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1836 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:04:59.846 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1836 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:05:04.846 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:05:04.847 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:05:04.848 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:05:04.849 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:05:04.849 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:05:04.850 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:05:04.857 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:05:04.858 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:05:04.858 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:05:04.859 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:05:04.859 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:05:04.862 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:05:04.862 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:05:04.862 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:05:04.862 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:05:04.863 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:05:04.863 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:05:04.863 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:05:04.863 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:05:04.864 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:05:04.865 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:05:04.865 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:05:04.865 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:05:04.865 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:05:04.865 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:05:04.865 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:05:04.865 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:05:04.867 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:05:04.867 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:05:04.867 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:05:04.867 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:05:04.867 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:05:04.867 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:05:04.867 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:05:04.867 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:05:04.869 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:05:04.869 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:05:04.869 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:05:04.869 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:05:04.870 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:05:04.870 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:05:04.870 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:05:04.870 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:05:04.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:05:04.870 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:05:04.870 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:05:04.870 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:05:04.870 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:05:04.870 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:05:04.870 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:05:04.870 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:05:04.870 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:05:04.870 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:05:04.870 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:05:04.870 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:05:04.870 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:05:04.870 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:05:04.870 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:05:04.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:05:04.871 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:05:04.871 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:05:04.871 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:05:04.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:05:04.871 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:05:04.871 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:05:04.871 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:05:04.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:05:04.871 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:05:04.871 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:05:04.871 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:05:04.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:05:04.871 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:05:04.871 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:05:04.871 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:05:04.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:05:04.871 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:05:04.871 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:05:04.871 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:05:04.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:05:04.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:05:04.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:05:04.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:05:04.875 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:05:05.360 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:05:05.389 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:05:05.391 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:05:05.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:05:05.392 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:05:05.396 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:05:05.396 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:05:05.396 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:05:05.397 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:05:05.397 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:05:05.397 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:05:05.397 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:05:05.397 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:05:05.404 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:05:05.404 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2026-01-09 03:05:05.404 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:05:05.404 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:05:05.830 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:05:05.873 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:05:05.873 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:05:05.873 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:05:05.873 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:05:06.299 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:05:06.770 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:05:06.874 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:05:06.874 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:05:06.874 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:05:06.874 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:05:07.240 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:05:07.711 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 03:05:07.875 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:05:07.875 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:05:07.875 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:05:07.875 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:05:08.182 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 03:05:08.652 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 03:05:08.876 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:05:08.876 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:05:08.876 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:05:08.876 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:05:09.123 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 03:05:09.601 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 03:05:09.877 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:05:09.877 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:05:09.878 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:05:09.878 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:05:10.080 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 03:05:10.406 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:05:10.406 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:05:10.406 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:05:10.418 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:05:10.418 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:05:10.418 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:05:10.418 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:05:10.419 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:05:10.419 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:05:10.419 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:05:10.419 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:05:10.419 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:05:10.419 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:05:10.419 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:05:10.419 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1197 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:05:10.419 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1197 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:05:10.419 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1197 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:05:10.419 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1197 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:05:10.419 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1197 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:05:10.419 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1197 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:05:10.419 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1197 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:05:15.423 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:05:15.423 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:05:15.425 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:05:15.425 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:05:15.426 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:05:15.426 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:05:15.435 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:05:15.437 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:05:15.437 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:05:15.438 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:05:15.438 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:05:15.442 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:05:15.442 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:05:15.443 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:05:15.443 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:05:15.443 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:05:15.443 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:05:15.444 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:05:15.444 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:05:15.446 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:05:15.446 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:05:15.446 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:05:15.446 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:05:15.446 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:05:15.447 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:05:15.447 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:05:15.447 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:05:15.449 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:05:15.449 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:05:15.449 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:05:15.449 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:05:15.449 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:05:15.449 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:05:15.450 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:05:15.450 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:05:15.453 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:05:15.453 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:05:15.453 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:05:15.453 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:05:15.453 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:05:15.453 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:05:15.453 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:05:15.453 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:05:15.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:05:15.453 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:05:15.453 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:05:15.453 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:05:15.453 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:05:15.453 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:05:15.453 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:05:15.454 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:05:15.454 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:05:15.454 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:05:15.454 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:05:15.454 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:05:15.454 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:05:15.454 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:05:15.454 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:05:15.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:05:15.454 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:05:15.454 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:05:15.454 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:05:15.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:05:15.454 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:05:15.454 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:05:15.454 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:05:15.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:05:15.455 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:05:15.455 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:05:15.455 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:05:15.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:05:15.455 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:05:15.455 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:05:15.455 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:05:15.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:05:15.455 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:05:15.455 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:05:15.455 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:05:15.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:05:15.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:05:15.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:05:15.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:05:15.459 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:05:15.942 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:05:15.989 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:05:15.992 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:05:15.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:05:15.994 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:05:16.003 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:05:16.004 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:05:16.004 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:05:16.006 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:05:16.006 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:05:16.007 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:05:16.007 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:05:16.007 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:05:16.420 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:05:16.457 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:05:16.457 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:05:16.458 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:05:16.461 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:05:16.897 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:05:17.375 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:05:17.458 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:05:17.458 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:05:17.459 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:05:17.462 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:05:17.853 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:05:18.331 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 03:05:18.459 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:05:18.459 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:05:18.460 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:05:18.463 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:05:18.809 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 03:05:19.052 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:05:19.052 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2026-01-09 03:05:19.053 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:05:19.053 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:05:19.287 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 03:05:19.460 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:05:19.460 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:05:19.460 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:05:19.464 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:05:19.765 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 03:05:20.237 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 03:05:20.461 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:05:20.461 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:05:20.461 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:05:20.464 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:05:20.707 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 03:05:21.053 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:05:21.054 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:05:21.054 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:05:21.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:05:21.066 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:05:21.066 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:05:21.066 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:05:21.067 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:05:21.069 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:05:21.069 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:05:21.069 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:05:21.069 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:05:21.069 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:05:21.069 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:05:21.069 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:05:21.069 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1201 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:05:21.069 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1201 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:05:21.069 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1201 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:05:21.070 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1201 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:05:21.070 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1201 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:05:26.071 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:05:26.071 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:05:26.073 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:05:26.073 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:05:26.073 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:05:26.074 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:05:26.083 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:05:26.084 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:05:26.084 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:05:26.085 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:05:26.085 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:05:26.089 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:05:26.089 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:05:26.089 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:05:26.089 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:05:26.090 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:05:26.090 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:05:26.090 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:05:26.090 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:05:26.092 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:05:26.092 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:05:26.092 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:05:26.092 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:05:26.092 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:05:26.092 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:05:26.092 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:05:26.093 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:05:26.094 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:05:26.094 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:05:26.094 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:05:26.094 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:05:26.094 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:05:26.094 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:05:26.094 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:05:26.095 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:05:26.097 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:05:26.097 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:05:26.097 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:05:26.097 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:05:26.097 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:05:26.097 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:05:26.097 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:05:26.097 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:05:26.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:05:26.097 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:05:26.097 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:05:26.097 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:05:26.097 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:05:26.097 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:05:26.098 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:05:26.098 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:05:26.098 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:05:26.098 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:05:26.098 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:05:26.098 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:05:26.098 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:05:26.098 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:05:26.098 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:05:26.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:05:26.098 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:05:26.098 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:05:26.098 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:05:26.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:05:26.098 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:05:26.098 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:05:26.098 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:05:26.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:05:26.098 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:05:26.098 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:05:26.098 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:05:26.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:05:26.098 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:05:26.099 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:05:26.099 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:05:26.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:05:26.099 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:05:26.099 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:05:26.099 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:05:26.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:05:26.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:05:26.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:05:26.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:05:26.102 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:05:26.586 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:05:26.620 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:05:26.621 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:05:26.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:05:26.622 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:05:26.626 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:05:26.626 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:05:26.626 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:05:26.627 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:05:26.627 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:05:26.627 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:05:26.627 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:05:26.627 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:05:27.064 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:05:27.100 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:05:27.100 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:05:27.101 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:05:27.103 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:05:27.542 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:05:28.020 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:05:28.101 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:05:28.101 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:05:28.102 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:05:28.104 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:05:28.498 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:05:28.976 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 03:05:29.102 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:05:29.102 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:05:29.102 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:05:29.105 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:05:29.454 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 03:05:29.723 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:05:29.724 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:05:29.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:05:29.732 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:05:29.732 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:05:29.732 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:05:29.732 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:05:29.733 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:05:29.733 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:05:29.733 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:05:29.733 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:05:29.733 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:05:29.733 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:05:29.734 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:05:29.734 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=776 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:05:29.734 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=776 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:05:29.734 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=776 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:05:29.734 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=776 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:05:29.734 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=776 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:05:29.734 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=776 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:05:29.734 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=776 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:05:29.734 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=776 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:05:34.737 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:05:34.737 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:05:34.741 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:05:34.741 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:05:34.741 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:05:34.741 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:05:34.750 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:05:34.751 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:05:34.751 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:05:34.751 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:05:34.751 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:05:34.754 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:05:34.755 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:05:34.755 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:05:34.755 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:05:34.755 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:05:34.756 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:05:34.756 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:05:34.756 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:05:34.758 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:05:34.758 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:05:34.758 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:05:34.758 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:05:34.758 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:05:34.758 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:05:34.758 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:05:34.758 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:05:34.761 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:05:34.761 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:05:34.761 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:05:34.761 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:05:34.761 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:05:34.761 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:05:34.761 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:05:34.761 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:05:34.765 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:05:34.765 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:05:34.765 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:05:34.765 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:05:34.765 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:05:34.765 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:05:34.765 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:05:34.765 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:05:34.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:05:34.765 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:05:34.765 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:05:34.765 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:05:34.765 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:05:34.765 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:05:34.766 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:05:34.766 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:05:34.766 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:05:34.766 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:05:34.766 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:05:34.766 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:05:34.766 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:05:34.766 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:05:34.766 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:05:34.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:05:34.766 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:05:34.766 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:05:34.766 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:05:34.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:05:34.767 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:05:34.767 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:05:34.767 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:05:34.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:05:34.767 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:05:34.767 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:05:34.767 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:05:34.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:05:34.767 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:05:34.767 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:05:34.767 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:05:34.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:05:34.767 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:05:34.767 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:05:34.767 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:05:34.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:05:34.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:05:34.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:05:34.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:05:34.771 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:05:35.254 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:05:35.296 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:05:35.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:05:35.299 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:05:35.302 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:05:35.310 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:05:35.310 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:05:35.311 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:05:35.312 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:05:35.312 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:05:35.312 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:05:35.312 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:05:35.312 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:05:35.731 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:05:35.769 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:05:35.769 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:05:35.770 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:05:35.773 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:05:36.209 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:05:36.687 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:05:36.770 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:05:36.770 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:05:36.771 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:05:36.774 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:05:37.165 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:05:37.643 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 03:05:37.771 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:05:37.772 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:05:37.772 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:05:37.775 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:05:38.121 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 03:05:38.435 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:05:38.435 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:05:38.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:05:38.437 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:05:38.438 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:05:38.438 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:05:38.438 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:05:38.442 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:05:38.442 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:05:38.442 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:05:38.442 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:05:38.442 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:05:38.442 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:05:38.442 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:05:38.442 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=785 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:05:38.443 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=785 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:05:38.443 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=785 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:05:38.443 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=785 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:05:38.443 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=785 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:05:38.443 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=785 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:05:38.443 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=785 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:05:38.443 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=785 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:05:43.442 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:05:43.442 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:05:43.444 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:05:43.445 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:05:43.445 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:05:43.446 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:05:43.458 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:05:43.459 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:05:43.459 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:05:43.459 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:05:43.459 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:05:43.462 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:05:43.462 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:05:43.463 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:05:43.463 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:05:43.463 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:05:43.463 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:05:43.463 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:05:43.463 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:05:43.465 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:05:43.465 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:05:43.465 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:05:43.465 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:05:43.465 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:05:43.465 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:05:43.465 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:05:43.465 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:05:43.467 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:05:43.467 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:05:43.467 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:05:43.467 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:05:43.467 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:05:43.467 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:05:43.467 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:05:43.467 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:05:43.469 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:05:43.469 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:05:43.469 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:05:43.469 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:05:43.469 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:05:43.469 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:05:43.469 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:05:43.470 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:05:43.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:05:43.470 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:05:43.470 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:05:43.470 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:05:43.470 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:05:43.470 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:05:43.470 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:05:43.470 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:05:43.470 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:05:43.470 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:05:43.470 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:05:43.470 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:05:43.470 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:05:43.470 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:05:43.470 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:05:43.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:05:43.470 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:05:43.470 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:05:43.470 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:05:43.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:05:43.470 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:05:43.470 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:05:43.470 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:05:43.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:05:43.470 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:05:43.470 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:05:43.470 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:05:43.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:05:43.470 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:05:43.470 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:05:43.470 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:05:43.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:05:43.471 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:05:43.471 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:05:43.471 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:05:43.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:05:43.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:05:43.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:05:43.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:05:43.475 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:05:43.959 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:05:43.991 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:05:43.992 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:05:43.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:05:43.994 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:05:43.998 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:05:43.998 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:05:43.998 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:05:43.998 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:05:43.998 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:05:43.998 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:05:43.999 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:05:43.999 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:05:44.275 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:05:44.275 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:05:44.284 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:05:44.285 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:05:44.285 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:05:44.285 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:05:44.286 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:05:44.286 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:05:44.286 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:05:44.286 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:05:44.286 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:05:44.286 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:05:44.286 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:05:49.288 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:05:49.288 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:05:49.290 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:05:49.290 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:05:49.290 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:05:49.291 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:05:49.300 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:05:49.301 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:05:49.301 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:05:49.301 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:05:49.301 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:05:49.304 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:05:49.304 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:05:49.304 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:05:49.304 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:05:49.305 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:05:49.305 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:05:49.305 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:05:49.305 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:05:49.307 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:05:49.307 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:05:49.307 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:05:49.307 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:05:49.307 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:05:49.307 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:05:49.307 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:05:49.307 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:05:49.309 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:05:49.309 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:05:49.309 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:05:49.309 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:05:49.310 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:05:49.310 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:05:49.310 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:05:49.310 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:05:49.312 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:05:49.312 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:05:49.312 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:05:49.312 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:05:49.312 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:05:49.312 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:05:49.312 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:05:49.312 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:05:49.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:05:49.313 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:05:49.313 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:05:49.313 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:05:49.313 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:05:49.313 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:05:49.313 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:05:49.313 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:05:49.313 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:05:49.313 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:05:49.313 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:05:49.313 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:05:49.313 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:05:49.313 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:05:49.313 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:05:49.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:05:49.313 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:05:49.313 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:05:49.313 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:05:49.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:05:49.313 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:05:49.313 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:05:49.313 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:05:49.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:05:49.313 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:05:49.313 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:05:49.313 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:05:49.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:05:49.314 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:05:49.314 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:05:49.314 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:05:49.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:05:49.314 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:05:49.314 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:05:49.314 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:05:49.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:05:49.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:05:49.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:05:49.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:05:49.318 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:05:49.801 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:05:49.844 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:05:49.846 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:05:49.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:05:49.850 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:05:49.859 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:05:49.859 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:05:49.859 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:05:49.860 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:05:49.860 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:05:49.860 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:05:49.860 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:05:49.860 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:05:50.071 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:05:50.071 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:05:50.078 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:05:50.078 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:05:50.078 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:05:50.078 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:05:50.079 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:05:50.079 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:05:50.079 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:05:50.079 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:05:50.079 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:05:50.079 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:05:50.079 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:05:50.079 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=164 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:05:50.079 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=164 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:05:50.079 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=164 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:05:50.079 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=164 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:05:50.079 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=164 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:05:50.079 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=164 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:05:50.079 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=164 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:05:50.079 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=164 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:05:55.082 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:05:55.082 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:05:55.084 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:05:55.085 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:05:55.086 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:05:55.086 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:05:55.094 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:05:55.095 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:05:55.095 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:05:55.095 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:05:55.095 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:05:55.097 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:05:55.097 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:05:55.098 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:05:55.098 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:05:55.098 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:05:55.098 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:05:55.099 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:05:55.099 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:05:55.100 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:05:55.100 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:05:55.100 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:05:55.100 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:05:55.100 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:05:55.100 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:05:55.101 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:05:55.101 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:05:55.102 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:05:55.102 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:05:55.102 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:05:55.102 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:05:55.102 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:05:55.102 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:05:55.102 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:05:55.102 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:05:55.104 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:05:55.104 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:05:55.104 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:05:55.104 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:05:55.104 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:05:55.104 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:05:55.104 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:05:55.104 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:05:55.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:05:55.104 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:05:55.104 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:05:55.104 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:05:55.104 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:05:55.104 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:05:55.104 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:05:55.105 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:05:55.105 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:05:55.105 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:05:55.105 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:05:55.105 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:05:55.105 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:05:55.105 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:05:55.105 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:05:55.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:05:55.105 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:05:55.105 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:05:55.105 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:05:55.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:05:55.105 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:05:55.105 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:05:55.105 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:05:55.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:05:55.105 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:05:55.105 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:05:55.105 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:05:55.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:05:55.105 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:05:55.105 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:05:55.105 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:05:55.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:05:55.106 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:05:55.106 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:05:55.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:05:55.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:05:55.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:05:55.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:05:55.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:05:55.109 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:05:55.594 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:05:55.626 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:05:55.627 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:05:55.627 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:05:55.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:05:55.631 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:05:55.631 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:05:55.631 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:05:55.631 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:05:55.631 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:05:55.631 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:05:55.631 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:05:55.631 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:05:56.071 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:05:56.107 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:05:56.108 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:05:56.108 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:05:56.111 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:05:56.549 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:05:57.026 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:05:57.109 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:05:57.109 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:05:57.109 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:05:57.112 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:05:57.504 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:05:57.982 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 03:05:58.110 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:05:58.110 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:05:58.110 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:05:58.114 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:05:58.460 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 03:05:58.939 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 03:05:59.111 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:05:59.111 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:05:59.111 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:05:59.115 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:05:59.417 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 03:05:59.895 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 03:06:00.112 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:06:00.113 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:06:00.113 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:06:00.116 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:06:00.373 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 03:06:00.850 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 03:06:01.328 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 03:06:01.806 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 03:06:02.284 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 03:06:02.762 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 03:06:03.240 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 03:06:03.717 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 03:06:04.195 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 03:06:04.513 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:06:04.513 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:06:04.521 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:06:04.521 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:06:04.521 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:06:04.522 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:06:04.526 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:06:04.526 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:06:04.526 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:06:04.526 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:06:04.526 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:06:04.526 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:06:04.527 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:06:04.527 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2011 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:06:04.527 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2011 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:06:04.527 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2011 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:06:04.527 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2011 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:06:04.527 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2011 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:06:04.528 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2011 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:06:04.528 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2011 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:06:09.528 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:06:09.528 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:06:09.528 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:06:09.528 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:06:09.528 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:06:09.528 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:06:09.536 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:06:09.536 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:06:09.537 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:06:09.537 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:06:09.537 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:06:09.540 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:06:09.540 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:06:09.541 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:06:09.541 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:06:09.541 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:06:09.542 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:06:09.542 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:06:09.542 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:06:09.544 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:06:09.544 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:06:09.544 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:06:09.544 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:06:09.545 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:06:09.545 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:06:09.545 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:06:09.545 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:06:09.547 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:06:09.547 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:06:09.547 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:06:09.547 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:06:09.547 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:06:09.547 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:06:09.547 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:06:09.548 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:06:09.550 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:06:09.550 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:06:09.550 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:06:09.550 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:06:09.550 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:06:09.550 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:06:09.550 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:06:09.551 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:06:09.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:06:09.551 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:06:09.551 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:06:09.551 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:06:09.551 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:06:09.551 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:06:09.551 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:06:09.551 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:06:09.551 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:06:09.551 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:06:09.551 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:06:09.551 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:06:09.551 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:06:09.551 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:06:09.551 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:06:09.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:06:09.551 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:06:09.551 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:06:09.551 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:06:09.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:06:09.552 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:06:09.552 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:06:09.552 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:06:09.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:06:09.552 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:06:09.552 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:06:09.552 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:06:09.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:06:09.552 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:06:09.552 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:06:09.552 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:06:09.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:06:09.552 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:06:09.552 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:06:09.552 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:06:09.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:06:09.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:06:09.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:06:09.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:06:09.556 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:06:10.040 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:06:10.071 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:06:10.072 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:06:10.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:06:10.073 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:06:10.077 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:06:10.077 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:06:10.077 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:06:10.079 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:06:10.079 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:06:10.079 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:06:10.079 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:06:10.079 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:06:10.517 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:06:10.553 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:06:10.554 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:06:10.554 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:06:10.557 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:06:10.995 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:06:11.473 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:06:11.554 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:06:11.555 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:06:11.555 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:06:11.558 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:06:11.951 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:06:12.429 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 03:06:12.555 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:06:12.555 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:06:12.556 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:06:12.558 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:06:12.906 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 03:06:13.385 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 03:06:13.556 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:06:13.556 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:06:13.556 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:06:13.560 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:06:13.863 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 03:06:14.341 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 03:06:14.556 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:06:14.557 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:06:14.557 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:06:14.561 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:06:14.819 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 03:06:15.297 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 03:06:15.776 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 03:06:16.254 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 03:06:16.732 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 03:06:17.210 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 03:06:17.688 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 03:06:18.166 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 03:06:18.644 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 03:06:18.996 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:06:18.996 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:06:19.003 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:06:19.003 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:06:19.003 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:06:19.003 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:06:19.006 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:06:19.006 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:06:19.006 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:06:19.006 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:06:19.006 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:06:19.006 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:06:19.006 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:06:19.006 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2011 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:06:19.006 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2011 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:06:19.006 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2011 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:06:19.006 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2011 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:06:19.006 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2012 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:06:19.006 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2012 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:06:19.006 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2012 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:06:19.006 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2012 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:06:19.006 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2012 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:06:19.006 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2012 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:06:19.006 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2012 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:06:19.006 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2012 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:06:19.006 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2013 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:06:19.006 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2013 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:06:19.006 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2013 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:06:19.006 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2013 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:06:19.006 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2013 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:06:19.006 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2013 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:06:19.006 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2013 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:06:19.006 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2013 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:06:19.006 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2014 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:06:19.006 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2014 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:06:19.006 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2014 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:06:19.006 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2014 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:06:19.006 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2014 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:06:19.006 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2014 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:06:19.006 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2014 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:06:19.006 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2014 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:06:19.006 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2015 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:06:19.006 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2015 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:06:19.006 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2015 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:06:19.006 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2015 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:06:19.006 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2015 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:06:19.006 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2015 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:06:19.006 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2015 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:06:19.006 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2015 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:06:19.006 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2016 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:06:19.006 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2016 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:06:19.007 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2016 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:06:19.007 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2016 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:06:19.007 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2016 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:06:19.007 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2016 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:06:19.007 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2016 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:06:19.007 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2016 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:06:24.029 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:06:24.029 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:06:24.031 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:06:24.031 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:06:24.031 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:06:24.032 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:06:24.038 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:06:24.039 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:06:24.040 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:06:24.040 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:06:24.040 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:06:24.042 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:06:24.042 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:06:24.043 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:06:24.043 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:06:24.043 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:06:24.043 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:06:24.044 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:06:24.044 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:06:24.045 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:06:24.045 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:06:24.045 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:06:24.045 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:06:24.045 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:06:24.045 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:06:24.045 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:06:24.045 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:06:24.047 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:06:24.047 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:06:24.047 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:06:24.047 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:06:24.047 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:06:24.047 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:06:24.047 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:06:24.047 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:06:24.050 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:06:24.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:06:24.050 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:06:24.050 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:06:24.050 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:06:24.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:06:24.050 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:06:24.050 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:06:24.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:06:24.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:06:24.050 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:06:24.050 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:06:24.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:06:24.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:06:24.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:06:24.051 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:06:24.051 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:06:24.051 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:06:24.051 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:06:24.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:06:24.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:06:24.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:06:24.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:06:24.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:06:24.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:06:24.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:06:24.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:06:24.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:06:24.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:06:24.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:06:24.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:06:24.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:06:24.052 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:06:24.052 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:06:24.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:06:24.052 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:06:24.052 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:06:24.052 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:06:24.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:06:24.052 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:06:24.052 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:06:24.052 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:06:24.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:06:24.052 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:06:24.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:06:24.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:06:24.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:06:24.056 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:06:24.541 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:06:24.577 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:06:24.578 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:06:24.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:06:24.579 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:06:24.584 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:06:24.584 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:06:24.584 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:06:24.584 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:06:24.585 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:06:24.585 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:06:24.585 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:06:24.585 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:06:25.018 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:06:25.054 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:06:25.055 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:06:25.056 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:06:25.060 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:06:25.496 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:06:25.973 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:06:26.056 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:06:26.056 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:06:26.057 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:06:26.061 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:06:26.451 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:06:26.929 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 03:06:27.057 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:06:27.057 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:06:27.058 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:06:27.062 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:06:27.407 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 03:06:27.649 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:06:27.650 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2026-01-09 03:06:27.650 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:06:27.650 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:06:27.650 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:06:27.885 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 03:06:28.057 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:06:28.058 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:06:28.059 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:06:28.064 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:06:28.363 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 03:06:28.687 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:06:28.687 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:06:28.687 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:06:28.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:06:28.695 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:06:28.695 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:06:28.695 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:06:28.696 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:06:28.698 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:06:28.698 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:06:28.698 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:06:28.698 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:06:28.698 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:06:28.698 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:06:28.698 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:06:28.698 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=991 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:06:28.698 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=991 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:06:28.698 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=991 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:06:28.698 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=991 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:06:28.698 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=991 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:06:28.698 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=991 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:06:28.698 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=991 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:06:28.698 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=992 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:06:28.698 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=992 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:06:28.698 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=992 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:06:28.698 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=992 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:06:28.698 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=992 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:06:28.698 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=992 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:06:28.698 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=992 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:06:28.698 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=992 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:06:33.702 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:06:33.703 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:06:33.703 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:06:33.703 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:06:33.703 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:06:33.703 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:06:33.710 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:06:33.710 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:06:33.710 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:06:33.711 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:06:33.711 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:06:33.714 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:06:33.715 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:06:33.715 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:06:33.715 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:06:33.716 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:06:33.716 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:06:33.716 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:06:33.717 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:06:33.718 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:06:33.719 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:06:33.719 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:06:33.719 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:06:33.719 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:06:33.719 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:06:33.720 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:06:33.720 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:06:33.721 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:06:33.722 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:06:33.722 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:06:33.722 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:06:33.722 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:06:33.722 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:06:33.722 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:06:33.722 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:06:33.725 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:06:33.725 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:06:33.725 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:06:33.725 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:06:33.725 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:06:33.725 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:06:33.725 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:06:33.725 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:06:33.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:06:33.726 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:06:33.726 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:06:33.726 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:06:33.726 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:06:33.726 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:06:33.726 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:06:33.726 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:06:33.726 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:06:33.726 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:06:33.726 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:06:33.726 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:06:33.726 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:06:33.726 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:06:33.726 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:06:33.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:06:33.726 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:06:33.726 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:06:33.726 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:06:33.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:06:33.727 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:06:33.727 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:06:33.727 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:06:33.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:06:33.727 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:06:33.727 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:06:33.727 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:06:33.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:06:33.727 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:06:33.727 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:06:33.727 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:06:33.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:06:33.727 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:06:33.727 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:06:33.727 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:06:33.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:06:33.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:06:33.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:06:33.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:06:33.731 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:06:34.213 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:06:34.254 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:06:34.256 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:06:34.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:06:34.258 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:06:34.446 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:06:34.447 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:06:34.447 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:06:34.447 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:06:34.447 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:06:34.447 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:06:34.447 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:06:34.447 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:06:34.447 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:06:34.447 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:06:34.447 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:06:34.447 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=154 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:06:34.447 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=154 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:06:34.447 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=154 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:06:34.447 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=154 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:06:34.447 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=154 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:06:34.447 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=154 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:06:39.451 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:06:39.451 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:06:39.453 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:06:39.454 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:06:39.454 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:06:39.455 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:06:39.462 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:06:39.463 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:06:39.463 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:06:39.463 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:06:39.463 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:06:39.465 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:06:39.465 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:06:39.465 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:06:39.465 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:06:39.465 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:06:39.466 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:06:39.466 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:06:39.466 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:06:39.467 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:06:39.467 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:06:39.467 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:06:39.467 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:06:39.467 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:06:39.467 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:06:39.467 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:06:39.467 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:06:39.469 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:06:39.469 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:06:39.469 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:06:39.469 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:06:39.469 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:06:39.469 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:06:39.469 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:06:39.469 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:06:39.471 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:06:39.471 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:06:39.471 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:06:39.471 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:06:39.471 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:06:39.471 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:06:39.471 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:06:39.471 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:06:39.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:06:39.472 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:06:39.472 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:06:39.472 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:06:39.472 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:06:39.472 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:06:39.472 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:06:39.472 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:06:39.472 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:06:39.472 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:06:39.472 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:06:39.472 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:06:39.472 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:06:39.472 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:06:39.472 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:06:39.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:06:39.472 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:06:39.472 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:06:39.472 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:06:39.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:06:39.472 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:06:39.472 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:06:39.472 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:06:39.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:06:39.472 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:06:39.472 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:06:39.472 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:06:39.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:06:39.473 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:06:39.473 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:06:39.473 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:06:39.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:06:39.473 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:06:39.473 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:06:39.473 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:06:39.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:06:39.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:06:39.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:06:39.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:06:39.477 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:06:39.961 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:06:39.996 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:06:39.998 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:06:40.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:06:40.001 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:06:40.440 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:06:40.474 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:06:40.474 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:06:40.475 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:06:40.475 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:06:40.919 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:06:41.397 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:06:41.475 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:06:41.476 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:06:41.476 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:06:41.476 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:06:41.878 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:06:42.356 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 03:06:42.476 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:06:42.477 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:06:42.477 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:06:42.477 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:06:42.836 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 03:06:43.315 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 03:06:43.477 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:06:43.477 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:06:43.478 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:06:43.478 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:06:43.794 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 03:06:44.272 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 03:06:44.479 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:06:44.479 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:06:44.479 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:06:44.479 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:06:44.750 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 03:06:45.229 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 03:06:45.707 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 03:06:46.185 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 03:06:46.664 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 03:06:47.142 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 03:06:47.621 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 03:06:48.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:06:48.027 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:06:48.027 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:06:48.027 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:06:48.028 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:06:48.029 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:06:48.029 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:06:48.029 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:06:48.029 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:06:48.029 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:06:48.029 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:06:48.029 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:06:48.029 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1824 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:06:48.029 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1824 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:06:48.029 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1824 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:06:48.029 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1824 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:06:48.029 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1824 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:06:53.030 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:06:53.030 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:06:53.033 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:06:53.033 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:06:53.033 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:06:53.033 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:06:53.042 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:06:53.044 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:06:53.044 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:06:53.045 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:06:53.045 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:06:53.049 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:06:53.049 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:06:53.050 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:06:53.050 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:06:53.050 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:06:53.050 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:06:53.051 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:06:53.051 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:06:53.053 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:06:53.053 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:06:53.053 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:06:53.053 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:06:53.053 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:06:53.054 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:06:53.054 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:06:53.054 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:06:53.056 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:06:53.056 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:06:53.056 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:06:53.056 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:06:53.056 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:06:53.056 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:06:53.056 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:06:53.056 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:06:53.059 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:06:53.059 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:06:53.059 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:06:53.059 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:06:53.059 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:06:53.059 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:06:53.059 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:06:53.059 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:06:53.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:06:53.059 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:06:53.060 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:06:53.060 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:06:53.060 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:06:53.060 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:06:53.060 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:06:53.060 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:06:53.060 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:06:53.060 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:06:53.060 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:06:53.060 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:06:53.060 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:06:53.060 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:06:53.060 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:06:53.060 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:06:53.060 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:06:53.060 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:06:53.060 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:06:53.060 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:06:53.060 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:06:53.060 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:06:53.060 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:06:53.060 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:06:53.060 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:06:53.060 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:06:53.061 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:06:53.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:06:53.061 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:06:53.061 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:06:53.061 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:06:53.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:06:53.061 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:06:53.061 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:06:53.061 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:06:53.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:06:53.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:06:53.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:06:53.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:06:53.065 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:06:53.547 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:06:53.588 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:06:53.591 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:06:53.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:06:53.593 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:06:54.026 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:06:54.063 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:06:54.063 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:06:54.063 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:06:54.065 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:06:54.504 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:06:54.985 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:06:55.064 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:06:55.065 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:06:55.065 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:06:55.067 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:06:55.463 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:06:55.944 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 03:06:56.065 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:06:56.066 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:06:56.066 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:06:56.068 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:06:56.424 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 03:06:56.904 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 03:06:57.067 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:06:57.067 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:06:57.067 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:06:57.070 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:06:57.382 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 03:06:57.860 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 03:06:58.068 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:06:58.068 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:06:58.068 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:06:58.071 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:06:58.339 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 03:06:58.817 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 03:06:59.295 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 03:06:59.774 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 03:07:00.252 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 03:07:00.731 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 03:07:01.210 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 03:07:01.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:07:01.615 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:07:01.615 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:07:01.615 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:07:01.615 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:07:01.620 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:07:01.621 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:07:01.621 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:07:01.621 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:07:01.621 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:07:01.621 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:07:01.621 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:07:01.621 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1824 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:07:01.622 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1824 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:07:06.618 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:07:06.618 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:07:06.620 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:07:06.621 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:07:06.622 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:07:06.622 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:07:06.631 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:07:06.632 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:07:06.632 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:07:06.632 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:07:06.632 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:07:06.635 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:07:06.636 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:07:06.636 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:07:06.636 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:07:06.636 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:07:06.637 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:07:06.637 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:07:06.637 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:07:06.639 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:07:06.639 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:07:06.639 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:07:06.639 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:07:06.639 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:07:06.640 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:07:06.640 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:07:06.640 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:07:06.642 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:07:06.642 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:07:06.643 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:07:06.643 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:07:06.643 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:07:06.643 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:07:06.643 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:07:06.643 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:07:06.646 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:07:06.646 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:07:06.646 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:07:06.646 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:07:06.646 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:07:06.647 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:07:06.647 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:07:06.647 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:07:06.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:07:06.647 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:07:06.647 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:07:06.647 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:07:06.647 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:07:06.647 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:07:06.647 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:07:06.647 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:07:06.647 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:07:06.647 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:07:06.647 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:07:06.647 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:07:06.647 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:07:06.648 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:07:06.648 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:07:06.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:07:06.648 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:07:06.648 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:07:06.648 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:07:06.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:07:06.648 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:07:06.648 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:07:06.648 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:07:06.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:07:06.648 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:07:06.648 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:07:06.648 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:07:06.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:07:06.648 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:07:06.648 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:07:06.648 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:07:06.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:07:06.649 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:07:06.649 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:07:06.649 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:07:06.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:07:06.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:07:06.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:07:06.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:07:06.652 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:07:07.136 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:07:07.167 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:07:07.168 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:07:07.169 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:07:07.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:07:07.614 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:07:07.651 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:07:07.651 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:07:07.651 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:07:07.653 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:07:08.092 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:07:08.570 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:07:08.652 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:07:08.652 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:07:08.652 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:07:08.654 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:07:09.049 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:07:09.548 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 03:07:09.653 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:07:09.653 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:07:09.653 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:07:09.655 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:07:10.026 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 03:07:10.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:07:10.210 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:07:10.210 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:07:10.210 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:07:10.210 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:07:10.214 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:07:10.214 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:07:10.214 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:07:10.214 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:07:10.215 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:07:10.215 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:07:10.215 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:07:10.215 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=755 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:07:10.215 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=755 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:07:10.215 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=755 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:07:10.215 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=755 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:07:10.215 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=755 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:07:10.215 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=755 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:07:10.215 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=755 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:07:10.215 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=756 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:07:10.215 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=756 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:07:10.215 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=756 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:07:10.215 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=756 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:07:10.215 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=756 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:07:10.215 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=756 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:07:10.215 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=756 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:07:10.215 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=756 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:07:15.217 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:07:15.217 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:07:15.218 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:07:15.218 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:07:15.218 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:07:15.218 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:07:15.221 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:07:15.222 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:07:15.222 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:07:15.222 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:07:15.222 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:07:15.223 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:07:15.223 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:07:15.224 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:07:15.224 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:07:15.224 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:07:15.224 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:07:15.224 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:07:15.224 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:07:15.226 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:07:15.226 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:07:15.226 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:07:15.226 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:07:15.226 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:07:15.226 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:07:15.226 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:07:15.226 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:07:15.228 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:07:15.228 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:07:15.228 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:07:15.228 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:07:15.228 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:07:15.228 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:07:15.228 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:07:15.228 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:07:15.230 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:07:15.230 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:07:15.230 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:07:15.230 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:07:15.230 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:07:15.230 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:07:15.231 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:07:15.231 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:07:15.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:07:15.231 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:07:15.231 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:07:15.231 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:07:15.231 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:07:15.231 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:07:15.231 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:07:15.231 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:07:15.231 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:07:15.231 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:07:15.231 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:07:15.231 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:07:15.231 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:07:15.231 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:07:15.231 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:07:15.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:07:15.231 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:07:15.231 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:07:15.231 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:07:15.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:07:15.232 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:07:15.232 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:07:15.232 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:07:15.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:07:15.232 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:07:15.232 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:07:15.232 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:07:15.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:07:15.232 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:07:15.232 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:07:15.232 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:07:15.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:07:15.232 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:07:15.232 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:07:15.232 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:07:15.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:07:15.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:07:15.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:07:15.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:07:15.236 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:07:15.719 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:07:15.752 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:07:15.753 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:07:15.754 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:07:15.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:07:15.775 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:07:15.775 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:07:15.775 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:07:15.784 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:07:15.784 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:07:15.785 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:07:15.785 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:07:15.785 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:07:15.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:07:15.822 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:07:15.823 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:07:15.823 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:07:15.823 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:07:16.189 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:07:16.194 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:07:16.197 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:07:16.198 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:07:16.198 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:07:16.206 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:07:16.206 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:07:16.206 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:07:16.207 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:07:16.209 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:07:16.209 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:07:16.209 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:07:16.209 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:07:16.209 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:07:16.209 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:07:16.209 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:07:16.209 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=210 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:07:16.209 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=210 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:07:16.209 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=210 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:07:16.209 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=210 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:07:16.209 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=210 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:07:16.209 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=210 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:07:16.209 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=210 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:07:16.209 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=211 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:07:16.209 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=211 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:07:16.209 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=211 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:07:16.209 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=211 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:07:16.209 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=211 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:07:16.209 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=211 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:07:16.209 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=211 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:07:16.209 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=211 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:07:21.208 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:07:21.208 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:07:21.208 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:07:21.208 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:07:21.209 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:07:21.210 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:07:21.213 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:07:21.214 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:07:21.214 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:07:21.214 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:07:21.214 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:07:21.215 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:07:21.215 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:07:21.215 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:07:21.215 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:07:21.215 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:07:21.215 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:07:21.215 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:07:21.215 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:07:21.217 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:07:21.217 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:07:21.217 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:07:21.217 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:07:21.217 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:07:21.217 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:07:21.217 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:07:21.217 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:07:21.219 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:07:21.219 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:07:21.219 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:07:21.219 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:07:21.219 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:07:21.219 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:07:21.219 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:07:21.219 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:07:21.221 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:07:21.221 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:07:21.221 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:07:21.221 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:07:21.221 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:07:21.221 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:07:21.222 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:07:21.222 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:07:21.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:07:21.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:07:21.222 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:07:21.222 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:07:21.222 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:07:21.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:07:21.222 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:07:21.222 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:07:21.222 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:07:21.222 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:07:21.222 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:07:21.222 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:07:21.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:07:21.222 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:07:21.222 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:07:21.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:07:21.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:07:21.222 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:07:21.222 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:07:21.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:07:21.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:07:21.222 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:07:21.222 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:07:21.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:07:21.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:07:21.222 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:07:21.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:07:21.222 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:07:21.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:07:21.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:07:21.222 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:07:21.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:07:21.222 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:07:21.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:07:21.222 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:07:21.222 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:07:21.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:07:21.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:07:21.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:07:21.227 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:07:21.707 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:07:21.743 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:07:21.744 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:07:21.746 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:07:21.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:07:21.756 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:07:21.756 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:07:21.756 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:07:21.756 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:07:21.762 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:07:21.762 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:07:21.762 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:07:21.762 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:07:21.762 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:07:21.762 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:07:21.763 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:07:21.763 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=114 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:07:21.763 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=114 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:07:21.763 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=114 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:07:21.763 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=114 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:07:21.763 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=114 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:07:21.764 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=114 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:07:21.764 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=115 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:07:21.764 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=115 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:07:21.764 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=115 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:07:21.764 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=115 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:07:21.764 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=115 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:07:21.764 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=115 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:07:21.764 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=115 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:07:21.764 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=115 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:07:21.764 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=116 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:07:21.764 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=116 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:07:21.765 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=116 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:07:21.765 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=116 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:07:21.765 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=116 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:07:21.765 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=116 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:07:21.765 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=116 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:07:21.765 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=116 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:07:26.761 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:07:26.761 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:07:26.763 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:07:26.763 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:07:26.763 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:07:26.764 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:07:26.773 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:07:26.774 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:07:26.774 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:07:26.774 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:07:26.774 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:07:26.777 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:07:26.777 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:07:26.777 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:07:26.777 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:07:26.777 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:07:26.777 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:07:26.777 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:07:26.777 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:07:26.779 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:07:26.780 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:07:26.780 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:07:26.780 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:07:26.780 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:07:26.780 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:07:26.780 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:07:26.780 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:07:26.782 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:07:26.782 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:07:26.782 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:07:26.782 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:07:26.782 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:07:26.782 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:07:26.782 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:07:26.782 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:07:26.784 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:07:26.784 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:07:26.784 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:07:26.785 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:07:26.785 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:07:26.785 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:07:26.785 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:07:26.785 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:07:26.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:07:26.785 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:07:26.785 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:07:26.785 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:07:26.785 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:07:26.785 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:07:26.785 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:07:26.785 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:07:26.785 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:07:26.785 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:07:26.785 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:07:26.785 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:07:26.785 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:07:26.785 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:07:26.785 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:07:26.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:07:26.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:07:26.786 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:07:26.786 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:07:26.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:07:26.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:07:26.786 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:07:26.786 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:07:26.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:07:26.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:07:26.786 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:07:26.786 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:07:26.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:07:26.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:07:26.786 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:07:26.786 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:07:26.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:07:26.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:07:26.786 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:07:26.786 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:07:26.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:07:26.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:07:26.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:07:26.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:07:26.790 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:07:27.274 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:07:27.308 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:07:27.310 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:07:27.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:07:27.312 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:07:27.752 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:07:27.787 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:07:27.788 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:07:27.788 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:07:27.792 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:07:28.232 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:07:28.711 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:07:28.789 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:07:28.789 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:07:28.789 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:07:28.793 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:07:29.189 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:07:29.338 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:07:29.338 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:07:29.338 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:07:29.338 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:07:29.339 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:07:29.339 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:07:29.339 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:07:29.339 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:07:29.339 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:07:29.339 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:07:29.339 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:07:29.339 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=544 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:07:29.339 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=544 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:07:29.339 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=544 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:07:29.339 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=544 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:07:29.339 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=544 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:07:29.339 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=544 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:07:29.339 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=544 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:07:29.339 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=544 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:07:34.343 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:07:34.343 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:07:34.345 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:07:34.346 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:07:34.347 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:07:34.347 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:07:34.361 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:07:34.363 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:07:34.363 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:07:34.363 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:07:34.363 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:07:34.367 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:07:34.367 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:07:34.368 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:07:34.368 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:07:34.369 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:07:34.369 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:07:34.370 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:07:34.370 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:07:34.372 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:07:34.373 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:07:34.373 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:07:34.373 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:07:34.374 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:07:34.374 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:07:34.375 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:07:34.375 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:07:34.377 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:07:34.377 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:07:34.377 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:07:34.377 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:07:34.378 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:07:34.378 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:07:34.378 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:07:34.378 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:07:34.382 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:07:34.382 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:07:34.382 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:07:34.382 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:07:34.382 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:07:34.382 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:07:34.382 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:07:34.383 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:07:34.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:07:34.383 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:07:34.383 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:07:34.383 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:07:34.383 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:07:34.383 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:07:34.383 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:07:34.383 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:07:34.383 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:07:34.383 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:07:34.383 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:07:34.383 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:07:34.383 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:07:34.384 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:07:34.384 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:07:34.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:07:34.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:07:34.384 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:07:34.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:07:34.384 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:07:34.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:07:34.384 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:07:34.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:07:34.384 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:07:34.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:07:34.384 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:07:34.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:07:34.384 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:07:34.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:07:34.384 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:07:34.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:07:34.384 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:07:34.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:07:34.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:07:34.384 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:07:34.384 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:07:34.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:07:34.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:07:34.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:07:34.388 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:07:34.873 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:07:34.918 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:07:34.920 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:07:34.922 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:07:34.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:07:34.924 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:07:34.925 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:07:34.925 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:07:34.925 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:07:34.925 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:07:34.925 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:07:34.925 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:07:34.925 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:07:35.351 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:07:35.386 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:07:35.387 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:07:35.388 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:07:35.391 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:07:35.829 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:07:36.307 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:07:36.387 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:07:36.387 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:07:36.389 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:07:36.391 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:07:36.786 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:07:37.263 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 03:07:37.388 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:07:37.388 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:07:37.390 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:07:37.392 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:07:37.741 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 03:07:37.760 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:07:37.761 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:07:37.767 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:07:37.767 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:07:37.767 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:07:37.767 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:07:37.768 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:07:37.768 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:07:37.768 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:07:37.768 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:07:37.768 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:07:37.768 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:07:37.768 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:07:42.770 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:07:42.770 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:07:42.772 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:07:42.772 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:07:42.772 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:07:42.773 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:07:42.782 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:07:42.782 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:07:42.782 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:07:42.783 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:07:42.783 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:07:42.784 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:07:42.785 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:07:42.785 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:07:42.785 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:07:42.785 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:07:42.785 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:07:42.786 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:07:42.786 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:07:42.787 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:07:42.787 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:07:42.787 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:07:42.787 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:07:42.787 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:07:42.788 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:07:42.788 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:07:42.788 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:07:42.789 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:07:42.789 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:07:42.789 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:07:42.789 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:07:42.789 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:07:42.789 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:07:42.789 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:07:42.789 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:07:42.791 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:07:42.791 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:07:42.791 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:07:42.791 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:07:42.791 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:07:42.792 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:07:42.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:07:42.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:07:42.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:07:42.792 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:07:42.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:07:42.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:07:42.792 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:07:42.792 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:07:42.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:07:42.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:07:42.792 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:07:42.792 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:07:42.792 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:07:42.792 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:07:42.792 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:07:42.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:07:42.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:07:42.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:07:42.792 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:07:42.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:07:42.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:07:42.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:07:42.793 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:07:42.793 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:07:42.793 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:07:42.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:07:42.793 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:07:42.793 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:07:42.793 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:07:42.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:07:42.793 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:07:42.793 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:07:42.793 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:07:42.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:07:42.793 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:07:42.793 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:07:42.793 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:07:42.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:07:42.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:07:42.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:07:42.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:07:42.797 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:07:43.281 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:07:43.314 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:07:43.315 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:07:43.316 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:07:43.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:07:43.318 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:07:43.318 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:07:43.318 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:07:43.318 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:07:43.318 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:07:43.318 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:07:43.318 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:07:43.318 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:07:43.751 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:07:43.794 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:07:43.795 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:07:43.795 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:07:43.797 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:07:44.220 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:07:44.695 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:07:44.795 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:07:44.796 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:07:44.796 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:07:44.797 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:07:45.173 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:07:45.427 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:07:45.427 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:07:45.432 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:07:45.432 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:07:45.432 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:07:45.432 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:07:45.433 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:07:45.433 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:07:45.434 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:07:45.434 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:07:45.434 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:07:45.434 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:07:45.434 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:07:45.434 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=568 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:07:45.434 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=568 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:07:50.437 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:07:50.437 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:07:50.440 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:07:50.440 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:07:50.440 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:07:50.440 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:07:50.449 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:07:50.451 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:07:50.451 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:07:50.451 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:07:50.451 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:07:50.455 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:07:50.455 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:07:50.456 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:07:50.456 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:07:50.456 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:07:50.457 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:07:50.457 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:07:50.457 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:07:50.459 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:07:50.459 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:07:50.459 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:07:50.459 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:07:50.459 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:07:50.459 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:07:50.460 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:07:50.460 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:07:50.462 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:07:50.462 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:07:50.462 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:07:50.462 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:07:50.462 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:07:50.462 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:07:50.462 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:07:50.462 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:07:50.465 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:07:50.465 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:07:50.465 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:07:50.465 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:07:50.465 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:07:50.465 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:07:50.465 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:07:50.465 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:07:50.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:07:50.465 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:07:50.466 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:07:50.466 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:07:50.466 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:07:50.466 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:07:50.466 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:07:50.466 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:07:50.466 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:07:50.466 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:07:50.466 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:07:50.466 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:07:50.466 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:07:50.466 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:07:50.466 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:07:50.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:07:50.466 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:07:50.466 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:07:50.466 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:07:50.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:07:50.466 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:07:50.466 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:07:50.466 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:07:50.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:07:50.467 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:07:50.467 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:07:50.467 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:07:50.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:07:50.467 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:07:50.467 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:07:50.467 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:07:50.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:07:50.467 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:07:50.467 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:07:50.467 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:07:50.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:07:50.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:07:50.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:07:50.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:07:50.471 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:07:50.954 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:07:50.989 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:07:50.990 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:07:50.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:07:50.992 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:07:51.001 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:07:51.001 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:07:51.001 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:07:51.002 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:07:51.002 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:07:51.003 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:07:51.003 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:07:51.003 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:07:51.432 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:07:51.469 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:07:51.470 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:07:51.470 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:07:51.471 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:07:51.909 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:07:52.388 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:07:52.470 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:07:52.470 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:07:52.470 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:07:52.472 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:07:52.866 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:07:53.344 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 03:07:53.471 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:07:53.471 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:07:53.471 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:07:53.472 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:07:53.813 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 03:07:53.829 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:07:53.829 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:07:53.832 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:07:53.832 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:07:53.832 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:07:53.832 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:07:53.833 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:07:53.833 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:07:53.833 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:07:53.833 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:07:53.833 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:07:53.833 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:07:53.833 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:07:53.833 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=721 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:07:53.833 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=721 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:07:58.838 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:07:58.838 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:07:58.838 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:07:58.838 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:07:58.838 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:07:58.838 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:07:58.847 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:07:58.849 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:07:58.849 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:07:58.850 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:07:58.850 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:07:58.853 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:07:58.854 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:07:58.854 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:07:58.854 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:07:58.855 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:07:58.855 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:07:58.855 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:07:58.855 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:07:58.857 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:07:58.858 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:07:58.858 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:07:58.858 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:07:58.858 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:07:58.858 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:07:58.858 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:07:58.858 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:07:58.860 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:07:58.861 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:07:58.861 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:07:58.861 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:07:58.861 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:07:58.861 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:07:58.861 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:07:58.861 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:07:58.864 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:07:58.864 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:07:58.864 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:07:58.864 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:07:58.864 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:07:58.864 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:07:58.864 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:07:58.864 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:07:58.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:07:58.865 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:07:58.865 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:07:58.865 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:07:58.865 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:07:58.865 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:07:58.865 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:07:58.865 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:07:58.865 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:07:58.865 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:07:58.865 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:07:58.865 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:07:58.865 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:07:58.865 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:07:58.865 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:07:58.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:07:58.865 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:07:58.865 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:07:58.865 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:07:58.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:07:58.865 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:07:58.865 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:07:58.865 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:07:58.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:07:58.865 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:07:58.866 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:07:58.866 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:07:58.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:07:58.866 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:07:58.866 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:07:58.866 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:07:58.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:07:58.866 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:07:58.866 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:07:58.866 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:07:58.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:07:58.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:07:58.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:07:58.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:07:58.870 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:07:59.354 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:07:59.387 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:07:59.388 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:07:59.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:07:59.389 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:07:59.393 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:07:59.393 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:07:59.393 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:07:59.394 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:07:59.394 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:07:59.394 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:07:59.394 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:07:59.394 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:07:59.831 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:07:59.868 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:07:59.868 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:07:59.868 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:07:59.871 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:08:00.309 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:08:00.787 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:08:00.868 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:08:00.869 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:08:00.869 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:08:00.873 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:08:01.265 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:08:01.520 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:08:01.520 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:08:01.528 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:08:01.528 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:08:01.529 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:08:01.529 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:08:01.530 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:08:01.531 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:08:01.531 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:08:01.531 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:08:01.531 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:08:01.531 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:08:01.531 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:08:01.531 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=568 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:08:01.531 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=568 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:08:01.531 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=568 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:08:01.531 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=568 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:08:01.531 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=568 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:08:06.533 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:08:06.533 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:08:06.536 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:08:06.536 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:08:06.536 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:08:06.536 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:08:06.545 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:08:06.546 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:08:06.547 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:08:06.547 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:08:06.547 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:08:06.551 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:08:06.552 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:08:06.552 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:08:06.552 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:08:06.553 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:08:06.553 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:08:06.553 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:08:06.553 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:08:06.555 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:08:06.555 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:08:06.556 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:08:06.556 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:08:06.556 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:08:06.556 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:08:06.556 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:08:06.556 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:08:06.558 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:08:06.558 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:08:06.558 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:08:06.558 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:08:06.558 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:08:06.558 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:08:06.559 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:08:06.559 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:08:06.561 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:08:06.561 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:08:06.561 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:08:06.561 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:08:06.561 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:08:06.561 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:08:06.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:08:06.562 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:08:06.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:08:06.562 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:08:06.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:08:06.562 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:08:06.562 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:08:06.562 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:08:06.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:08:06.562 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:08:06.562 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:08:06.562 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:08:06.562 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:08:06.562 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:08:06.562 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:08:06.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:08:06.562 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:08:06.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:08:06.563 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:08:06.563 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:08:06.563 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:08:06.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:08:06.563 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:08:06.563 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:08:06.563 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:08:06.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:08:06.563 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:08:06.563 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:08:06.563 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:08:06.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:08:06.563 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:08:06.563 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:08:06.563 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:08:06.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:08:06.563 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:08:06.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:08:06.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:08:06.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:08:06.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:08:06.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:08:06.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:08:06.567 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:08:07.050 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:08:07.096 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:08:07.097 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:08:07.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:08:07.099 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:08:07.106 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:08:07.106 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:08:07.106 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:08:07.108 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:08:07.108 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:08:07.108 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:08:07.109 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:08:07.109 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:08:07.527 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:08:07.566 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:08:07.566 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:08:07.568 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:08:07.571 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:08:08.005 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:08:08.483 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:08:08.567 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:08:08.567 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:08:08.568 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:08:08.572 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:08:08.961 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:08:09.439 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 03:08:09.568 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:08:09.569 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:08:09.569 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:08:09.572 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:08:09.916 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 03:08:10.395 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 03:08:10.569 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:08:10.570 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:08:10.570 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:08:10.574 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:08:10.873 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 03:08:10.892 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:08:10.893 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:08:10.897 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:08:10.898 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:08:10.898 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:08:10.898 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:08:10.902 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:08:10.902 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:08:10.902 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:08:10.902 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:08:10.902 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:08:10.902 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:08:10.902 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:08:10.903 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=925 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:08:10.903 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=925 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:08:10.903 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=925 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:08:10.903 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=925 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:08:10.903 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=925 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:08:10.903 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=925 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:08:10.903 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=926 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:08:10.903 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=926 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:08:10.903 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=926 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:08:10.903 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=926 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:08:10.903 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=926 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:08:10.903 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=926 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:08:10.903 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=926 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:08:10.903 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=926 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:08:15.902 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:08:15.902 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:08:15.904 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:08:15.906 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:08:15.908 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:08:15.912 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:08:15.925 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:08:15.926 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:08:15.926 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:08:15.926 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:08:15.926 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:08:15.928 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:08:15.928 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:08:15.928 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:08:15.928 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:08:15.929 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:08:15.929 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:08:15.929 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:08:15.929 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:08:15.930 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:08:15.930 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:08:15.930 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:08:15.930 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:08:15.930 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:08:15.930 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:08:15.930 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:08:15.930 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:08:15.931 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:08:15.931 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:08:15.932 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:08:15.932 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:08:15.932 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:08:15.932 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:08:15.932 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:08:15.932 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:08:15.933 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:08:15.933 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:08:15.933 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:08:15.933 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:08:15.933 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:08:15.934 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:08:15.934 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:08:15.934 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:08:15.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:08:15.934 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:08:15.934 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:08:15.934 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:08:15.934 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:08:15.934 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:08:15.934 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:08:15.934 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:08:15.934 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:08:15.934 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:08:15.934 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:08:15.934 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:08:15.934 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:08:15.934 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:08:15.934 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:08:15.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:08:15.934 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:08:15.934 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:08:15.934 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:08:15.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:08:15.934 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:08:15.934 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:08:15.934 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:08:15.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:08:15.935 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:08:15.935 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:08:15.935 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:08:15.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:08:15.935 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:08:15.935 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:08:15.935 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:08:15.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:08:15.935 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:08:15.935 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:08:15.935 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:08:15.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:08:15.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:08:15.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:08:15.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:08:15.939 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:08:16.423 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:08:16.456 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:08:16.457 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:08:16.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:08:16.459 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:08:16.464 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:08:16.464 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:08:16.465 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:08:16.465 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:08:16.465 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:08:16.465 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:08:16.465 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:08:16.465 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:08:16.900 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:08:16.937 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:08:16.937 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:08:16.937 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:08:16.939 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:08:17.378 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:08:17.855 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:08:17.938 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:08:17.938 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:08:17.938 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:08:17.940 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:08:18.333 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:08:18.812 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 03:08:18.939 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:08:18.939 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:08:18.939 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:08:18.941 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:08:19.289 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 03:08:19.544 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:08:19.544 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:08:19.552 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:08:19.553 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:08:19.553 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:08:19.553 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:08:19.554 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:08:19.554 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:08:19.554 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:08:19.554 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:08:19.554 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:08:19.554 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:08:19.554 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:08:19.554 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=772 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:08:19.554 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=772 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:08:19.554 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=772 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:08:19.555 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=772 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:08:19.555 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=772 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:08:19.555 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=772 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:08:19.555 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=772 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:08:19.555 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=773 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:08:19.555 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=773 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:08:19.555 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=773 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:08:19.555 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=773 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:08:19.555 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=773 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:08:19.555 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=773 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:08:19.555 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=773 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:08:19.555 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=773 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:08:24.557 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:08:24.557 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:08:24.559 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:08:24.559 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:08:24.559 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:08:24.560 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:08:24.570 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:08:24.572 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:08:24.572 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:08:24.572 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:08:24.573 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:08:24.577 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:08:24.577 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:08:24.577 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:08:24.577 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:08:24.578 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:08:24.578 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:08:24.578 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:08:24.578 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:08:24.582 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:08:24.582 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:08:24.582 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:08:24.582 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:08:24.582 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:08:24.582 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:08:24.582 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:08:24.582 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:08:24.585 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:08:24.585 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:08:24.585 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:08:24.585 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:08:24.585 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:08:24.585 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:08:24.585 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:08:24.585 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:08:24.588 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:08:24.588 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:08:24.588 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:08:24.588 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:08:24.588 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:08:24.588 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:08:24.588 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:08:24.588 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:08:24.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:08:24.588 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:08:24.588 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:08:24.588 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:08:24.588 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:08:24.588 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:08:24.588 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:08:24.588 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:08:24.588 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:08:24.588 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:08:24.588 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:08:24.588 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:08:24.589 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:08:24.589 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:08:24.589 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:08:24.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:08:24.589 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:08:24.589 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:08:24.589 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:08:24.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:08:24.589 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:08:24.589 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:08:24.589 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:08:24.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:08:24.589 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:08:24.589 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:08:24.589 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:08:24.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:08:24.589 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:08:24.589 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:08:24.589 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:08:24.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:08:24.589 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:08:24.589 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:08:24.589 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:08:24.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:08:24.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:08:24.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:08:24.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:08:24.593 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:08:25.077 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:08:25.110 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:08:25.111 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:08:25.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:08:25.112 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:08:25.555 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:08:25.592 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:08:25.592 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:08:25.592 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:08:25.592 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:08:26.033 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:08:26.514 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:08:26.593 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:08:26.593 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:08:26.594 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:08:26.594 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:08:26.995 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:08:27.125 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:08:27.125 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:08:27.125 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:08:27.125 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:08:27.126 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:08:27.126 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:08:27.126 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:08:27.126 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:08:27.126 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:08:27.126 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:08:27.126 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:08:27.126 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=540 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:08:27.126 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=540 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:08:27.126 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=540 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:08:27.126 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=540 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:08:27.126 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=540 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:08:27.126 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=540 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:08:27.126 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=540 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:08:27.126 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=540 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:08:32.129 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:08:32.129 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:08:32.131 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:08:32.131 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:08:32.131 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:08:32.132 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:08:32.140 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:08:32.142 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:08:32.142 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:08:32.143 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:08:32.143 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:08:32.146 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:08:32.147 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:08:32.147 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:08:32.147 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:08:32.148 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:08:32.148 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:08:32.149 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:08:32.149 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:08:32.151 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:08:32.151 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:08:32.152 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:08:32.152 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:08:32.152 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:08:32.152 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:08:32.152 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:08:32.153 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:08:32.155 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:08:32.155 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:08:32.155 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:08:32.155 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:08:32.155 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:08:32.156 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:08:32.156 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:08:32.156 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:08:32.159 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:08:32.159 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:08:32.159 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:08:32.159 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:08:32.160 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:08:32.160 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:08:32.160 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:08:32.160 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:08:32.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:08:32.160 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:08:32.160 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:08:32.160 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:08:32.160 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:08:32.160 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:08:32.160 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:08:32.160 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:08:32.161 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:08:32.161 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:08:32.161 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:08:32.161 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:08:32.161 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:08:32.161 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:08:32.161 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:08:32.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:08:32.161 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:08:32.161 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:08:32.161 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:08:32.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:08:32.161 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:08:32.161 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:08:32.161 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:08:32.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:08:32.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:08:32.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:08:32.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:08:32.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:08:32.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:08:32.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:08:32.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:08:32.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:08:32.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:08:32.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:08:32.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:08:32.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:08:32.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:08:32.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:08:32.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:08:32.166 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:08:32.650 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:08:32.684 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:08:32.685 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:08:32.686 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:08:32.686 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:08:32.705 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:08:32.705 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:08:32.705 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:08:32.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:08:32.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:08:33.130 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:08:33.163 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:08:33.164 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:08:33.165 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:08:33.168 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:08:33.608 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:08:34.087 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:08:34.165 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:08:34.165 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:08:34.166 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:08:34.170 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:08:34.559 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:08:35.027 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 03:08:35.166 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:08:35.167 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:08:35.167 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:08:35.171 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:08:35.496 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 03:08:35.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:08:35.739 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:08:35.739 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:08:35.739 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:08:35.739 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:08:35.740 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:08:35.740 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:08:35.740 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:08:35.740 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:08:35.740 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:08:35.740 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:08:35.741 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:08:35.741 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=768 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:08:35.741 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=768 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:08:40.748 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:08:40.748 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:08:40.748 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:08:40.748 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:08:40.748 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:08:40.748 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:08:40.758 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:08:40.760 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:08:40.760 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:08:40.761 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:08:40.761 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:08:40.764 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:08:40.765 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:08:40.765 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:08:40.765 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:08:40.765 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:08:40.766 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:08:40.766 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:08:40.766 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:08:40.768 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:08:40.768 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:08:40.768 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:08:40.768 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:08:40.768 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:08:40.769 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:08:40.769 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:08:40.769 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:08:40.771 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:08:40.771 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:08:40.771 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:08:40.771 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:08:40.771 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:08:40.771 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:08:40.771 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:08:40.771 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:08:40.775 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:08:40.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:08:40.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:08:40.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:08:40.775 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:08:40.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:08:40.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:08:40.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:08:40.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:08:40.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:08:40.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:08:40.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:08:40.775 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:08:40.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:08:40.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:08:40.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:08:40.776 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:08:40.776 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:08:40.776 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:08:40.776 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:08:40.776 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:08:40.776 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:08:40.776 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:08:40.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:08:40.776 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:08:40.776 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:08:40.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:08:40.776 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:08:40.776 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:08:40.776 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:08:40.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:08:40.776 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:08:40.776 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:08:40.776 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:08:40.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:08:40.777 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:08:40.777 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:08:40.777 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:08:40.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:08:40.777 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:08:40.777 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:08:40.777 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:08:40.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:08:40.777 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:08:40.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:08:40.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:08:40.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:08:40.780 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:08:41.264 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:08:41.302 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:08:41.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:08:41.305 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:08:41.306 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:08:41.329 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:08:41.330 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:08:41.330 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:08:41.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:08:41.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:08:41.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:08:41.346 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:08:41.346 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:08:41.346 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:08:41.346 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:08:41.351 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:08:41.351 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:08:41.351 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:08:41.351 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:08:41.351 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:08:41.351 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:08:41.351 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:08:41.351 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=122 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:08:41.351 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=122 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:08:41.352 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=122 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:08:41.352 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=122 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:08:41.352 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=122 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:08:41.352 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=122 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:08:41.352 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=122 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:08:41.352 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=122 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:08:46.351 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:08:46.351 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:08:46.353 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:08:46.353 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:08:46.354 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:08:46.354 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:08:46.366 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:08:46.367 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:08:46.367 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:08:46.367 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:08:46.367 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:08:46.369 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:08:46.369 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:08:46.370 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:08:46.370 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:08:46.370 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:08:46.370 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:08:46.370 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:08:46.370 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:08:46.372 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:08:46.372 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:08:46.372 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:08:46.372 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:08:46.372 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:08:46.372 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:08:46.372 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:08:46.372 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:08:46.374 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:08:46.374 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:08:46.374 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:08:46.374 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:08:46.374 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:08:46.374 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:08:46.374 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:08:46.374 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:08:46.377 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:08:46.377 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:08:46.377 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:08:46.377 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:08:46.377 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:08:46.377 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:08:46.377 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:08:46.377 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:08:46.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:08:46.377 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:08:46.377 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:08:46.377 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:08:46.377 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:08:46.377 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:08:46.377 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:08:46.378 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:08:46.378 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:08:46.378 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:08:46.378 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:08:46.378 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:08:46.378 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:08:46.378 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:08:46.378 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:08:46.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:08:46.378 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:08:46.378 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:08:46.378 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:08:46.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:08:46.378 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:08:46.378 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:08:46.378 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:08:46.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:08:46.378 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:08:46.378 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:08:46.378 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:08:46.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:08:46.379 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:08:46.379 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:08:46.379 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:08:46.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:08:46.379 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:08:46.379 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:08:46.379 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:08:46.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:08:46.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:08:46.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:08:46.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:08:46.383 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:08:46.866 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:08:46.907 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:08:46.909 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:08:46.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:08:46.910 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:08:46.924 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:08:46.924 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:08:46.924 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:08:46.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:08:46.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:08:47.345 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:08:47.381 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:08:47.381 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:08:47.383 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:08:47.387 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:08:47.824 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:08:48.302 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:08:48.383 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:08:48.383 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:08:48.385 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:08:48.388 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:08:48.780 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:08:49.258 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 03:08:49.384 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:08:49.384 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:08:49.386 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:08:49.390 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:08:49.736 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 03:08:49.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:08:49.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:08:49.955 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:08:49.955 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:08:49.955 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:08:49.956 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:08:49.957 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:08:49.957 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:08:49.958 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:08:49.958 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:08:49.958 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:08:49.958 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:08:49.958 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:08:49.958 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=762 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:08:49.958 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=762 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:08:49.958 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=762 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:08:49.958 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=763 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:08:49.958 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=763 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:08:49.958 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=763 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:08:49.958 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=763 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:08:49.958 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=763 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:08:49.958 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=763 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:08:49.958 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=763 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:08:49.958 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=763 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:08:54.959 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:08:54.960 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:08:54.961 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:08:54.962 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:08:54.962 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:08:54.963 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:08:54.971 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:08:54.971 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:08:54.971 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:08:54.971 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:08:54.971 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:08:54.973 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:08:54.973 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:08:54.973 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:08:54.973 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:08:54.973 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:08:54.974 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:08:54.974 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:08:54.974 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:08:54.976 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:08:54.976 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:08:54.976 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:08:54.976 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:08:54.976 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:08:54.976 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:08:54.976 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:08:54.976 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:08:54.978 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:08:54.978 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:08:54.978 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:08:54.978 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:08:54.978 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:08:54.978 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:08:54.978 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:08:54.978 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:08:54.980 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:08:54.980 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:08:54.981 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:08:54.981 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:08:54.981 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:08:54.981 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:08:54.981 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:08:54.981 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:08:54.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:08:54.981 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:08:54.981 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:08:54.981 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:08:54.981 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:08:54.981 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:08:54.981 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:08:54.981 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:08:54.981 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:08:54.981 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:08:54.981 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:08:54.981 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:08:54.981 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:08:54.981 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:08:54.981 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:08:54.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:08:54.982 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:08:54.982 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:08:54.982 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:08:54.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:08:54.982 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:08:54.982 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:08:54.982 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:08:54.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:08:54.982 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:08:54.982 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:08:54.982 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:08:54.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:08:54.982 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:08:54.982 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:08:54.982 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:08:54.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:08:54.982 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:08:54.982 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:08:54.982 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:08:54.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:08:54.983 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:08:54.983 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:08:54.983 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:08:54.986 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:08:55.470 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:08:55.508 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:08:55.510 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:08:55.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:08:55.513 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:08:55.536 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:08:55.536 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:08:55.536 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:08:55.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:08:55.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:08:55.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:08:55.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:08:55.570 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:08:55.571 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:08:55.571 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:08:55.571 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:08:55.575 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:08:55.575 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:08:55.575 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:08:55.575 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:08:55.575 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:08:55.575 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:08:55.575 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:08:55.575 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=125 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:08:55.575 [WARNING] transceiver.py:250 (TRX3@172.18.122.20:5700/3) RX TRXD message (ver=1 fn=125 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:08:55.575 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=125 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:08:55.575 [WARNING] transceiver.py:250 (TRX3@172.18.122.20:5700/3) RX TRXD message (ver=1 fn=126 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:09:00.575 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:09:00.575 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:09:00.577 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:09:00.577 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:09:00.577 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:09:00.578 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:09:00.585 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:09:00.586 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:09:00.586 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:09:00.586 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:09:00.586 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:09:00.588 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:09:00.588 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:09:00.588 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:09:00.588 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:09:00.589 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:09:00.589 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:09:00.589 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:09:00.589 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:09:00.591 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:09:00.591 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:09:00.591 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:09:00.591 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:09:00.591 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:09:00.591 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:09:00.591 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:09:00.592 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:09:00.593 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:09:00.593 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:09:00.593 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:09:00.593 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:09:00.594 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:09:00.594 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:09:00.594 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:09:00.594 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:09:00.596 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:09:00.596 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:09:00.596 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:09:00.596 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:09:00.596 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:09:00.596 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:09:00.596 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:09:00.597 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:09:00.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:09:00.597 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:09:00.597 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:09:00.597 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:09:00.597 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:09:00.597 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:09:00.597 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:09:00.597 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:09:00.597 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:09:00.597 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:09:00.597 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:09:00.597 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:09:00.597 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:09:00.597 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:09:00.597 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:09:00.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:09:00.597 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:09:00.597 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:09:00.597 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:09:00.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:09:00.597 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:09:00.597 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:09:00.597 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:09:00.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:09:00.597 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:09:00.598 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:09:00.598 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:09:00.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:09:00.598 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:09:00.598 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:09:00.598 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:09:00.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:09:00.598 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:09:00.598 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:09:00.598 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:09:00.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:09:00.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:09:00.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:09:00.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:09:00.602 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:09:01.086 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:09:01.120 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:09:01.121 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:09:01.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:09:01.122 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:09:01.128 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:09:01.128 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:09:01.128 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:09:01.128 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:09:01.133 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:09:01.133 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:09:01.133 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:09:01.133 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:09:01.133 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:09:01.133 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:09:01.133 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:09:01.133 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=113 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:09:01.133 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=113 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:09:06.132 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:09:06.132 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:09:06.134 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:09:06.136 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:09:06.138 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:09:06.141 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:09:06.150 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:09:06.151 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:09:06.151 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:09:06.151 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:09:06.151 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:09:06.153 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:09:06.153 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:09:06.153 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:09:06.153 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:09:06.153 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:09:06.153 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:09:06.153 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:09:06.153 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:09:06.155 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:09:06.155 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:09:06.155 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:09:06.155 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:09:06.155 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:09:06.155 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:09:06.155 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:09:06.155 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:09:06.157 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:09:06.157 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:09:06.157 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:09:06.157 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:09:06.157 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:09:06.157 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:09:06.157 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:09:06.157 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:09:06.160 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:09:06.160 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:09:06.160 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:09:06.160 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:09:06.160 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:09:06.160 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:09:06.160 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:09:06.160 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:09:06.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:09:06.160 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:09:06.160 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:09:06.160 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:09:06.160 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:09:06.160 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:09:06.160 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:09:06.160 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:09:06.160 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:09:06.160 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:09:06.160 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:09:06.160 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:09:06.161 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:09:06.161 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:09:06.161 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:09:06.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:09:06.161 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:09:06.161 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:09:06.161 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:09:06.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:09:06.161 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:09:06.161 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:09:06.161 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:09:06.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:09:06.161 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:09:06.161 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:09:06.161 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:09:06.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:09:06.161 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:09:06.161 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:09:06.161 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:09:06.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:09:06.161 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:09:06.161 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:09:06.161 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:09:06.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:09:06.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:09:06.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:09:06.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:09:06.165 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:09:06.640 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:09:06.676 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:09:06.677 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:09:06.677 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:09:06.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:09:06.680 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:09:06.680 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:09:06.680 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:09:06.680 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:09:06.681 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:09:06.681 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:09:06.681 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:09:06.681 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:09:06.682 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:09:06.682 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:09:06.682 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:09:11.685 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:09:11.685 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:09:11.687 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:09:11.689 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:09:11.690 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:09:11.692 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:09:11.701 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:09:11.702 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:09:11.702 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:09:11.702 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:09:11.702 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:09:11.704 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:09:11.704 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:09:11.704 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:09:11.704 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:09:11.704 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:09:11.704 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:09:11.704 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:09:11.704 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:09:11.705 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:09:11.706 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:09:11.706 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:09:11.706 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:09:11.706 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:09:11.706 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:09:11.706 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:09:11.706 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:09:11.707 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:09:11.707 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:09:11.708 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:09:11.708 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:09:11.708 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:09:11.708 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:09:11.708 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:09:11.708 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:09:11.710 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:09:11.710 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:09:11.710 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:09:11.710 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:09:11.710 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:09:11.710 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:09:11.710 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:09:11.710 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:09:11.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:09:11.710 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:09:11.711 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:09:11.711 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:09:11.711 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:09:11.711 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:09:11.711 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:09:11.711 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:09:11.711 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:09:11.711 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:09:11.711 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:09:11.711 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:09:11.711 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:09:11.711 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:09:11.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:09:11.711 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:09:11.711 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:09:11.711 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:09:11.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:09:11.711 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:09:11.711 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:09:11.711 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:09:11.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:09:11.711 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:09:11.711 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:09:11.711 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:09:11.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:09:11.711 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:09:11.711 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:09:11.711 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:09:11.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:09:11.711 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:09:11.711 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:09:11.711 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:09:11.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:09:11.711 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:09:11.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:09:11.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:09:11.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:09:11.716 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:09:12.189 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:09:12.231 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:09:12.232 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:09:12.233 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:09:12.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:09:12.242 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:09:12.242 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:09:12.243 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:09:12.243 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:09:12.245 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:09:12.245 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:09:12.245 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:09:12.245 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:09:12.245 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:09:12.245 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:09:12.245 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:09:17.243 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:09:17.244 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:09:17.245 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:09:17.246 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:09:17.247 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:09:17.249 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:09:17.266 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:09:17.267 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:09:17.267 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:09:17.267 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:09:17.267 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:09:17.269 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:09:17.270 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:09:17.270 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:09:17.270 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:09:17.270 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:09:17.270 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:09:17.270 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:09:17.270 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:09:17.271 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:09:17.271 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:09:17.271 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:09:17.271 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:09:17.271 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:09:17.271 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:09:17.272 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:09:17.272 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:09:17.272 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:09:17.272 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:09:17.273 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:09:17.273 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:09:17.273 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:09:17.273 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:09:17.273 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:09:17.273 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:09:17.274 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:09:17.274 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:09:17.275 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:09:17.275 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:09:17.275 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:09:17.275 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:09:17.275 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:09:17.275 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:09:17.275 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:09:17.275 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:09:17.275 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:09:17.275 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:09:17.275 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:09:17.275 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:09:17.275 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:09:17.275 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:09:17.275 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:09:17.275 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:09:17.275 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:09:17.275 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:09:17.275 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:09:17.275 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:09:17.275 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:09:17.275 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:09:17.275 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:09:17.275 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:09:17.275 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:09:17.275 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:09:17.275 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:09:17.275 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:09:17.276 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:09:17.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:09:17.276 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:09:17.276 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:09:17.276 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:09:17.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:09:17.276 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:09:17.276 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:09:17.276 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:09:17.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:09:17.276 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:09:17.276 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:09:17.276 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:09:17.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:09:17.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:09:17.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:09:17.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:09:17.280 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:09:17.751 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:09:17.788 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:09:17.789 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:09:17.789 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:09:17.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:09:17.793 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:09:17.793 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:09:17.793 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:09:17.793 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:09:17.797 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:09:17.797 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:09:17.797 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:09:17.797 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:09:17.797 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:09:17.797 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:09:17.798 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:09:17.798 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=113 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:09:17.798 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=113 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:09:17.798 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=113 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:09:17.798 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=113 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:09:17.798 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=113 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:09:17.798 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=113 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:09:17.798 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=113 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:09:17.798 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=113 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:09:22.795 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:09:22.795 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:09:22.796 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:09:22.797 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:09:22.797 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:09:22.799 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:09:22.808 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:09:22.809 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:09:22.809 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:09:22.809 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:09:22.809 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:09:22.810 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:09:22.811 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:09:22.811 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:09:22.811 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:09:22.811 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:09:22.811 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:09:22.811 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:09:22.811 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:09:22.812 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:09:22.813 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:09:22.813 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:09:22.813 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:09:22.813 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:09:22.813 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:09:22.813 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:09:22.813 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:09:22.814 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:09:22.814 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:09:22.814 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:09:22.815 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:09:22.815 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:09:22.815 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:09:22.815 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:09:22.815 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:09:22.817 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:09:22.817 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:09:22.817 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:09:22.817 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:09:22.817 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:09:22.817 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:09:22.817 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:09:22.817 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:09:22.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:09:22.817 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:09:22.817 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:09:22.817 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:09:22.817 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:09:22.817 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:09:22.817 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:09:22.817 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:09:22.817 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:09:22.817 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:09:22.817 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:09:22.817 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:09:22.817 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:09:22.817 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:09:22.817 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:09:22.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:09:22.818 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:09:22.818 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:09:22.818 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:09:22.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:09:22.818 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:09:22.818 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:09:22.818 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:09:22.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:09:22.818 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:09:22.818 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:09:22.818 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:09:22.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:09:22.818 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:09:22.818 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:09:22.818 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:09:22.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:09:22.818 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:09:22.818 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:09:22.818 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:09:22.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:09:22.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:09:22.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:09:22.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:09:22.822 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:09:23.293 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:09:23.334 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:09:23.335 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:09:23.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:09:23.337 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:09:23.761 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:09:23.820 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:09:23.820 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:09:23.821 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:09:23.823 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:09:24.233 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:09:24.709 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:09:24.821 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:09:24.822 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:09:24.822 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:09:24.825 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:09:25.177 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:09:25.647 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 03:09:25.822 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:09:25.823 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:09:25.823 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:09:25.826 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:09:26.121 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 03:09:26.360 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:09:26.361 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:09:26.361 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:09:26.362 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:09:26.362 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:09:26.363 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:09:26.363 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:09:26.363 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:09:26.598 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 03:09:26.823 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:09:26.824 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:09:26.824 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:09:26.826 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:09:27.068 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 03:09:27.537 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 03:09:27.823 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:09:27.824 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:09:27.824 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:09:27.827 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:09:28.005 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 03:09:28.473 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 03:09:28.585 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:09:28.585 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:09:28.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:09:28.587 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:09:28.587 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:09:28.587 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:09:28.587 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:09:28.588 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:09:28.588 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:09:28.588 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:09:28.588 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:09:28.588 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:09:28.588 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:09:28.588 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:09:28.588 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1251 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:09:28.588 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1251 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:09:28.588 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1251 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:09:28.588 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1251 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:09:28.588 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1251 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:09:28.588 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1251 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:09:28.588 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1251 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:09:33.592 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:09:33.593 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:09:33.596 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:09:33.597 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:09:33.597 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:09:33.597 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:09:33.613 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:09:33.614 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:09:33.615 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:09:33.615 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:09:33.615 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:09:33.621 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:09:33.621 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:09:33.621 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:09:33.621 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:09:33.621 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:09:33.621 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:09:33.621 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:09:33.621 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:09:33.623 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:09:33.623 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:09:33.623 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:09:33.623 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:09:33.623 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:09:33.623 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:09:33.623 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:09:33.623 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:09:33.624 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:09:33.625 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:09:33.625 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:09:33.625 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:09:33.625 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:09:33.625 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:09:33.625 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:09:33.625 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:09:33.627 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:09:33.627 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:09:33.627 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:09:33.627 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:09:33.627 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:09:33.627 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:09:33.627 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:09:33.627 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:09:33.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:09:33.627 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:09:33.627 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:09:33.627 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:09:33.627 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:09:33.627 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:09:33.628 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:09:33.628 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:09:33.628 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:09:33.628 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:09:33.628 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:09:33.628 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:09:33.628 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:09:33.628 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:09:33.628 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:09:33.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:09:33.628 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:09:33.628 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:09:33.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:09:33.628 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:09:33.628 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:09:33.628 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:09:33.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:09:33.628 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:09:33.628 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:09:33.628 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:09:33.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:09:33.628 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:09:33.628 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:09:33.628 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:09:33.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:09:33.628 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:09:33.628 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:09:33.628 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:09:33.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:09:33.628 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:09:33.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:09:33.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:09:33.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:09:33.632 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:09:34.104 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:09:34.141 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:09:34.142 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:09:34.142 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:09:34.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:09:34.149 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:09:34.149 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:09:34.149 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:09:34.155 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:09:34.155 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:09:34.155 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:09:34.155 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:09:34.156 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:09:34.156 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:09:34.156 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:09:34.156 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:09:34.156 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:09:34.156 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:09:34.156 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:09:34.157 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=115 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:09:34.157 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=115 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:09:34.157 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=115 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:09:34.157 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=115 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:09:34.157 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=115 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:09:34.157 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=115 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:09:34.157 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=115 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:09:39.160 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:09:39.160 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:09:39.162 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:09:39.162 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:09:39.163 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:09:39.163 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:09:39.183 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:09:39.184 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:09:39.184 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:09:39.184 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:09:39.184 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:09:39.185 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:09:39.185 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:09:39.186 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:09:39.186 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:09:39.186 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:09:39.186 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:09:39.186 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:09:39.186 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:09:39.188 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:09:39.188 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:09:39.188 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:09:39.188 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:09:39.188 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:09:39.188 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:09:39.189 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:09:39.189 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:09:39.191 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:09:39.191 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:09:39.191 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:09:39.191 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:09:39.191 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:09:39.191 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:09:39.191 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:09:39.191 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:09:39.194 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:09:39.194 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:09:39.194 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:09:39.194 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:09:39.195 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:09:39.195 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:09:39.195 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:09:39.195 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:09:39.195 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:09:39.195 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:09:39.195 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:09:39.195 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:09:39.195 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:09:39.195 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:09:39.195 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:09:39.195 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:09:39.195 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:09:39.195 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:09:39.195 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:09:39.196 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:09:39.196 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:09:39.196 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:09:39.196 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:09:39.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:09:39.196 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:09:39.196 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:09:39.196 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:09:39.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:09:39.196 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:09:39.196 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:09:39.196 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:09:39.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:09:39.196 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:09:39.196 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:09:39.196 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:09:39.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:09:39.196 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:09:39.196 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:09:39.196 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:09:39.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:09:39.197 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:09:39.197 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:09:39.197 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:09:39.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:09:39.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:09:39.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:09:39.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:09:39.200 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:09:39.684 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:09:39.719 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:09:39.720 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:09:39.721 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:09:39.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:09:39.737 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:09:39.737 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:09:39.737 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:09:39.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:09:39.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:09:39.757 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:09:39.757 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:09:39.757 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:09:39.757 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:09:39.761 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:09:39.761 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:09:39.761 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:09:39.761 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:09:39.762 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:09:39.762 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:09:39.762 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:09:39.762 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=120 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:09:39.762 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=120 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:09:39.762 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=120 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:09:39.762 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=120 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:09:39.762 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=120 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:09:39.762 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=120 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:09:39.762 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=120 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:09:39.762 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=120 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:09:44.762 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:09:44.762 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:09:44.764 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:09:44.764 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:09:44.764 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:09:44.765 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:09:44.774 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:09:44.776 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:09:44.776 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:09:44.776 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:09:44.776 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:09:44.779 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:09:44.779 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:09:44.779 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:09:44.779 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:09:44.780 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:09:44.780 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:09:44.780 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:09:44.780 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:09:44.782 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:09:44.782 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:09:44.782 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:09:44.782 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:09:44.782 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:09:44.782 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:09:44.783 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:09:44.783 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:09:44.785 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:09:44.785 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:09:44.786 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:09:44.786 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:09:44.786 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:09:44.786 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:09:44.786 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:09:44.786 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:09:44.790 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:09:44.790 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:09:44.790 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:09:44.790 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:09:44.790 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:09:44.790 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:09:44.790 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:09:44.790 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:09:44.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:09:44.790 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:09:44.790 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:09:44.790 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:09:44.791 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:09:44.791 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:09:44.791 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:09:44.791 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:09:44.791 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:09:44.791 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:09:44.791 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:09:44.791 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:09:44.791 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:09:44.791 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:09:44.791 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:09:44.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:09:44.791 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:09:44.791 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:09:44.791 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:09:44.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:09:44.791 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:09:44.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:09:44.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:09:44.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:09:44.792 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:09:44.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:09:44.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:09:44.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:09:44.792 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:09:44.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:09:44.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:09:44.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:09:44.792 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:09:44.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:09:44.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:09:44.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:09:44.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:09:44.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:09:44.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:09:44.796 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:09:45.277 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:09:45.321 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:09:45.322 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:09:45.324 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:09:45.326 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:09:45.354 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:09:45.354 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:09:45.355 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:09:45.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:09:45.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:09:45.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:09:45.371 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:09:45.371 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:09:45.371 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:09:45.372 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:09:45.373 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:09:45.373 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:09:45.374 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:09:45.374 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:09:45.374 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:09:45.374 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:09:45.374 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:09:50.374 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:09:50.375 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:09:50.376 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:09:50.377 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:09:50.377 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:09:50.378 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:09:50.389 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:09:50.389 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:09:50.389 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:09:50.389 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:09:50.389 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:09:50.391 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:09:50.391 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:09:50.392 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:09:50.392 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:09:50.392 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:09:50.392 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:09:50.392 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:09:50.392 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:09:50.394 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:09:50.394 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:09:50.394 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:09:50.394 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:09:50.394 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:09:50.394 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:09:50.394 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:09:50.394 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:09:50.396 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:09:50.396 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:09:50.396 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:09:50.396 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:09:50.396 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:09:50.396 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:09:50.396 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:09:50.396 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:09:50.398 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:09:50.398 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:09:50.398 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:09:50.398 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:09:50.398 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:09:50.399 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:09:50.399 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:09:50.399 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:09:50.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:09:50.399 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:09:50.399 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:09:50.399 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:09:50.399 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:09:50.399 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:09:50.399 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:09:50.399 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:09:50.399 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:09:50.399 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:09:50.399 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:09:50.399 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:09:50.399 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:09:50.399 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:09:50.399 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:09:50.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:09:50.399 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:09:50.399 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:09:50.400 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:09:50.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:09:50.400 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:09:50.400 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:09:50.400 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:09:50.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:09:50.400 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:09:50.400 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:09:50.400 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:09:50.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:09:50.400 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:09:50.400 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:09:50.400 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:09:50.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:09:50.400 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:09:50.400 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:09:50.400 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:09:50.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:09:50.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:09:50.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:09:50.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:09:50.404 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:09:50.879 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:09:50.927 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:09:50.930 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:09:50.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:09:50.932 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:09:50.961 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:09:50.961 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:09:50.961 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:09:50.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:09:50.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:09:50.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:09:50.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:09:50.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:09:50.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:09:50.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:09:51.003 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:09:51.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:09:51.019 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:09:51.019 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:09:51.019 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:09:51.020 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:09:51.025 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:09:51.026 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:09:51.026 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:09:51.026 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:09:51.027 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:09:51.027 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:09:51.027 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:09:51.027 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=134 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:09:51.028 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=134 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:09:51.028 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=134 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:09:51.028 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=134 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:09:51.028 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=134 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:09:51.028 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=134 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:09:51.028 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=134 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:09:51.028 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=134 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:09:51.028 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=135 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:09:51.028 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=135 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:09:51.029 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=135 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:09:51.029 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=135 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:09:51.029 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=135 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:09:51.029 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=135 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:09:51.029 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=135 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:09:51.029 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=135 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:09:51.029 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=136 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:09:51.029 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=136 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:09:56.021 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:09:56.021 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:09:56.022 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:09:56.022 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:09:56.022 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:09:56.023 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:09:56.027 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:09:56.028 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:09:56.028 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:09:56.028 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:09:56.028 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:09:56.029 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:09:56.029 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:09:56.029 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:09:56.029 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:09:56.029 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:09:56.029 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:09:56.029 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:09:56.029 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:09:56.030 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:09:56.030 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:09:56.030 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:09:56.030 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:09:56.030 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:09:56.030 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:09:56.030 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:09:56.030 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:09:56.031 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:09:56.031 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:09:56.031 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:09:56.031 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:09:56.031 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:09:56.031 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:09:56.031 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:09:56.031 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:09:56.033 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:09:56.033 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:09:56.033 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:09:56.033 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:09:56.033 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:09:56.033 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:09:56.033 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:09:56.034 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:09:56.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:09:56.034 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:09:56.034 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:09:56.034 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:09:56.034 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:09:56.034 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:09:56.034 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:09:56.034 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:09:56.034 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:09:56.034 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:09:56.034 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:09:56.034 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:09:56.034 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:09:56.034 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:09:56.034 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:09:56.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:09:56.034 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:09:56.034 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:09:56.034 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:09:56.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:09:56.034 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:09:56.034 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:09:56.034 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:09:56.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:09:56.034 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:09:56.034 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:09:56.034 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:09:56.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:09:56.034 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:09:56.034 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:09:56.035 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:09:56.035 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:09:56.035 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:09:56.035 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:09:56.035 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:09:56.035 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:09:56.035 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:09:56.035 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:09:56.035 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:09:56.039 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:09:56.518 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:09:56.547 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:09:56.547 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:09:56.547 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:09:56.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:09:56.548 [DEBUG] fake_trx.py:377 (BTS@172.18.122.20:5700) Recv FAKE_TRXC_DELAY cmd
2026-01-09 03:09:56.548 [INFO] fake_trx.py:380 (BTS@172.18.122.20:5700) Artificial TRXC delay set to 200
2026-01-09 03:09:56.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD FAKE_TRXC_DELAY
2026-01-09 03:09:56.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:09:56.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:09:56.995 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:09:57.175 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:09:57.175 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:09:57.175 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:09:57.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:09:57.376 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:09:57.469 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:09:57.943 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:09:57.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:09:58.178 [DEBUG] fake_trx.py:377 (BTS@172.18.122.20:5700) Recv FAKE_TRXC_DELAY cmd
2026-01-09 03:09:58.178 [INFO] fake_trx.py:380 (BTS@172.18.122.20:5700) Artificial TRXC delay set to 0
2026-01-09 03:09:58.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD FAKE_TRXC_DELAY
2026-01-09 03:09:58.178 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:09:58.178 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:09:58.178 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:09:58.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:09:58.184 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:09:58.184 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:09:58.185 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:09:58.185 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:09:58.186 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:09:58.186 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:09:58.186 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:09:58.186 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:09:58.186 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:09:58.186 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:09:58.186 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:09:58.186 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=462 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:09:58.186 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=462 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:09:58.186 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=462 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:09:58.186 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=462 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:09:58.186 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=462 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:09:58.186 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=462 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:09:58.186 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=462 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:09:58.186 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=462 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:10:03.189 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:10:03.189 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:10:03.193 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:10:03.194 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:10:03.194 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:10:03.194 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:10:03.202 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:10:03.203 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:10:03.203 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:10:03.203 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:10:03.204 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:10:03.206 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:10:03.206 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:10:03.207 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:10:03.207 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:10:03.207 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:10:03.207 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:10:03.207 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:10:03.207 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:10:03.209 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:10:03.210 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:10:03.210 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:10:03.210 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:10:03.210 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:10:03.210 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:10:03.211 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:10:03.211 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:10:03.212 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:10:03.212 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:10:03.212 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:10:03.212 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:10:03.212 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:10:03.212 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:10:03.213 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:10:03.213 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:10:03.215 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:10:03.215 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:10:03.215 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:10:03.215 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:10:03.215 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:10:03.215 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:10:03.216 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:10:03.216 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:10:03.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:10:03.216 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:10:03.216 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:10:03.216 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:10:03.216 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:10:03.216 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:10:03.216 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:10:03.216 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:10:03.216 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:10:03.216 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:10:03.216 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:10:03.216 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:10:03.216 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:10:03.216 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:10:03.216 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:10:03.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:10:03.216 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:10:03.216 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:10:03.216 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:10:03.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:10:03.217 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:10:03.217 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:10:03.217 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:10:03.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:10:03.217 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:10:03.217 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:10:03.217 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:10:03.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:10:03.217 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:10:03.217 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:10:03.217 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:10:03.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:10:03.217 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:10:03.217 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:10:03.217 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:10:03.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:10:03.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:10:03.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:10:03.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:10:03.221 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:10:03.700 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:10:03.743 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:10:03.745 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:10:03.745 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:10:03.746 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:10:03.747 [DEBUG] fake_trx.py:377 (BTS@172.18.122.20:5700) Recv FAKE_TRXC_DELAY cmd
2026-01-09 03:10:03.747 [INFO] fake_trx.py:380 (BTS@172.18.122.20:5700) Artificial TRXC delay set to 200
2026-01-09 03:10:03.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD FAKE_TRXC_DELAY
2026-01-09 03:10:03.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:10:04.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:10:04.176 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:10:04.362 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:10:04.362 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:10:04.362 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:10:04.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:10:04.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:10:04.649 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:10:04.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:10:04.963 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:10:05.122 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:10:05.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:10:05.364 [DEBUG] fake_trx.py:377 (BTS@172.18.122.20:5700) Recv FAKE_TRXC_DELAY cmd
2026-01-09 03:10:05.364 [INFO] fake_trx.py:380 (BTS@172.18.122.20:5700) Artificial TRXC delay set to 0
2026-01-09 03:10:05.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD FAKE_TRXC_DELAY
2026-01-09 03:10:05.364 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:10:05.364 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:10:05.364 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:10:05.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:10:05.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:10:05.365 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:10:05.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:10:05.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:10:05.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:10:05.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:10:05.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:10:05.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:10:05.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:10:05.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:10:05.366 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:10:05.367 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:10:05.367 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:10:05.367 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:10:05.368 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:10:05.368 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:10:05.368 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:10:05.368 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:10:05.368 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:10:05.368 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:10:05.368 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:10:05.368 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=464 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:10:05.368 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=464 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:10:05.368 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=464 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:10:05.368 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=464 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:10:05.368 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=464 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:10:05.368 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=464 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:10:05.368 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=464 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:10:10.368 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:10:10.368 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:10:10.368 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:10:10.369 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:10:10.369 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:10:10.370 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:10:10.374 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:10:10.374 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:10:10.374 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:10:10.374 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:10:10.374 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:10:10.375 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:10:10.375 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:10:10.375 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:10:10.375 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:10:10.375 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:10:10.375 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:10:10.375 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:10:10.375 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:10:10.376 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:10:10.376 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:10:10.376 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:10:10.376 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:10:10.376 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:10:10.376 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:10:10.377 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:10:10.377 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:10:10.377 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:10:10.378 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:10:10.378 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:10:10.378 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:10:10.378 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:10:10.378 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:10:10.378 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:10:10.378 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:10:10.380 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:10:10.380 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:10:10.380 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:10:10.380 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:10:10.380 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:10:10.380 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:10:10.380 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:10:10.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:10:10.380 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:10:10.380 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:10:10.380 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:10:10.380 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:10:10.380 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:10:10.380 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:10:10.380 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:10:10.380 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:10:10.380 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:10:10.380 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:10:10.380 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:10:10.380 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:10:10.380 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:10:10.380 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:10:10.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:10:10.380 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:10:10.380 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:10:10.380 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:10:10.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:10:10.380 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:10:10.380 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:10:10.380 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:10:10.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:10:10.381 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:10:10.381 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:10:10.381 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:10:10.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:10:10.381 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:10:10.381 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:10:10.381 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:10:10.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:10:10.381 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:10:10.381 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:10:10.381 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:10:10.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:10:10.381 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:10:10.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:10:10.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:10:10.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:10:10.385 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:10:10.866 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:10:10.895 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:10:10.895 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:10:10.896 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:10:10.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:10:10.903 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:10:10.903 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:10:10.903 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:10:10.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:10:10.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:10:10.910 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:10:10.910 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:10:10.911 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:10:10.911 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:10:10.912 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:10:10.912 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:10:10.912 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:10:10.912 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:10:10.912 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:10:10.912 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:10:10.912 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:10:15.914 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:10:15.915 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:10:15.918 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:10:15.918 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:10:15.919 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:10:15.920 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:10:15.929 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:10:15.930 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:10:15.930 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:10:15.930 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:10:15.930 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:10:15.931 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:10:15.931 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:10:15.932 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:10:15.932 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:10:15.932 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:10:15.932 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:10:15.932 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:10:15.932 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:10:15.933 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:10:15.933 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:10:15.933 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:10:15.933 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:10:15.933 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:10:15.933 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:10:15.934 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:10:15.934 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:10:15.935 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:10:15.935 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:10:15.935 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:10:15.935 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:10:15.935 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:10:15.935 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:10:15.935 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:10:15.935 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:10:15.937 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:10:15.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:10:15.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:10:15.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:10:15.938 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:10:15.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:10:15.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:10:15.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:10:15.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:10:15.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:10:15.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:10:15.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:10:15.938 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:10:15.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:10:15.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:10:15.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:10:15.938 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:10:15.938 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:10:15.938 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:10:15.938 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:10:15.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:10:15.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:10:15.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:10:15.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:10:15.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:10:15.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:10:15.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:10:15.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:10:15.939 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:10:15.939 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:10:15.939 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:10:15.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:10:15.939 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:10:15.939 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:10:15.939 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:10:15.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:10:15.939 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:10:15.939 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:10:15.939 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:10:15.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:10:15.939 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:10:15.939 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:10:15.939 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:10:15.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:10:15.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:10:15.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:10:15.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:10:15.943 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:10:16.422 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:10:16.463 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:10:16.465 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:10:16.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:10:16.467 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:10:16.496 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:10:16.496 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:10:16.497 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:10:16.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:10:16.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:10:16.515 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:10:16.516 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:10:16.516 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:10:16.516 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:10:16.518 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:10:16.518 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:10:16.518 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:10:16.518 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:10:16.518 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:10:16.518 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:10:16.518 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:10:21.519 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:10:21.519 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:10:21.521 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:10:21.521 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:10:21.522 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:10:21.522 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:10:21.530 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:10:21.531 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:10:21.531 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:10:21.532 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:10:21.532 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:10:21.533 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:10:21.534 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:10:21.534 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:10:21.534 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:10:21.534 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:10:21.535 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:10:21.535 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:10:21.535 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:10:21.536 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:10:21.536 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:10:21.536 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:10:21.536 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:10:21.537 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:10:21.537 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:10:21.537 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:10:21.537 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:10:21.538 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:10:21.538 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:10:21.538 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:10:21.538 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:10:21.538 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:10:21.538 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:10:21.538 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:10:21.538 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:10:21.541 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:10:21.541 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:10:21.541 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:10:21.541 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:10:21.541 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:10:21.541 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:10:21.541 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:10:21.541 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:10:21.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:10:21.541 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:10:21.541 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:10:21.541 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:10:21.541 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:10:21.541 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:10:21.541 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:10:21.541 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:10:21.541 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:10:21.541 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:10:21.541 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:10:21.541 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:10:21.541 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:10:21.541 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:10:21.541 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:10:21.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:10:21.542 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:10:21.542 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:10:21.542 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:10:21.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:10:21.542 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:10:21.542 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:10:21.542 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:10:21.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:10:21.542 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:10:21.542 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:10:21.542 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:10:21.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:10:21.542 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:10:21.542 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:10:21.542 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:10:21.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:10:21.542 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:10:21.542 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:10:21.542 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:10:21.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:10:21.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:10:21.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:10:21.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:10:21.546 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:10:22.030 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:10:22.071 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:10:22.073 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:10:22.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:10:22.075 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:10:22.092 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:10:22.092 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:10:22.092 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:10:22.095 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:10:22.095 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:10:22.095 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:10:22.095 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:10:22.095 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:10:22.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:10:22.133 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:10:22.134 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:10:22.134 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:10:22.134 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:10:22.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:10:22.194 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:10:22.196 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:10:22.197 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:10:22.216 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:10:22.216 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:10:22.216 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:10:22.217 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:10:22.217 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:10:22.217 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:10:22.217 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:10:22.217 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:10:22.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:10:22.275 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:10:22.275 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:10:22.275 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:10:22.276 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:10:22.501 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:10:22.544 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:10:22.544 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:10:22.545 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:10:22.547 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:10:22.972 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:10:23.451 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:10:23.544 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:10:23.545 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:10:23.545 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:10:23.548 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:10:23.929 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:10:24.407 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 03:10:24.546 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:10:24.546 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:10:24.546 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:10:24.549 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:10:24.885 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 03:10:25.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:10:25.281 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:10:25.283 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:10:25.283 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:10:25.302 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:10:25.302 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:10:25.302 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:10:25.303 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:10:25.303 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:10:25.303 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:10:25.303 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:10:25.303 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:10:25.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:10:25.354 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:10:25.354 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:10:25.354 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:10:25.355 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:10:25.361 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 03:10:25.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:10:25.399 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:10:25.400 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:10:25.400 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:10:25.406 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:10:25.406 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:10:25.406 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:10:25.407 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:10:25.407 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:10:25.407 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:10:25.407 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:10:25.407 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:10:25.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:10:25.461 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:10:25.461 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:10:25.461 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:10:25.461 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:10:25.547 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:10:25.547 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:10:25.547 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:10:25.550 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:10:25.830 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 03:10:26.300 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 03:10:26.548 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:10:26.548 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:10:26.549 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:10:26.551 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:10:26.775 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 03:10:27.253 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 03:10:27.731 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 03:10:28.209 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 03:10:28.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:10:28.467 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:10:28.469 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:10:28.469 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:10:28.488 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:10:28.488 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:10:28.489 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:10:28.490 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:10:28.490 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:10:28.490 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:10:28.490 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:10:28.490 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:10:28.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:10:28.545 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:10:28.545 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:10:28.545 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:10:28.545 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:10:28.687 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 03:10:29.165 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 03:10:29.643 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 03:10:30.120 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 03:10:30.598 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 03:10:31.076 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 03:10:31.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:10:31.552 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:10:31.554 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:10:31.554 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:10:31.555 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 03:10:31.574 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:10:31.575 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:10:31.575 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:10:31.576 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:10:31.576 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:10:31.576 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:10:31.576 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:10:31.576 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:10:31.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:10:31.608 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:10:31.608 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:10:31.608 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:10:31.608 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:10:31.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:10:31.660 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:10:31.662 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:10:31.662 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:10:31.683 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:10:31.683 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:10:31.683 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:10:31.685 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:10:31.685 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:10:31.685 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:10:31.685 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:10:31.685 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:10:31.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:10:31.692 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:10:31.692 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:10:31.692 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:10:31.692 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:10:32.032 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 03:10:32.510 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 03:10:32.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:10:32.720 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:10:32.721 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:10:32.722 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:10:32.741 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:10:32.741 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:10:32.741 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:10:32.742 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:10:32.742 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:10:32.742 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:10:32.742 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:10:32.742 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:10:32.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:10:32.804 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:10:32.804 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-09 03:10:32.804 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:10:32.805 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:10:32.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:10:32.896 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:10:32.897 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:10:32.897 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:10:32.898 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:10:32.910 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:10:32.910 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:10:32.910 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:10:32.911 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:10:32.911 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:10:32.911 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:10:32.911 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:10:32.911 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:10:32.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:10:32.932 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:10:32.932 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-09 03:10:32.932 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:10:32.932 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:10:32.987 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 03:10:33.466 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 03:10:33.944 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 03:10:34.423 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-09 03:10:34.902 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-09 03:10:35.380 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-09 03:10:35.859 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-09 03:10:35.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:10:35.938 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:10:35.939 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:10:35.940 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:10:35.940 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:10:35.959 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:10:35.959 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:10:35.959 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:10:35.960 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:10:35.960 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:10:35.960 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:10:35.960 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:10:35.960 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:10:35.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:10:36.005 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:10:36.005 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-09 03:10:36.005 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:10:36.005 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:10:36.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:10:36.065 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:10:36.067 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:10:36.067 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:10:36.067 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:10:36.087 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:10:36.087 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:10:36.087 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:10:36.088 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:10:36.088 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:10:36.088 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:10:36.088 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:10:36.088 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:10:36.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:10:36.093 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:10:36.093 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-09 03:10:36.093 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:10:36.093 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:10:36.331 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-09 03:10:36.802 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-09 03:10:37.273 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-09 03:10:37.744 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-09 03:10:38.222 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-09 03:10:38.694 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-09 03:10:39.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:10:39.099 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:10:39.101 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:10:39.101 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:10:39.101 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:10:39.121 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:10:39.121 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:10:39.121 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:10:39.122 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:10:39.122 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:10:39.123 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:10:39.123 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:10:39.123 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:10:39.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:10:39.168 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-09 03:10:39.173 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:10:39.173 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-09 03:10:39.173 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:10:39.173 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:10:39.640 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-09 03:10:40.120 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-09 03:10:40.599 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-09 03:10:41.078 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-09 03:10:41.556 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-09 03:10:42.035 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-09 03:10:42.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:10:42.180 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:10:42.181 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:10:42.182 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:10:42.182 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:10:42.201 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:10:42.201 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:10:42.202 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:10:42.203 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:10:42.203 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:10:42.203 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:10:42.203 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:10:42.203 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:10:42.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:10:42.222 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:10:42.222 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-09 03:10:42.222 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:10:42.222 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:10:42.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:10:42.284 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:10:42.286 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:10:42.286 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:10:42.286 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:10:42.304 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:10:42.304 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:10:42.304 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:10:42.305 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:10:42.305 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:10:42.305 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:10:42.305 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:10:42.305 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:10:42.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:10:42.316 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:10:42.316 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-09 03:10:42.316 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:10:42.316 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:10:42.508 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-01-09 03:10:42.978 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-01-09 03:10:43.449 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-01-09 03:10:43.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:10:43.630 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:10:43.632 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:10:43.632 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:10:43.632 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:10:43.653 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:10:43.653 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:10:43.653 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:10:43.655 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:10:43.655 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:10:43.655 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:10:43.655 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:10:43.655 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:10:43.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:10:43.692 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:10:43.692 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:10:43.692 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:10:43.692 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:10:43.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:10:43.913 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:10:43.915 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:10:43.915 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:10:43.925 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-01-09 03:10:43.932 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:10:43.932 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:10:43.932 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:10:43.933 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:10:43.933 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:10:43.933 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:10:43.933 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:10:43.933 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:10:43.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:10:43.980 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:10:43.980 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:10:43.980 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:10:43.980 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:10:44.403 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-01-09 03:10:44.880 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-01-09 03:10:45.359 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-01-09 03:10:45.837 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-01-09 03:10:46.315 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-01-09 03:10:46.793 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-01-09 03:10:46.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:10:46.987 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:10:46.988 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:10:46.988 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:10:47.007 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:10:47.007 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:10:47.007 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:10:47.009 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:10:47.009 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:10:47.009 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:10:47.009 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:10:47.009 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:10:47.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:10:47.032 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:10:47.032 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:10:47.033 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:10:47.033 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:10:47.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:10:47.261 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:10:47.262 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:10:47.263 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:10:47.271 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-01-09 03:10:47.282 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:10:47.282 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:10:47.282 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:10:47.283 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:10:47.283 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:10:47.284 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:10:47.284 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:10:47.284 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:10:47.322 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:10:47.327 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:10:47.327 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:10:47.327 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:10:47.327 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:10:47.749 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-01-09 03:10:48.228 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-01-09 03:10:48.706 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-01-09 03:10:49.183 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-01-09 03:10:49.661 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-01-09 03:10:50.139 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-01-09 03:10:50.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:10:50.334 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:10:50.335 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:10:50.335 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:10:50.354 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:10:50.354 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:10:50.354 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:10:50.355 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:10:50.355 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:10:50.355 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:10:50.355 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:10:50.355 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:10:50.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:10:50.375 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:10:50.375 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:10:50.376 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:10:50.376 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:10:50.612 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-01-09 03:10:51.082 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-01-09 03:10:51.561 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-01-09 03:10:52.039 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-01-09 03:10:52.518 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-01-09 03:10:52.995 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-01-09 03:10:53.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:10:53.382 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:10:53.383 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:10:53.384 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:10:53.401 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:10:53.401 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:10:53.401 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:10:53.403 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:10:53.403 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:10:53.403 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:10:53.403 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:10:53.403 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:10:53.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:10:53.414 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:10:53.414 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:10:53.414 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:10:53.414 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:10:53.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:10:53.462 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:10:53.464 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:10:53.464 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:10:53.472 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-01-09 03:10:53.482 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:10:53.482 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:10:53.482 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:10:53.483 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:10:53.483 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:10:53.483 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:10:53.483 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:10:53.483 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:10:53.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:10:53.524 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:10:53.524 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:10:53.525 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:10:53.525 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:10:53.950 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-01-09 03:10:54.428 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-01-09 03:10:54.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:10:54.471 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:10:54.472 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:10:54.473 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:10:54.490 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:10:54.490 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:10:54.490 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:10:54.491 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:10:54.491 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:10:54.491 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:10:54.491 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:10:54.491 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:10:54.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:10:54.525 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:10:54.525 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 03:10:54.525 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:10:54.525 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:10:54.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:10:54.586 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:10:54.587 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:10:54.587 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:10:54.587 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:10:54.607 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:10:54.607 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:10:54.607 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:10:54.608 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:10:54.608 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:10:54.608 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:10:54.608 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:10:54.608 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:10:54.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:10:54.611 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:10:54.611 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 03:10:54.611 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:10:54.611 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:10:54.906 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-01-09 03:10:55.385 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-01-09 03:10:55.864 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-01-09 03:10:56.342 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-01-09 03:10:56.820 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-01-09 03:10:57.289 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-01-09 03:10:57.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:10:57.617 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:10:57.618 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:10:57.619 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:10:57.619 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:10:57.637 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:10:57.637 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:10:57.637 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:10:57.638 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:10:57.638 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:10:57.638 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:10:57.639 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:10:57.639 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:10:57.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:10:57.662 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:10:57.662 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 03:10:57.662 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:10:57.662 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:10:57.758 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-01-09 03:10:58.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:10:58.149 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:10:58.150 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:10:58.150 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:10:58.150 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:10:58.159 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:10:58.159 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:10:58.159 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:10:58.160 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:10:58.160 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:10:58.160 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:10:58.160 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:10:58.160 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:10:58.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:10:58.177 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:10:58.178 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 03:10:58.178 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:10:58.178 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:10:58.235 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-01-09 03:10:58.704 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-01-09 03:10:59.173 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-01-09 03:10:59.646 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-01-09 03:11:00.115 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-01-09 03:11:00.585 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-01-09 03:11:01.059 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-01-09 03:11:01.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:11:01.185 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:11:01.187 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:11:01.187 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:11:01.188 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:11:01.207 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:11:01.207 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:11:01.207 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:11:01.208 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:11:01.208 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:11:01.208 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:11:01.208 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:11:01.209 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:11:01.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:11:01.247 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:11:01.247 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 03:11:01.247 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:11:01.247 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:11:01.535 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-01-09 03:11:02.014 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-01-09 03:11:02.492 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-01-09 03:11:02.971 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-01-09 03:11:03.449 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-01-09 03:11:03.927 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-01-09 03:11:04.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:11:04.255 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:11:04.256 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:11:04.256 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:11:04.257 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:11:04.271 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:11:04.271 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:11:04.271 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:11:04.273 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:11:04.273 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:11:04.273 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:11:04.273 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:11:04.273 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:11:04.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:11:04.308 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:11:04.309 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 03:11:04.309 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:11:04.309 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:11:04.405 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-01-09 03:11:04.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:11:04.787 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:11:04.788 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:11:04.789 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:11:04.789 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:11:04.809 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:11:04.809 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:11:04.809 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:11:04.810 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:11:04.810 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:11:04.810 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:11:04.810 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:11:04.810 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:11:04.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:11:04.825 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:11:04.825 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 03:11:04.826 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:11:04.826 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:11:04.882 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-01-09 03:11:05.361 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-01-09 03:11:05.839 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-01-09 03:11:06.318 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-01-09 03:11:06.797 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-01-09 03:11:07.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:11:07.255 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:11:07.256 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:11:07.256 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:11:07.257 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:11:07.269 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:11:07.269 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:11:07.269 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:11:07.270 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:11:07.275 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:11:07.275 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-01-09 03:11:07.275 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:11:07.275 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:11:07.275 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:11:07.275 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:11:07.275 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:11:07.275 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:11:07.275 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=9795 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:11:07.275 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=9795 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:11:07.275 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=9795 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:11:07.275 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=9795 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:11:07.275 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=9795 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:11:07.275 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=9795 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:11:12.272 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:11:12.272 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:11:12.273 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:11:12.274 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:11:12.274 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:11:12.275 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:11:12.283 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:11:12.284 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:11:12.284 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:11:12.284 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:11:12.284 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:11:12.287 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:11:12.287 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:11:12.287 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:11:12.287 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:11:12.288 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:11:12.288 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:11:12.288 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:11:12.288 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:11:12.290 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:11:12.290 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:11:12.291 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:11:12.291 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:11:12.291 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:11:12.291 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:11:12.291 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:11:12.291 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:11:12.293 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:11:12.293 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:11:12.293 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:11:12.293 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:11:12.293 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:11:12.293 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:11:12.293 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:11:12.293 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:11:12.296 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:11:12.296 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:11:12.296 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:11:12.296 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:11:12.296 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:11:12.296 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:11:12.296 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:11:12.296 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:11:12.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:11:12.296 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:11:12.297 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:11:12.297 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:11:12.297 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:11:12.297 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:11:12.297 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:11:12.297 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:11:12.297 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:11:12.297 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:11:12.297 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:11:12.297 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:11:12.297 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:11:12.297 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:11:12.297 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:11:12.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:11:12.297 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:11:12.297 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:11:12.297 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:11:12.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:11:12.297 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:11:12.297 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:11:12.297 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:11:12.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:11:12.297 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:11:12.297 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:11:12.297 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:11:12.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:11:12.297 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:11:12.298 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:11:12.298 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:11:12.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:11:12.298 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:11:12.298 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:11:12.298 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:11:12.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:11:12.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:11:12.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:11:12.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:11:12.302 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:11:12.783 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:11:12.827 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:11:12.829 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:11:12.830 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:11:12.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:11:12.855 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:11:12.855 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:11:12.855 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:11:12.859 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:11:12.859 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:11:12.859 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:11:12.859 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:11:12.860 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:11:12.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:11:12.884 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:11:12.884 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:11:12.884 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:11:12.884 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:11:12.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:11:12.945 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:11:12.948 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:11:12.948 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:11:12.964 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:11:12.964 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:11:12.964 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:11:12.965 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:11:12.965 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:11:12.965 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:11:12.966 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:11:12.966 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:11:13.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:11:13.027 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:11:13.027 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-09 03:11:13.028 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:11:13.028 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:11:13.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:11:13.106 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:11:13.108 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:11:13.108 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:11:13.108 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:11:13.128 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:11:13.128 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:11:13.128 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:11:13.129 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:11:13.130 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:11:13.130 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:11:13.130 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:11:13.130 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:11:13.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:11:13.164 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:11:13.164 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:11:13.164 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:11:13.165 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:11:13.261 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:11:13.299 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:11:13.299 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:11:13.301 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:11:13.304 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:11:13.417 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:11:13.420 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:11:13.421 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:11:13.421 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:11:13.434 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:11:13.434 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:11:13.434 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:11:13.436 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:11:13.436 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:11:13.436 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:11:13.436 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:11:13.436 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:11:13.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:11:13.445 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:11:13.445 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 03:11:13.445 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:11:13.445 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:11:13.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:11:13.584 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:11:13.585 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:11:13.585 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:11:13.586 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:11:13.595 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:11:13.595 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:11:13.595 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:11:13.595 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:11:13.597 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:11:13.597 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:11:13.597 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:11:13.597 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:11:13.597 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:11:13.597 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:11:13.597 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:11:13.597 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=278 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:11:13.597 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=278 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:11:13.597 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=278 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:11:13.597 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=278 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:11:13.597 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=278 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:11:13.597 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=278 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:11:13.597 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=278 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:11:13.598 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=278 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:11:18.600 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:11:18.600 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:11:18.601 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:11:18.602 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:11:18.603 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:11:18.603 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:11:18.611 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:11:18.613 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:11:18.613 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:11:18.613 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:11:18.613 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:11:18.617 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:11:18.617 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:11:18.617 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:11:18.618 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:11:18.618 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:11:18.618 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:11:18.618 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:11:18.619 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:11:18.620 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:11:18.620 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:11:18.621 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:11:18.621 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:11:18.621 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:11:18.621 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:11:18.621 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:11:18.621 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:11:18.623 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:11:18.623 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:11:18.623 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:11:18.623 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:11:18.623 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:11:18.623 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:11:18.623 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:11:18.623 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:11:18.626 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:11:18.626 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:11:18.626 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:11:18.626 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:11:18.626 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:11:18.627 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:11:18.627 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:11:18.627 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:11:18.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:11:18.627 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:11:18.627 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:11:18.627 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:11:18.627 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:11:18.627 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:11:18.627 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:11:18.627 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:11:18.627 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:11:18.627 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:11:18.627 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:11:18.627 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:11:18.627 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:11:18.628 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:11:18.628 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:11:18.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:11:18.628 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:11:18.628 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:11:18.628 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:11:18.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:11:18.628 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:11:18.628 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:11:18.628 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:11:18.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:11:18.628 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:11:18.628 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:11:18.628 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:11:18.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:11:18.628 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:11:18.628 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:11:18.628 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:11:18.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:11:18.628 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:11:18.628 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:11:18.629 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:11:18.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:11:18.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:11:18.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:11:18.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:11:18.632 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:11:19.116 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:11:19.157 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:11:19.159 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:11:19.160 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:11:19.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:11:19.181 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:11:19.181 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:11:19.181 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:11:19.184 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:11:19.184 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:11:19.184 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:11:19.184 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:11:19.184 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:11:19.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:11:19.219 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:11:19.219 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:11:19.219 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:11:19.219 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:11:19.593 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:11:19.631 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:11:19.632 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:11:19.632 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:11:19.633 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:11:20.072 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:11:20.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:11:20.093 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:11:20.094 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:11:20.094 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:11:20.107 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:11:20.107 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:11:20.107 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:11:20.108 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:11:20.108 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:11:20.108 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:11:20.108 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:11:20.108 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:11:20.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:11:20.116 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:11:20.116 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-09 03:11:20.116 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:11:20.116 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:11:20.550 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:11:20.632 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:11:20.633 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:11:20.633 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:11:20.634 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:11:20.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:11:20.822 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:11:20.823 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:11:20.824 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:11:20.824 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:11:20.840 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:11:20.840 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:11:20.840 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:11:20.841 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:11:20.841 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:11:20.841 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:11:20.841 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:11:20.841 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:11:20.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:11:20.886 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:11:20.887 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:11:20.887 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:11:20.887 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:11:20.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:11:20.992 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:11:20.994 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:11:20.994 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:11:21.011 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:11:21.011 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:11:21.011 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:11:21.012 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:11:21.012 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:11:21.012 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:11:21.012 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:11:21.012 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:11:21.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:11:21.020 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:11:21.020 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 03:11:21.020 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:11:21.020 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:11:21.027 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:11:21.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:11:21.422 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:11:21.424 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:11:21.424 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:11:21.424 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:11:21.434 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:11:21.435 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:11:21.435 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:11:21.435 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:11:21.437 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:11:21.437 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:11:21.437 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:11:21.437 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:11:21.437 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:11:21.437 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:11:21.437 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:11:21.437 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=600 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:11:21.437 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=600 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:11:21.437 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=600 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:11:21.437 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=600 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:11:21.437 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=600 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:11:21.437 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=600 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:11:21.437 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=600 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:11:21.437 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=600 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:11:26.439 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:11:26.439 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:11:26.441 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:11:26.441 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:11:26.442 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:11:26.442 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:11:26.452 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:11:26.453 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:11:26.453 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:11:26.454 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:11:26.454 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:11:26.457 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:11:26.457 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:11:26.457 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:11:26.457 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:11:26.457 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:11:26.457 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:11:26.458 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:11:26.458 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:11:26.460 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:11:26.460 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:11:26.461 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:11:26.461 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:11:26.461 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:11:26.461 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:11:26.461 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:11:26.461 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:11:26.463 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:11:26.463 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:11:26.464 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:11:26.464 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:11:26.464 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:11:26.464 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:11:26.464 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:11:26.464 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:11:26.467 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:11:26.467 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:11:26.467 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:11:26.467 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:11:26.468 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:11:26.468 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:11:26.468 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:11:26.468 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:11:26.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:11:26.468 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:11:26.468 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:11:26.468 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:11:26.468 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:11:26.468 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:11:26.468 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:11:26.468 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:11:26.468 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:11:26.468 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:11:26.468 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:11:26.469 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:11:26.469 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:11:26.469 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:11:26.469 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:11:26.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:11:26.469 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:11:26.469 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:11:26.469 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:11:26.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:11:26.469 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:11:26.469 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:11:26.469 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:11:26.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:11:26.469 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:11:26.469 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:11:26.469 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:11:26.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:11:26.469 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:11:26.470 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:11:26.470 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:11:26.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:11:26.470 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:11:26.470 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:11:26.470 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:11:26.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:11:26.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:11:26.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:11:26.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:11:26.473 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:11:26.958 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:11:27.003 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:11:27.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:11:27.006 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:11:27.007 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:11:27.017 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:11:27.017 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:11:27.017 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:11:27.019 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:11:27.019 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:11:27.019 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:11:27.019 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:11:27.019 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:11:27.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:11:27.058 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:11:27.059 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:11:27.059 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:11:27.060 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:11:27.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:11:27.227 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:11:27.229 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:11:27.229 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:11:27.250 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:11:27.250 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:11:27.250 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:11:27.252 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:11:27.252 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:11:27.252 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:11:27.252 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:11:27.252 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:11:27.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:11:27.297 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:11:27.298 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-09 03:11:27.298 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:11:27.298 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:11:27.432 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:11:27.472 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:11:27.472 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:11:27.473 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:11:27.477 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:11:27.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:11:27.574 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:11:27.574 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:11:27.574 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:11:27.574 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:11:27.596 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:11:27.596 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:11:27.596 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:11:27.598 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:11:27.598 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:11:27.598 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:11:27.598 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:11:27.598 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:11:27.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:11:27.613 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:11:27.613 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:11:27.613 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:11:27.613 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:11:27.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:11:27.895 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:11:27.897 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:11:27.897 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:11:27.901 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:11:27.919 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:11:27.919 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:11:27.919 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:11:27.922 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:11:27.922 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:11:27.922 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:11:27.922 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:11:27.922 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:11:27.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:11:27.953 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:11:27.953 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 03:11:27.953 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:11:27.953 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:11:28.374 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:11:28.473 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:11:28.473 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:11:28.474 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:11:28.478 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:11:28.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:11:28.761 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:11:28.763 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:11:28.763 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:11:28.763 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:11:28.773 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:11:28.773 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:11:28.773 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:11:28.773 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:11:28.775 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:11:28.775 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:11:28.775 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:11:28.775 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:11:28.775 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:11:28.775 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:11:28.775 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:11:28.775 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=496 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:11:28.775 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=497 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:11:28.775 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=497 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:11:28.775 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=497 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:11:28.775 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=497 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:11:28.775 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=497 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:11:28.775 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=497 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:11:28.775 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=497 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:11:28.775 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=497 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:11:33.778 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:11:33.778 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:11:33.780 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:11:33.780 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:11:33.780 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:11:33.781 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:11:33.794 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:11:33.796 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:11:33.796 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:11:33.796 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:11:33.796 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:11:33.797 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:11:33.798 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:11:33.798 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:11:33.798 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:11:33.798 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:11:33.798 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:11:33.798 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:11:33.798 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:11:33.799 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:11:33.799 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:11:33.799 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:11:33.799 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:11:33.799 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:11:33.799 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:11:33.799 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:11:33.799 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:11:33.800 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:11:33.800 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:11:33.800 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:11:33.800 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:11:33.800 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:11:33.800 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:11:33.800 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:11:33.800 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:11:33.802 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:11:33.802 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:11:33.802 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:11:33.802 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:11:33.802 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:11:33.802 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:11:33.802 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:11:33.802 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:11:33.802 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:11:33.802 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:11:33.802 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:11:33.802 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:11:33.802 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:11:33.803 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:11:33.803 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:11:33.803 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:11:33.803 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:11:33.803 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:11:33.803 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:11:33.803 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:11:33.803 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:11:33.803 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:11:33.803 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:11:33.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:11:33.803 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:11:33.803 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:11:33.803 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:11:33.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:11:33.803 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:11:33.803 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:11:33.803 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:11:33.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:11:33.803 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:11:33.803 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:11:33.803 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:11:33.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:11:33.803 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:11:33.803 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:11:33.803 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:11:33.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:11:33.803 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:11:33.803 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:11:33.803 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:11:33.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:11:33.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:11:33.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:11:33.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:11:33.807 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:11:34.291 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:11:34.323 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:11:34.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:11:34.324 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:11:34.325 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:11:34.344 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:11:34.344 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:11:34.344 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:11:34.347 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:11:34.348 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:11:34.348 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:11:34.348 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:11:34.348 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:11:34.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:11:34.392 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:11:34.392 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:11:34.392 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:11:34.392 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:11:34.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:11:34.563 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:11:34.564 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:11:34.565 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:11:34.583 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:11:34.583 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:11:34.583 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:11:34.585 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:11:34.585 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:11:34.585 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:11:34.585 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:11:34.585 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:11:34.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:11:34.628 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:11:34.628 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-09 03:11:34.628 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:11:34.628 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:11:34.761 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:11:34.806 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:11:34.806 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:11:34.806 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:11:34.807 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:11:34.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:11:34.905 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:11:34.907 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:11:34.907 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:11:34.907 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:11:34.927 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:11:34.927 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:11:34.927 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:11:34.928 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:11:34.928 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:11:34.928 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:11:34.928 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:11:34.928 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:11:34.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:11:34.943 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:11:34.943 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:11:34.944 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:11:34.944 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:11:35.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:11:35.223 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:11:35.225 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:11:35.225 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:11:35.230 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:11:35.244 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:11:35.244 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:11:35.244 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:11:35.245 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:11:35.245 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:11:35.245 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:11:35.245 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:11:35.245 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:11:35.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:11:35.283 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:11:35.284 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 03:11:35.284 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:11:35.284 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:11:35.701 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:11:35.806 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:11:35.806 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:11:35.807 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:11:35.808 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:11:36.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:11:36.091 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:11:36.092 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:11:36.092 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:11:36.093 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:11:36.103 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:11:36.103 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:11:36.104 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:11:36.104 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:11:36.109 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:11:36.109 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:11:36.109 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:11:36.109 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:11:36.109 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:11:36.109 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:11:36.110 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:11:36.110 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=498 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:11:36.110 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=498 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:11:36.110 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=498 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:11:36.110 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=498 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:11:36.110 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=498 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:11:36.110 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=498 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:11:36.111 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=498 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:11:36.111 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=498 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:11:41.105 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:11:41.106 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:11:41.107 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:11:41.108 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:11:41.108 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:11:41.109 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:11:41.120 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:11:41.121 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:11:41.121 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:11:41.121 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:11:41.121 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:11:41.123 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:11:41.123 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:11:41.123 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:11:41.123 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:11:41.123 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:11:41.123 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:11:41.124 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:11:41.124 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:11:41.126 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:11:41.126 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:11:41.126 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:11:41.126 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:11:41.126 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:11:41.126 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:11:41.126 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:11:41.126 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:11:41.128 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:11:41.128 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:11:41.128 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:11:41.128 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:11:41.128 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:11:41.128 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:11:41.128 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:11:41.128 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:11:41.131 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:11:41.131 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:11:41.131 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:11:41.131 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:11:41.131 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:11:41.131 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:11:41.131 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:11:41.131 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:11:41.131 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:11:41.131 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:11:41.131 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:11:41.131 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:11:41.131 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:11:41.131 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:11:41.131 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:11:41.131 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:11:41.131 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:11:41.131 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:11:41.131 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:11:41.132 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:11:41.132 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:11:41.132 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:11:41.132 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:11:41.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:11:41.132 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:11:41.132 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:11:41.132 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:11:41.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:11:41.132 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:11:41.132 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:11:41.132 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:11:41.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:11:41.132 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:11:41.132 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:11:41.132 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:11:41.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:11:41.132 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:11:41.132 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:11:41.132 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:11:41.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:11:41.132 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:11:41.132 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:11:41.133 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:11:41.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:11:41.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:11:41.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:11:41.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:11:41.136 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:11:41.620 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:11:41.661 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:11:41.663 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:11:41.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:11:41.666 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:11:41.693 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:11:41.694 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:11:41.694 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:11:41.697 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:11:41.697 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:11:41.698 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:11:41.698 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:11:41.698 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:11:41.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:11:41.723 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:11:41.724 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:11:41.724 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:11:41.724 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:11:42.098 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:11:42.134 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:11:42.135 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:11:42.135 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:11:42.138 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:11:42.576 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:11:43.054 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:11:43.135 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:11:43.136 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:11:43.136 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:11:43.139 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:11:43.532 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:11:43.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:11:43.581 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:11:43.583 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:11:43.583 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:11:43.601 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:11:43.601 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:11:43.601 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:11:43.603 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:11:43.603 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:11:43.603 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:11:43.603 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:11:43.603 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:11:43.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:11:43.624 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:11:43.624 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-09 03:11:43.624 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:11:43.624 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:11:44.010 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 03:11:44.136 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:11:44.137 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:11:44.137 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:11:44.139 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:11:44.488 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 03:11:44.963 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 03:11:45.138 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:11:45.138 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:11:45.139 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:11:45.140 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:11:45.439 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 03:11:45.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:11:45.770 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:11:45.772 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:11:45.772 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:11:45.772 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:11:45.791 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:11:45.791 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:11:45.791 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:11:45.792 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:11:45.792 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:11:45.792 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:11:45.792 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:11:45.792 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:11:45.813 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:11:45.817 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:11:45.817 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:11:45.817 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:11:45.817 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:11:45.916 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 03:11:46.139 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:11:46.140 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:11:46.140 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:11:46.142 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:11:46.394 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 03:11:46.872 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 03:11:47.350 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 03:11:47.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:11:47.392 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:11:47.393 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:11:47.393 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:11:47.411 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:11:47.411 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:11:47.411 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:11:47.412 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:11:47.412 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:11:47.412 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:11:47.413 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:11:47.413 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:11:47.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:11:47.451 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:11:47.451 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 03:11:47.451 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:11:47.451 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:11:47.826 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 03:11:48.304 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 03:11:48.783 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 03:11:49.260 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 03:11:49.729 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 03:11:50.198 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 03:11:50.672 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 03:11:51.151 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 03:11:51.629 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 03:11:52.107 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 03:11:52.585 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 03:11:53.057 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 03:11:53.527 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 03:11:54.005 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-09 03:11:54.484 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-09 03:11:54.963 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-09 03:11:55.442 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-09 03:11:55.921 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-09 03:11:56.399 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-09 03:11:56.877 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-09 03:11:57.354 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-09 03:11:57.832 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-09 03:11:58.311 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-09 03:11:58.789 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-09 03:11:59.268 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-09 03:11:59.747 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-09 03:12:00.225 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-09 03:12:00.704 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-09 03:12:01.182 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-09 03:12:01.660 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-09 03:12:02.139 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-01-09 03:12:02.618 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-01-09 03:12:03.097 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-01-09 03:12:03.575 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-01-09 03:12:04.054 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-01-09 03:12:04.533 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-01-09 03:12:05.011 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-01-09 03:12:05.489 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-01-09 03:12:05.968 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-01-09 03:12:06.441 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-01-09 03:12:06.912 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-01-09 03:12:07.391 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-01-09 03:12:07.415 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:12:07.415 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:12:07.415 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:12:07.417 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:12:07.417 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:12:07.417 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:12:07.417 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:12:07.418 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:12:07.418 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:12:07.418 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:12:07.418 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:12:07.418 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:12:07.418 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:12:07.419 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:12:12.422 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:12:12.422 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:12:12.424 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:12:12.424 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:12:12.425 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:12:12.425 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:12:12.434 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:12:12.435 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:12:12.435 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:12:12.435 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:12:12.435 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:12:12.438 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:12:12.438 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:12:12.438 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:12:12.438 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:12:12.439 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:12:12.439 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:12:12.439 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:12:12.439 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:12:12.440 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:12:12.441 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:12:12.441 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:12:12.441 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:12:12.441 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:12:12.441 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:12:12.441 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:12:12.441 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:12:12.443 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:12:12.443 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:12:12.443 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:12:12.443 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:12:12.443 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:12:12.443 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:12:12.443 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:12:12.443 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:12:12.445 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:12:12.445 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:12:12.445 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:12:12.445 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:12:12.445 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:12:12.445 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:12:12.446 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:12:12.446 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:12:12.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:12:12.446 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:12:12.446 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:12:12.446 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:12:12.446 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:12:12.446 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:12:12.446 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:12:12.446 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:12:12.446 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:12:12.446 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:12:12.446 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:12:12.446 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:12:12.446 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:12:12.446 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:12:12.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:12:12.446 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:12:12.446 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:12:12.446 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:12:12.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:12:12.446 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:12:12.446 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:12:12.446 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:12:12.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:12:12.447 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:12:12.447 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:12:12.447 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:12:12.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:12:12.447 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:12:12.447 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:12:12.447 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:12:12.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:12:12.447 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:12:12.447 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:12:12.447 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:12:12.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:12:12.447 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:12:12.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:12:12.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:12:12.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:12:12.451 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:12:12.935 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:12:12.966 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:12:12.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:12:12.967 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:12:12.968 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:12:12.978 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:12:12.978 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:12:12.978 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:12:12.981 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:12:12.981 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:12:12.981 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:12:12.981 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:12:12.981 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:12:13.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:12:13.032 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:12:13.032 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:12:13.032 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:12:13.033 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:12:13.405 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:12:13.448 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:12:13.449 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:12:13.449 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:12:13.451 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:12:13.874 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:12:14.344 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:12:14.449 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:12:14.449 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:12:14.450 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:12:14.452 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:12:14.816 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:12:14.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:12:14.862 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:12:14.863 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:12:14.863 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:12:14.880 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:12:14.880 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:12:14.880 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:12:14.882 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:12:14.882 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:12:14.882 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:12:14.882 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:12:14.882 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:12:14.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:12:14.912 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:12:14.913 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-09 03:12:14.913 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:12:14.913 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:12:15.290 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 03:12:15.450 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:12:15.450 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:12:15.450 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:12:15.452 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:12:15.759 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 03:12:16.229 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 03:12:16.451 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:12:16.452 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:12:16.452 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:12:16.453 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:12:16.699 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 03:12:17.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:12:17.028 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:12:17.029 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:12:17.029 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:12:17.029 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:12:17.048 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:12:17.048 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:12:17.048 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:12:17.049 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:12:17.049 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:12:17.049 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:12:17.050 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:12:17.050 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:12:17.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:12:17.077 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:12:17.077 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:12:17.077 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:12:17.078 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:12:17.171 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 03:12:17.453 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:12:17.453 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:12:17.454 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:12:17.454 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:12:17.649 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 03:12:18.127 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 03:12:18.604 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 03:12:18.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:12:18.647 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:12:18.648 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:12:18.648 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:12:18.661 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:12:18.661 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:12:18.661 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:12:18.663 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:12:18.663 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:12:18.663 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:12:18.663 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:12:18.663 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:12:18.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:12:18.701 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:12:18.701 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 03:12:18.701 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:12:18.702 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:12:19.079 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 03:12:19.558 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 03:12:20.037 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 03:12:20.515 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 03:12:20.993 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 03:12:21.472 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 03:12:21.950 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 03:12:22.429 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 03:12:22.907 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 03:12:23.386 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 03:12:23.857 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 03:12:24.328 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 03:12:24.804 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 03:12:25.283 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-09 03:12:25.761 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-09 03:12:26.239 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-09 03:12:26.718 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-09 03:12:27.196 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-09 03:12:27.675 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-09 03:12:28.153 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-09 03:12:28.631 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-09 03:12:29.110 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-09 03:12:29.589 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-09 03:12:30.068 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-09 03:12:30.546 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-09 03:12:31.025 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-09 03:12:31.504 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-09 03:12:31.982 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-09 03:12:32.461 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-09 03:12:32.940 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-09 03:12:33.418 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-01-09 03:12:33.896 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-01-09 03:12:34.374 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-01-09 03:12:34.853 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-01-09 03:12:35.332 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-01-09 03:12:35.811 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-01-09 03:12:36.289 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-01-09 03:12:36.768 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-01-09 03:12:37.246 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-01-09 03:12:37.725 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-01-09 03:12:38.204 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-01-09 03:12:38.665 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:12:38.665 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:12:38.665 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:12:38.667 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:12:38.667 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:12:38.667 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:12:38.667 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:12:38.668 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:12:38.668 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:12:38.668 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:12:38.668 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:12:38.668 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:12:38.668 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:12:38.669 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:12:38.669 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=5610 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:12:38.669 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=5610 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:12:38.669 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=5610 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:12:38.669 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=5610 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:12:38.669 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=5610 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:12:38.669 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=5610 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:12:38.669 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=5610 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:12:38.669 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=5610 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:12:43.675 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:12:43.675 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:12:43.675 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:12:43.675 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:12:43.675 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:12:43.675 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:12:43.683 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:12:43.684 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:12:43.684 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:12:43.685 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:12:43.685 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:12:43.689 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:12:43.689 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:12:43.690 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:12:43.690 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:12:43.690 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:12:43.690 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:12:43.690 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:12:43.690 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:12:43.694 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:12:43.694 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:12:43.694 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:12:43.694 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:12:43.694 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:12:43.694 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:12:43.695 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:12:43.695 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:12:43.698 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:12:43.698 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:12:43.698 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:12:43.698 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:12:43.699 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:12:43.699 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:12:43.699 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:12:43.699 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:12:43.703 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:12:43.703 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:12:43.703 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:12:43.703 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:12:43.703 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:12:43.704 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:12:43.704 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:12:43.704 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:12:43.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:12:43.704 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:12:43.704 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:12:43.704 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:12:43.704 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:12:43.704 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:12:43.704 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:12:43.704 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:12:43.704 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:12:43.704 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:12:43.704 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:12:43.705 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:12:43.705 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:12:43.705 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:12:43.705 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:12:43.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:12:43.705 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:12:43.705 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:12:43.705 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:12:43.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:12:43.705 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:12:43.705 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:12:43.705 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:12:43.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:12:43.705 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:12:43.705 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:12:43.706 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:12:43.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:12:43.706 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:12:43.706 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:12:43.706 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:12:43.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:12:43.706 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:12:43.706 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:12:43.706 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:12:43.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:12:43.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:12:43.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:12:43.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:12:43.709 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:12:44.192 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:12:44.237 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:12:44.237 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:12:44.239 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:12:44.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:12:44.259 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:12:44.259 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:12:44.259 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:12:44.264 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:12:44.264 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:12:44.264 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:12:44.264 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:12:44.264 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:12:44.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:12:44.294 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:12:44.295 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:12:44.295 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:12:44.296 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:12:44.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:12:44.472 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:12:44.474 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:12:44.474 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:12:44.491 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:12:44.491 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:12:44.491 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:12:44.492 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:12:44.492 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:12:44.492 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:12:44.493 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:12:44.493 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:12:44.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:12:44.524 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:12:44.525 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:12:44.525 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:12:44.526 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:12:44.669 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:12:44.708 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:12:44.709 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:12:44.710 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:12:44.714 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:12:45.148 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:12:45.626 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:12:45.709 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:12:45.709 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:12:45.711 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:12:45.715 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:12:46.104 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:12:46.582 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 03:12:46.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:12:46.631 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:12:46.633 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:12:46.633 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:12:46.650 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:12:46.650 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:12:46.650 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:12:46.652 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:12:46.652 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:12:46.652 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:12:46.652 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:12:46.652 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:12:46.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:12:46.681 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:12:46.682 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:12:46.682 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:12:46.682 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:12:46.710 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:12:46.710 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:12:46.712 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:12:46.716 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:12:46.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:12:46.848 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:12:46.850 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:12:46.850 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:12:46.871 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:12:46.871 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:12:46.871 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:12:46.872 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:12:46.872 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:12:46.872 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:12:46.872 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:12:46.872 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:12:46.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:12:46.915 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:12:46.915 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:12:46.916 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:12:46.916 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:12:47.059 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 03:12:47.537 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 03:12:47.711 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:12:47.712 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:12:47.713 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:12:47.718 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:12:48.016 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 03:12:48.494 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 03:12:48.712 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:12:48.712 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:12:48.714 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:12:48.719 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:12:48.972 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 03:12:49.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:12:49.066 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:12:49.068 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:12:49.068 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:12:49.084 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:12:49.084 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:12:49.084 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:12:49.085 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:12:49.085 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:12:49.085 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:12:49.085 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:12:49.085 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:12:49.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:12:49.114 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:12:49.114 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-09 03:12:49.115 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:12:49.115 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:12:49.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:12:49.385 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:12:49.387 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:12:49.387 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:12:49.387 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:12:49.408 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:12:49.408 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:12:49.408 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:12:49.409 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:12:49.409 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:12:49.409 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:12:49.409 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:12:49.409 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:12:49.444 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 03:12:49.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:12:49.452 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:12:49.452 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-09 03:12:49.452 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:12:49.453 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:12:49.915 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 03:12:50.386 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 03:12:50.857 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 03:12:51.328 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 03:12:51.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:12:51.709 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:12:51.711 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:12:51.711 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:12:51.711 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:12:51.724 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:12:51.724 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:12:51.724 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:12:51.726 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:12:51.726 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:12:51.726 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:12:51.726 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:12:51.726 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:12:51.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:12:51.751 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:12:51.751 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-09 03:12:51.752 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:12:51.752 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:12:51.798 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 03:12:52.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:12:52.026 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:12:52.028 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:12:52.028 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:12:52.028 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:12:52.048 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:12:52.048 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:12:52.048 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:12:52.049 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:12:52.050 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:12:52.050 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:12:52.050 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:12:52.050 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:12:52.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:12:52.089 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:12:52.089 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-09 03:12:52.089 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:12:52.090 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:12:52.272 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 03:12:52.751 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 03:12:53.229 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 03:12:53.697 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 03:12:54.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:12:54.121 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:12:54.123 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:12:54.123 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:12:54.123 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:12:54.141 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:12:54.141 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:12:54.141 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:12:54.142 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:12:54.142 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:12:54.142 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:12:54.142 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:12:54.142 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:12:54.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:12:54.167 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 03:12:54.171 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:12:54.171 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:12:54.171 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:12:54.172 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:12:54.642 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 03:12:54.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:12:54.801 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:12:54.802 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:12:54.803 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:12:54.825 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:12:54.825 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:12:54.826 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:12:54.827 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:12:54.827 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:12:54.827 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:12:54.827 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:12:54.827 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:12:54.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:12:54.885 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:12:54.886 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:12:54.886 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:12:54.887 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:12:55.120 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 03:12:55.598 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 03:12:56.076 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 03:12:56.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:12:56.516 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:12:56.518 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:12:56.518 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:12:56.537 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:12:56.537 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:12:56.537 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:12:56.538 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:12:56.538 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:12:56.539 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:12:56.539 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:12:56.539 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:12:56.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:12:56.544 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:12:56.545 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:12:56.545 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:12:56.545 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:12:56.554 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-09 03:12:57.023 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-09 03:12:57.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:12:57.178 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:12:57.179 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:12:57.179 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:12:57.200 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:12:57.200 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:12:57.200 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:12:57.201 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:12:57.201 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:12:57.201 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:12:57.201 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:12:57.201 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:12:57.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:12:57.258 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:12:57.258 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:12:57.258 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:12:57.258 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:12:57.492 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-09 03:12:57.967 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-09 03:12:58.444 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-09 03:12:58.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:12:58.885 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:12:58.886 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:12:58.887 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:12:58.906 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:12:58.906 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:12:58.907 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:12:58.908 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:12:58.908 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:12:58.908 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:12:58.908 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:12:58.908 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:12:58.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:12:58.913 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:12:58.913 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 03:12:58.913 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:12:58.913 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:12:58.922 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-09 03:12:59.399 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-09 03:12:59.878 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-09 03:13:00.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:13:00.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:00.200 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:13:00.200 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:13:00.201 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:13:00.221 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:13:00.221 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:13:00.221 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:13:00.223 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:00.223 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:13:00.223 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:13:00.223 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:13:00.223 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:13:00.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:13:00.260 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:13:00.260 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 03:13:00.261 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:00.261 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:00.357 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-09 03:13:00.835 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-09 03:13:01.314 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-09 03:13:01.792 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-09 03:13:02.271 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-09 03:13:02.750 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-09 03:13:03.228 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-09 03:13:03.707 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-09 03:13:04.186 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-09 03:13:04.664 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-01-09 03:13:05.142 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-01-09 03:13:05.621 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-01-09 03:13:06.100 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-01-09 03:13:06.578 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-01-09 03:13:07.056 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-01-09 03:13:07.534 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-01-09 03:13:08.012 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-01-09 03:13:08.489 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-01-09 03:13:08.958 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-01-09 03:13:09.427 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-01-09 03:13:09.902 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-01-09 03:13:10.377 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-01-09 03:13:10.856 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-01-09 03:13:11.335 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-01-09 03:13:11.814 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-01-09 03:13:12.291 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-01-09 03:13:12.770 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-01-09 03:13:13.248 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-01-09 03:13:13.726 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-01-09 03:13:14.204 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-01-09 03:13:14.683 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-01-09 03:13:15.161 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-01-09 03:13:15.640 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-01-09 03:13:16.119 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-01-09 03:13:16.597 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-01-09 03:13:17.074 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-01-09 03:13:17.553 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-01-09 03:13:18.031 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-01-09 03:13:18.510 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-01-09 03:13:18.988 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-01-09 03:13:19.466 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-01-09 03:13:19.945 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-01-09 03:13:20.225 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:13:20.226 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:13:20.226 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:13:20.229 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:13:20.229 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:13:20.229 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:13:20.229 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:13:20.230 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:13:20.230 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:13:20.230 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:13:20.230 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:13:20.230 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:13:20.230 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:13:20.230 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:13:20.230 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=7815 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:13:20.230 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=7815 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:13:20.230 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=7815 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:13:20.230 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=7815 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:13:25.233 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:13:25.233 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:13:25.236 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:13:25.236 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:13:25.236 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:13:25.236 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:13:25.245 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:13:25.247 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:13:25.247 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:13:25.247 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:13:25.247 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:13:25.250 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:13:25.251 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:13:25.251 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:13:25.251 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:13:25.252 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:13:25.252 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:13:25.252 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:13:25.252 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:13:25.254 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:13:25.254 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:13:25.254 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:13:25.254 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:13:25.255 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:13:25.255 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:13:25.255 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:13:25.255 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:13:25.257 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:13:25.257 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:13:25.257 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:13:25.257 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:13:25.257 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:13:25.257 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:13:25.257 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:13:25.257 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:13:25.260 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:13:25.260 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:13:25.260 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:13:25.260 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:13:25.260 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:13:25.260 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:13:25.260 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:13:25.260 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:13:25.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:13:25.260 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:13:25.260 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:13:25.260 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:13:25.260 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:13:25.260 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:13:25.260 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:13:25.260 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:13:25.260 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:13:25.260 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:13:25.260 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:13:25.261 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:13:25.261 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:13:25.261 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:13:25.261 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:13:25.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:13:25.261 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:13:25.261 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:13:25.261 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:13:25.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:13:25.261 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:13:25.261 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:13:25.261 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:13:25.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:13:25.261 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:13:25.261 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:13:25.261 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:13:25.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:13:25.261 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:13:25.261 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:13:25.261 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:13:25.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:13:25.261 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:13:25.262 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:13:25.262 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:13:25.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:13:25.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:13:25.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:13:25.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:13:25.265 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:13:25.749 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:13:25.794 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:13:25.797 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:13:25.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:13:25.799 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:13:25.822 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:13:25.822 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:13:25.823 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:13:25.827 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:25.827 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:13:25.827 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:13:25.827 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:13:25.827 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:13:25.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:13:25.852 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:13:25.852 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:13:25.853 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:25.853 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:25.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:13:25.910 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:25.911 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:13:25.911 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:13:25.929 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:13:25.929 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:13:25.929 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:13:25.930 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:25.930 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:13:25.930 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:13:25.930 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:13:25.930 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:13:25.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:13:25.993 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:13:25.993 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:13:25.993 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:25.994 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:26.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:13:26.070 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:26.071 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:13:26.072 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:13:26.092 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:13:26.092 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:13:26.092 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:13:26.093 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:26.093 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:13:26.093 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:13:26.093 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:13:26.093 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:13:26.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:13:26.132 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:13:26.132 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-09 03:13:26.133 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:26.133 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:26.224 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:13:26.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:13:26.228 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:26.230 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:13:26.230 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:13:26.230 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:13:26.250 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:13:26.250 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:13:26.250 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:13:26.252 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:26.252 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:13:26.252 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:13:26.252 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:13:26.252 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:13:26.264 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:13:26.265 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:13:26.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:13:26.267 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:13:26.267 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:13:26.267 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-09 03:13:26.268 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:26.268 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:26.270 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:13:26.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:13:26.348 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:26.350 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:13:26.350 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:13:26.350 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:13:26.368 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:13:26.368 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:13:26.368 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:13:26.369 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:26.370 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:13:26.370 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:13:26.370 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:13:26.370 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:13:26.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:13:26.412 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:13:26.413 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:13:26.413 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:26.413 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:26.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:13:26.616 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:26.617 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:13:26.618 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:13:26.636 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:13:26.636 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:13:26.636 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:13:26.638 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:26.638 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:13:26.638 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:13:26.638 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:13:26.638 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:13:26.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:13:26.696 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:13:26.696 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:13:26.697 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:26.697 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:26.701 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:13:26.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:13:26.862 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:26.864 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:13:26.864 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:13:26.883 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:13:26.883 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:13:26.884 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:13:26.885 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:26.885 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:13:26.885 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:13:26.885 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:13:26.885 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:13:26.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:13:26.943 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:13:26.943 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 03:13:26.943 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:26.944 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:27.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:13:27.023 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:27.025 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:13:27.025 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:13:27.025 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:13:27.043 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:13:27.043 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:13:27.043 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:13:27.044 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:27.044 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:13:27.044 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:13:27.044 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:13:27.044 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:13:27.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:13:27.085 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:13:27.085 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 03:13:27.086 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:27.086 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:27.178 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:13:27.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:13:27.265 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:13:27.266 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:13:27.266 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:27.268 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:13:27.268 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:13:27.268 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:13:27.268 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:13:27.271 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:13:27.278 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:13:27.278 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:13:27.278 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:13:27.278 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:13:27.284 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:13:27.284 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:13:27.284 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:13:27.284 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:13:27.284 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:13:27.284 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:13:27.285 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:13:27.285 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=431 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:13:27.285 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=431 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:13:32.283 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:13:32.283 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:13:32.285 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:13:32.285 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:13:32.285 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:13:32.286 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:13:32.292 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:13:32.294 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:13:32.294 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:13:32.294 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:13:32.294 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:13:32.297 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:13:32.297 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:13:32.297 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:13:32.297 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:13:32.297 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:13:32.297 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:13:32.297 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:13:32.297 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:13:32.300 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:13:32.300 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:13:32.300 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:13:32.300 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:13:32.300 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:13:32.300 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:13:32.300 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:13:32.300 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:13:32.302 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:13:32.302 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:13:32.302 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:13:32.302 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:13:32.302 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:13:32.302 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:13:32.302 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:13:32.302 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:13:32.304 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:13:32.304 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:13:32.304 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:13:32.304 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:13:32.304 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:13:32.304 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:13:32.304 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:13:32.304 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:13:32.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:13:32.304 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:13:32.304 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:13:32.305 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:13:32.305 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:13:32.305 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:13:32.305 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:13:32.305 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:13:32.305 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:13:32.305 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:13:32.305 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:13:32.305 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:13:32.305 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:13:32.305 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:13:32.305 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:13:32.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:13:32.305 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:13:32.305 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:13:32.305 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:13:32.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:13:32.305 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:13:32.305 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:13:32.305 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:13:32.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:13:32.305 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:13:32.305 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:13:32.305 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:13:32.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:13:32.305 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:13:32.305 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:13:32.305 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:13:32.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:13:32.305 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:13:32.305 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:13:32.305 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:13:32.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:13:32.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:13:32.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:13:32.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:13:32.309 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:13:32.793 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:13:32.827 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:13:32.828 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:13:32.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:13:32.829 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:13:32.846 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:13:32.847 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:13:32.847 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:13:32.851 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:32.851 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:13:32.852 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:13:32.852 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:13:32.852 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:13:32.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:13:32.895 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:13:32.895 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:13:32.896 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:32.896 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:33.263 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:13:33.307 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:13:33.307 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:13:33.308 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:13:33.310 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:13:33.733 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:13:33.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:13:33.751 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:33.753 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:13:33.753 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:13:33.769 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:13:33.769 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:13:33.769 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:13:33.770 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:33.770 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:13:33.770 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:13:33.770 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:13:33.770 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:13:33.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:13:33.775 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:13:33.775 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:13:33.775 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:33.775 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:34.203 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:13:34.228 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:13:34.231 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:34.233 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:13:34.233 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:13:34.250 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:13:34.250 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:13:34.250 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:13:34.251 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:34.251 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:13:34.251 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:13:34.251 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:13:34.251 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:13:34.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:13:34.303 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:13:34.303 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-09 03:13:34.304 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:34.304 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:34.308 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:13:34.308 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:13:34.308 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:13:34.310 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:13:34.673 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:13:34.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:13:34.952 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:34.954 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:13:34.954 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:13:34.954 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:13:34.971 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:13:34.971 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:13:34.971 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:13:34.972 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:34.972 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:13:34.972 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:13:34.972 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:13:34.972 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:13:35.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:13:35.008 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:13:35.008 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-09 03:13:35.008 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:35.008 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:35.144 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 03:13:35.309 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:13:35.309 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:13:35.310 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:13:35.311 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:13:35.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:13:35.432 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:35.434 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:13:35.434 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:13:35.434 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:13:35.452 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:13:35.452 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:13:35.452 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:13:35.453 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:35.453 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:13:35.453 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:13:35.453 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:13:35.453 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:13:35.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:13:35.471 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:13:35.472 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:13:35.472 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:35.472 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:35.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:13:35.584 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:35.585 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:13:35.585 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:13:35.605 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:13:35.605 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:13:35.605 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:13:35.606 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:35.606 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:13:35.606 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:13:35.606 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:13:35.606 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:13:35.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:13:35.612 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:13:35.612 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:13:35.612 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:35.612 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:35.615 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 03:13:36.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:13:36.055 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:36.058 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:13:36.058 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:13:36.075 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:13:36.075 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:13:36.076 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:13:36.078 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:36.078 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:13:36.078 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:13:36.078 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:13:36.078 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:13:36.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:13:36.083 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:13:36.083 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 03:13:36.083 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:36.083 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:36.089 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 03:13:36.310 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:13:36.311 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:13:36.311 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:13:36.312 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:13:36.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:13:36.480 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:36.482 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:13:36.483 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:13:36.483 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:13:36.502 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:13:36.502 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:13:36.502 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:13:36.503 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:36.504 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:13:36.504 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:13:36.504 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:13:36.504 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:13:36.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:13:36.558 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 03:13:36.562 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:13:36.562 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 03:13:36.563 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:36.563 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:36.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:13:36.950 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:36.952 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:13:36.952 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:13:36.952 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:13:36.959 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:13:36.959 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:13:36.959 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:13:36.959 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:13:36.960 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:13:36.960 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:13:36.960 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:13:36.960 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:13:36.960 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:13:36.960 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:13:36.960 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:13:36.960 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1007 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:13:36.960 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1007 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:13:36.960 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1007 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:13:36.960 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1007 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:13:36.960 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1007 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:13:36.960 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1007 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:13:36.960 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1007 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:13:41.967 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:13:41.967 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:13:41.967 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:13:41.967 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:13:41.967 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:13:41.967 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:13:41.975 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:13:41.977 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:13:41.977 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:13:41.978 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:13:41.978 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:13:41.981 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:13:41.982 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:13:41.982 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:13:41.982 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:13:41.983 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:13:41.983 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:13:41.983 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:13:41.983 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:13:41.985 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:13:41.985 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:13:41.986 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:13:41.986 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:13:41.986 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:13:41.986 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:13:41.987 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:13:41.987 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:13:41.988 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:13:41.988 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:13:41.988 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:13:41.989 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:13:41.989 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:13:41.989 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:13:41.989 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:13:41.989 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:13:41.992 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:13:41.992 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:13:41.992 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:13:41.992 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:13:41.992 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:13:41.992 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:13:41.992 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:13:41.992 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:13:41.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:13:41.992 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:13:41.992 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:13:41.992 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:13:41.992 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:13:41.992 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:13:41.992 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:13:41.992 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:13:41.993 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:13:41.993 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:13:41.993 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:13:41.993 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:13:41.993 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:13:41.993 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:13:41.993 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:13:41.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:13:41.993 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:13:41.993 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:13:41.993 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:13:41.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:13:41.993 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:13:41.993 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:13:41.993 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:13:41.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:13:41.993 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:13:41.993 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:13:41.993 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:13:41.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:13:41.993 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:13:41.993 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:13:41.993 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:13:41.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:13:41.994 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:13:41.994 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:13:41.994 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:13:41.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:13:41.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:13:41.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:13:41.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:13:41.997 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:13:42.482 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:13:42.523 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:13:42.526 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:13:42.527 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:13:42.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:13:42.549 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:13:42.549 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:13:42.549 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:13:42.552 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:42.552 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:13:42.553 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:13:42.553 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:13:42.553 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:13:42.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:13:42.585 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:13:42.586 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:13:42.586 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:42.586 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:42.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:13:42.643 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:42.645 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:13:42.645 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:13:42.663 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:13:42.663 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:13:42.664 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:13:42.665 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:42.665 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:13:42.665 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:13:42.665 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:13:42.665 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:13:42.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:13:42.720 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:13:42.720 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:13:42.720 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:42.720 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:42.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:13:42.762 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:42.764 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:13:42.764 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:13:42.779 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:13:42.779 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:13:42.779 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:13:42.780 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:42.781 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:13:42.781 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:13:42.781 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:13:42.781 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:13:42.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:13:42.816 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:13:42.816 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-09 03:13:42.816 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:42.816 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:42.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:13:42.903 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:42.904 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:13:42.904 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:13:42.905 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:13:42.923 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:13:42.924 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:13:42.924 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:13:42.925 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:42.925 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:13:42.925 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:13:42.925 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:13:42.925 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:13:42.954 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:13:42.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:13:42.959 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:13:42.959 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-09 03:13:42.959 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:42.959 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:42.996 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:13:42.996 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:13:42.998 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:13:43.001 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:13:43.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:13:43.023 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:43.025 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:13:43.026 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:13:43.026 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:13:43.044 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:13:43.044 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:13:43.044 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:13:43.046 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:43.046 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:13:43.046 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:13:43.046 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:13:43.046 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:13:43.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:13:43.098 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:13:43.098 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:13:43.099 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:43.099 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:43.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:13:43.183 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:43.185 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:13:43.185 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:13:43.204 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:13:43.204 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:13:43.204 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:13:43.206 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:43.206 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:13:43.206 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:13:43.206 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:13:43.206 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:13:43.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:13:43.243 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:13:43.243 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:13:43.244 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:43.244 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:43.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:13:43.419 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:43.421 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:13:43.421 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:13:43.429 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:13:43.440 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:13:43.441 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:13:43.441 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:13:43.442 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:43.442 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:13:43.442 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:13:43.442 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:13:43.442 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:13:43.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:13:43.483 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:13:43.483 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 03:13:43.483 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:43.484 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:43.906 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:13:43.997 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:13:43.997 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:13:43.999 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:13:44.002 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:13:44.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:13:44.064 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:44.066 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:13:44.066 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:13:44.066 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:13:44.086 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:13:44.086 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:13:44.086 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:13:44.087 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:44.087 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:13:44.087 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:13:44.087 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:13:44.087 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:13:44.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:13:44.149 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:13:44.150 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 03:13:44.150 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:44.150 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:44.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:13:44.298 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:44.300 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:13:44.300 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:13:44.300 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:13:44.310 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:13:44.311 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:13:44.311 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:13:44.311 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:13:44.317 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:13:44.318 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:13:44.318 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:13:44.318 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:13:44.318 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:13:44.318 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:13:44.318 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:13:44.318 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=497 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:13:44.319 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=497 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:13:49.315 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:13:49.315 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:13:49.317 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:13:49.317 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:13:49.318 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:13:49.318 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:13:49.326 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:13:49.327 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:13:49.327 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:13:49.327 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:13:49.327 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:13:49.329 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:13:49.329 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:13:49.329 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:13:49.329 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:13:49.330 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:13:49.330 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:13:49.330 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:13:49.330 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:13:49.331 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:13:49.331 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:13:49.331 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:13:49.331 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:13:49.332 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:13:49.332 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:13:49.332 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:13:49.332 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:13:49.333 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:13:49.333 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:13:49.334 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:13:49.334 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:13:49.334 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:13:49.334 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:13:49.334 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:13:49.334 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:13:49.336 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:13:49.336 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:13:49.336 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:13:49.336 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:13:49.336 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:13:49.336 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:13:49.336 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:13:49.337 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:13:49.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:13:49.337 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:13:49.337 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:13:49.337 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:13:49.337 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:13:49.337 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:13:49.337 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:13:49.337 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:13:49.337 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:13:49.337 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:13:49.337 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:13:49.337 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:13:49.337 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:13:49.337 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:13:49.337 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:13:49.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:13:49.337 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:13:49.337 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:13:49.337 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:13:49.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:13:49.337 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:13:49.337 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:13:49.337 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:13:49.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:13:49.337 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:13:49.338 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:13:49.338 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:13:49.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:13:49.338 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:13:49.338 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:13:49.338 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:13:49.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:13:49.338 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:13:49.338 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:13:49.338 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:13:49.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:13:49.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:13:49.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:13:49.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:13:49.342 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:13:49.824 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:13:49.861 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:13:49.863 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:13:49.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:13:49.867 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:13:49.885 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:13:49.885 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:13:49.885 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:13:49.888 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:49.888 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:13:49.888 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:13:49.888 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:13:49.888 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:13:49.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:13:49.926 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:13:49.927 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:13:49.927 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:49.927 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:50.301 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:13:50.339 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:13:50.340 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:13:50.340 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:13:50.343 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:13:50.779 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:13:50.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:13:50.803 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:50.805 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:13:50.805 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:13:50.825 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:13:50.825 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:13:50.825 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:13:50.826 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:50.826 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:13:50.826 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:13:50.826 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:13:50.826 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:13:50.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:13:50.882 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:13:50.883 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:13:50.883 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:50.883 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:51.257 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:13:51.340 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:13:51.340 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:13:51.341 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:13:51.344 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:13:51.735 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:13:51.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:13:51.778 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:51.780 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:13:51.780 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:13:51.799 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:13:51.799 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:13:51.799 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:13:51.801 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:51.801 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:13:51.801 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:13:51.801 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:13:51.801 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:13:51.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:13:51.834 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:13:51.834 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-09 03:13:51.834 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:51.834 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:52.213 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 03:13:52.341 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:13:52.342 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:13:52.342 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:13:52.346 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:13:52.692 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 03:13:52.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:13:52.993 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:52.995 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:13:52.996 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:13:52.996 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:13:53.015 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:13:53.015 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:13:53.015 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:13:53.016 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:53.016 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:13:53.016 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:13:53.016 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:13:53.016 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:13:53.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:13:53.071 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:13:53.072 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-09 03:13:53.072 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:53.072 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:53.170 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 03:13:53.343 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:13:53.343 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:13:53.343 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:13:53.346 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:13:53.648 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 03:13:53.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:13:53.971 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:53.973 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:13:53.973 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:13:53.973 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:13:53.993 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:13:53.993 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:13:53.993 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:13:53.994 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:53.994 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:13:53.994 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:13:53.995 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:13:53.995 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:13:54.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:13:54.031 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:13:54.032 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:13:54.032 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:54.033 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:54.126 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 03:13:54.344 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:13:54.344 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:13:54.344 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:13:54.347 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:13:54.604 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 03:13:54.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:13:54.648 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:54.650 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:13:54.650 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:13:54.667 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:13:54.667 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:13:54.667 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:13:54.668 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:54.668 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:13:54.668 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:13:54.668 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:13:54.668 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:13:54.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:13:54.703 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:13:54.703 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:13:54.703 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:54.703 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:55.081 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 03:13:55.560 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 03:13:55.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:13:55.601 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:55.603 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:13:55.603 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:13:55.621 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:13:55.622 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:13:55.622 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:13:55.623 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:55.623 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:13:55.623 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:13:55.623 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:13:55.623 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:13:55.655 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:13:55.660 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:13:55.660 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 03:13:55.661 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:55.661 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:56.038 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 03:13:56.516 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 03:13:56.995 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 03:13:57.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:13:57.453 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:57.455 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:13:57.455 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:13:57.455 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:13:57.474 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 03:13:57.475 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:13:57.475 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:13:57.475 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:13:57.476 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:57.476 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:13:57.476 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:13:57.476 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:13:57.476 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:13:57.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:13:57.528 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:13:57.528 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 03:13:57.529 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:57.529 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:57.952 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 03:13:58.430 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 03:13:58.909 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 03:13:59.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:13:59.367 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:13:59.369 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:13:59.369 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:13:59.369 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:13:59.383 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:13:59.383 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:13:59.383 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:13:59.383 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:13:59.387 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 03:13:59.389 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:13:59.389 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:13:59.389 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:13:59.389 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:13:59.389 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:13:59.389 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:13:59.389 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:13:59.390 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2145 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:13:59.390 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2145 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:14:04.386 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:14:04.386 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:14:04.388 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:14:04.388 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:14:04.388 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:14:04.389 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:14:04.398 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:14:04.399 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:14:04.399 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:14:04.400 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:14:04.400 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:14:04.403 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:14:04.404 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:14:04.404 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:14:04.404 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:14:04.404 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:14:04.404 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:14:04.404 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:14:04.404 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:14:04.406 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:14:04.406 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:14:04.406 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:14:04.407 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:14:04.407 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:14:04.407 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:14:04.407 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:14:04.407 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:14:04.409 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:14:04.409 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:14:04.409 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:14:04.409 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:14:04.409 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:14:04.409 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:14:04.409 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:14:04.409 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:14:04.412 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:14:04.412 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:14:04.412 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:14:04.412 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:14:04.412 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:14:04.412 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:14:04.412 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:14:04.412 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:14:04.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:14:04.412 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:14:04.412 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:14:04.412 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:14:04.412 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:14:04.412 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:14:04.412 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:14:04.412 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:14:04.412 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:14:04.412 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:14:04.412 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:14:04.412 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:14:04.413 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:14:04.413 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:14:04.413 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:14:04.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:14:04.413 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:14:04.413 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:14:04.413 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:14:04.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:14:04.413 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:14:04.413 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:14:04.413 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:14:04.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:14:04.413 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:14:04.413 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:14:04.413 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:14:04.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:14:04.413 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:14:04.413 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:14:04.413 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:14:04.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:14:04.413 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:14:04.413 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:14:04.413 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:14:04.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:14:04.414 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:14:04.414 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:14:04.414 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:14:04.417 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:14:04.900 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:14:04.937 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:14:04.938 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:14:04.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:14:04.939 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:14:04.954 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:14:04.954 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:14:04.955 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:14:04.959 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:04.959 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:14:04.960 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:14:04.960 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:14:04.961 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:14:04.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:14:05.003 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:14:05.004 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:14:05.004 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:05.004 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:05.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:14:05.104 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:05.105 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:14:05.105 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:14:05.122 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:14:05.122 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:14:05.122 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:14:05.123 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:05.123 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:14:05.123 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:14:05.123 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:14:05.123 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:14:05.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:14:05.135 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:14:05.135 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-09 03:14:05.135 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:05.135 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:05.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:14:05.284 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:05.285 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:14:05.285 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:14:05.285 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:14:05.304 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:14:05.304 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:14:05.304 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:14:05.305 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:05.305 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:14:05.305 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:14:05.305 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:14:05.306 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:14:05.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:14:05.323 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:14:05.323 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:14:05.324 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:05.324 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:05.377 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:14:05.415 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:14:05.416 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:14:05.416 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:14:05.418 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:14:05.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:14:05.607 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:05.608 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:14:05.608 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:14:05.625 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:14:05.625 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:14:05.625 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:14:05.626 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:05.626 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:14:05.626 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:14:05.626 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:14:05.626 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:14:05.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:14:05.665 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:14:05.666 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 03:14:05.666 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:05.667 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:05.855 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:14:06.333 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:14:06.416 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:14:06.416 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:14:06.416 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:14:06.420 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:14:06.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:14:06.491 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:06.493 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:14:06.493 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:14:06.493 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:14:06.505 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:14:06.505 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:14:06.505 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:14:06.505 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:14:06.507 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:14:06.507 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:14:06.507 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:14:06.507 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:14:06.507 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:14:06.507 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:14:06.507 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:14:06.507 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=447 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:14:06.507 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=447 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:14:06.507 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=447 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:14:06.507 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=447 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:14:06.507 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=447 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:14:06.507 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=447 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:14:06.507 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=447 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:14:11.510 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:14:11.510 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:14:11.513 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:14:11.513 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:14:11.513 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:14:11.513 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:14:11.522 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:14:11.524 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:14:11.524 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:14:11.525 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:14:11.525 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:14:11.529 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:14:11.529 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:14:11.530 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:14:11.530 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:14:11.530 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:14:11.531 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:14:11.531 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:14:11.531 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:14:11.533 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:14:11.533 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:14:11.533 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:14:11.534 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:14:11.534 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:14:11.534 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:14:11.534 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:14:11.534 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:14:11.536 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:14:11.536 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:14:11.536 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:14:11.536 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:14:11.536 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:14:11.537 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:14:11.537 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:14:11.537 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:14:11.539 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:14:11.539 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:14:11.539 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:14:11.539 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:14:11.539 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:14:11.540 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:14:11.540 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:14:11.540 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:14:11.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:14:11.540 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:14:11.540 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:14:11.540 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:14:11.540 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:14:11.540 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:14:11.540 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:14:11.540 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:14:11.540 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:14:11.540 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:14:11.540 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:14:11.540 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:14:11.540 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:14:11.540 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:14:11.540 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:14:11.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:14:11.541 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:14:11.541 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:14:11.541 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:14:11.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:14:11.541 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:14:11.541 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:14:11.541 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:14:11.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:14:11.541 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:14:11.541 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:14:11.541 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:14:11.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:14:11.541 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:14:11.541 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:14:11.541 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:14:11.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:14:11.541 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:14:11.541 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:14:11.541 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:14:11.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:14:11.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:14:11.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:14:11.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:14:11.545 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:14:12.029 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:14:12.066 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:14:12.068 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:14:12.069 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:14:12.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:14:12.088 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:14:12.088 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:14:12.088 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:14:12.093 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:12.093 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:14:12.094 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:14:12.094 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:14:12.094 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:14:12.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:14:12.133 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:14:12.133 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:14:12.133 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:12.133 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:12.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:14:12.252 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:12.255 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:14:12.255 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:14:12.271 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:14:12.271 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:14:12.272 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:14:12.273 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:12.273 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:14:12.273 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:14:12.273 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:14:12.274 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:14:12.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:14:12.322 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:14:12.322 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-09 03:14:12.323 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:12.323 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:12.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:14:12.491 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:12.492 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:14:12.492 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:14:12.492 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:14:12.502 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:14:12.512 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:14:12.512 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:14:12.512 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:14:12.513 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:12.513 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:14:12.513 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:14:12.513 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:14:12.513 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:14:12.543 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:14:12.543 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:14:12.543 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:14:12.545 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:14:12.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:14:12.555 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:14:12.555 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:14:12.555 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:12.555 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:12.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:14:12.729 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:12.730 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:14:12.731 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:14:12.743 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:14:12.743 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:14:12.743 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:14:12.745 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:12.745 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:14:12.745 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:14:12.745 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:14:12.745 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:14:12.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:14:12.794 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:14:12.794 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 03:14:12.794 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:12.794 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:12.972 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:14:13.447 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:14:13.545 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:14:13.545 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:14:13.545 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:14:13.545 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:14:13.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:14:13.606 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:13.607 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:14:13.607 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:14:13.607 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:14:13.617 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:14:13.617 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:14:13.617 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:14:13.618 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:14:13.620 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:14:13.620 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:14:13.620 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:14:13.620 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:14:13.620 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:14:13.620 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:14:13.620 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:14:13.620 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=446 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:14:13.620 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=446 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:14:13.620 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=446 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:14:13.620 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=446 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:14:13.620 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=446 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:14:13.620 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=446 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:14:13.620 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=446 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:14:13.620 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=446 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:14:13.620 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=447 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:14:13.620 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=447 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:14:13.620 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=447 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:14:13.620 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=447 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:14:13.620 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=447 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:14:18.621 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:14:18.622 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:14:18.624 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:14:18.624 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:14:18.624 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:14:18.624 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:14:18.634 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:14:18.636 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:14:18.636 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:14:18.637 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:14:18.637 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:14:18.641 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:14:18.641 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:14:18.642 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:14:18.642 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:14:18.642 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:14:18.643 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:14:18.643 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:14:18.643 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:14:18.645 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:14:18.645 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:14:18.646 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:14:18.646 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:14:18.646 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:14:18.646 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:14:18.647 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:14:18.647 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:14:18.649 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:14:18.649 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:14:18.649 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:14:18.649 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:14:18.649 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:14:18.649 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:14:18.649 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:14:18.649 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:14:18.653 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:14:18.653 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:14:18.653 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:14:18.653 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:14:18.653 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:14:18.653 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:14:18.653 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:14:18.654 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:14:18.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:14:18.654 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:14:18.654 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:14:18.654 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:14:18.654 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:14:18.654 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:14:18.654 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:14:18.654 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:14:18.654 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:14:18.654 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:14:18.654 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:14:18.654 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:14:18.654 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:14:18.654 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:14:18.654 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:14:18.655 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:14:18.655 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:14:18.655 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:14:18.655 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:14:18.655 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:14:18.655 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:14:18.655 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:14:18.655 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:14:18.655 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:14:18.655 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:14:18.655 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:14:18.655 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:14:18.655 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:14:18.655 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:14:18.655 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:14:18.655 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:14:18.655 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:14:18.655 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:14:18.655 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:14:18.655 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:14:18.655 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:14:18.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:14:18.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:14:18.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:14:18.659 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:14:19.143 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:14:19.183 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:14:19.184 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:14:19.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:14:19.186 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:14:19.211 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:14:19.212 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:14:19.212 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:14:19.215 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:19.215 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:14:19.215 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:14:19.216 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:14:19.216 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:14:19.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:14:19.243 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:14:19.244 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:14:19.244 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:19.244 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:19.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:14:19.347 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:19.349 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:14:19.349 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:14:19.365 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:14:19.365 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:14:19.365 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:14:19.366 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:19.366 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:14:19.366 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:14:19.366 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:14:19.366 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:14:19.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:14:19.377 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:14:19.377 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-09 03:14:19.377 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:19.377 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:19.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:14:19.527 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:19.529 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:14:19.529 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:14:19.529 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:14:19.547 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:14:19.547 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:14:19.547 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:14:19.548 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:19.549 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:14:19.549 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:14:19.549 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:14:19.549 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:14:19.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:14:19.565 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:14:19.565 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:14:19.565 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:19.565 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:19.618 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:14:19.658 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:14:19.658 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:14:19.659 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:14:19.662 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:14:19.840 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:14:19.843 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:19.844 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:14:19.844 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:14:19.853 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:14:19.853 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:14:19.853 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:14:19.854 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:19.854 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:14:19.854 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:14:19.854 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:14:19.854 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:14:19.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:14:19.905 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:14:19.905 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 03:14:19.905 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:19.905 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:20.088 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:14:20.557 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:14:20.659 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:14:20.659 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:14:20.660 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:14:20.663 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:14:20.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:14:20.714 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:20.716 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:14:20.716 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:14:20.716 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:14:20.726 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:14:20.726 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:14:20.726 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:14:20.726 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:14:20.728 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:14:20.728 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:14:20.728 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:14:20.728 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:14:20.728 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:14:20.728 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:14:20.728 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:14:20.728 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=447 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:14:20.728 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=447 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:14:20.728 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=447 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:14:20.728 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=447 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:14:20.728 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=447 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:14:20.728 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=447 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:14:20.728 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=447 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:14:20.728 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=447 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:14:25.729 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:14:25.729 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:14:25.731 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:14:25.731 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:14:25.732 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:14:25.732 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:14:25.740 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:14:25.741 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:14:25.741 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:14:25.741 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:14:25.742 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:14:25.745 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:14:25.745 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:14:25.745 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:14:25.745 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:14:25.745 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:14:25.745 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:14:25.745 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:14:25.745 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:14:25.748 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:14:25.748 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:14:25.748 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:14:25.748 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:14:25.748 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:14:25.748 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:14:25.748 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:14:25.748 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:14:25.750 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:14:25.750 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:14:25.750 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:14:25.750 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:14:25.750 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:14:25.750 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:14:25.750 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:14:25.750 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:14:25.753 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:14:25.753 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:14:25.753 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:14:25.753 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:14:25.753 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:14:25.753 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:14:25.753 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:14:25.753 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:14:25.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:14:25.754 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:14:25.754 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:14:25.754 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:14:25.754 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:14:25.754 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:14:25.754 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:14:25.754 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:14:25.754 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:14:25.754 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:14:25.754 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:14:25.754 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:14:25.754 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:14:25.754 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:14:25.754 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:14:25.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:14:25.754 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:14:25.754 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:14:25.754 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:14:25.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:14:25.754 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:14:25.754 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:14:25.754 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:14:25.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:14:25.754 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:14:25.754 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:14:25.755 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:14:25.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:14:25.755 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:14:25.755 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:14:25.755 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:14:25.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:14:25.755 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:14:25.755 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:14:25.755 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:14:25.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:14:25.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:14:25.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:14:25.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:14:25.759 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:14:26.243 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:14:26.286 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:14:26.289 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:14:26.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:14:26.291 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:14:26.315 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:14:26.315 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:14:26.316 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:14:26.320 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:26.320 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:14:26.321 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:14:26.321 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:14:26.322 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:14:26.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:14:26.347 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:14:26.348 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:14:26.348 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:26.348 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:26.462 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:14:26.464 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:26.466 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:14:26.466 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:14:26.483 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:14:26.483 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:14:26.483 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:14:26.484 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:26.484 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:14:26.484 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:14:26.484 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:14:26.484 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:14:26.529 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:14:26.535 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:14:26.535 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-09 03:14:26.536 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:26.536 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:26.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:14:26.705 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:26.708 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:14:26.708 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:14:26.708 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:14:26.720 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:14:26.727 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:14:26.727 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:14:26.727 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:14:26.728 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:26.728 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:14:26.729 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:14:26.729 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:14:26.729 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:14:26.756 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:14:26.757 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:14:26.757 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:14:26.761 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:14:26.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:14:26.776 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:14:26.777 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:14:26.777 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:26.777 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:26.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:14:26.950 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:26.952 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:14:26.952 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:14:26.969 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:14:26.969 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:14:26.969 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:14:26.971 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:26.971 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:14:26.971 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:14:26.971 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:14:26.971 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:14:27.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:14:27.012 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:14:27.012 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 03:14:27.012 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:27.013 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:27.197 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:14:27.675 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:14:27.757 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:14:27.759 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:14:27.759 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:14:27.762 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:14:27.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:14:27.834 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:27.835 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:14:27.835 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:14:27.835 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:14:27.846 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:14:27.846 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:14:27.846 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:14:27.846 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:14:27.852 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:14:27.852 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:14:27.852 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:14:27.852 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:14:27.852 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:14:27.853 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:14:27.853 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:14:27.853 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=446 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:14:27.853 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=446 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:14:32.847 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:14:32.847 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:14:32.847 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:14:32.848 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:14:32.848 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:14:32.849 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:14:32.853 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:14:32.853 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:14:32.854 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:14:32.854 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:14:32.854 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:14:32.855 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:14:32.855 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:14:32.855 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:14:32.855 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:14:32.855 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:14:32.855 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:14:32.855 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:14:32.855 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:14:32.856 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:14:32.856 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:14:32.856 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:14:32.856 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:14:32.856 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:14:32.856 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:14:32.856 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:14:32.856 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:14:32.857 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:14:32.857 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:14:32.857 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:14:32.857 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:14:32.857 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:14:32.857 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:14:32.857 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:14:32.857 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:14:32.859 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:14:32.859 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:14:32.859 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:14:32.859 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:14:32.859 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:14:32.859 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:14:32.859 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:14:32.859 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:14:32.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:14:32.859 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:14:32.859 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:14:32.859 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:14:32.859 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:14:32.860 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:14:32.860 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:14:32.860 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:14:32.860 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:14:32.860 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:14:32.860 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:14:32.860 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:14:32.860 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:14:32.860 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:14:32.860 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:14:32.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:14:32.860 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:14:32.860 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:14:32.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:14:32.860 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:14:32.860 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:14:32.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:14:32.860 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:14:32.860 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:14:32.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:14:32.860 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:14:32.860 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:14:32.860 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:14:32.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:14:32.860 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:14:32.860 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:14:32.860 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:14:32.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:14:32.860 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:14:32.860 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:14:32.860 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:14:32.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:14:32.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:14:32.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:14:32.864 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:14:33.345 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:14:33.371 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:14:33.372 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:14:33.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:14:33.373 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:14:33.379 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:14:33.379 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:14:33.379 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:14:33.381 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:33.381 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:14:33.381 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:14:33.381 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:14:33.381 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:14:33.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:14:33.390 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:14:33.390 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:14:33.390 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:33.390 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:33.698 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:14:33.699 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:33.700 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:14:33.700 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:14:33.707 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:14:33.707 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:14:33.707 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:14:33.708 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:33.708 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:14:33.708 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:14:33.708 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:14:33.708 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:14:33.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:14:33.718 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:14:33.718 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-09 03:14:33.718 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:33.718 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:33.818 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:14:33.862 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:14:33.862 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:14:33.863 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:14:33.865 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:14:34.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:14:34.220 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:34.220 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:14:34.220 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:14:34.220 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:14:34.226 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:14:34.226 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:14:34.226 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:14:34.228 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:34.228 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:14:34.228 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:14:34.228 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:14:34.228 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:14:34.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:14:34.234 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:14:34.234 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:14:34.235 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:34.235 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:34.293 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:14:34.762 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:14:34.863 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:14:34.863 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:14:34.864 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:14:34.865 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:14:35.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:14:35.154 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:35.156 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:14:35.156 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:14:35.175 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:14:35.175 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:14:35.175 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:14:35.177 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:35.177 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:14:35.177 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:14:35.177 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:14:35.177 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:14:35.228 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:14:35.229 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:14:35.229 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 03:14:35.229 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:35.229 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:35.237 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:14:35.711 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 03:14:35.863 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:14:35.864 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:14:35.865 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:14:35.866 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:14:36.186 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 03:14:36.661 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 03:14:36.864 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:14:36.864 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:14:36.866 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:14:36.867 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:14:37.133 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 03:14:37.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:14:37.447 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:37.448 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:14:37.448 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:14:37.448 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:14:37.450 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:14:37.450 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:14:37.450 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:14:37.450 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:14:37.451 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:14:37.451 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:14:37.451 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:14:37.451 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:14:37.451 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:14:37.451 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:14:37.451 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:14:37.451 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=989 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:14:37.451 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=989 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:14:37.451 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=989 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:14:37.451 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=989 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:14:37.451 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=989 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:14:37.451 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=989 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:14:37.451 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=989 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:14:42.455 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:14:42.455 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:14:42.456 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:14:42.457 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:14:42.457 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:14:42.458 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:14:42.466 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:14:42.467 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:14:42.467 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:14:42.468 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:14:42.468 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:14:42.470 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:14:42.470 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:14:42.471 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:14:42.471 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:14:42.471 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:14:42.471 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:14:42.472 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:14:42.472 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:14:42.473 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:14:42.473 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:14:42.473 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:14:42.473 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:14:42.473 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:14:42.473 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:14:42.474 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:14:42.474 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:14:42.475 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:14:42.476 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:14:42.476 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:14:42.476 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:14:42.476 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:14:42.476 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:14:42.476 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:14:42.476 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:14:42.479 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:14:42.479 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:14:42.479 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:14:42.479 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:14:42.479 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:14:42.479 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:14:42.479 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:14:42.479 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:14:42.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:14:42.479 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:14:42.479 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:14:42.479 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:14:42.479 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:14:42.479 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:14:42.480 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:14:42.480 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:14:42.480 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:14:42.480 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:14:42.480 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:14:42.480 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:14:42.480 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:14:42.480 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:14:42.480 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:14:42.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:14:42.480 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:14:42.480 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:14:42.480 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:14:42.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:14:42.480 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:14:42.480 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:14:42.480 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:14:42.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:14:42.480 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:14:42.480 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:14:42.481 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:14:42.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:14:42.481 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:14:42.481 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:14:42.481 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:14:42.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:14:42.481 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:14:42.481 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:14:42.481 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:14:42.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:14:42.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:14:42.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:14:42.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:14:42.485 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:14:42.962 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:14:42.996 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:14:42.997 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:14:42.997 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:14:42.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:14:43.003 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:14:43.003 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:14:43.003 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:14:43.005 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:43.005 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:14:43.005 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:14:43.005 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:14:43.005 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:14:43.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:14:43.054 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:14:43.054 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:14:43.054 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:43.054 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:43.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:14:43.362 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:43.364 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:14:43.364 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:14:43.382 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:14:43.382 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:14:43.382 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:14:43.384 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:43.384 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:14:43.384 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:14:43.384 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:14:43.384 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:14:43.431 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:14:43.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:14:43.438 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:14:43.438 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-09 03:14:43.439 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:43.439 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:43.483 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:14:43.483 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:14:43.483 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:14:43.484 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:14:43.901 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:14:43.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:14:43.915 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:43.917 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:14:43.917 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:14:43.917 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:14:43.935 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:14:43.935 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:14:43.936 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:14:43.938 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:43.938 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:14:43.938 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:14:43.938 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:14:43.938 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:14:43.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:14:43.944 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:14:43.944 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:14:43.944 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:43.944 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:44.374 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:14:44.484 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:14:44.484 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:14:44.484 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:14:44.484 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:14:44.848 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:14:45.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:14:45.003 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:45.004 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:14:45.004 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:14:45.010 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:14:45.011 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:14:45.011 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:14:45.012 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:45.012 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:14:45.012 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:14:45.012 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:14:45.012 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:14:45.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:14:45.032 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:14:45.032 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 03:14:45.032 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:45.032 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:45.318 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 03:14:45.485 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:14:45.485 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:14:45.485 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:14:45.485 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:14:45.790 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 03:14:46.260 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 03:14:46.486 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:14:46.486 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:14:46.486 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:14:46.486 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:14:46.728 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 03:14:47.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:14:47.043 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:47.043 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:14:47.043 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:14:47.043 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:14:47.045 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:14:47.046 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:14:47.046 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:14:47.046 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:14:47.047 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:14:47.047 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:14:47.047 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:14:47.047 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:14:47.047 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:14:47.047 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:14:47.047 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:14:47.047 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=989 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:14:47.047 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=989 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:14:47.047 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=989 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:14:47.047 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=989 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:14:47.047 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=989 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:14:47.047 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=989 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:14:47.047 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=989 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:14:47.047 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=989 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:14:52.050 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:14:52.050 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:14:52.053 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:14:52.053 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:14:52.053 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:14:52.053 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:14:52.062 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:14:52.063 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:14:52.064 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:14:52.064 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:14:52.064 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:14:52.068 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:14:52.069 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:14:52.069 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:14:52.069 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:14:52.070 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:14:52.070 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:14:52.070 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:14:52.070 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:14:52.072 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:14:52.072 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:14:52.073 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:14:52.073 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:14:52.073 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:14:52.073 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:14:52.074 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:14:52.074 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:14:52.075 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:14:52.075 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:14:52.075 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:14:52.075 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:14:52.075 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:14:52.075 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:14:52.076 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:14:52.076 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:14:52.078 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:14:52.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:14:52.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:14:52.079 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:14:52.079 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:14:52.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:14:52.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:14:52.079 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:14:52.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:14:52.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:14:52.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:14:52.079 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:14:52.079 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:14:52.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:14:52.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:14:52.079 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:14:52.079 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:14:52.079 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:14:52.079 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:14:52.079 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:14:52.080 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:14:52.080 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:14:52.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:14:52.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:14:52.080 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:14:52.080 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:14:52.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:14:52.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:14:52.080 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:14:52.080 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:14:52.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:14:52.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:14:52.080 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:14:52.080 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:14:52.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:14:52.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:14:52.080 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:14:52.080 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:14:52.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:14:52.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:14:52.080 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:14:52.080 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:14:52.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:14:52.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:14:52.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:14:52.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:14:52.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:14:52.084 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:14:52.562 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:14:52.605 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:14:52.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:14:52.606 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:14:52.607 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:14:52.614 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:14:52.614 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:14:52.614 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:14:52.616 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:52.616 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:14:52.616 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:14:52.616 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:14:52.616 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:14:52.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:14:52.654 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:14:52.654 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:14:52.654 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:52.654 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:52.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:14:52.973 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:52.974 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:14:52.974 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:14:52.985 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:14:52.985 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:14:52.986 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:14:52.987 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:52.987 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:14:52.987 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:14:52.987 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:14:52.987 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:14:53.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:14:53.033 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:14:53.033 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-09 03:14:53.033 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:53.033 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:53.035 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:14:53.082 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:14:53.083 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:14:53.083 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:14:53.085 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:14:53.505 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:14:53.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:14:53.515 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:53.515 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:14:53.515 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:14:53.515 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:14:53.522 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:14:53.522 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:14:53.522 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:14:53.524 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:53.524 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:14:53.524 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:14:53.524 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:14:53.524 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:14:53.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:14:53.549 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:14:53.549 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:14:53.549 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:53.549 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:53.974 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:14:54.082 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:14:54.083 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:14:54.084 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:14:54.086 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:14:54.444 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:14:54.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:14:54.600 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:54.601 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:14:54.601 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:14:54.620 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:14:54.620 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:14:54.620 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:14:54.622 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:54.622 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:14:54.622 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:14:54.622 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:14:54.622 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:14:54.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:14:54.682 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:14:54.682 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 03:14:54.682 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:54.682 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:54.922 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 03:14:55.083 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:14:55.084 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:14:55.084 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:14:55.086 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:14:55.397 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 03:14:55.873 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 03:14:56.083 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:14:56.084 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:14:56.085 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:14:56.087 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:14:56.349 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 03:14:56.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:14:56.672 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:14:56.675 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:14:56.675 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:14:56.675 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:14:56.685 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:14:56.686 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:14:56.686 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:14:56.686 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:14:56.688 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:14:56.688 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:14:56.688 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:14:56.688 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:14:56.688 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:14:56.688 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:14:56.688 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:14:56.688 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=993 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:14:56.688 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=993 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:14:56.688 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=993 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:14:56.688 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=993 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:14:56.688 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=993 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:14:56.688 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=993 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:14:56.688 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=993 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:14:56.688 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=993 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:15:01.689 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:15:01.689 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:15:01.691 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:15:01.691 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:15:01.691 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:15:01.692 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:15:01.702 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:15:01.703 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:15:01.703 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:15:01.703 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:15:01.703 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:15:01.706 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:15:01.707 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:15:01.707 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:15:01.707 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:15:01.707 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:15:01.707 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:15:01.708 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:15:01.708 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:15:01.709 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:15:01.709 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:15:01.709 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:15:01.709 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:15:01.710 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:15:01.710 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:15:01.710 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:15:01.710 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:15:01.712 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:15:01.712 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:15:01.712 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:15:01.712 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:15:01.712 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:15:01.712 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:15:01.712 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:15:01.712 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:15:01.714 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:15:01.714 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:15:01.714 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:15:01.715 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:15:01.715 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:15:01.715 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:15:01.715 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:15:01.715 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:15:01.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:15:01.715 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:15:01.715 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:15:01.715 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:15:01.715 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:15:01.715 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:15:01.715 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:15:01.715 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:15:01.715 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:15:01.715 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:15:01.715 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:15:01.715 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:15:01.715 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:15:01.715 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:15:01.715 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:15:01.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:15:01.716 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:15:01.716 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:15:01.716 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:15:01.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:15:01.716 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:15:01.716 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:15:01.716 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:15:01.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:15:01.716 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:15:01.716 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:15:01.716 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:15:01.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:15:01.716 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:15:01.716 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:15:01.716 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:15:01.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:15:01.716 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:15:01.716 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:15:01.716 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:15:01.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:15:01.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:15:01.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:15:01.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:15:01.720 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:15:02.203 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:15:02.250 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:15:02.253 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:15:02.255 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:15:02.255 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:15:02.278 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:15:02.278 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:15:02.278 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:15:02.283 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:02.284 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:15:02.284 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:15:02.284 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:15:02.284 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:15:02.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:15:02.305 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:15:02.305 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:15:02.305 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:02.305 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:02.618 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:15:02.621 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:02.623 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:15:02.623 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:15:02.642 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:15:02.642 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:15:02.642 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:15:02.644 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:02.644 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:15:02.644 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:15:02.644 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:15:02.644 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:15:02.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:15:02.681 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:15:02.683 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:15:02.683 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-09 03:15:02.683 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:02.684 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:02.718 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:15:02.719 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:15:02.719 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:15:02.724 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:15:03.160 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:15:03.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:15:03.177 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:03.179 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:15:03.180 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:15:03.180 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:15:03.199 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:15:03.199 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:15:03.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:15:03.201 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:03.201 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:15:03.201 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:15:03.202 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:15:03.202 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:15:03.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:15:03.205 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:15:03.205 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:15:03.205 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:03.205 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:03.637 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:15:03.719 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:15:03.720 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:15:03.720 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:15:03.725 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:15:04.116 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:15:04.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:15:04.275 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:04.276 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:15:04.276 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:15:04.292 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:15:04.292 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:15:04.292 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:15:04.294 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:04.294 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:15:04.294 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:15:04.294 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:15:04.294 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:15:04.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:15:04.298 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:15:04.298 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 03:15:04.298 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:04.298 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:04.588 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 03:15:04.720 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:15:04.720 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:15:04.720 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:15:04.726 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:15:05.058 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 03:15:05.534 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 03:15:05.722 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:15:05.722 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:15:05.722 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:15:05.727 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:15:06.013 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 03:15:06.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:15:06.334 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:06.336 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:15:06.336 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:15:06.336 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:15:06.340 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:15:06.341 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:15:06.341 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:15:06.341 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:15:06.341 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:15:06.342 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:15:06.342 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:15:06.342 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:15:06.342 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:15:06.342 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:15:06.342 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:15:06.342 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=991 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:15:06.342 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=991 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:15:06.342 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=991 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:15:06.342 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=991 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:15:06.342 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=991 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:15:06.342 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=991 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:15:06.342 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=991 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:15:11.345 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:15:11.345 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:15:11.348 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:15:11.348 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:15:11.348 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:15:11.348 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:15:11.357 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:15:11.359 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:15:11.359 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:15:11.359 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:15:11.359 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:15:11.363 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:15:11.363 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:15:11.364 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:15:11.364 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:15:11.364 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:15:11.365 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:15:11.365 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:15:11.365 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:15:11.367 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:15:11.367 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:15:11.367 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:15:11.367 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:15:11.367 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:15:11.367 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:15:11.367 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:15:11.367 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:15:11.369 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:15:11.369 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:15:11.370 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:15:11.370 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:15:11.370 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:15:11.370 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:15:11.370 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:15:11.370 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:15:11.373 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:15:11.373 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:15:11.373 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:15:11.373 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:15:11.373 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:15:11.373 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:15:11.373 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:15:11.373 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:15:11.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:15:11.373 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:15:11.373 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:15:11.373 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:15:11.373 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:15:11.373 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:15:11.373 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:15:11.373 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:15:11.373 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:15:11.373 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:15:11.373 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:15:11.374 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:15:11.374 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:15:11.374 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:15:11.374 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:15:11.374 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:15:11.374 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:15:11.374 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:15:11.374 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:15:11.374 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:15:11.374 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:15:11.374 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:15:11.374 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:15:11.374 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:15:11.374 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:15:11.374 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:15:11.374 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:15:11.374 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:15:11.374 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:15:11.374 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:15:11.374 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:15:11.374 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:15:11.374 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:15:11.374 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:15:11.375 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:15:11.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:15:11.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:15:11.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:15:11.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:15:11.378 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:15:11.863 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:15:11.908 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:15:11.909 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:15:11.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:15:11.911 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:15:11.933 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:15:11.933 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:15:11.934 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:15:11.948 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:15:11.948 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:15:11.948 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:15:11.948 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:15:11.954 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:15:11.954 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:15:11.954 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:15:11.954 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:15:11.954 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:15:11.954 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:15:11.954 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:15:11.954 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=122 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:15:11.955 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=122 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:15:16.955 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:15:16.955 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:15:16.955 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:15:16.955 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:15:16.955 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:15:16.955 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:15:16.963 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:15:16.965 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:15:16.965 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:15:16.965 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:15:16.965 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:15:16.969 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:15:16.969 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:15:16.970 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:15:16.970 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:15:16.970 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:15:16.970 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:15:16.971 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:15:16.971 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:15:16.973 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:15:16.974 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:15:16.974 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:15:16.974 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:15:16.974 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:15:16.974 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:15:16.975 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:15:16.975 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:15:16.977 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:15:16.977 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:15:16.977 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:15:16.977 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:15:16.978 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:15:16.978 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:15:16.978 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:15:16.978 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:15:16.982 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:15:16.982 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:15:16.982 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:15:16.982 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:15:16.982 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:15:16.982 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:15:16.982 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:15:16.982 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:15:16.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:15:16.982 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:15:16.982 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:15:16.982 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:15:16.983 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:15:16.983 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:15:16.983 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:15:16.983 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:15:16.983 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:15:16.983 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:15:16.983 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:15:16.983 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:15:16.983 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:15:16.983 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:15:16.983 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:15:16.983 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:15:16.983 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:15:16.983 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:15:16.983 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:15:16.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:15:16.984 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:15:16.984 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:15:16.984 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:15:16.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:15:16.984 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:15:16.984 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:15:16.984 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:15:16.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:15:16.984 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:15:16.984 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:15:16.984 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:15:16.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:15:16.984 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:15:16.984 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:15:16.984 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:15:16.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:15:16.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:15:16.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:15:16.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:15:16.988 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:15:17.472 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:15:17.510 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:15:17.512 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:15:17.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:15:17.514 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:15:17.539 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:15:17.540 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:15:17.540 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:15:17.564 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:15:17.564 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:15:17.564 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:15:17.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:15:17.570 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:15:17.570 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:15:17.570 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:15:17.570 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:15:17.572 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:15:17.572 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:15:17.572 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:15:17.572 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:15:17.572 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:15:17.572 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:15:17.572 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:15:17.572 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=125 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:15:17.573 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=125 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:15:17.573 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=125 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:15:17.573 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=125 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:15:17.573 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=125 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:15:17.573 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=125 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:15:17.573 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=125 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:15:17.573 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=125 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:15:22.574 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:15:22.574 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:15:22.576 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:15:22.576 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:15:22.577 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:15:22.577 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:15:22.586 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:15:22.587 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:15:22.587 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:15:22.587 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:15:22.587 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:15:22.589 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:15:22.589 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:15:22.589 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:15:22.589 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:15:22.589 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:15:22.590 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:15:22.590 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:15:22.590 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:15:22.591 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:15:22.591 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:15:22.592 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:15:22.592 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:15:22.592 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:15:22.592 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:15:22.592 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:15:22.592 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:15:22.593 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:15:22.594 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:15:22.594 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:15:22.594 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:15:22.594 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:15:22.594 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:15:22.594 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:15:22.594 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:15:22.596 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:15:22.596 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:15:22.596 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:15:22.596 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:15:22.596 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:15:22.596 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:15:22.596 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:15:22.596 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:15:22.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:15:22.597 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:15:22.597 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:15:22.597 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:15:22.597 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:15:22.597 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:15:22.597 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:15:22.597 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:15:22.597 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:15:22.597 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:15:22.597 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:15:22.597 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:15:22.597 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:15:22.597 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:15:22.597 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:15:22.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:15:22.597 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:15:22.597 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:15:22.597 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:15:22.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:15:22.597 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:15:22.597 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:15:22.597 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:15:22.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:15:22.597 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:15:22.597 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:15:22.597 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:15:22.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:15:22.597 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:15:22.597 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:15:22.597 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:15:22.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:15:22.597 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:15:22.598 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:15:22.598 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:15:22.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:15:22.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:15:22.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:15:22.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:15:22.602 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:15:23.085 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:15:23.122 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:15:23.124 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:15:23.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:15:23.127 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:15:23.148 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:15:23.148 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:15:23.148 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:15:23.164 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:15:23.164 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:15:23.164 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:15:23.164 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:15:23.168 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:15:23.168 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:15:23.168 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:15:23.168 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:15:23.168 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:15:23.168 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:15:23.168 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:15:23.168 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=121 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:15:23.168 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=121 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:15:23.168 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=121 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:15:23.168 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=121 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:15:23.168 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=121 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:15:23.168 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=121 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:15:28.168 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:15:28.168 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:15:28.170 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:15:28.170 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:15:28.171 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:15:28.171 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:15:28.181 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:15:28.182 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:15:28.182 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:15:28.182 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:15:28.182 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:15:28.184 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:15:28.185 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:15:28.185 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:15:28.185 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:15:28.185 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:15:28.186 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:15:28.186 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:15:28.186 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:15:28.187 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:15:28.187 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:15:28.187 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:15:28.188 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:15:28.188 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:15:28.188 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:15:28.188 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:15:28.188 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:15:28.190 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:15:28.190 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:15:28.190 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:15:28.190 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:15:28.190 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:15:28.190 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:15:28.190 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:15:28.190 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:15:28.193 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:15:28.193 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:15:28.193 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:15:28.193 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:15:28.193 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:15:28.193 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:15:28.193 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:15:28.193 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:15:28.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:15:28.193 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:15:28.193 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:15:28.193 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:15:28.193 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:15:28.193 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:15:28.193 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:15:28.193 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:15:28.193 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:15:28.193 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:15:28.193 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:15:28.193 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:15:28.193 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:15:28.193 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:15:28.193 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:15:28.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:15:28.194 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:15:28.194 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:15:28.194 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:15:28.194 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:15:28.194 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:15:28.194 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:15:28.194 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:15:28.194 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:15:28.194 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:15:28.194 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:15:28.194 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:15:28.194 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:15:28.194 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:15:28.195 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:15:28.195 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:15:28.195 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:15:28.195 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:15:28.195 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:15:28.195 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:15:28.195 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:15:28.195 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:15:28.195 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:15:28.195 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:15:28.195 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:15:28.195 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:15:28.195 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:15:28.195 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:15:28.195 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:15:28.195 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:15:28.195 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:15:33.199 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:15:33.199 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:15:33.201 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:15:33.201 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:15:33.201 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:15:33.202 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:15:33.210 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:15:33.210 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:15:33.210 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:15:33.210 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:15:33.210 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:15:33.211 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:15:33.211 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:15:33.211 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:15:33.211 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:15:33.211 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:15:33.211 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:15:33.211 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:15:33.211 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:15:33.212 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:15:33.212 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:15:33.212 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:15:33.212 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:15:33.212 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:15:33.212 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:15:33.212 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:15:33.212 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:15:33.213 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:15:33.213 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:15:33.214 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:15:33.214 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:15:33.214 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:15:33.214 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:15:33.214 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:15:33.214 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:15:33.216 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:15:33.216 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:15:33.216 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:15:33.216 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:15:33.216 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:15:33.216 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:15:33.216 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:15:33.216 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:15:33.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:15:33.216 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:15:33.216 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:15:33.216 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:15:33.216 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:15:33.216 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:15:33.216 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:15:33.216 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:15:33.216 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:15:33.216 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:15:33.216 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:15:33.217 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:15:33.217 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:15:33.217 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:15:33.217 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:15:33.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:15:33.217 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:15:33.217 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:15:33.217 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:15:33.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:15:33.217 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:15:33.217 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:15:33.217 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:15:33.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:15:33.217 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:15:33.217 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:15:33.217 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:15:33.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:15:33.217 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:15:33.217 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:15:33.217 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:15:33.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:15:33.217 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:15:33.217 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:15:33.217 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:15:33.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:15:33.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:15:33.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:15:33.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:15:33.221 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:15:33.706 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:15:33.742 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:15:33.744 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:15:33.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:15:33.747 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:15:33.771 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:15:33.771 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:15:33.772 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:15:33.776 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:33.777 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:15:33.778 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:15:33.778 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:15:33.778 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:15:33.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:15:33.809 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:15:33.810 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:15:33.810 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:33.810 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:34.184 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:15:34.220 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:15:34.220 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:15:34.220 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:15:34.224 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:15:34.662 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:15:34.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:15:34.774 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:34.775 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:15:34.775 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:15:34.784 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:15:34.784 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:15:34.784 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:15:34.785 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:34.785 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:15:34.786 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:15:34.786 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:15:34.786 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:15:34.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:15:34.801 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:15:34.802 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:15:34.802 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:34.803 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:35.140 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:15:35.221 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:15:35.221 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:15:35.221 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:15:35.224 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:15:35.617 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:15:35.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:15:35.749 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:35.750 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:15:35.750 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:15:35.762 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:15:35.762 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:15:35.762 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:15:35.763 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:35.763 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:15:35.763 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:15:35.763 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:15:35.763 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:15:35.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:15:35.805 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:15:35.805 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:15:35.806 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:35.806 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:36.095 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 03:15:36.222 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:15:36.223 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:15:36.223 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:15:36.225 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:15:36.573 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 03:15:36.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:15:36.731 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:36.732 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:15:36.733 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:15:36.742 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:15:36.742 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:15:36.742 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:15:36.743 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:36.743 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:15:36.743 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:15:36.743 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:15:36.743 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:15:36.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:15:36.758 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:15:36.758 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:15:36.758 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:36.759 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:37.050 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 03:15:37.224 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:15:37.224 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:15:37.224 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:15:37.226 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:15:37.528 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 03:15:37.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:15:37.706 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:37.707 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:15:37.707 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:15:37.727 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:15:37.727 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:15:37.727 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:15:37.728 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:37.728 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:15:37.729 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:15:37.729 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:15:37.729 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:15:37.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:15:37.774 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:15:37.775 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:15:37.775 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:37.776 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:38.006 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 03:15:38.225 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:15:38.225 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:15:38.225 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:15:38.227 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:15:38.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:15:38.328 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:38.328 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:15:38.328 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:15:38.348 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:15:38.348 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:15:38.349 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:15:38.350 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:38.350 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:15:38.350 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:15:38.350 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:15:38.350 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:15:38.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:15:38.378 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:15:38.378 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-01-09 03:15:38.378 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:38.378 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:38.481 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 03:15:38.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:15:38.926 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:38.926 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:15:38.927 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:15:38.927 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:15:38.948 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:15:38.948 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:15:38.948 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:15:38.949 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:38.949 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:15:38.949 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:15:38.949 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:15:38.949 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:15:38.951 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 03:15:38.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:15:39.001 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:15:39.001 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-01-09 03:15:39.001 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:39.002 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:39.424 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 03:15:39.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:15:39.556 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:39.557 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:15:39.557 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:15:39.557 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:15:39.577 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:15:39.577 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:15:39.577 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:15:39.578 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:39.578 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:15:39.579 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:15:39.579 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:15:39.579 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:15:39.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:15:39.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:15:39.617 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:15:39.618 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:15:39.619 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:39.620 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:39.902 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 03:15:40.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:15:40.218 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:40.219 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:15:40.219 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:15:40.233 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:15:40.233 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:15:40.233 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:15:40.234 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:40.235 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:15:40.235 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:15:40.235 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:15:40.235 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:15:40.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:15:40.284 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:15:40.284 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:15:40.284 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:40.284 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:40.379 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 03:15:40.857 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 03:15:40.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:15:40.874 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:40.874 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:15:40.874 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:15:40.893 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:15:40.893 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:15:40.893 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:15:40.894 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:40.894 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:15:40.894 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:15:40.894 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:15:40.894 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:15:40.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:15:40.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:15:40.902 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:15:40.902 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:15:40.902 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:40.902 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:41.334 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 03:15:41.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:15:41.463 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:41.463 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:15:41.464 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:15:41.483 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:15:41.483 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:15:41.483 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:15:41.484 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:41.485 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:15:41.485 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:15:41.485 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:15:41.485 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:15:41.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:15:41.528 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:15:41.528 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-09 03:15:41.529 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:41.529 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:41.807 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 03:15:42.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:15:42.117 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:42.118 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:15:42.118 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:15:42.118 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:15:42.137 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:15:42.137 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:15:42.137 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:15:42.139 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:42.139 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:15:42.139 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:15:42.139 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:15:42.139 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:15:42.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:15:42.182 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:15:42.182 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-09 03:15:42.182 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:42.182 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:42.277 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 03:15:42.748 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 03:15:42.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:15:42.763 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:42.764 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:15:42.764 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:15:42.764 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:15:42.774 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:15:42.774 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:15:42.774 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:15:42.775 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:42.775 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:15:42.775 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:15:42.775 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:15:42.775 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:15:42.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:15:42.795 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:15:42.795 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 03:15:42.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:42.796 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:43.223 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 03:15:43.701 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 03:15:43.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:15:43.706 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:43.707 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:15:43.707 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:15:43.707 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:15:43.725 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:15:43.725 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:15:43.725 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:15:43.726 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:43.727 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:15:43.727 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:15:43.727 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:15:43.727 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:15:43.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:15:43.752 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:15:43.752 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 03:15:43.752 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:43.752 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:44.179 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 03:15:44.657 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 03:15:44.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:15:44.687 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:44.688 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:15:44.688 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:15:44.688 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:15:44.699 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:15:44.699 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:15:44.699 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:15:44.700 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:44.700 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:15:44.700 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:15:44.700 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:15:44.700 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:15:44.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:15:44.759 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:15:44.759 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 03:15:44.760 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:44.760 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:45.135 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 03:15:45.614 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 03:15:45.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:15:45.663 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:45.663 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:15:45.663 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:15:45.664 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:15:45.683 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:15:45.683 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:15:45.683 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:15:45.685 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:45.685 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:15:45.685 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:15:45.685 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:15:45.685 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:15:45.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:15:45.712 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:15:45.712 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 03:15:45.713 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:45.713 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:46.092 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-09 03:15:46.570 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-09 03:15:46.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:15:46.637 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:46.638 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:15:46.638 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:15:46.639 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:15:46.659 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:15:46.659 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:15:46.660 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:15:46.661 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:46.661 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:15:46.661 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:15:46.661 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:15:46.661 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:15:46.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:15:46.719 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:15:46.719 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 03:15:46.719 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:46.719 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:47.048 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-09 03:15:47.526 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-09 03:15:47.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:15:47.612 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:47.613 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:15:47.613 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:15:47.613 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:15:47.623 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:15:47.623 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:15:47.623 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:15:47.624 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:47.624 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:15:47.624 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:15:47.624 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:15:47.624 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:15:47.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:15:47.673 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:15:47.673 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 03:15:47.673 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:47.673 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:48.002 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-09 03:15:48.481 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-09 03:15:48.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:15:48.587 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:48.588 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:15:48.589 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:15:48.589 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:15:48.609 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:15:48.609 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:15:48.609 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:15:48.611 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:48.611 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:15:48.612 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:15:48.612 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:15:48.612 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:15:48.618 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:15:48.620 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:15:48.620 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 03:15:48.620 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:48.620 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:48.956 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-09 03:15:49.425 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-09 03:15:49.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:15:49.545 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:49.545 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:15:49.546 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:15:49.546 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:15:49.564 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:15:49.564 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:15:49.565 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:15:49.566 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:49.566 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:15:49.566 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:15:49.566 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:15:49.566 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:15:49.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:15:49.610 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:15:49.610 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 03:15:49.610 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:49.610 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:49.894 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-09 03:15:50.370 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-09 03:15:50.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:15:50.512 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:50.513 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:15:50.513 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:15:50.514 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:15:50.524 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:15:50.524 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:15:50.524 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:15:50.525 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:15:50.527 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:15:50.527 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:15:50.527 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:15:50.527 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:15:50.527 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:15:50.527 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:15:50.527 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:15:50.527 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3708 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:15:50.527 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3708 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:15:50.527 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3708 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:15:50.527 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3708 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:15:50.527 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3708 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:15:50.527 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3708 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:15:50.527 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3708 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:15:50.527 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3708 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:15:55.525 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:15:55.526 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:15:55.528 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:15:55.528 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:15:55.528 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:15:55.529 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:15:55.537 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:15:55.537 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:15:55.537 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:15:55.538 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:15:55.538 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:15:55.540 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:15:55.540 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:15:55.540 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:15:55.541 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:15:55.541 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:15:55.541 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:15:55.541 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:15:55.541 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:15:55.542 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:15:55.543 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:15:55.543 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:15:55.543 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:15:55.543 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:15:55.543 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:15:55.543 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:15:55.543 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:15:55.545 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:15:55.545 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:15:55.545 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:15:55.545 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:15:55.545 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:15:55.545 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:15:55.545 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:15:55.545 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:15:55.547 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:15:55.547 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:15:55.548 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:15:55.548 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:15:55.548 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:15:55.548 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:15:55.548 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:15:55.548 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:15:55.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:15:55.548 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:15:55.548 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:15:55.548 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:15:55.548 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:15:55.548 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:15:55.548 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:15:55.548 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:15:55.548 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:15:55.548 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:15:55.548 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:15:55.548 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:15:55.548 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:15:55.548 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:15:55.548 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:15:55.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:15:55.549 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:15:55.549 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:15:55.549 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:15:55.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:15:55.549 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:15:55.549 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:15:55.549 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:15:55.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:15:55.549 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:15:55.549 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:15:55.549 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:15:55.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:15:55.549 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:15:55.549 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:15:55.549 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:15:55.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:15:55.549 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:15:55.549 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:15:55.549 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:15:55.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:15:55.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:15:55.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:15:55.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:15:55.553 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:15:56.034 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:15:56.070 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:15:56.071 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:15:56.071 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:15:56.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:15:56.091 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:15:56.091 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:15:56.092 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:15:56.096 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:56.096 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:15:56.096 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:15:56.096 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:15:56.096 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:15:56.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:15:56.136 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:15:56.137 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:15:56.137 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:56.138 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:56.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:15:56.382 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:56.383 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:15:56.383 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:15:56.392 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:15:56.392 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:15:56.392 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:15:56.393 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:56.393 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:15:56.393 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:15:56.393 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:15:56.393 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:15:56.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:15:56.408 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:15:56.408 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:15:56.409 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:56.409 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:56.511 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:15:56.551 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:15:56.551 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:15:56.551 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:15:56.553 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:15:56.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:15:56.642 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:56.643 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:15:56.643 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:15:56.661 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:15:56.661 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:15:56.661 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:15:56.662 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:56.662 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:15:56.662 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:15:56.662 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:15:56.662 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:15:56.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:15:56.698 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:15:56.699 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:15:56.699 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:56.699 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:56.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:15:56.905 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:56.906 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:15:56.906 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:15:56.920 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:15:56.920 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:15:56.920 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:15:56.921 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:56.921 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:15:56.921 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:15:56.921 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:15:56.921 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:15:56.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:15:56.929 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:15:56.929 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:15:56.929 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:56.929 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:56.988 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:15:57.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:15:57.165 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:15:57.165 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:15:57.165 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:15:57.173 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:15:57.174 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:15:57.174 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:15:57.174 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:15:57.176 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:15:57.176 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:15:57.176 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:15:57.176 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:15:57.176 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:15:57.176 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:15:57.176 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:15:57.176 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=348 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:15:57.176 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=348 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:15:57.176 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=348 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:15:57.176 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=348 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:15:57.176 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=348 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:15:57.176 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=348 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:16:02.177 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:16:02.178 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:16:02.180 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:16:02.180 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:16:02.181 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:16:02.181 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:16:02.189 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:16:02.190 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:16:02.191 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:16:02.191 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:16:02.191 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:16:02.195 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:16:02.195 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:16:02.195 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:16:02.195 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:16:02.195 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:16:02.195 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:16:02.195 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:16:02.196 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:16:02.198 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:16:02.198 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:16:02.198 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:16:02.198 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:16:02.199 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:16:02.199 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:16:02.199 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:16:02.199 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:16:02.201 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:16:02.201 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:16:02.201 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:16:02.201 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:16:02.201 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:16:02.201 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:16:02.202 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:16:02.202 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:16:02.204 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:16:02.204 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:16:02.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:16:02.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:16:02.205 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:16:02.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:16:02.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:16:02.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:16:02.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:16:02.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:16:02.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:16:02.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:16:02.205 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:16:02.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:16:02.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:16:02.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:16:02.205 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:16:02.205 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:16:02.205 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:16:02.205 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:16:02.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:16:02.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:16:02.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:16:02.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:16:02.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:16:02.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:16:02.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:16:02.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:16:02.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:16:02.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:16:02.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:16:02.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:16:02.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:16:02.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:16:02.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:16:02.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:16:02.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:16:02.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:16:02.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:16:02.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:16:02.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:16:02.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:16:02.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:16:02.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:16:02.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:16:02.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:16:02.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:16:02.210 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:16:02.693 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:16:03.169 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:16:03.648 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:16:04.126 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:16:04.595 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:16:05.065 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 03:16:05.543 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 03:16:06.022 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 03:16:06.503 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 03:16:06.983 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 03:16:07.461 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 03:16:07.939 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 03:16:08.417 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 03:16:08.896 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 03:16:09.376 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 03:16:09.853 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 03:16:10.321 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 03:16:10.791 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 03:16:11.271 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 03:16:11.749 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 03:16:12.230 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 03:16:12.709 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 03:16:13.187 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 03:16:13.666 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 03:16:14.146 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 03:16:14.626 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 03:16:15.105 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-09 03:16:15.583 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-09 03:16:16.063 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-09 03:16:16.544 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-09 03:16:17.022 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-09 03:16:17.501 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-09 03:16:17.979 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-09 03:16:18.456 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-09 03:16:18.935 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-09 03:16:19.412 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-09 03:16:19.881 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-09 03:16:20.350 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-09 03:16:20.825 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-09 03:16:21.304 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-09 03:16:21.782 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-09 03:16:22.256 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-09 03:16:22.725 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-09 03:16:23.199 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-01-09 03:16:23.672 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-01-09 03:16:24.144 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-01-09 03:16:24.622 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-01-09 03:16:25.096 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-01-09 03:16:25.564 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-01-09 03:16:26.032 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-01-09 03:16:26.235 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:16:26.235 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:16:26.235 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:16:26.235 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:16:26.235 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:16:26.235 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:16:26.235 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:16:26.235 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=5146 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:16:26.235 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=5146 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:16:26.235 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=5146 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:16:26.235 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=5146 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:16:26.235 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=5146 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:16:26.235 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=5146 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:16:26.235 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=5146 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:16:26.235 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=5146 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:16:31.240 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:16:31.240 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:16:31.242 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:16:31.242 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:16:31.242 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:16:31.243 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:16:31.252 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:16:31.253 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:16:31.253 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:16:31.254 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:16:31.254 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:16:31.256 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:16:31.256 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:16:31.256 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:16:31.257 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:16:31.257 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:16:31.257 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:16:31.257 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:16:31.257 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:16:31.259 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:16:31.259 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:16:31.259 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:16:31.259 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:16:31.259 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:16:31.259 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:16:31.260 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:16:31.260 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:16:31.261 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:16:31.261 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:16:31.261 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:16:31.261 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:16:31.262 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:16:31.262 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:16:31.262 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:16:31.262 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:16:31.264 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:16:31.264 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:16:31.264 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:16:31.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:16:31.264 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:16:31.264 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:16:31.264 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:16:31.265 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:16:31.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:16:31.265 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:16:31.265 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:16:31.265 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:16:31.265 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:16:31.265 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:16:31.265 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:16:31.265 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:16:31.265 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:16:31.265 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:16:31.265 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:16:31.265 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:16:31.265 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:16:31.265 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:16:31.265 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:16:31.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:16:31.265 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:16:31.265 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:16:31.265 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:16:31.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:16:31.265 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:16:31.265 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:16:31.265 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:16:31.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:16:31.265 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:16:31.265 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:16:31.266 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:16:31.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:16:31.266 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:16:31.266 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:16:31.266 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:16:31.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:16:31.266 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:16:31.266 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:16:31.266 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:16:31.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:16:31.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:16:31.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:16:31.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:16:31.270 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:16:31.753 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:16:32.233 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:16:32.712 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:16:33.186 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:16:33.666 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:16:34.147 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 03:16:34.628 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 03:16:35.106 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 03:16:35.585 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 03:16:36.063 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 03:16:36.542 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 03:16:37.021 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 03:16:37.500 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 03:16:37.981 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 03:16:38.460 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 03:16:38.929 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 03:16:39.398 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 03:16:39.875 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 03:16:40.354 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 03:16:40.832 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 03:16:41.310 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 03:16:41.789 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 03:16:42.267 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 03:16:42.747 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 03:16:43.227 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 03:16:43.705 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 03:16:44.183 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-09 03:16:44.661 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-09 03:16:45.163 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-09 03:16:45.642 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-09 03:16:46.120 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-09 03:16:46.598 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-09 03:16:47.078 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-09 03:16:47.559 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-09 03:16:48.037 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-09 03:16:48.515 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-09 03:16:48.994 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-09 03:16:49.472 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-09 03:16:49.950 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-09 03:16:50.429 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-09 03:16:50.907 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-09 03:16:51.386 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-09 03:16:51.864 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-09 03:16:52.343 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-01-09 03:16:52.821 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-01-09 03:16:53.300 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-01-09 03:16:53.772 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-01-09 03:16:54.251 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-01-09 03:16:54.729 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-01-09 03:16:55.207 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-01-09 03:16:55.686 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-01-09 03:16:56.165 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-01-09 03:16:56.643 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-01-09 03:16:57.121 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-01-09 03:16:57.599 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-01-09 03:16:58.078 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-01-09 03:16:58.556 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-01-09 03:16:59.034 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-01-09 03:16:59.512 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-01-09 03:16:59.990 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-01-09 03:17:00.470 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-01-09 03:17:00.948 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-01-09 03:17:01.427 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-01-09 03:17:01.905 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-01-09 03:17:02.378 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-01-09 03:17:02.849 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-01-09 03:17:03.327 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-01-09 03:17:03.808 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-01-09 03:17:04.286 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-01-09 03:17:04.764 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-01-09 03:17:05.243 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-01-09 03:17:05.721 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-01-09 03:17:06.199 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-01-09 03:17:06.679 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-01-09 03:17:07.158 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-01-09 03:17:07.636 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-01-09 03:17:08.115 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-01-09 03:17:08.288 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:17:08.589 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-01-09 03:17:09.058 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-01-09 03:17:09.290 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:17:09.533 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-01-09 03:17:10.013 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-01-09 03:17:10.291 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:17:10.492 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-01-09 03:17:10.970 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-01-09 03:17:11.293 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:17:11.450 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-01-09 03:17:11.931 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-01-09 03:17:12.294 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:17:12.411 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-01-09 03:17:12.883 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-01-09 03:17:13.293 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:17:13.293 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:17:13.293 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:17:13.293 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:17:13.294 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:17:13.294 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:17:13.294 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:17:13.294 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:17:13.294 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=8965 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:17:13.294 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=8965 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:17:13.294 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=8965 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:17:18.298 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:17:18.298 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:17:18.302 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:17:18.302 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:17:18.302 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:17:18.302 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:17:18.317 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:17:18.318 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:17:18.318 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:17:18.318 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:17:18.318 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:17:18.320 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:17:18.320 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:17:18.320 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:17:18.320 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:17:18.320 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:17:18.321 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:17:18.321 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:17:18.321 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:17:18.322 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:17:18.322 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:17:18.322 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:17:18.322 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:17:18.322 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:17:18.322 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:17:18.322 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:17:18.322 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:17:18.323 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:17:18.323 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:17:18.323 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:17:18.324 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:17:18.324 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:17:18.324 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:17:18.324 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:17:18.324 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:17:18.325 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:17:18.325 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:17:18.325 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:17:18.325 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:17:18.326 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:17:18.326 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:17:18.326 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:17:18.326 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:17:18.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:17:18.326 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:17:18.326 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:17:18.326 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:17:18.326 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:17:18.326 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:17:18.326 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:17:18.326 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:17:18.326 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:17:18.326 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:17:18.326 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:17:18.326 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:17:18.326 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:17:18.326 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:17:18.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:17:18.326 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:17:18.326 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:17:18.326 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:17:18.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:17:18.326 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:17:18.326 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:17:18.326 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:17:18.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:17:18.326 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:17:18.326 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:17:18.326 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:17:18.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:17:18.327 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:17:18.327 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:17:18.327 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:17:18.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:17:18.327 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:17:18.327 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:17:18.327 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:17:18.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:17:18.327 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:17:18.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:17:18.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:17:18.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:17:18.331 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:17:18.815 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:17:18.845 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:17:18.846 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:17:18.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:17:18.847 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:17:18.865 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:17:18.866 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:17:18.866 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:17:18.872 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:17:18.872 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:17:18.872 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:17:18.873 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:17:18.873 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:17:18.908 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:17:18.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:17:18.925 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:17:18.925 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:17:18.925 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:17:18.926 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:17:19.292 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:17:19.329 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:17:19.329 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:17:19.330 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:17:19.331 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:17:19.770 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:17:20.248 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:17:20.329 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:17:20.330 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:17:20.331 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:17:20.332 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:17:20.726 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:17:21.204 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 03:17:21.330 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:17:21.331 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:17:21.332 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:17:21.332 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:17:21.682 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 03:17:22.160 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 03:17:22.331 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:17:22.332 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:17:22.334 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:17:22.334 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:17:22.638 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 03:17:23.116 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 03:17:23.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:17:23.203 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:17:23.204 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:17:23.204 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:17:23.223 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:17:23.223 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:17:23.224 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:17:23.226 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:17:23.226 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:17:23.226 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:17:23.226 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:17:23.226 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:17:23.256 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:17:23.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:17:23.269 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:17:23.269 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-09 03:17:23.269 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:17:23.269 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:17:23.332 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:17:23.332 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:17:23.335 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:17:23.335 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:17:23.588 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 03:17:24.059 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 03:17:24.530 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 03:17:25.003 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 03:17:25.482 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 03:17:25.960 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 03:17:26.437 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 03:17:26.906 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 03:17:27.301 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:17:27.303 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:17:27.304 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:17:27.304 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:17:27.304 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:17:27.321 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:17:27.321 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:17:27.321 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:17:27.323 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:17:27.323 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:17:27.323 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:17:27.323 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:17:27.323 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:17:27.375 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:17:27.376 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 03:17:27.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:17:27.391 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:17:27.391 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:17:27.391 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:17:27.392 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:17:27.850 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 03:17:28.328 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 03:17:28.805 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 03:17:29.283 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 03:17:29.761 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 03:17:30.239 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 03:17:30.718 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 03:17:31.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:17:31.159 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:17:31.159 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:17:31.159 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:17:31.169 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:17:31.169 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:17:31.170 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:17:31.171 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:17:31.171 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:17:31.171 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:17:31.171 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:17:31.171 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:17:31.189 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:17:31.195 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-09 03:17:31.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:17:31.208 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:17:31.208 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 03:17:31.208 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:17:31.208 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:17:31.664 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-09 03:17:32.133 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-09 03:17:32.608 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-09 03:17:33.086 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-09 03:17:33.565 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-09 03:17:34.043 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-09 03:17:34.520 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-09 03:17:34.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:17:34.915 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:17:34.915 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:17:34.915 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:17:34.915 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:17:34.927 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:17:34.927 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:17:34.927 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:17:34.927 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:17:34.930 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:17:34.930 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:17:34.930 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:17:34.930 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:17:34.930 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:17:34.930 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:17:34.930 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:17:34.930 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3557 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:17:34.930 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3557 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:17:34.930 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3557 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:17:34.930 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3558 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:17:34.930 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3558 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:17:34.930 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3558 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:17:34.930 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3558 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:17:34.930 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3558 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:17:34.930 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3558 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:17:34.930 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3558 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:17:34.930 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3558 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:17:39.935 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:17:39.935 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:17:39.935 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:17:39.935 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:17:39.935 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:17:39.935 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:17:39.943 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:17:39.943 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:17:39.943 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:17:39.944 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:17:39.944 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:17:39.947 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:17:39.947 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:17:39.947 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:17:39.947 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:17:39.947 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:17:39.947 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:17:39.948 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:17:39.948 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:17:39.950 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:17:39.950 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:17:39.950 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:17:39.951 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:17:39.951 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:17:39.951 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:17:39.951 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:17:39.951 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:17:39.953 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:17:39.953 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:17:39.953 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:17:39.953 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:17:39.953 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:17:39.953 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:17:39.954 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:17:39.954 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:17:39.956 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:17:39.956 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:17:39.956 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:17:39.956 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:17:39.956 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:17:39.956 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:17:39.957 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:17:39.957 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:17:39.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:17:39.957 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:17:39.957 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:17:39.957 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:17:39.957 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:17:39.957 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:17:39.957 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:17:39.957 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:17:39.957 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:17:39.957 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:17:39.957 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:17:39.957 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:17:39.957 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:17:39.957 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:17:39.957 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:17:39.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:17:39.957 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:17:39.958 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:17:39.958 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:17:39.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:17:39.958 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:17:39.958 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:17:39.958 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:17:39.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:17:39.958 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:17:39.958 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:17:39.958 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:17:39.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:17:39.958 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:17:39.958 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:17:39.958 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:17:39.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:17:39.958 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:17:39.958 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:17:39.958 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:17:39.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:17:39.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:17:39.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:17:39.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:17:39.962 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:17:40.444 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:17:40.483 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:17:40.485 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:17:40.487 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:17:40.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:17:40.512 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:17:40.512 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:17:40.513 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:17:40.516 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:17:40.517 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:17:40.517 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:17:40.517 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:17:40.517 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:17:40.537 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:17:40.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:17:40.547 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:17:40.547 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:17:40.547 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:17:40.547 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:17:40.921 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:17:40.922 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:17:40.960 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:17:40.960 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:17:40.961 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:17:40.964 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:17:41.399 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:17:41.415 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:17:41.876 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:17:41.902 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:17:41.960 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:17:41.961 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:17:41.961 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:17:41.965 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:17:42.354 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:17:42.389 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:17:42.832 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 03:17:42.876 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:17:42.962 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:17:42.962 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:17:42.963 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:17:42.966 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:17:43.311 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 03:17:43.364 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:17:43.789 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 03:17:43.851 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:17:43.964 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:17:43.964 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:17:43.964 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:17:43.967 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:17:44.267 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 03:17:44.339 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:17:44.745 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 03:17:44.826 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:17:44.964 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:17:44.965 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:17:44.965 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:17:44.968 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:17:45.223 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 03:17:45.313 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:17:45.701 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 03:17:45.800 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:17:46.179 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 03:17:46.287 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:17:46.656 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 03:17:46.773 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:17:47.133 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 03:17:47.260 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:17:47.611 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 03:17:47.747 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:17:48.089 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 03:17:48.234 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:17:48.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:17:48.242 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:17:48.243 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:17:48.243 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:17:48.257 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:17:48.257 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:17:48.257 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:17:48.259 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:17:48.259 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:17:48.259 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:17:48.259 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:17:48.259 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:17:48.270 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:17:48.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:17:48.278 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:17:48.278 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-09 03:17:48.278 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:17:48.279 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:17:48.563 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 03:17:48.955 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:17:49.042 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 03:17:49.447 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:17:49.522 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 03:17:49.935 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:17:50.000 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 03:17:50.422 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:17:50.479 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 03:17:50.911 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:17:50.957 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 03:17:51.399 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:17:51.436 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 03:17:51.887 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:17:51.915 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 03:17:52.375 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:17:52.393 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 03:17:52.862 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:17:52.862 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-09 03:17:53.332 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-09 03:17:53.337 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:17:53.802 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-09 03:17:53.817 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:17:54.278 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-09 03:17:54.305 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:17:54.757 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-09 03:17:54.792 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:17:55.235 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-09 03:17:55.279 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:17:55.704 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-09 03:17:55.754 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:17:56.173 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-09 03:17:56.234 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:17:56.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:17:56.240 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:17:56.240 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:17:56.240 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:17:56.240 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:17:56.256 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:17:56.256 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:17:56.256 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:17:56.257 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:17:56.258 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:17:56.258 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:17:56.258 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:17:56.258 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:17:56.261 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:17:56.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:17:56.265 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:17:56.265 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:17:56.265 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:17:56.265 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:17:56.608 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:17:56.649 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-09 03:17:57.085 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:17:57.126 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-09 03:17:57.562 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:17:57.605 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-09 03:17:58.040 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:17:58.083 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-09 03:17:58.519 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:17:58.560 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-09 03:17:58.996 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:17:59.038 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-09 03:17:59.474 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:17:59.516 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-09 03:17:59.952 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:17:59.994 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-09 03:18:00.429 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:18:00.472 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-09 03:18:00.907 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:18:00.949 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-01-09 03:18:01.385 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:18:01.427 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-01-09 03:18:01.863 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:18:01.905 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-01-09 03:18:02.341 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:18:02.382 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-01-09 03:18:02.818 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:18:02.860 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-01-09 03:18:03.296 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:18:03.338 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-01-09 03:18:03.774 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:18:03.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:18:03.783 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:18:03.783 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:18:03.783 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:18:03.783 [WARNING] transceiver.py:250 (MS@172.18.122.22:6700) RX TRXD message (fn=5096 tn=4 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:18:03.784 [WARNING] transceiver.py:250 (MS@172.18.122.22:6700) RX TRXD message (fn=5096 tn=5 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:18:03.800 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:18:03.800 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:18:03.800 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:18:03.802 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:18:03.802 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:18:03.802 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:18:03.802 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:18:03.802 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:18:03.806 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:18:03.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:18:03.810 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:18:03.810 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 03:18:03.810 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:18:03.810 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:18:03.815 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-01-09 03:18:04.205 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:18:04.284 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-01-09 03:18:04.671 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:18:04.753 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-01-09 03:18:05.142 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:18:05.226 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-01-09 03:18:05.613 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:18:05.705 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-01-09 03:18:06.095 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:18:06.184 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-01-09 03:18:06.575 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:18:06.662 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-01-09 03:18:07.052 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:18:07.140 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-01-09 03:18:07.529 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:18:07.618 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-01-09 03:18:08.009 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:18:08.097 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-01-09 03:18:08.487 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:18:08.575 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-01-09 03:18:08.966 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:18:09.054 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-01-09 03:18:09.444 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:18:09.532 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-01-09 03:18:09.923 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:18:10.011 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-01-09 03:18:10.400 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:18:10.489 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-01-09 03:18:10.880 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:18:10.968 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-01-09 03:18:11.358 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:18:11.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:18:11.363 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:18:11.363 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:18:11.363 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:18:11.363 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:18:11.373 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:18:11.374 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:18:11.374 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:18:11.374 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:18:11.380 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:18:11.380 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:18:11.380 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:18:11.380 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:18:11.380 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:18:11.380 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:18:11.380 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:18:11.380 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=6719 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:18:11.381 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=6719 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:18:16.378 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:18:16.378 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:18:16.380 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:18:16.382 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:18:16.387 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:18:16.387 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:18:16.397 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:18:16.398 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:18:16.398 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:18:16.398 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:18:16.398 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:18:16.401 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:18:16.401 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:18:16.401 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:18:16.401 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:18:16.401 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:18:16.401 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:18:16.401 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:18:16.401 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:18:16.404 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:18:16.404 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:18:16.404 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:18:16.404 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:18:16.404 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:18:16.404 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:18:16.404 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:18:16.404 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:18:16.407 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:18:16.407 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:18:16.407 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:18:16.407 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:18:16.408 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:18:16.408 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:18:16.408 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:18:16.408 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:18:16.411 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:18:16.411 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:18:16.411 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:18:16.411 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:18:16.412 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:18:16.412 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:18:16.412 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:18:16.412 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:18:16.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:18:16.412 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:18:16.412 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:18:16.412 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:18:16.412 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:18:16.412 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:18:16.412 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:18:16.412 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:18:16.412 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:18:16.412 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:18:16.412 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:18:16.413 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:18:16.413 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:18:16.413 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:18:16.413 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:18:16.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:18:16.413 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:18:16.413 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:18:16.413 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:18:16.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:18:16.413 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:18:16.413 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:18:16.413 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:18:16.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:18:16.413 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:18:16.413 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:18:16.413 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:18:16.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:18:16.413 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:18:16.413 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:18:16.414 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:18:16.414 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:18:16.414 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:18:16.414 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:18:16.414 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:18:16.414 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:18:16.414 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:18:16.414 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:18:16.414 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:18:16.417 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:18:16.898 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:18:16.944 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:18:16.946 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:18:16.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:18:16.948 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:18:16.969 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:18:16.969 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:18:16.969 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:18:16.974 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:18:16.974 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:18:16.974 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:18:16.974 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:18:16.974 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:18:16.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:18:17.000 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:18:17.001 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:18:17.001 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:18:17.002 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:18:17.375 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:18:17.416 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:18:17.416 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:18:17.418 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:18:17.419 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:18:17.853 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:18:18.331 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:18:18.417 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:18:18.418 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:18:18.419 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:18:18.420 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:18:18.809 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:18:19.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:18:19.107 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:18:19.107 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:18:19.108 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:18:19.123 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:18:19.123 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:18:19.124 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:18:19.125 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:18:19.125 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:18:19.125 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:18:19.125 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:18:19.125 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:18:19.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:18:19.135 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:18:19.135 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:18:19.135 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:18:19.135 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:18:19.284 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 03:18:19.418 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:18:19.419 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:18:19.420 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:18:19.421 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:18:19.753 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 03:18:20.223 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 03:18:20.419 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:18:20.420 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:18:20.421 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:18:20.422 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:18:20.702 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 03:18:21.179 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 03:18:21.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:18:21.242 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:18:21.247 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:18:21.247 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:18:21.258 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:18:21.258 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:18:21.258 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:18:21.259 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:18:21.260 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:18:21.260 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:18:21.260 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:18:21.260 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:18:21.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:18:21.271 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:18:21.272 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:18:21.272 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:18:21.272 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:18:21.420 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:18:21.421 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:18:21.421 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:18:21.423 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:18:21.656 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 03:18:22.134 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 03:18:22.613 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 03:18:23.091 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 03:18:23.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:18:23.367 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:18:23.372 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:18:23.372 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:18:23.383 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:18:23.383 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:18:23.383 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:18:23.383 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:18:23.385 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:18:23.385 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:18:23.386 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:18:23.386 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:18:23.386 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:18:23.386 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:18:23.386 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:18:28.386 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:18:28.386 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:18:28.393 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:18:28.394 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:18:28.394 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:18:28.394 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:18:28.403 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:18:28.404 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:18:28.404 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:18:28.405 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:18:28.405 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:18:28.408 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:18:28.408 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:18:28.408 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:18:28.408 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:18:28.408 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:18:28.409 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:18:28.409 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:18:28.409 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:18:28.411 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:18:28.411 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:18:28.411 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:18:28.411 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:18:28.411 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:18:28.411 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:18:28.411 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:18:28.412 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:18:28.413 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:18:28.413 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:18:28.413 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:18:28.413 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:18:28.413 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:18:28.413 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:18:28.413 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:18:28.413 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:18:28.417 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:18:28.417 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:18:28.417 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:18:28.417 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:18:28.417 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:18:28.417 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:18:28.417 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:18:28.417 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:18:28.417 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:18:28.417 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:18:28.417 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:18:28.417 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:18:28.417 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:18:28.417 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:18:28.417 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:18:28.417 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:18:28.418 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:18:28.418 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:18:28.418 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:18:28.418 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:18:28.418 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:18:28.418 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:18:28.418 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:18:28.418 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:18:28.418 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:18:28.418 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:18:28.418 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:18:28.418 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:18:28.418 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:18:28.418 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:18:28.418 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:18:28.418 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:18:28.418 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:18:28.418 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:18:28.418 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:18:28.418 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:18:28.418 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:18:28.418 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:18:28.418 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:18:28.418 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:18:28.419 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:18:28.419 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:18:28.419 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:18:28.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:18:28.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:18:28.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:18:28.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:18:28.422 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:18:28.906 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:18:28.945 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:18:28.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:18:28.949 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:18:28.951 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:18:28.974 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:18:28.975 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:18:28.975 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:18:28.977 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:18:28.977 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:18:28.977 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:18:28.977 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:18:28.977 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:18:29.003 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:18:29.010 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:18:29.010 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-09 03:18:29.011 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:18:29.011 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:18:29.380 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:18:29.421 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:18:29.421 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:18:29.421 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:18:29.421 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:18:29.859 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:18:30.338 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:18:30.422 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:18:30.422 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:18:30.422 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:18:30.423 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:18:30.816 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:18:31.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:18:31.110 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:18:31.116 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:18:31.116 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:18:31.116 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:18:31.136 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:18:31.136 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:18:31.136 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:18:31.137 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:18:31.137 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:18:31.137 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:18:31.137 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:18:31.137 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:18:31.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:18:31.143 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:18:31.143 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-09 03:18:31.143 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:18:31.143 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:18:31.295 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 03:18:31.423 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:18:31.423 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:18:31.423 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:18:31.424 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:18:31.773 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 03:18:32.252 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 03:18:32.423 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:18:32.424 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:18:32.424 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:18:32.424 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:18:32.730 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 03:18:33.209 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 03:18:33.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:18:33.250 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:18:33.256 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:18:33.256 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:18:33.256 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:18:33.268 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:18:33.269 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:18:33.269 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:18:33.269 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:18:33.275 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:18:33.275 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:18:33.276 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:18:33.276 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:18:33.276 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:18:33.276 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:18:33.276 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:18:33.276 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1035 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:18:33.277 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1035 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:18:33.277 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1035 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:18:33.277 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1035 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:18:33.277 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1035 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:18:33.277 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1035 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:18:33.277 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1036 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:18:33.277 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1036 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:18:33.277 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1036 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:18:33.277 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1036 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:18:33.277 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1036 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:18:33.278 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1036 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:18:33.278 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1036 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:18:33.278 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1036 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:18:38.272 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:18:38.272 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:18:38.274 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:18:38.275 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:18:38.275 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:18:38.276 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:18:38.288 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:18:38.289 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:18:38.289 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:18:38.290 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:18:38.290 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:18:38.293 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:18:38.293 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:18:38.293 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:18:38.293 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:18:38.294 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:18:38.294 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:18:38.294 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:18:38.294 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:18:38.295 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:18:38.295 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:18:38.295 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:18:38.296 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:18:38.296 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:18:38.296 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:18:38.296 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:18:38.296 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:18:38.297 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:18:38.298 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:18:38.298 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:18:38.298 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:18:38.298 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:18:38.298 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:18:38.298 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:18:38.298 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:18:38.300 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:18:38.300 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:18:38.300 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:18:38.300 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:18:38.300 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:18:38.300 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:18:38.300 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:18:38.301 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:18:38.301 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:18:38.301 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:18:38.301 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:18:38.301 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:18:38.301 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:18:38.301 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:18:38.301 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:18:38.301 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:18:38.301 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:18:38.301 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:18:38.301 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:18:38.301 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:18:38.301 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:18:38.301 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:18:38.301 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:18:38.301 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:18:38.301 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:18:38.301 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:18:38.301 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:18:38.301 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:18:38.301 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:18:38.301 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:18:38.301 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:18:38.301 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:18:38.301 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:18:38.301 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:18:38.301 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:18:38.301 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:18:38.301 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:18:38.301 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:18:38.301 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:18:38.301 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:18:38.302 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:18:38.302 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:18:38.302 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:18:38.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:18:38.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:18:38.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:18:38.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:18:38.306 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:18:38.787 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:18:38.825 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:18:38.826 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:18:38.827 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:18:38.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:18:38.848 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:18:38.848 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:18:38.848 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:18:38.855 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:18:38.855 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:18:38.856 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:18:38.856 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:18:38.856 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:18:38.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:18:38.889 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:18:38.889 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:18:38.889 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:18:38.889 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:18:39.265 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:18:39.303 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:18:39.303 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:18:39.304 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:18:39.306 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:18:39.743 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:18:40.221 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:18:40.304 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:18:40.304 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:18:40.304 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:18:40.307 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:18:40.700 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:18:40.972 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:18:40.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:18:40.980 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:18:40.980 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:18:40.994 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:18:40.994 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:18:40.994 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:18:40.995 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:18:40.995 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:18:40.995 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:18:40.995 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:18:40.995 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:18:41.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:18:41.037 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:18:41.037 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:18:41.037 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:18:41.037 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:18:41.178 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 03:18:41.305 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:18:41.305 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:18:41.305 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:18:41.308 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:18:41.656 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 03:18:42.134 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 03:18:42.306 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:18:42.306 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:18:42.306 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:18:42.309 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:18:42.613 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 03:18:43.091 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 03:18:43.133 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:18:43.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:18:43.139 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:18:43.139 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:18:43.155 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:18:43.155 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:18:43.155 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:18:43.156 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:18:43.156 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:18:43.157 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:18:43.157 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:18:43.157 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:18:43.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:18:43.188 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:18:43.188 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:18:43.189 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:18:43.189 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:18:43.307 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:18:43.307 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:18:43.307 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:18:43.309 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:18:43.568 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 03:18:44.047 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 03:18:44.522 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 03:18:45.000 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 03:18:45.279 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:18:45.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:18:45.287 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:18:45.287 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:18:45.297 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:18:45.297 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:18:45.298 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:18:45.298 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:18:45.305 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:18:45.306 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:18:45.306 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:18:45.306 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:18:45.306 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:18:45.306 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:18:45.306 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:18:45.307 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1494 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:18:45.307 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1494 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:18:45.307 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1494 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:18:45.307 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1494 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:18:45.307 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1494 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:18:45.307 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1494 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:18:45.307 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1495 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:18:45.308 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1495 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:18:45.308 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1495 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:18:45.308 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1495 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:18:45.308 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1495 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:18:45.308 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1495 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:18:45.308 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1495 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:18:45.308 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1495 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:18:45.308 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1496 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:18:45.308 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1496 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:18:45.308 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1496 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:18:45.308 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1496 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:18:45.308 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1496 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:18:45.308 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1496 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:18:45.308 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1496 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:18:45.308 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1496 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:18:50.302 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:18:50.302 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:18:50.305 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:18:50.305 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:18:50.305 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:18:50.305 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:18:50.313 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:18:50.315 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:18:50.315 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:18:50.316 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:18:50.316 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:18:50.319 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:18:50.320 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:18:50.320 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:18:50.320 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:18:50.320 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:18:50.321 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:18:50.321 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:18:50.321 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:18:50.323 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:18:50.324 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:18:50.324 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:18:50.324 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:18:50.324 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:18:50.324 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:18:50.324 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:18:50.324 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:18:50.326 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:18:50.326 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:18:50.326 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:18:50.326 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:18:50.327 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:18:50.327 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:18:50.327 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:18:50.327 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:18:50.329 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:18:50.329 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:18:50.329 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:18:50.330 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:18:50.330 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:18:50.330 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:18:50.330 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:18:50.330 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:18:50.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:18:50.330 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:18:50.330 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:18:50.330 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:18:50.330 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:18:50.330 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:18:50.330 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:18:50.330 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:18:50.330 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:18:50.330 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:18:50.330 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:18:50.330 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:18:50.330 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:18:50.330 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:18:50.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:18:50.331 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:18:50.331 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:18:50.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:18:50.331 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:18:50.331 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:18:50.331 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:18:50.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:18:50.331 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:18:50.331 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:18:50.331 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:18:50.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:18:50.331 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:18:50.331 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:18:50.331 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:18:50.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:18:50.331 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:18:50.331 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:18:50.331 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:18:50.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:18:50.331 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:18:50.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:18:50.331 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:18:50.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:18:50.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:18:50.335 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:18:50.817 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:18:50.848 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:18:50.848 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:18:50.849 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:18:50.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:18:50.866 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:18:50.867 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:18:50.867 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:18:50.871 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:18:50.871 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:18:50.871 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:18:50.871 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:18:50.871 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:18:50.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:18:50.920 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:18:50.920 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-09 03:18:50.920 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:18:50.920 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:18:51.286 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:18:51.333 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:18:51.334 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:18:51.334 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:18:51.336 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:18:51.756 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:18:52.226 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:18:52.335 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:18:52.335 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:18:52.335 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:18:52.338 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:18:52.697 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:18:53.025 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:18:53.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:18:53.034 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:18:53.035 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:18:53.035 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:18:53.056 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:18:53.056 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:18:53.056 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:18:53.058 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:18:53.058 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:18:53.058 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:18:53.058 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:18:53.058 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:18:53.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:18:53.070 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:18:53.070 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-09 03:18:53.070 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:18:53.070 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:18:53.168 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 03:18:53.336 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:18:53.336 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:18:53.336 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:18:53.339 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:18:53.639 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 03:18:54.112 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 03:18:54.337 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:18:54.338 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:18:54.338 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:18:54.340 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:18:54.591 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 03:18:55.070 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 03:18:55.170 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:18:55.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:18:55.178 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:18:55.178 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:18:55.178 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:18:55.188 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:18:55.189 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:18:55.189 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:18:55.189 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:18:55.191 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:18:55.191 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:18:55.191 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:18:55.191 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:18:55.191 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:18:55.191 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:18:55.192 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:18:55.192 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1047 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:18:55.192 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1047 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:18:55.192 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1047 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:18:55.192 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1047 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:18:55.192 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1047 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:18:55.192 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1047 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:18:55.192 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1047 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:18:55.192 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1048 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:18:55.192 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1048 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:18:55.192 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1048 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:18:55.192 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1048 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:18:55.192 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1048 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:18:55.192 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1048 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:18:55.192 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1048 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:18:55.192 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1048 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:19:00.193 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:19:00.193 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:19:00.195 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:19:00.197 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:19:00.202 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:19:00.203 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:19:00.211 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:19:00.211 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:19:00.212 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:19:00.212 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:19:00.212 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:19:00.215 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:19:00.215 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:19:00.215 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:19:00.215 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:19:00.215 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:19:00.215 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:19:00.215 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:19:00.215 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:19:00.217 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:19:00.217 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:19:00.217 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:19:00.217 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:19:00.218 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:19:00.218 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:19:00.218 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:19:00.218 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:19:00.220 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:19:00.220 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:19:00.220 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:19:00.220 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:19:00.220 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:19:00.220 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:19:00.220 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:19:00.220 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:19:00.222 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:19:00.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:19:00.222 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:19:00.222 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:19:00.222 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:19:00.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:19:00.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:19:00.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:19:00.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:19:00.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:19:00.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:19:00.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:19:00.223 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:19:00.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:19:00.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:19:00.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:19:00.223 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:19:00.223 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:19:00.223 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:19:00.223 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:19:00.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:19:00.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:19:00.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:19:00.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:19:00.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:19:00.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:19:00.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:19:00.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:19:00.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:19:00.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:19:00.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:19:00.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:19:00.224 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:19:00.224 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:19:00.224 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:19:00.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:19:00.224 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:19:00.224 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:19:00.224 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:19:00.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:19:00.224 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:19:00.224 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:19:00.224 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:19:00.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:19:00.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:19:00.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:19:00.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:19:00.228 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:19:00.711 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:19:00.745 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:19:00.746 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:19:00.747 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:19:00.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:19:00.765 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:19:00.766 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:19:00.766 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:19:00.771 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:19:00.771 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:19:00.771 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:19:00.772 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:19:00.772 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:19:00.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:19:00.815 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:19:00.816 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:19:00.816 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:19:00.817 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:19:01.188 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:19:01.225 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:19:01.226 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:19:01.227 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:19:01.229 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:19:01.666 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:19:02.145 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:19:02.226 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:19:02.227 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:19:02.227 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:19:02.229 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:19:02.622 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:19:02.998 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:19:02.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:19:03.004 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:19:03.004 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:19:03.015 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:19:03.015 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:19:03.015 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:19:03.015 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:19:03.021 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:19:03.021 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:19:03.021 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:19:03.021 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:19:03.021 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:19:03.021 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:19:03.022 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:19:03.022 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=596 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:19:03.022 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=596 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:19:08.019 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:19:08.019 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:19:08.021 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:19:08.021 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:19:08.022 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:19:08.022 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:19:08.037 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:19:08.038 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:19:08.038 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:19:08.039 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:19:08.039 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:19:08.041 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:19:08.042 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:19:08.042 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:19:08.042 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:19:08.042 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:19:08.043 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:19:08.043 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:19:08.043 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:19:08.044 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:19:08.044 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:19:08.045 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:19:08.045 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:19:08.045 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:19:08.045 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:19:08.045 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:19:08.045 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:19:08.047 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:19:08.047 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:19:08.047 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:19:08.047 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:19:08.047 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:19:08.047 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:19:08.048 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:19:08.048 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:19:08.050 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:19:08.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:19:08.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:19:08.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:19:08.051 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:19:08.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:19:08.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:19:08.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:19:08.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:19:08.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:19:08.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:19:08.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:19:08.051 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:19:08.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:19:08.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:19:08.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:19:08.051 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:19:08.051 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:19:08.051 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:19:08.052 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:19:08.052 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:19:08.052 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:19:08.052 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:19:08.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:19:08.052 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:19:08.052 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:19:08.052 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:19:08.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:19:08.052 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:19:08.052 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:19:08.052 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:19:08.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:19:08.052 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:19:08.052 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:19:08.052 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:19:08.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:19:08.052 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:19:08.052 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:19:08.052 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:19:08.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:19:08.053 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:19:08.053 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:19:08.053 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:19:08.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:19:08.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:19:08.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:19:08.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:19:08.056 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:19:08.537 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:19:08.583 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:19:08.585 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:19:08.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:19:08.587 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:19:08.601 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:19:08.602 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:19:08.602 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:19:08.606 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:19:08.606 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:19:08.606 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:19:08.606 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:19:08.606 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:19:08.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:19:08.643 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:19:08.643 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-09 03:19:08.643 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:19:08.644 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:19:09.015 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:19:09.054 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:19:09.055 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:19:09.057 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:19:09.061 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:19:09.488 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:19:09.958 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:19:10.056 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:19:10.056 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:19:10.059 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:19:10.062 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:19:10.429 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:19:10.838 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:19:10.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:19:10.845 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:19:10.845 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:19:10.845 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:19:10.855 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:19:10.856 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:19:10.856 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:19:10.856 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:19:10.857 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:19:10.857 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:19:10.857 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:19:10.857 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:19:10.857 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:19:10.857 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:19:10.857 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:19:10.857 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=604 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:19:10.857 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=604 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:19:15.860 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:19:15.860 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:19:15.862 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:19:15.862 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:19:15.863 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:19:15.863 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:19:15.873 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:19:15.874 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:19:15.874 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:19:15.874 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:19:15.874 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:19:15.877 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:19:15.877 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:19:15.878 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:19:15.878 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:19:15.878 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:19:15.878 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:19:15.878 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:19:15.878 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:19:15.880 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:19:15.880 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:19:15.880 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:19:15.880 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:19:15.881 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:19:15.881 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:19:15.881 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:19:15.881 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:19:15.883 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:19:15.883 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:19:15.883 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:19:15.883 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:19:15.883 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:19:15.883 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:19:15.883 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:19:15.883 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:19:15.885 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:19:15.885 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:19:15.885 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:19:15.885 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:19:15.886 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:19:15.886 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:19:15.886 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:19:15.886 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:19:15.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:19:15.886 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:19:15.886 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:19:15.886 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:19:15.886 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:19:15.886 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:19:15.886 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:19:15.886 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:19:15.886 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:19:15.886 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:19:15.886 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:19:15.886 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:19:15.886 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:19:15.886 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:19:15.886 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:19:15.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:19:15.886 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:19:15.886 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:19:15.887 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:19:15.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:19:15.887 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:19:15.887 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:19:15.887 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:19:15.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:19:15.887 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:19:15.887 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:19:15.887 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:19:15.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:19:15.887 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:19:15.887 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:19:15.887 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:19:15.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:19:15.887 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:19:15.887 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:19:15.887 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:19:15.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:19:15.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:19:15.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:19:15.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:19:15.891 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:19:16.373 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:19:16.401 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:19:16.402 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:19:16.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:19:16.402 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:19:16.413 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:19:16.413 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:19:16.413 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:19:16.441 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:19:16.441 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:19:16.442 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:19:16.442 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:19:16.442 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:19:16.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:19:16.471 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:19:16.471 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:19:16.471 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:19:16.472 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:19:16.843 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:19:16.847 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:19:16.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:19:16.857 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:19:16.857 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:19:16.885 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:19:16.885 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:19:16.885 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:19:16.888 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:19:16.888 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:19:16.890 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:19:16.891 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:19:16.896 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:19:16.896 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:19:16.897 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:19:16.897 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:19:16.897 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:19:16.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:19:16.938 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:19:16.938 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:19:16.938 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:19:16.938 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:19:17.304 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:19:17.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:19:17.312 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:19:17.312 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:19:17.312 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:19:17.323 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:19:17.323 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:19:17.324 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:19:17.324 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:19:17.326 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:19:17.326 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:19:17.326 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:19:17.326 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:19:17.326 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:19:17.326 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:19:17.326 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:19:17.326 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=310 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:19:17.326 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=310 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:19:17.326 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=310 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:19:17.326 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=310 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:19:17.326 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=310 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:19:17.326 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=310 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:19:17.326 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=310 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:19:17.326 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=311 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:19:17.326 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=311 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:19:17.326 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=311 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:19:17.326 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=311 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:19:17.326 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=311 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:19:17.326 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=311 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:19:17.326 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=311 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:19:17.326 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=311 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:19:22.330 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:19:22.331 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:19:22.331 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:19:22.331 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:19:22.331 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:19:22.331 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:19:22.338 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:19:22.340 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:19:22.340 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:19:22.341 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:19:22.341 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:19:22.343 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:19:22.344 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:19:22.344 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:19:22.344 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:19:22.344 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:19:22.344 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:19:22.345 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:19:22.345 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:19:22.347 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:19:22.347 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:19:22.348 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:19:22.348 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:19:22.348 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:19:22.348 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:19:22.349 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:19:22.349 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:19:22.350 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:19:22.350 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:19:22.350 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:19:22.350 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:19:22.350 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:19:22.351 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:19:22.351 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:19:22.351 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:19:22.353 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:19:22.353 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:19:22.353 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:19:22.354 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:19:22.354 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:19:22.354 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:19:22.354 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:19:22.354 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:19:22.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:19:22.354 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:19:22.354 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:19:22.354 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:19:22.354 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:19:22.354 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:19:22.354 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:19:22.354 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:19:22.354 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:19:22.354 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:19:22.354 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:19:22.354 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:19:22.354 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:19:22.354 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:19:22.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:19:22.355 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:19:22.355 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:19:22.355 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:19:22.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:19:22.355 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:19:22.355 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:19:22.355 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:19:22.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:19:22.355 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:19:22.355 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:19:22.355 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:19:22.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:19:22.355 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:19:22.355 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:19:22.355 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:19:22.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:19:22.355 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:19:22.355 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:19:22.355 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:19:22.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:19:22.355 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:19:22.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:19:22.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:19:22.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:19:22.359 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:19:22.841 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:19:22.877 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:19:22.878 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:19:22.879 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:19:22.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:19:22.897 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:19:22.897 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:19:22.897 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:19:22.943 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:19:22.944 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:19:22.944 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:19:22.944 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:19:22.944 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:19:22.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:19:22.985 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:19:22.986 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:19:22.986 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:19:22.986 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:19:23.318 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:19:23.357 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:19:23.357 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:19:23.359 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:19:23.360 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:19:23.364 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:19:23.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:19:23.373 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:19:23.374 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:19:23.386 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:19:23.386 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:19:23.386 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:19:23.397 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:19:23.397 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:19:23.397 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:19:23.397 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:19:23.397 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:19:23.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:19:23.409 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:19:23.409 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:19:23.409 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:19:23.409 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:19:23.784 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:19:23.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:19:23.790 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:19:23.790 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:19:23.795 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:19:23.800 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:19:23.800 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:19:23.801 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:19:23.801 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:19:23.802 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:19:23.803 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:19:23.803 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:19:23.803 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:19:23.803 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:19:23.803 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:19:23.803 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:19:28.805 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:19:28.805 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:19:28.807 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:19:28.808 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:19:28.808 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:19:28.809 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:19:28.816 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:19:28.817 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:19:28.817 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:19:28.817 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:19:28.817 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:19:28.819 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:19:28.819 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:19:28.820 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:19:28.820 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:19:28.820 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:19:28.820 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:19:28.820 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:19:28.820 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:19:28.821 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:19:28.821 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:19:28.822 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:19:28.822 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:19:28.822 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:19:28.822 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:19:28.822 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:19:28.822 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:19:28.824 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:19:28.824 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:19:28.824 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:19:28.824 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:19:28.824 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:19:28.824 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:19:28.824 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:19:28.824 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:19:28.827 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:19:28.827 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:19:28.827 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:19:28.828 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:19:28.828 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:19:28.828 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:19:28.828 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:19:28.828 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:19:28.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:19:28.828 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:19:28.828 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:19:28.828 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:19:28.828 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:19:28.828 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:19:28.828 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:19:28.828 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:19:28.828 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:19:28.828 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:19:28.828 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:19:28.829 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:19:28.829 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:19:28.829 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:19:28.829 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:19:28.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:19:28.829 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:19:28.829 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:19:28.829 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:19:28.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:19:28.829 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:19:28.829 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:19:28.829 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:19:28.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:19:28.829 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:19:28.829 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:19:28.829 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:19:28.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:19:28.829 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:19:28.829 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:19:28.829 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:19:28.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:19:28.829 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:19:28.829 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:19:28.829 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:19:28.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:19:28.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:19:28.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:19:28.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:19:28.833 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:19:29.315 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:19:29.354 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:19:29.355 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:19:29.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:19:29.356 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:19:29.372 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:19:29.372 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:19:29.372 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:19:29.425 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:19:29.425 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:19:29.426 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:19:29.426 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:19:29.426 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:19:29.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:19:29.460 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:19:29.460 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:19:29.460 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:19:29.461 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:19:29.785 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:19:29.826 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:19:29.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:19:29.832 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:19:29.832 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:19:29.832 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:19:29.835 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:19:29.835 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:19:29.835 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:19:29.853 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:19:29.853 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:19:29.853 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:19:29.864 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:19:29.864 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:19:29.864 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:19:29.864 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:19:29.864 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:19:29.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:19:29.875 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:19:29.875 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:19:29.875 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:19:29.875 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:19:30.255 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:19:30.288 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:19:30.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:19:30.296 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:19:30.296 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:19:30.307 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:19:30.307 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:19:30.308 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:19:30.308 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:19:30.309 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:19:30.310 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:19:30.310 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:19:30.310 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:19:30.310 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:19:30.310 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:19:30.310 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:19:30.310 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=319 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:19:30.310 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=319 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:19:35.312 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:19:35.312 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:19:35.314 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:19:35.315 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:19:35.315 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:19:35.316 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:19:35.326 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:19:35.327 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:19:35.327 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:19:35.327 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:19:35.327 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:19:35.331 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:19:35.331 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:19:35.332 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:19:35.332 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:19:35.332 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:19:35.332 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:19:35.333 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:19:35.333 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:19:35.335 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:19:35.335 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:19:35.335 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:19:35.335 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:19:35.335 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:19:35.335 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:19:35.335 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:19:35.335 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:19:35.338 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:19:35.338 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:19:35.338 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:19:35.338 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:19:35.338 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:19:35.338 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:19:35.338 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:19:35.338 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:19:35.341 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:19:35.341 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:19:35.341 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:19:35.341 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:19:35.341 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:19:35.341 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:19:35.341 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:19:35.341 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:19:35.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:19:35.341 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:19:35.341 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:19:35.341 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:19:35.341 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:19:35.342 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:19:35.342 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:19:35.342 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:19:35.342 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:19:35.342 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:19:35.342 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:19:35.342 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:19:35.342 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:19:35.342 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:19:35.342 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:19:35.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:19:35.342 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:19:35.342 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:19:35.342 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:19:35.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:19:35.342 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:19:35.342 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:19:35.342 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:19:35.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:19:35.342 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:19:35.342 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:19:35.342 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:19:35.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:19:35.342 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:19:35.342 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:19:35.342 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:19:35.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:19:35.342 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:19:35.342 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:19:35.342 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:19:35.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:19:35.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:19:35.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:19:35.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:19:35.346 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:19:35.827 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:19:35.864 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:19:35.865 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:19:35.866 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:19:35.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:19:35.881 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:19:35.882 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:19:35.882 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:19:35.914 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:19:35.914 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:19:35.914 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:19:35.914 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:19:35.914 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:19:35.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:19:35.922 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:19:35.923 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-09 03:19:35.923 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:19:35.923 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:19:36.300 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:19:36.345 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:19:36.345 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:19:36.347 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:19:36.349 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:19:36.770 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:19:37.241 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:19:37.346 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:19:37.347 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:19:37.348 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:19:37.350 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:19:37.712 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:19:38.183 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 03:19:38.347 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:19:38.348 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:19:38.348 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:19:38.351 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:19:38.653 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 03:19:39.124 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 03:19:39.349 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:19:39.349 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:19:39.349 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:19:39.352 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:19:39.595 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 03:19:39.927 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:19:39.927 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:19:39.927 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:19:39.931 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:19:39.931 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:19:39.931 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:19:39.931 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:19:39.932 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:19:39.932 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:19:39.933 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:19:39.933 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:19:39.933 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:19:39.933 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:19:39.933 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:19:39.933 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=993 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:19:39.933 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=993 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:19:39.933 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=993 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:19:39.933 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=993 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:19:39.933 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=993 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:19:39.933 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=993 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:19:39.933 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=993 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:19:39.933 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=993 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:19:44.935 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:19:44.936 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:19:44.937 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:19:44.938 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:19:44.938 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:19:44.939 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:19:44.943 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:19:44.944 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:19:44.944 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:19:44.944 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:19:44.944 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:19:44.946 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:19:44.946 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:19:44.946 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:19:44.947 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:19:44.947 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:19:44.947 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:19:44.947 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:19:44.947 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:19:44.949 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:19:44.949 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:19:44.949 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:19:44.949 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:19:44.949 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:19:44.949 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:19:44.950 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:19:44.950 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:19:44.951 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:19:44.952 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:19:44.952 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:19:44.952 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:19:44.952 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:19:44.952 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:19:44.952 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:19:44.952 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:19:44.955 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:19:44.955 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:19:44.955 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:19:44.955 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:19:44.955 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:19:44.955 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:19:44.955 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:19:44.955 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:19:44.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:19:44.955 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:19:44.955 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:19:44.955 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:19:44.956 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:19:44.956 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:19:44.956 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:19:44.956 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:19:44.956 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:19:44.956 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:19:44.956 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:19:44.956 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:19:44.956 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:19:44.956 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:19:44.956 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:19:44.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:19:44.956 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:19:44.956 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:19:44.956 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:19:44.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:19:44.956 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:19:44.956 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:19:44.956 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:19:44.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:19:44.957 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:19:44.957 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:19:44.957 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:19:44.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:19:44.957 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:19:44.957 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:19:44.957 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:19:44.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:19:44.957 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:19:44.957 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:19:44.957 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:19:44.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:19:44.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:19:44.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:19:44.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:19:44.961 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:19:45.444 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:19:45.477 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:19:45.478 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:19:45.479 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:19:45.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:19:45.491 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:19:45.491 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:19:45.491 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:19:45.529 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:19:45.530 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:19:45.530 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:19:45.530 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:19:45.530 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:19:45.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:19:45.543 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:19:45.544 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:19:45.544 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:19:45.544 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:19:45.762 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:19:45.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:19:45.767 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:19:45.767 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:19:45.780 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:19:45.780 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:19:45.780 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:19:45.790 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:19:45.790 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:19:45.790 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:19:45.790 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:19:45.790 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:19:45.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:19:45.823 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:19:45.823 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:19:45.823 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:19:45.823 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:19:45.919 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:19:45.959 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:19:45.959 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:19:45.959 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:19:45.960 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:19:46.039 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:19:46.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:19:46.046 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:19:46.046 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:19:46.057 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:19:46.057 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:19:46.057 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:19:46.057 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:19:46.060 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:19:46.060 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:19:46.060 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:19:46.060 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:19:46.060 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:19:46.060 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:19:46.060 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:19:46.060 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=236 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:19:46.060 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=236 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:19:46.060 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=236 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:19:46.060 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=236 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:19:46.060 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=236 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:19:46.060 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=236 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:19:46.060 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=237 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:19:46.060 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=237 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:19:46.060 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=237 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:19:46.060 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=237 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:19:46.060 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=237 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:19:46.060 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=237 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:19:46.060 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=237 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:19:46.060 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=237 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:19:51.062 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:19:51.062 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:19:51.065 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:19:51.065 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:19:51.065 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:19:51.065 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:19:51.073 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:19:51.074 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:19:51.074 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:19:51.075 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:19:51.075 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:19:51.079 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:19:51.079 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:19:51.079 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:19:51.079 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:19:51.079 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:19:51.079 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:19:51.080 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:19:51.080 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:19:51.082 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:19:51.083 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:19:51.083 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:19:51.083 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:19:51.083 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:19:51.083 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:19:51.083 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:19:51.083 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:19:51.086 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:19:51.086 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:19:51.086 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:19:51.086 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:19:51.086 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:19:51.086 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:19:51.087 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:19:51.087 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:19:51.090 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:19:51.090 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:19:51.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:19:51.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:19:51.090 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:19:51.091 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:19:51.091 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:19:51.091 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:19:51.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:19:51.091 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:19:51.091 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:19:51.091 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:19:51.091 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:19:51.091 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:19:51.091 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:19:51.091 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:19:51.091 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:19:51.091 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:19:51.091 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:19:51.092 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:19:51.092 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:19:51.092 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:19:51.092 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:19:51.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:19:51.092 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:19:51.092 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:19:51.092 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:19:51.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:19:51.092 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:19:51.092 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:19:51.092 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:19:51.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:19:51.092 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:19:51.092 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:19:51.092 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:19:51.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:19:51.093 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:19:51.093 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:19:51.093 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:19:51.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:19:51.093 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:19:51.093 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:19:51.093 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:19:51.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:19:51.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:19:51.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:19:51.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:19:51.096 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:19:51.581 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:19:51.622 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:19:51.625 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:19:51.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:19:51.625 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:19:51.651 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:19:51.651 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:19:51.651 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:19:51.691 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:19:51.692 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:19:51.692 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:19:51.692 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:19:51.692 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:19:51.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:19:51.726 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:19:51.726 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-09 03:19:51.726 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:19:51.726 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:19:52.057 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:19:52.095 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:19:52.095 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:19:52.097 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:19:52.099 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:19:52.535 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:19:53.014 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:19:53.096 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:19:53.096 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:19:53.098 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:19:53.101 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:19:53.491 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:19:53.960 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 03:19:54.098 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:19:54.098 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:19:54.098 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:19:54.101 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:19:54.430 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 03:19:54.900 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 03:19:55.099 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:19:55.099 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:19:55.099 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:19:55.102 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:19:55.371 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 03:19:55.731 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:19:55.731 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:19:55.731 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:19:55.734 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:19:55.734 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:19:55.734 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:19:55.734 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:19:55.735 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:19:55.735 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:19:55.735 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:19:55.735 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:19:55.735 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:19:55.735 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:19:55.735 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:19:55.735 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=999 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:19:55.735 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=999 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:19:55.735 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=999 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:19:55.735 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=999 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:19:55.735 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=999 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:19:55.736 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=999 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:19:55.736 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=999 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:20:00.739 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:20:00.739 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:20:00.741 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:20:00.742 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:20:00.742 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:20:00.743 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:20:00.751 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:20:00.752 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:20:00.752 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:20:00.752 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:20:00.752 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:20:00.754 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:20:00.754 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:20:00.754 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:20:00.754 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:20:00.755 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:20:00.755 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:20:00.755 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:20:00.755 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:20:00.756 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:20:00.756 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:20:00.757 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:20:00.757 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:20:00.757 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:20:00.757 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:20:00.757 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:20:00.757 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:20:00.759 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:20:00.759 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:20:00.760 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:20:00.760 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:20:00.760 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:20:00.760 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:20:00.760 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:20:00.760 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:20:00.763 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:20:00.763 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:20:00.763 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:20:00.763 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:20:00.763 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:20:00.764 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:20:00.764 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:20:00.764 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:20:00.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:20:00.764 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:20:00.764 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:20:00.764 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:20:00.764 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:20:00.764 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:20:00.764 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:20:00.764 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:20:00.764 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:20:00.764 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:20:00.764 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:20:00.764 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:20:00.765 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:20:00.765 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:20:00.765 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:20:00.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:20:00.765 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:20:00.765 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:20:00.765 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:20:00.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:20:00.765 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:20:00.765 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:20:00.765 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:20:00.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:20:00.765 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:20:00.765 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:20:00.765 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:20:00.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:20:00.765 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:20:00.765 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:20:00.765 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:20:00.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:20:00.766 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:20:00.766 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:20:00.766 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:20:00.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:20:00.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:20:00.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:20:00.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:20:00.769 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:20:01.253 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:20:01.295 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:20:01.298 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:20:01.300 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:20:01.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:20:01.326 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:20:01.326 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:20:01.327 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:20:01.353 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:20:01.353 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:20:01.353 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:20:01.353 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:20:01.353 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:20:01.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:20:01.399 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:20:01.399 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:20:01.400 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:20:01.400 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:20:01.728 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:20:01.769 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:20:01.769 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:20:01.769 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:20:01.773 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:20:02.111 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:20:02.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:20:02.119 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:20:02.119 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:20:02.130 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:20:02.130 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:20:02.130 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:20:02.131 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:20:02.131 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:20:02.131 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:20:02.131 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:20:02.131 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:20:02.131 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:20:02.131 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:20:02.131 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:20:02.131 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=293 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:20:02.131 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=293 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:20:02.131 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=293 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:20:02.131 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=293 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:20:02.131 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=293 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:20:02.131 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=293 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:20:02.131 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=294 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:20:02.131 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=294 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:20:02.131 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=294 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:20:02.131 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=294 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:20:02.132 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=294 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:20:02.132 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=294 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:20:02.132 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=294 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:20:02.132 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=294 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:20:07.135 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:20:07.135 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:20:07.136 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:20:07.137 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:20:07.137 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:20:07.138 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:20:07.146 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:20:07.148 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:20:07.148 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:20:07.148 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:20:07.148 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:20:07.154 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:20:07.154 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:20:07.155 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:20:07.155 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:20:07.155 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:20:07.156 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:20:07.156 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:20:07.157 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:20:07.159 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:20:07.159 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:20:07.160 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:20:07.160 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:20:07.160 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:20:07.161 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:20:07.161 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:20:07.161 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:20:07.163 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:20:07.163 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:20:07.164 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:20:07.164 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:20:07.164 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:20:07.164 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:20:07.164 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:20:07.164 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:20:07.167 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:20:07.168 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:20:07.168 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:20:07.168 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:20:07.168 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:20:07.168 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:20:07.168 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:20:07.168 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:20:07.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:20:07.168 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:20:07.168 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:20:07.168 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:20:07.168 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:20:07.168 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:20:07.168 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:20:07.168 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:20:07.169 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:20:07.169 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:20:07.169 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:20:07.169 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:20:07.169 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:20:07.169 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:20:07.169 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:20:07.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:20:07.169 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:20:07.169 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:20:07.169 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:20:07.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:20:07.169 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:20:07.169 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:20:07.169 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:20:07.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:20:07.169 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:20:07.170 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:20:07.170 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:20:07.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:20:07.170 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:20:07.170 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:20:07.170 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:20:07.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:20:07.170 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:20:07.170 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:20:07.170 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:20:07.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:20:07.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:20:07.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:20:07.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:20:07.173 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:20:07.658 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:20:07.698 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:20:07.699 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:20:07.700 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:20:07.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:20:07.717 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:20:07.717 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:20:07.717 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:20:07.762 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:20:07.762 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:20:07.763 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:20:07.764 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:20:07.764 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:20:07.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:20:07.803 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:20:07.803 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:20:07.803 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:20:07.804 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:20:08.136 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:20:08.172 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:20:08.173 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:20:08.175 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:20:08.180 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:20:08.522 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:20:08.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:20:08.531 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:20:08.531 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:20:08.542 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:20:08.543 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:20:08.543 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:20:08.543 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:20:08.549 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:20:08.549 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:20:08.549 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:20:08.549 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:20:08.549 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:20:08.549 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:20:08.550 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:20:08.550 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=293 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:20:08.550 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=293 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:20:08.550 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=293 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:20:08.550 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=293 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:20:08.550 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=294 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:20:08.556 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=294 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:20:13.551 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:20:13.552 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:20:13.552 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:20:13.552 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:20:13.552 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:20:13.552 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:20:13.559 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:20:13.559 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:20:13.559 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:20:13.560 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:20:13.560 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:20:13.563 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:20:13.563 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:20:13.563 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:20:13.563 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:20:13.564 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:20:13.564 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:20:13.564 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:20:13.564 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:20:13.567 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:20:13.567 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:20:13.567 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:20:13.567 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:20:13.568 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:20:13.568 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:20:13.568 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:20:13.568 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:20:13.570 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:20:13.570 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:20:13.570 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:20:13.570 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:20:13.570 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:20:13.570 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:20:13.570 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:20:13.570 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:20:13.573 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:20:13.573 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:20:13.573 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:20:13.573 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:20:13.574 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:20:13.574 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:20:13.574 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:20:13.574 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:20:13.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:20:13.574 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:20:13.574 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:20:13.574 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:20:13.574 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:20:13.574 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:20:13.574 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:20:13.574 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:20:13.574 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:20:13.574 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:20:13.574 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:20:13.575 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:20:13.575 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:20:13.575 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:20:13.575 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:20:13.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:20:13.575 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:20:13.575 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:20:13.575 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:20:13.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:20:13.575 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:20:13.575 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:20:13.575 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:20:13.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:20:13.575 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:20:13.575 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:20:13.575 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:20:13.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:20:13.575 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:20:13.575 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:20:13.575 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:20:13.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:20:13.575 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:20:13.575 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:20:13.575 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:20:13.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:20:13.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:20:13.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:20:13.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:20:13.579 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:20:14.063 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:20:14.101 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:20:14.102 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:20:14.104 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:20:14.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:20:14.125 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:20:14.125 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:20:14.125 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:20:14.149 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:20:14.150 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:20:14.150 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:20:14.150 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:20:14.150 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:20:14.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:20:14.158 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:20:14.158 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:20:14.158 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:20:14.158 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:20:14.540 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:20:14.578 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:20:14.578 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:20:14.578 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:20:14.579 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:20:14.866 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:20:14.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:20:14.874 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:20:14.875 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:20:14.887 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:20:14.887 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:20:14.888 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:20:14.888 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:20:14.893 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:20:14.893 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:20:14.893 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:20:14.893 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:20:14.893 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:20:14.894 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:20:14.894 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:20:14.894 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=282 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:20:14.894 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=282 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:20:14.894 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=282 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:20:14.895 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=282 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:20:14.895 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=282 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:20:14.895 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=282 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:20:14.895 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=282 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:20:19.890 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:20:19.890 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:20:19.892 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:20:19.893 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:20:19.893 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:20:19.894 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:20:19.902 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:20:19.902 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:20:19.902 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:20:19.903 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:20:19.903 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:20:19.904 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:20:19.904 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:20:19.905 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:20:19.905 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:20:19.905 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:20:19.905 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:20:19.905 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:20:19.905 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:20:19.907 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:20:19.907 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:20:19.907 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:20:19.907 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:20:19.907 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:20:19.907 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:20:19.908 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:20:19.908 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:20:19.909 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:20:19.909 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:20:19.910 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:20:19.910 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:20:19.910 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:20:19.910 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:20:19.910 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:20:19.910 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:20:19.913 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:20:19.913 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:20:19.913 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:20:19.913 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:20:19.913 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:20:19.913 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:20:19.914 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:20:19.914 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:20:19.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:20:19.914 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:20:19.914 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:20:19.914 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:20:19.914 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:20:19.914 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:20:19.914 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:20:19.914 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:20:19.914 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:20:19.914 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:20:19.914 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:20:19.914 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:20:19.914 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:20:19.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:20:19.915 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:20:19.915 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:20:19.915 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:20:19.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:20:19.915 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:20:19.915 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:20:19.915 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:20:19.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:20:19.915 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:20:19.915 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:20:19.915 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:20:19.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:20:19.915 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:20:19.915 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:20:19.915 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:20:19.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:20:19.915 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:20:19.915 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:20:19.915 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:20:19.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:20:19.915 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:20:19.916 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:20:19.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:20:19.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:20:19.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:20:19.919 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:20:20.402 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:20:20.439 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:20:20.440 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:20:20.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:20:20.441 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:20:20.459 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:20:20.459 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:20:20.459 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:20:20.509 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:20:20.510 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:20:20.510 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:20:20.510 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:20:20.510 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:20:20.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:20:20.547 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:20:20.547 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-09 03:20:20.548 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:20:20.548 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:20:20.874 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:20:20.917 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:20:20.918 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:20:20.918 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:20:20.920 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:20:21.345 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:20:21.393 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:20:21.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:20:21.402 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:20:21.402 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:20:21.402 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:20:21.413 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:20:21.413 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:20:21.413 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:20:21.414 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:20:21.416 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:20:21.416 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:20:21.416 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:20:21.416 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:20:21.416 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:20:21.416 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:20:21.416 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:20:21.416 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=322 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:20:21.416 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=322 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:20:26.418 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:20:26.418 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:20:26.420 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:20:26.420 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:20:26.421 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:20:26.421 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:20:26.429 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:20:26.430 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:20:26.430 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:20:26.431 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:20:26.431 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:20:26.434 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:20:26.434 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:20:26.435 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:20:26.435 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:20:26.435 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:20:26.436 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:20:26.436 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:20:26.436 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:20:26.437 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:20:26.438 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:20:26.438 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:20:26.438 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:20:26.438 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:20:26.438 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:20:26.438 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:20:26.438 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:20:26.440 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:20:26.440 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:20:26.441 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:20:26.441 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:20:26.441 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:20:26.441 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:20:26.441 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:20:26.441 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:20:26.443 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:20:26.443 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:20:26.444 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:20:26.444 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:20:26.444 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:20:26.444 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:20:26.444 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:20:26.444 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:20:26.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:20:26.444 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:20:26.444 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:20:26.444 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:20:26.444 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:20:26.444 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:20:26.444 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:20:26.444 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:20:26.444 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:20:26.444 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:20:26.444 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:20:26.444 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:20:26.444 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:20:26.444 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:20:26.445 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:20:26.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:20:26.445 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:20:26.445 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:20:26.445 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:20:26.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:20:26.445 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:20:26.445 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:20:26.445 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:20:26.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:20:26.445 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:20:26.445 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:20:26.445 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:20:26.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:20:26.445 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:20:26.445 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:20:26.445 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:20:26.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:20:26.445 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:20:26.445 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:20:26.445 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:20:26.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:20:26.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:20:26.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:20:26.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:20:26.449 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:20:26.933 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:20:26.970 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:20:26.972 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:20:26.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:20:26.975 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:20:26.994 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:20:26.994 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:20:26.994 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:20:27.025 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:20:27.026 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:20:27.026 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:20:27.026 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:20:27.026 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:20:27.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:20:27.081 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:20:27.081 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:20:27.081 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:20:27.082 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:20:27.411 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:20:27.447 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:20:27.448 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:20:27.448 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:20:27.448 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:20:27.797 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:20:27.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:20:27.806 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:20:27.806 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:20:27.816 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:20:27.817 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:20:27.817 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:20:27.817 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:20:27.818 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:20:27.818 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:20:27.818 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:20:27.818 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:20:27.818 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:20:27.818 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:20:27.818 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:20:27.818 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=293 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:20:27.818 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=293 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:20:27.819 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=293 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:20:27.819 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=293 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:20:27.819 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=293 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:20:27.819 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=293 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:20:27.819 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=293 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:20:27.819 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=293 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:20:27.819 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=294 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:20:27.819 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=294 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:20:27.819 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=294 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:20:27.819 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=294 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:20:27.819 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=294 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:20:27.819 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=294 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:20:27.819 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=294 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:20:32.821 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:20:32.821 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:20:32.823 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:20:32.824 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:20:32.825 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:20:32.825 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:20:32.833 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:20:32.834 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:20:32.834 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:20:32.834 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:20:32.834 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:20:32.836 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:20:32.836 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:20:32.836 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:20:32.836 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:20:32.837 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:20:32.837 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:20:32.837 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:20:32.837 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:20:32.838 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:20:32.838 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:20:32.839 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:20:32.839 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:20:32.839 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:20:32.839 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:20:32.839 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:20:32.839 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:20:32.840 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:20:32.840 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:20:32.840 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:20:32.840 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:20:32.841 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:20:32.841 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:20:32.841 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:20:32.841 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:20:32.843 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:20:32.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:20:32.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:20:32.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:20:32.843 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:20:32.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:20:32.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:20:32.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:20:32.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:20:32.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:20:32.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:20:32.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:20:32.843 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:20:32.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:20:32.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:20:32.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:20:32.843 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:20:32.843 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:20:32.843 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:20:32.843 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:20:32.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:20:32.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:20:32.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:20:32.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:20:32.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:20:32.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:20:32.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:20:32.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:20:32.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:20:32.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:20:32.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:20:32.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:20:32.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:20:32.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:20:32.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:20:32.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:20:32.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:20:32.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:20:32.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:20:32.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:20:32.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:20:32.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:20:32.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:20:32.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:20:32.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:20:32.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:20:32.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:20:32.848 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:20:33.332 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:20:33.372 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:20:33.374 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:20:33.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:20:33.378 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:20:33.404 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:20:33.404 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:20:33.405 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:20:33.452 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:20:33.453 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:20:33.453 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:20:33.454 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:20:33.454 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:20:33.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:20:33.478 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:20:33.479 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-09 03:20:33.479 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:20:33.480 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:20:33.810 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:20:33.847 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:20:33.847 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:20:33.847 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:20:33.850 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:20:34.288 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:20:34.339 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:20:34.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:20:34.349 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:20:34.349 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:20:34.349 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:20:34.362 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:20:34.362 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:20:34.362 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:20:34.362 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:20:34.364 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:20:34.364 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:20:34.365 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:20:34.365 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:20:34.365 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:20:34.365 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:20:34.365 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:20:34.365 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=323 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:20:34.365 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=323 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:20:34.365 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=323 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:20:34.365 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=323 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:20:34.365 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=323 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:20:34.365 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=323 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:20:34.365 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=323 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:20:34.365 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=324 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:20:34.365 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=324 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:20:34.365 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=324 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:20:34.365 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=324 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:20:34.365 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=324 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:20:34.365 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=324 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:20:34.365 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=324 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:20:34.365 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=324 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:20:39.366 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:20:39.366 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:20:39.370 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:20:39.370 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:20:39.370 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:20:39.370 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:20:39.377 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:20:39.378 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:20:39.378 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:20:39.379 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:20:39.379 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:20:39.382 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:20:39.382 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:20:39.383 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:20:39.383 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:20:39.383 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:20:39.383 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:20:39.383 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:20:39.383 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:20:39.386 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:20:39.386 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:20:39.386 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:20:39.387 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:20:39.387 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:20:39.387 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:20:39.387 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:20:39.387 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:20:39.389 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:20:39.389 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:20:39.390 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:20:39.390 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:20:39.390 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:20:39.390 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:20:39.390 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:20:39.390 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:20:39.393 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:20:39.393 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:20:39.393 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:20:39.393 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:20:39.393 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:20:39.393 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:20:39.393 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:20:39.394 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:20:39.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:20:39.394 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:20:39.394 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:20:39.394 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:20:39.394 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:20:39.394 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:20:39.394 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:20:39.394 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:20:39.394 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:20:39.394 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:20:39.394 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:20:39.394 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:20:39.394 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:20:39.394 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:20:39.394 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:20:39.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:20:39.394 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:20:39.394 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:20:39.395 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:20:39.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:20:39.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:20:39.395 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:20:39.395 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:20:39.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:20:39.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:20:39.395 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:20:39.395 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:20:39.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:20:39.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:20:39.395 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:20:39.395 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:20:39.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:20:39.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:20:39.395 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:20:39.395 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:20:39.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:20:39.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:20:39.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:20:39.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:20:39.399 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:20:39.883 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:20:39.924 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:20:39.924 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:20:39.924 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:20:39.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:20:39.945 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:20:39.945 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:20:39.945 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:20:39.949 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:20:39.949 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:20:39.949 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:20:39.949 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:20:39.949 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:20:40.352 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:20:40.396 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:20:40.397 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:20:40.398 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:20:40.399 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:20:40.821 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:20:40.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:20:41.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:20:41.091 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:20:41.091 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:20:41.101 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:20:41.101 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:20:41.101 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:20:41.102 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:20:41.102 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:20:41.102 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:20:41.102 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:20:41.102 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:20:41.297 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:20:41.397 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:20:41.398 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:20:41.399 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:20:41.401 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:20:41.775 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:20:42.163 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD NOHANDOVER
2026-01-09 03:20:42.253 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 03:20:42.290 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD NOHANDOVER
2026-01-09 03:20:42.294 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:20:42.294 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:20:42.303 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:20:42.303 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:20:42.304 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:20:42.304 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:20:42.310 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:20:42.310 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:20:42.310 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:20:42.310 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:20:42.310 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:20:42.310 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:20:42.311 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:20:42.311 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=624 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:20:47.310 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:20:47.310 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:20:47.310 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:20:47.310 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:20:47.310 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:20:47.310 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:20:47.318 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:20:47.320 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:20:47.320 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:20:47.321 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:20:47.321 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:20:47.324 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:20:47.325 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:20:47.325 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:20:47.325 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:20:47.325 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:20:47.325 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:20:47.326 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:20:47.326 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:20:47.328 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:20:47.328 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:20:47.329 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:20:47.329 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:20:47.329 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:20:47.329 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:20:47.330 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:20:47.330 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:20:47.331 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:20:47.331 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:20:47.331 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:20:47.331 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:20:47.331 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:20:47.332 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:20:47.332 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:20:47.332 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:20:47.335 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:20:47.335 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:20:47.335 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:20:47.335 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:20:47.335 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:20:47.335 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:20:47.335 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:20:47.335 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:20:47.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:20:47.335 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:20:47.335 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:20:47.335 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:20:47.335 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:20:47.335 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:20:47.335 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:20:47.335 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:20:47.335 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:20:47.335 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:20:47.336 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:20:47.336 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:20:47.336 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:20:47.336 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:20:47.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:20:47.336 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:20:47.336 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:20:47.336 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:20:47.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:20:47.336 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:20:47.336 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:20:47.336 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:20:47.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:20:47.336 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:20:47.336 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:20:47.336 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:20:47.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:20:47.336 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:20:47.336 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:20:47.336 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:20:47.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:20:47.336 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:20:47.336 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:20:47.336 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:20:47.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:20:47.337 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:20:47.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:20:47.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:20:47.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:20:47.340 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:20:47.825 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:20:47.866 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:20:47.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:20:47.870 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:20:47.874 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:20:47.901 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:20:47.901 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:20:47.901 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:20:48.303 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:20:48.339 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:20:48.339 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:20:48.339 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:20:48.342 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:20:48.781 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:20:49.259 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:20:49.340 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:20:49.340 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:20:49.340 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:20:49.343 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:20:49.737 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:20:50.215 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 03:20:50.341 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:20:50.341 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:20:50.341 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:20:50.345 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:20:50.696 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 03:20:51.175 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 03:20:51.342 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:20:51.343 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:20:51.343 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:20:51.347 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:20:51.655 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 03:20:52.137 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 03:20:52.344 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:20:52.344 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:20:52.344 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:20:52.348 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:20:52.618 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 03:20:53.099 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 03:20:53.578 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 03:20:53.909 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:20:53.909 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:20:53.910 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:20:53.910 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:20:53.911 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:20:54.058 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 03:20:54.080 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD NOHANDOVER
2026-01-09 03:20:54.084 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:20:54.084 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:20:54.084 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:20:54.085 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:20:54.536 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 03:20:55.016 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 03:20:55.495 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 03:20:55.973 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 03:20:56.451 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 03:20:56.930 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 03:20:57.048 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:20:57.048 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:20:57.053 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:20:57.053 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:20:57.053 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:20:57.053 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:20:57.054 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:20:57.054 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:20:57.054 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:20:57.055 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:20:57.055 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:20:57.055 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:20:57.055 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:21:02.057 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:21:02.058 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:21:02.059 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:21:02.060 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:21:02.060 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:21:02.061 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:21:02.068 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:21:02.068 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:21:02.068 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:21:02.069 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:21:02.069 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:21:02.072 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:21:02.072 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:21:02.073 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:21:02.073 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:21:02.073 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:21:02.073 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:21:02.073 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:21:02.073 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:21:02.076 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:21:02.076 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:21:02.077 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:21:02.077 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:21:02.077 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:21:02.077 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:21:02.077 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:21:02.077 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:21:02.080 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:21:02.080 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:21:02.080 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:21:02.080 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:21:02.080 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:21:02.080 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:21:02.080 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:21:02.080 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:21:02.084 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:21:02.084 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:21:02.084 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:21:02.084 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:21:02.084 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:21:02.084 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:21:02.085 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:21:02.085 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:21:02.085 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:21:02.085 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:21:02.085 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:21:02.085 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:21:02.085 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:21:02.085 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:21:02.085 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:21:02.085 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:21:02.085 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:21:02.085 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:21:02.085 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:21:02.085 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:21:02.086 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:21:02.086 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:21:02.086 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:21:02.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:21:02.086 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:21:02.086 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:21:02.086 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:21:02.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:21:02.086 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:21:02.086 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:21:02.086 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:21:02.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:21:02.086 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:21:02.086 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:21:02.086 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:21:02.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:21:02.086 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:21:02.086 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:21:02.086 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:21:02.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:21:02.087 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:21:02.087 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:21:02.087 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:21:02.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:21:02.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:21:02.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:21:02.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:21:02.090 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:21:02.574 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:21:02.612 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:21:02.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:21:02.614 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:21:02.616 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:21:02.639 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:21:02.639 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:21:02.639 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:21:03.055 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:21:03.089 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:21:03.090 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:21:03.090 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:21:03.093 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:21:03.535 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:21:04.016 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:21:04.091 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:21:04.092 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:21:04.092 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:21:04.095 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:21:04.498 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:21:04.979 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 03:21:05.092 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:21:05.092 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:21:05.093 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:21:05.096 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:21:05.458 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 03:21:05.936 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 03:21:06.093 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:21:06.094 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:21:06.094 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:21:06.097 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:21:06.414 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 03:21:06.891 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 03:21:07.094 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:21:07.095 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:21:07.095 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:21:07.098 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:21:07.373 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 03:21:07.854 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 03:21:08.334 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 03:21:08.648 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:21:08.649 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:21:08.649 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:21:08.650 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:21:08.650 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:21:08.812 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 03:21:08.837 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD NOHANDOVER
2026-01-09 03:21:08.842 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:21:08.842 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:21:08.842 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:21:08.843 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:21:09.291 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 03:21:09.770 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 03:21:10.249 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 03:21:10.724 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 03:21:11.193 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 03:21:11.662 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 03:21:11.806 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:21:11.807 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:21:11.811 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:21:11.811 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:21:11.811 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:21:11.811 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:21:11.812 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:21:11.812 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:21:11.812 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:21:11.812 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:21:11.812 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:21:11.812 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:21:11.812 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:21:11.812 [WARNING] transceiver.py:250 (TRX2@172.18.122.20:5700/2) RX TRXD message (ver=1 fn=2074 tn=0 bl=148 pwr=8), but transceiver is not running => dropping...
2026-01-09 03:21:11.812 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2074 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:21:11.813 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2074 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:21:11.813 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2074 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:21:11.813 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2074 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:21:11.813 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2074 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:21:11.813 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2074 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:21:11.813 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2074 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:21:16.819 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:21:16.819 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:21:16.819 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:21:16.819 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:21:16.819 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:21:16.819 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:21:16.823 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:21:16.823 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:21:16.823 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:21:16.824 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:21:16.824 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:21:16.825 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:21:16.825 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:21:16.825 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:21:16.825 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:21:16.825 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:21:16.826 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:21:16.826 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:21:16.826 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:21:16.827 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:21:16.828 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:21:16.828 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:21:16.828 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:21:16.828 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:21:16.828 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:21:16.828 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:21:16.829 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:21:16.830 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:21:16.830 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:21:16.830 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:21:16.830 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:21:16.830 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:21:16.830 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:21:16.830 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:21:16.830 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:21:16.833 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:21:16.833 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:21:16.833 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:21:16.833 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:21:16.833 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:21:16.833 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:21:16.833 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:21:16.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:21:16.833 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:21:16.833 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:21:16.833 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:21:16.833 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:21:16.833 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:21:16.833 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:21:16.833 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:21:16.833 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:21:16.833 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:21:16.833 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:21:16.834 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:21:16.834 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:21:16.834 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:21:16.834 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:21:16.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:21:16.834 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:21:16.834 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:21:16.834 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:21:16.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:21:16.834 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:21:16.834 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:21:16.834 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:21:16.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:21:16.834 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:21:16.834 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:21:16.834 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:21:16.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:21:16.834 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:21:16.834 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:21:16.834 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:21:16.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:21:16.834 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:21:16.834 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:21:16.834 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:21:16.835 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:21:16.835 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:21:16.835 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:21:16.835 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:21:16.835 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:21:16.838 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:21:17.323 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:21:17.358 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:21:17.359 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:21:17.361 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:21:17.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:21:17.383 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:21:17.383 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:21:17.384 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:21:17.803 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:21:17.836 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:21:17.836 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:21:17.837 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:21:17.839 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:21:18.284 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:21:18.762 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:21:18.837 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:21:18.837 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:21:18.837 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:21:18.841 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:21:19.240 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:21:19.719 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 03:21:19.838 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:21:19.838 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:21:19.838 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:21:19.842 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:21:20.198 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 03:21:20.676 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 03:21:20.840 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:21:20.840 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:21:20.840 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:21:20.844 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:21:21.154 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 03:21:21.632 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 03:21:21.841 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:21:21.841 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:21:21.841 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:21:21.845 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:21:22.110 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 03:21:22.588 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 03:21:23.066 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 03:21:23.392 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:21:23.393 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:21:23.393 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:21:23.394 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:21:23.394 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:21:23.544 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 03:21:23.570 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD NOHANDOVER
2026-01-09 03:21:23.576 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:21:23.576 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:21:23.576 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:21:23.576 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:21:24.022 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 03:21:24.500 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 03:21:24.978 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 03:21:25.461 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 03:21:25.940 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 03:21:26.419 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 03:21:26.540 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:21:26.540 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:21:26.546 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:21:26.546 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:21:26.546 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:21:26.546 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:21:26.547 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:21:26.547 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:21:26.547 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:21:26.547 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:21:26.547 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:21:26.547 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:21:26.547 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:21:31.549 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:21:31.549 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:21:31.551 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:21:31.551 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:21:31.551 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:21:31.552 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:21:31.559 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:21:31.560 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:21:31.560 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:21:31.560 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:21:31.560 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:21:31.563 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:21:31.563 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:21:31.564 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:21:31.564 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:21:31.564 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:21:31.564 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:21:31.565 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:21:31.565 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:21:31.566 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:21:31.566 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:21:31.566 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:21:31.566 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:21:31.566 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:21:31.566 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:21:31.566 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:21:31.566 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:21:31.568 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:21:31.568 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:21:31.568 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:21:31.569 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:21:31.569 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:21:31.569 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:21:31.569 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:21:31.569 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:21:31.571 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:21:31.571 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:21:31.571 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:21:31.571 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:21:31.571 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:21:31.571 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:21:31.572 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:21:31.572 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:21:31.572 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:21:31.572 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:21:31.572 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:21:31.572 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:21:31.572 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:21:31.572 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:21:31.572 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:21:31.572 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:21:31.572 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:21:31.572 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:21:31.572 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:21:31.572 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:21:31.572 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:21:31.572 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:21:31.572 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:21:31.572 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:21:31.572 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:21:31.572 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:21:31.572 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:21:31.572 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:21:31.572 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:21:31.573 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:21:31.573 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:21:31.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:21:31.573 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:21:31.573 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:21:31.573 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:21:31.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:21:31.573 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:21:31.573 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:21:31.573 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:21:31.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:21:31.573 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:21:31.573 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:21:31.573 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:21:31.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:21:31.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:21:31.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:21:31.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:21:31.577 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:21:32.062 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:21:32.093 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:21:32.094 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:21:32.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:21:32.095 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:21:32.113 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:21:32.113 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:21:32.113 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:21:32.541 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:21:32.575 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:21:32.575 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:21:32.576 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:21:32.578 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:21:33.022 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:21:33.502 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:21:33.576 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:21:33.576 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:21:33.577 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:21:33.578 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:21:33.981 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:21:34.461 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 03:21:34.577 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:21:34.577 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:21:34.578 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:21:34.580 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:21:34.942 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 03:21:35.420 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 03:21:35.579 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:21:35.579 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:21:35.580 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:21:35.581 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:21:35.896 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 03:21:36.365 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 03:21:36.580 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:21:36.580 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:21:36.580 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:21:36.583 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:21:36.835 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 03:21:37.316 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 03:21:37.797 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 03:21:38.124 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:21:38.124 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:21:38.124 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:21:38.125 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:21:38.125 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:21:38.275 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 03:21:38.300 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD NOHANDOVER
2026-01-09 03:21:38.306 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:21:38.306 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:21:38.306 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:21:38.307 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:21:38.745 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 03:21:39.214 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 03:21:39.684 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 03:21:40.155 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 03:21:40.626 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 03:21:41.096 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 03:21:41.270 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:21:41.271 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:21:41.274 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:21:41.274 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:21:41.274 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:21:41.274 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:21:41.275 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:21:41.275 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:21:41.275 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:21:41.275 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:21:41.275 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:21:41.275 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:21:41.275 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:21:41.275 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2080 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:21:41.275 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2080 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:21:41.275 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2080 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:21:41.275 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2080 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:21:41.275 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2080 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:21:41.275 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2080 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:21:46.278 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:21:46.278 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:21:46.281 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:21:46.281 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:21:46.281 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:21:46.281 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:21:46.289 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:21:46.291 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:21:46.291 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:21:46.292 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:21:46.292 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:21:46.295 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:21:46.296 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:21:46.296 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:21:46.296 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:21:46.296 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:21:46.297 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:21:46.297 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:21:46.297 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:21:46.299 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:21:46.299 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:21:46.299 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:21:46.300 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:21:46.300 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:21:46.300 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:21:46.300 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:21:46.300 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:21:46.302 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:21:46.302 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:21:46.302 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:21:46.302 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:21:46.302 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:21:46.302 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:21:46.302 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:21:46.302 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:21:46.305 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:21:46.305 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:21:46.305 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:21:46.305 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:21:46.305 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:21:46.305 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:21:46.306 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:21:46.306 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:21:46.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:21:46.306 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:21:46.306 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:21:46.306 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:21:46.306 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:21:46.306 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:21:46.306 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:21:46.306 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:21:46.306 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:21:46.306 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:21:46.306 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:21:46.306 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:21:46.306 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:21:46.306 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:21:46.306 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:21:46.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:21:46.306 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:21:46.307 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:21:46.307 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:21:46.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:21:46.307 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:21:46.307 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:21:46.307 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:21:46.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:21:46.307 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:21:46.307 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:21:46.307 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:21:46.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:21:46.307 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:21:46.307 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:21:46.307 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:21:46.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:21:46.307 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:21:46.307 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:21:46.307 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:21:46.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:21:46.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:21:46.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:21:46.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:21:46.311 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:21:46.794 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:21:46.826 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:21:46.826 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:21:46.827 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:21:46.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:21:46.844 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:21:46.844 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:21:46.845 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:21:47.273 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:21:47.310 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:21:47.310 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:21:47.310 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:21:47.312 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:21:47.754 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:21:48.234 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:21:48.311 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:21:48.311 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:21:48.311 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:21:48.314 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:21:48.715 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:21:49.196 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 03:21:49.312 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:21:49.313 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:21:49.313 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:21:49.315 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:21:49.676 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 03:21:50.153 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 03:21:50.313 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:21:50.314 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:21:50.314 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:21:50.317 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:21:50.621 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 03:21:51.092 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 03:21:51.315 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:21:51.315 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:21:51.315 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:21:51.318 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:21:51.570 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 03:21:52.047 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 03:21:52.526 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 03:21:52.852 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:21:52.852 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:21:52.852 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:21:52.853 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:21:52.853 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:21:53.003 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 03:21:53.028 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD NOHANDOVER
2026-01-09 03:21:53.030 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:21:53.031 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:21:53.031 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:21:53.031 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:21:53.482 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 03:21:53.960 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 03:21:54.438 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 03:21:54.907 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 03:21:55.376 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 03:21:55.847 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 03:21:55.995 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:21:55.995 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:21:56.000 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:21:56.000 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:21:56.000 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:21:56.000 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:21:56.001 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:21:56.001 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:21:56.001 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:21:56.001 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:21:56.001 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:21:56.001 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:21:56.001 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:22:01.007 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:22:01.007 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:22:01.007 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:22:01.007 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:22:01.007 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:22:01.007 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:22:01.016 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:22:01.018 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:22:01.018 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:22:01.018 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:22:01.018 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:22:01.022 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:22:01.022 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:22:01.022 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:22:01.022 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:22:01.023 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:22:01.023 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:22:01.023 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:22:01.023 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:22:01.026 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:22:01.026 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:22:01.026 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:22:01.026 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:22:01.026 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:22:01.026 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:22:01.026 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:22:01.026 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:22:01.028 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:22:01.028 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:22:01.029 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:22:01.029 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:22:01.029 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:22:01.029 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:22:01.029 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:22:01.029 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:22:01.031 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:22:01.031 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:22:01.031 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:22:01.031 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:22:01.031 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:22:01.031 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:22:01.032 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:22:01.032 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:22:01.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:22:01.032 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:22:01.032 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:22:01.032 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:22:01.032 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:22:01.032 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:22:01.032 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:22:01.032 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:22:01.032 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:22:01.032 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:22:01.032 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:22:01.032 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:22:01.032 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:22:01.032 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:22:01.032 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:22:01.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:22:01.032 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:22:01.032 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:22:01.032 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:22:01.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:22:01.032 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:22:01.032 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:22:01.032 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:22:01.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:22:01.032 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:22:01.032 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:22:01.032 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:22:01.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:22:01.032 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:22:01.032 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:22:01.033 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:22:01.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:22:01.033 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:22:01.033 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:22:01.033 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:22:01.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:22:01.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:22:01.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:22:01.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:22:01.037 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:22:01.522 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:22:01.560 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:22:01.562 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:22:01.564 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:22:01.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:22:02.001 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:22:02.036 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:22:02.036 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:22:02.036 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:22:02.038 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:22:02.482 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:22:02.964 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:22:03.037 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:22:03.037 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:22:03.037 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:22:03.039 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:22:03.443 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:22:03.921 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 03:22:04.039 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:22:04.039 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:22:04.039 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:22:04.041 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:22:04.400 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 03:22:04.878 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 03:22:05.040 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:22:05.041 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:22:05.041 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:22:05.043 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:22:05.356 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 03:22:05.834 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 03:22:06.042 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:22:06.042 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:22:06.042 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:22:06.044 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:22:06.313 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 03:22:06.792 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 03:22:07.269 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 03:22:07.737 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 03:22:08.207 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 03:22:08.685 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 03:22:09.163 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 03:22:09.641 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 03:22:10.119 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 03:22:10.597 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 03:22:11.076 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 03:22:11.558 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 03:22:11.574 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:22:11.574 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:22:11.574 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:22:11.574 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:22:11.575 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:22:11.575 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:22:11.575 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:22:11.575 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:22:11.575 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:22:11.575 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:22:11.575 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:22:16.579 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:22:16.579 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:22:16.581 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:22:16.581 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:22:16.581 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:22:16.582 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:22:16.590 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:22:16.590 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:22:16.590 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:22:16.590 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:22:16.590 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:22:16.591 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:22:16.591 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:22:16.591 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:22:16.591 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:22:16.592 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:22:16.592 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:22:16.592 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:22:16.592 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:22:16.593 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:22:16.593 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:22:16.593 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:22:16.593 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:22:16.593 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:22:16.593 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:22:16.593 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:22:16.593 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:22:16.595 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:22:16.595 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:22:16.595 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:22:16.595 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:22:16.595 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:22:16.595 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:22:16.595 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:22:16.595 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:22:16.597 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:22:16.598 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:22:16.598 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:22:16.598 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:22:16.598 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:22:16.598 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:22:16.598 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:22:16.598 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:22:16.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:22:16.598 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:22:16.598 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:22:16.598 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:22:16.598 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:22:16.598 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:22:16.598 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:22:16.598 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:22:16.598 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:22:16.598 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:22:16.598 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:22:16.598 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:22:16.599 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:22:16.599 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:22:16.599 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:22:16.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:22:16.599 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:22:16.599 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:22:16.599 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:22:16.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:22:16.599 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:22:16.599 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:22:16.599 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:22:16.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:22:16.599 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:22:16.599 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:22:16.599 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:22:16.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:22:16.599 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:22:16.600 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:22:16.600 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:22:16.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:22:16.600 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:22:16.600 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:22:16.600 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:22:16.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:22:16.600 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:22:16.600 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:22:16.600 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:22:16.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:22:16.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:22:16.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:22:16.601 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:22:16.601 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:22:16.601 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:22:16.601 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:22:21.605 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:22:21.605 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:22:21.607 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:22:21.607 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:22:21.608 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:22:21.608 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:22:21.616 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:22:21.617 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:22:21.617 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:22:21.617 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:22:21.617 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:22:21.620 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:22:21.620 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:22:21.620 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:22:21.620 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:22:21.621 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:22:21.621 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:22:21.621 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:22:21.621 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:22:21.622 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:22:21.623 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:22:21.623 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:22:21.623 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:22:21.623 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:22:21.623 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:22:21.623 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:22:21.623 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:22:21.625 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:22:21.625 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:22:21.625 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:22:21.625 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:22:21.625 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:22:21.625 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:22:21.625 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:22:21.625 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:22:21.627 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:22:21.627 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:22:21.627 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:22:21.627 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:22:21.627 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:22:21.627 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:22:21.628 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:22:21.628 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:22:21.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:22:21.628 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:22:21.628 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:22:21.628 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:22:21.628 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:22:21.628 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:22:21.628 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:22:21.628 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:22:21.628 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:22:21.628 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:22:21.628 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:22:21.628 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:22:21.628 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:22:21.628 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:22:21.628 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:22:21.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:22:21.628 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:22:21.628 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:22:21.628 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:22:21.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:22:21.628 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:22:21.628 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:22:21.628 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:22:21.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:22:21.628 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:22:21.628 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:22:21.629 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:22:21.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:22:21.629 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:22:21.629 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:22:21.629 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:22:21.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:22:21.629 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:22:21.629 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:22:21.629 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:22:21.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:22:21.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:22:21.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:22:21.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:22:21.633 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:22:22.118 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:22:22.153 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:22:22.155 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:22:22.157 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:22:22.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:22:22.160 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:22:22.160 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:22:22.160 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:22:22.160 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:22:22.160 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:22:22.161 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:22:22.161 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:22:22.161 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:22:22.590 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:22:22.630 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:22:22.630 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:22:22.632 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:22:22.633 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:22:23.065 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:22:23.542 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:22:23.630 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:22:23.631 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:22:23.633 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:22:23.633 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:22:24.019 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:22:24.497 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 03:22:24.631 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:22:24.632 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:22:24.634 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:22:24.635 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:22:24.975 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 03:22:25.453 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 03:22:25.632 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:22:25.633 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:22:25.635 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:22:25.635 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:22:25.931 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 03:22:26.409 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 03:22:26.633 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:22:26.634 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:22:26.635 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:22:26.636 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:22:26.886 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 03:22:27.365 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 03:22:27.843 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 03:22:28.321 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 03:22:28.799 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 03:22:29.277 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 03:22:29.754 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 03:22:30.214 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:22:30.214 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:22:30.220 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:22:30.220 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:22:30.220 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:22:30.220 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:22:30.221 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:22:30.221 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:22:30.221 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:22:30.221 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:22:30.221 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:22:30.221 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:22:30.221 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:22:30.221 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1837 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:22:30.221 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1837 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:22:30.221 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1837 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:22:30.221 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1837 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:22:30.221 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1837 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:22:30.221 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1837 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:22:30.221 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1837 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:22:30.221 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1837 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:22:35.224 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:22:35.224 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:22:35.226 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:22:35.228 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:22:35.230 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:22:35.233 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:22:35.242 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:22:35.243 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:22:35.243 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:22:35.244 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:22:35.244 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:22:35.246 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:22:35.246 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:22:35.247 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:22:35.247 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:22:35.247 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:22:35.247 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:22:35.247 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:22:35.247 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:22:35.249 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:22:35.249 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:22:35.249 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:22:35.249 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:22:35.249 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:22:35.249 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:22:35.249 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:22:35.249 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:22:35.251 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:22:35.251 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:22:35.251 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:22:35.251 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:22:35.251 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:22:35.251 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:22:35.251 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:22:35.251 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:22:35.253 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:22:35.253 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:22:35.253 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:22:35.253 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:22:35.253 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:22:35.253 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:22:35.253 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:22:35.254 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:22:35.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:22:35.254 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:22:35.254 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:22:35.254 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:22:35.254 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:22:35.254 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:22:35.254 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:22:35.254 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:22:35.254 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:22:35.254 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:22:35.254 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:22:35.254 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:22:35.254 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:22:35.254 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:22:35.254 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:22:35.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:22:35.254 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:22:35.254 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:22:35.254 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:22:35.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:22:35.254 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:22:35.254 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:22:35.254 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:22:35.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:22:35.254 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:22:35.254 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:22:35.254 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:22:35.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:22:35.254 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:22:35.255 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:22:35.255 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:22:35.255 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:22:35.255 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:22:35.255 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:22:35.255 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:22:35.255 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:22:35.255 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:22:35.255 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:22:35.255 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:22:35.255 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:22:35.255 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:22:35.255 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:22:35.255 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:22:35.256 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:22:35.256 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:22:35.256 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:22:40.262 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:22:40.262 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:22:40.262 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:22:40.262 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:22:40.262 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:22:40.263 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:22:40.269 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:22:40.270 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:22:40.270 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:22:40.270 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:22:40.270 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:22:40.271 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:22:40.271 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:22:40.271 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:22:40.271 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:22:40.271 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:22:40.271 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:22:40.271 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:22:40.271 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:22:40.272 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:22:40.272 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:22:40.272 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:22:40.272 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:22:40.272 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:22:40.272 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:22:40.272 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:22:40.272 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:22:40.273 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:22:40.273 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:22:40.273 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:22:40.273 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:22:40.273 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:22:40.273 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:22:40.273 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:22:40.273 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:22:40.275 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:22:40.275 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:22:40.275 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:22:40.275 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:22:40.275 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:22:40.275 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:22:40.275 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:22:40.275 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:22:40.275 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:22:40.275 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:22:40.275 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:22:40.275 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:22:40.275 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:22:40.275 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:22:40.275 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:22:40.275 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:22:40.275 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:22:40.275 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:22:40.275 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:22:40.276 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:22:40.276 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:22:40.276 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:22:40.276 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:22:40.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:22:40.276 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:22:40.276 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:22:40.276 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:22:40.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:22:40.276 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:22:40.276 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:22:40.276 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:22:40.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:22:40.276 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:22:40.276 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:22:40.276 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:22:40.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:22:40.276 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:22:40.276 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:22:40.276 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:22:40.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:22:40.276 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:22:40.276 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:22:40.276 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:22:40.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:22:40.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:22:40.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:22:40.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:22:40.280 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:22:40.763 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:22:40.808 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:22:40.811 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:22:40.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:22:40.813 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:22:40.816 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:22:40.816 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:22:40.816 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:22:40.817 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:22:40.817 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:22:40.817 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:22:40.817 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:22:40.817 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:22:41.241 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:22:41.278 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:22:41.279 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:22:41.279 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:22:41.281 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:22:41.719 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:22:42.197 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:22:42.279 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:22:42.280 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:22:42.280 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:22:42.283 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:22:42.675 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:22:43.153 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 03:22:43.280 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:22:43.281 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:22:43.281 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:22:43.283 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:22:43.631 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 03:22:44.109 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 03:22:44.281 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:22:44.281 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:22:44.282 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:22:44.284 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:22:44.587 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 03:22:45.065 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 03:22:45.282 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:22:45.283 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:22:45.283 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:22:45.285 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:22:45.544 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 03:22:46.021 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 03:22:46.499 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 03:22:46.977 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 03:22:47.455 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 03:22:47.933 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 03:22:48.411 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 03:22:48.857 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:22:48.858 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:22:48.864 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:22:48.864 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:22:48.864 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:22:48.865 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:22:48.867 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:22:48.867 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:22:48.867 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:22:48.867 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:22:48.867 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:22:48.867 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:22:48.867 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:22:48.867 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1833 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:22:48.867 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1833 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:22:48.868 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1833 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:22:48.868 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1833 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:22:48.868 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1833 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:22:48.868 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1834 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:22:48.868 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1834 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:22:48.868 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1834 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:22:48.868 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1834 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:22:48.868 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1834 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:22:48.868 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1834 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:22:48.869 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1834 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:22:48.869 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1834 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:22:53.869 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:22:53.869 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:22:53.871 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:22:53.871 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:22:53.871 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:22:53.872 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:22:53.881 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:22:53.881 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:22:53.881 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:22:53.882 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:22:53.882 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:22:53.883 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:22:53.884 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:22:53.884 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:22:53.884 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:22:53.884 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:22:53.884 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:22:53.885 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:22:53.885 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:22:53.886 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:22:53.886 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:22:53.886 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:22:53.886 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:22:53.886 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:22:53.886 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:22:53.886 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:22:53.886 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:22:53.888 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:22:53.888 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:22:53.888 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:22:53.888 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:22:53.888 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:22:53.888 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:22:53.888 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:22:53.888 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:22:53.890 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:22:53.890 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:22:53.890 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:22:53.890 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:22:53.890 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:22:53.891 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:22:53.891 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:22:53.891 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:22:53.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:22:53.891 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:22:53.891 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:22:53.891 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:22:53.891 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:22:53.891 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:22:53.891 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:22:53.891 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:22:53.891 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:22:53.891 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:22:53.891 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:22:53.891 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:22:53.891 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:22:53.891 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:22:53.891 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:22:53.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:22:53.891 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:22:53.891 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:22:53.891 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:22:53.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:22:53.891 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:22:53.891 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:22:53.891 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:22:53.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:22:53.891 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:22:53.892 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:22:53.892 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:22:53.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:22:53.892 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:22:53.892 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:22:53.892 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:22:53.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:22:53.892 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:22:53.892 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:22:53.892 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:22:53.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:22:53.892 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:22:53.892 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:22:53.893 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:22:53.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:22:53.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:22:53.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:22:53.893 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:22:53.893 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:22:53.893 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:22:53.893 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:22:58.897 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:22:58.897 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:22:58.901 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:22:58.901 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:22:58.901 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:22:58.901 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:22:58.909 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:22:58.911 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:22:58.911 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:22:58.912 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:22:58.912 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:22:58.915 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:22:58.915 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:22:58.915 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:22:58.915 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:22:58.916 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:22:58.916 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:22:58.916 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:22:58.916 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:22:58.918 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:22:58.918 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:22:58.918 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:22:58.919 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:22:58.919 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:22:58.919 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:22:58.919 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:22:58.919 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:22:58.921 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:22:58.922 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:22:58.922 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:22:58.922 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:22:58.922 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:22:58.922 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:22:58.922 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:22:58.922 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:22:58.925 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:22:58.925 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:22:58.926 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:22:58.926 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:22:58.926 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:22:58.926 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:22:58.926 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:22:58.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:22:58.926 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:22:58.926 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:22:58.926 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:22:58.926 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:22:58.926 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:22:58.926 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:22:58.926 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:22:58.926 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:22:58.926 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:22:58.927 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:22:58.927 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:22:58.927 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:22:58.927 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:22:58.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:22:58.927 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:22:58.927 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:22:58.927 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:22:58.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:22:58.927 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:22:58.927 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:22:58.927 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:22:58.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:22:58.927 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:22:58.927 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:22:58.927 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:22:58.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:22:58.928 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:22:58.928 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:22:58.928 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:22:58.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:22:58.928 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:22:58.928 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:22:58.928 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:22:58.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:22:58.928 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:22:58.928 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:22:58.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:22:58.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:22:58.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:22:58.931 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:22:59.415 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:22:59.462 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:22:59.464 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:22:59.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:22:59.467 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:22:59.471 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:22:59.471 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:22:59.472 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:22:59.472 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:22:59.473 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:22:59.473 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:22:59.473 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:22:59.473 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:22:59.892 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:22:59.930 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:22:59.931 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:22:59.931 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:22:59.935 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:23:00.370 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:23:00.849 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:23:00.932 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:23:00.932 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:23:00.932 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:23:00.936 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:23:01.327 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:23:01.805 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 03:23:01.933 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:23:01.933 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:23:01.933 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:23:01.936 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:23:02.282 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 03:23:02.761 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 03:23:02.934 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:23:02.935 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:23:02.935 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:23:02.937 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:23:03.239 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 03:23:03.717 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 03:23:03.935 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:23:03.935 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:23:03.936 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:23:03.938 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:23:04.195 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 03:23:04.673 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 03:23:05.151 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 03:23:05.655 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 03:23:06.133 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 03:23:06.611 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 03:23:07.089 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 03:23:07.510 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:23:07.510 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:23:07.516 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:23:07.516 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:23:07.516 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:23:07.516 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:23:07.522 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:23:07.522 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:23:07.522 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:23:07.522 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:23:07.522 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:23:07.522 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:23:07.523 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:23:07.523 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1828 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:23:07.523 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1828 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:23:12.521 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:23:12.521 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:23:12.522 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:23:12.523 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:23:12.523 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:23:12.524 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:23:12.529 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:23:12.530 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:23:12.530 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:23:12.530 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:23:12.530 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:23:12.532 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:23:12.532 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:23:12.532 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:23:12.532 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:23:12.532 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:23:12.532 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:23:12.532 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:23:12.532 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:23:12.534 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:23:12.534 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:23:12.534 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:23:12.534 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:23:12.534 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:23:12.534 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:23:12.534 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:23:12.534 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:23:12.536 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:23:12.536 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:23:12.536 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:23:12.536 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:23:12.536 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:23:12.536 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:23:12.536 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:23:12.536 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:23:12.538 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:23:12.538 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:23:12.538 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:23:12.538 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:23:12.538 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:23:12.538 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:23:12.538 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:23:12.538 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:23:12.538 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:23:12.538 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:23:12.538 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:23:12.538 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:23:12.538 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:23:12.538 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:23:12.539 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:23:12.539 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:23:12.539 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:23:12.539 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:23:12.539 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:23:12.539 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:23:12.539 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:23:12.539 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:23:12.539 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:23:12.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:23:12.539 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:23:12.539 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:23:12.539 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:23:12.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:23:12.540 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:23:12.540 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:23:12.540 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:23:12.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:23:12.540 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:23:12.540 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:23:12.540 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:23:12.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:23:12.540 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:23:12.540 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:23:12.540 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:23:12.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:23:12.540 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:23:12.540 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:23:12.540 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:23:12.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:23:12.540 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:23:12.540 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:23:12.540 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:23:12.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:23:12.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:23:12.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:23:12.540 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:23:12.540 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:23:12.540 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:23:12.540 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:23:17.544 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:23:17.544 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:23:17.545 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:23:17.546 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:23:17.546 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:23:17.547 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:23:17.552 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:23:17.552 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:23:17.553 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:23:17.553 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:23:17.553 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:23:17.555 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:23:17.555 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:23:17.556 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:23:17.556 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:23:17.556 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:23:17.556 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:23:17.556 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:23:17.556 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:23:17.558 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:23:17.558 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:23:17.558 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:23:17.558 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:23:17.558 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:23:17.558 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:23:17.559 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:23:17.559 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:23:17.560 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:23:17.560 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:23:17.561 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:23:17.561 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:23:17.561 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:23:17.561 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:23:17.561 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:23:17.561 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:23:17.564 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:23:17.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:23:17.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:23:17.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:23:17.564 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:23:17.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:23:17.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:23:17.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:23:17.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:23:17.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:23:17.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:23:17.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:23:17.564 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:23:17.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:23:17.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:23:17.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:23:17.564 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:23:17.564 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:23:17.564 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:23:17.565 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:23:17.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:23:17.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:23:17.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:23:17.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:23:17.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:23:17.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:23:17.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:23:17.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:23:17.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:23:17.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:23:17.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:23:17.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:23:17.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:23:17.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:23:17.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:23:17.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:23:17.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:23:17.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:23:17.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:23:17.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:23:17.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:23:17.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:23:17.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:23:17.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:23:17.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:23:17.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:23:17.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:23:17.569 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:23:18.053 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:23:18.096 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:23:18.099 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:23:18.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:23:18.101 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:23:18.104 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:23:18.104 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:23:18.105 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:23:18.105 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:23:18.105 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:23:18.105 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:23:18.105 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:23:18.106 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:23:18.531 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:23:18.567 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:23:18.568 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:23:18.568 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:23:18.572 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:23:19.008 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:23:19.486 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:23:19.569 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:23:19.569 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:23:19.569 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:23:19.573 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:23:19.964 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:23:20.441 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 03:23:20.570 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:23:20.570 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:23:20.570 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:23:20.574 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:23:20.916 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 03:23:21.395 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 03:23:21.570 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:23:21.571 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:23:21.571 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:23:21.575 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:23:21.873 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 03:23:22.350 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 03:23:22.571 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:23:22.572 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:23:22.572 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:23:22.577 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:23:22.828 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 03:23:23.306 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 03:23:23.783 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 03:23:24.257 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 03:23:24.726 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 03:23:25.204 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 03:23:25.682 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 03:23:26.149 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:23:26.149 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:23:26.154 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:23:26.155 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:23:26.155 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:23:26.155 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:23:26.158 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:23:26.158 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:23:26.158 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:23:26.158 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:23:26.158 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:23:26.158 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:23:26.158 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:23:26.158 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1838 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:23:26.158 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1838 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:23:31.160 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:23:31.160 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:23:31.161 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:23:31.162 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:23:31.162 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:23:31.163 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:23:31.167 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:23:31.167 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:23:31.167 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:23:31.167 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:23:31.167 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:23:31.168 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:23:31.168 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:23:31.169 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:23:31.169 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:23:31.169 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:23:31.169 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:23:31.169 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:23:31.169 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:23:31.170 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:23:31.170 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:23:31.170 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:23:31.170 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:23:31.170 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:23:31.170 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:23:31.170 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:23:31.170 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:23:31.171 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:23:31.171 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:23:31.171 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:23:31.171 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:23:31.171 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:23:31.172 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:23:31.172 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:23:31.172 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:23:31.173 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:23:31.173 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:23:31.173 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:23:31.173 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:23:31.173 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:23:31.174 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:23:31.174 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:23:31.174 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:23:31.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:23:31.174 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:23:31.174 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:23:31.174 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:23:31.174 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:23:31.174 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:23:31.174 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:23:31.174 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:23:31.174 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:23:31.174 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:23:31.174 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:23:31.174 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:23:31.174 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:23:31.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:23:31.174 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:23:31.174 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:23:31.174 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:23:31.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:23:31.174 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:23:31.174 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:23:31.174 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:23:31.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:23:31.174 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:23:31.174 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:23:31.174 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:23:31.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:23:31.174 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:23:31.174 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:23:31.175 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:23:31.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:23:31.175 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:23:31.175 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:23:31.175 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:23:31.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:23:31.175 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:23:31.175 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:23:31.175 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:23:31.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:23:31.175 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:23:31.176 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:23:31.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:23:31.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:23:31.176 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:23:31.176 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:23:31.176 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:23:31.176 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:23:36.180 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:23:36.180 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:23:36.181 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:23:36.182 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:23:36.183 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:23:36.183 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:23:36.188 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:23:36.189 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:23:36.189 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:23:36.189 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:23:36.189 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:23:36.191 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:23:36.192 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:23:36.192 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:23:36.192 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:23:36.192 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:23:36.192 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:23:36.193 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:23:36.193 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:23:36.194 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:23:36.194 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:23:36.194 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:23:36.194 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:23:36.194 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:23:36.194 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:23:36.194 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:23:36.194 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:23:36.196 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:23:36.196 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:23:36.196 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:23:36.196 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:23:36.196 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:23:36.196 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:23:36.196 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:23:36.196 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:23:36.199 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:23:36.199 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:23:36.199 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:23:36.199 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:23:36.199 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:23:36.199 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:23:36.199 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:23:36.199 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:23:36.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:23:36.199 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:23:36.199 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:23:36.199 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:23:36.199 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:23:36.199 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:23:36.199 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:23:36.199 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:23:36.199 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:23:36.199 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:23:36.199 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:23:36.199 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:23:36.200 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:23:36.200 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:23:36.200 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:23:36.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:23:36.200 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:23:36.200 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:23:36.200 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:23:36.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:23:36.200 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:23:36.200 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:23:36.200 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:23:36.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:23:36.200 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:23:36.200 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:23:36.200 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:23:36.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:23:36.200 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:23:36.200 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:23:36.200 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:23:36.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:23:36.200 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:23:36.200 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:23:36.200 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:23:36.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:23:36.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:23:36.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:23:36.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:23:36.204 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:23:36.688 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:23:36.728 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:23:36.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:23:36.732 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:23:36.734 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:23:36.737 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:23:36.738 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:23:36.738 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:23:36.739 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:23:36.739 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:23:36.739 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:23:36.739 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:23:36.739 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:23:37.166 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:23:37.202 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:23:37.202 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:23:37.202 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:23:37.203 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:23:37.643 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:23:38.121 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:23:38.203 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:23:38.203 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:23:38.203 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:23:38.203 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:23:38.599 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:23:39.077 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 03:23:39.204 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:23:39.204 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:23:39.204 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:23:39.204 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:23:39.554 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 03:23:40.031 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 03:23:40.205 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:23:40.205 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:23:40.205 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:23:40.205 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:23:40.509 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 03:23:40.987 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 03:23:41.205 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:23:41.206 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:23:41.206 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:23:41.206 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:23:41.464 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 03:23:41.942 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 03:23:42.420 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 03:23:42.898 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 03:23:43.375 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 03:23:43.853 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 03:23:44.331 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 03:23:44.809 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 03:23:45.286 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 03:23:45.764 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 03:23:46.242 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 03:23:46.720 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 03:23:47.198 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 03:23:47.676 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 03:23:48.154 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 03:23:48.633 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 03:23:49.110 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-09 03:23:49.588 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-09 03:23:50.065 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-09 03:23:50.543 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-09 03:23:50.783 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:23:50.784 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:23:50.790 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:23:50.790 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:23:50.791 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:23:50.791 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:23:50.795 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:23:50.796 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:23:50.796 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:23:50.796 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:23:50.796 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:23:50.796 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:23:50.796 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:23:50.797 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3116 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:23:50.797 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3116 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:23:50.797 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3116 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:23:50.797 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3116 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:23:50.797 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3116 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:23:50.797 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3116 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:23:50.797 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3116 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:23:55.793 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:23:55.793 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:23:55.794 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:23:55.795 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:23:55.795 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:23:55.796 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:23:55.801 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:23:55.801 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:23:55.801 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:23:55.801 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:23:55.801 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:23:55.803 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:23:55.803 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:23:55.803 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:23:55.803 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:23:55.804 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:23:55.804 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:23:55.804 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:23:55.804 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:23:55.806 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:23:55.806 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:23:55.806 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:23:55.806 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:23:55.806 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:23:55.806 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:23:55.806 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:23:55.806 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:23:55.808 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:23:55.808 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:23:55.808 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:23:55.808 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:23:55.808 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:23:55.809 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:23:55.809 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:23:55.809 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:23:55.811 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:23:55.811 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:23:55.811 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:23:55.811 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:23:55.812 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:23:55.812 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:23:55.812 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:23:55.812 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:23:55.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:23:55.812 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:23:55.812 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:23:55.812 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:23:55.812 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:23:55.812 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:23:55.812 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:23:55.812 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:23:55.812 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:23:55.812 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:23:55.812 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:23:55.812 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:23:55.812 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:23:55.812 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:23:55.813 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:23:55.813 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:23:55.813 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:23:55.813 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:23:55.813 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:23:55.813 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:23:55.813 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:23:55.813 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:23:55.813 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:23:55.813 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:23:55.813 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:23:55.813 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:23:55.813 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:23:55.813 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:23:55.813 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:23:55.813 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:23:55.813 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:23:55.813 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:23:55.813 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:23:55.813 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:23:55.813 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:23:55.813 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:23:55.815 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:23:55.815 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:23:55.815 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:23:55.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:23:55.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:23:55.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:23:55.815 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:23:55.815 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:23:55.815 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:23:55.815 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:24:00.819 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:24:00.819 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:24:00.820 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:24:00.821 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:24:00.821 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:24:00.822 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:24:00.829 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:24:00.831 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:24:00.831 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:24:00.831 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:24:00.831 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:24:00.834 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:24:00.835 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:24:00.835 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:24:00.835 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:24:00.835 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:24:00.835 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:24:00.835 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:24:00.835 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:24:00.837 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:24:00.837 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:24:00.838 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:24:00.838 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:24:00.838 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:24:00.838 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:24:00.838 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:24:00.838 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:24:00.840 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:24:00.840 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:24:00.840 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:24:00.840 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:24:00.840 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:24:00.840 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:24:00.840 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:24:00.840 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:24:00.843 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:24:00.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:24:00.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:24:00.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:24:00.843 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:24:00.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:24:00.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:24:00.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:24:00.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:24:00.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:24:00.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:24:00.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:24:00.843 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:24:00.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:24:00.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:24:00.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:24:00.843 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:24:00.843 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:24:00.843 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:24:00.843 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:24:00.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:24:00.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:24:00.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:24:00.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:24:00.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:24:00.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:24:00.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:24:00.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:24:00.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:24:00.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:24:00.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:24:00.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:24:00.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:24:00.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:24:00.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:24:00.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:24:00.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:24:00.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:24:00.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:24:00.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:24:00.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:24:00.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:24:00.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:24:00.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:24:00.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:24:00.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:24:00.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:24:00.848 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:24:01.332 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:24:01.366 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:24:01.367 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:24:01.368 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:24:01.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:24:01.370 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:24:01.370 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:24:01.370 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:24:01.370 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:24:01.370 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:24:01.371 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:24:01.371 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:24:01.371 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:24:01.801 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:24:01.847 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:24:01.847 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:24:01.847 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:24:01.847 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:24:02.270 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:24:02.746 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:24:02.848 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:24:02.848 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:24:02.848 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:24:02.848 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:24:03.224 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:24:03.701 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 03:24:03.849 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:24:03.849 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:24:03.850 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:24:03.850 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:24:04.179 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 03:24:04.657 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 03:24:04.851 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:24:04.851 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:24:04.851 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:24:04.851 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:24:05.135 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 03:24:05.614 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 03:24:05.852 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:24:05.852 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:24:05.853 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:24:05.853 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:24:06.092 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 03:24:06.570 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 03:24:07.048 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 03:24:07.526 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 03:24:08.005 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 03:24:08.482 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 03:24:08.960 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 03:24:09.379 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:24:09.379 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:24:09.386 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:24:09.387 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:24:09.387 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:24:09.387 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:24:09.392 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:24:09.392 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:24:09.392 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:24:09.392 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:24:09.392 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:24:09.392 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:24:09.393 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:24:09.393 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1829 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:24:09.393 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1829 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:24:09.393 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1829 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:24:09.393 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1829 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:24:09.393 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1829 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:24:09.393 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1829 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:24:09.394 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1829 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:24:09.394 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1829 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:24:14.389 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:24:14.389 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:24:14.391 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:24:14.391 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:24:14.392 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:24:14.392 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:24:14.404 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:24:14.405 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:24:14.405 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:24:14.405 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:24:14.405 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:24:14.407 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:24:14.408 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:24:14.408 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:24:14.408 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:24:14.408 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:24:14.408 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:24:14.409 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:24:14.409 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:24:14.410 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:24:14.410 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:24:14.410 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:24:14.410 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:24:14.410 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:24:14.411 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:24:14.411 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:24:14.411 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:24:14.412 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:24:14.412 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:24:14.413 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:24:14.413 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:24:14.413 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:24:14.413 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:24:14.413 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:24:14.413 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:24:14.415 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:24:14.415 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:24:14.415 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:24:14.415 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:24:14.415 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:24:14.415 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:24:14.415 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:24:14.416 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:24:14.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:24:14.416 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:24:14.416 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:24:14.416 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:24:14.416 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:24:14.416 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:24:14.416 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:24:14.416 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:24:14.416 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:24:14.416 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:24:14.416 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:24:14.416 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:24:14.416 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:24:14.416 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:24:14.416 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:24:14.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:24:14.416 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:24:14.416 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:24:14.416 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:24:14.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:24:14.416 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:24:14.416 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:24:14.416 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:24:14.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:24:14.416 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:24:14.416 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:24:14.416 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:24:14.417 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:24:14.417 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:24:14.417 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:24:14.417 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:24:14.417 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:24:14.417 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:24:14.417 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:24:14.417 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:24:14.417 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:24:14.417 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:24:14.417 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:24:14.417 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:24:14.418 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:24:14.418 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:24:14.418 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:24:14.418 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:24:14.418 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:24:14.418 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:24:14.418 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:24:19.422 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:24:19.422 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:24:19.426 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:24:19.426 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:24:19.426 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:24:19.426 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:24:19.434 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:24:19.435 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:24:19.435 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:24:19.435 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:24:19.435 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:24:19.438 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:24:19.438 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:24:19.439 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:24:19.439 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:24:19.439 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:24:19.439 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:24:19.440 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:24:19.440 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:24:19.441 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:24:19.442 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:24:19.442 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:24:19.442 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:24:19.442 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:24:19.442 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:24:19.442 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:24:19.442 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:24:19.444 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:24:19.444 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:24:19.444 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:24:19.444 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:24:19.444 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:24:19.444 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:24:19.445 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:24:19.445 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:24:19.447 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:24:19.447 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:24:19.447 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:24:19.447 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:24:19.447 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:24:19.448 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:24:19.448 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:24:19.448 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:24:19.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:24:19.448 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:24:19.448 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:24:19.448 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:24:19.448 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:24:19.448 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:24:19.448 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:24:19.448 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:24:19.448 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:24:19.448 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:24:19.448 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:24:19.448 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:24:19.448 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:24:19.448 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:24:19.448 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:24:19.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:24:19.448 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:24:19.449 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:24:19.449 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:24:19.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:24:19.449 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:24:19.449 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:24:19.449 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:24:19.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:24:19.449 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:24:19.449 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:24:19.449 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:24:19.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:24:19.449 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:24:19.449 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:24:19.449 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:24:19.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:24:19.449 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:24:19.449 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:24:19.449 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:24:19.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:24:19.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:24:19.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:24:19.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:24:19.453 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:24:19.937 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:24:19.976 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:24:19.978 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:24:19.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:24:19.979 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:24:19.980 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:24:19.980 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:24:19.981 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:24:19.981 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:24:19.981 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:24:19.981 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:24:19.981 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:24:19.981 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:24:20.415 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:24:20.451 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:24:20.451 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:24:20.452 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:24:20.454 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:24:20.893 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:24:21.371 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:24:21.452 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:24:21.453 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:24:21.453 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:24:21.454 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:24:21.849 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:24:22.327 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 03:24:22.453 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:24:22.454 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:24:22.454 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:24:22.455 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:24:22.805 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 03:24:23.283 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 03:24:23.454 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:24:23.455 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:24:23.455 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:24:23.456 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:24:23.760 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 03:24:24.238 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 03:24:24.472 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:24:24.473 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:24:24.473 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:24:24.473 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:24:24.716 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 03:24:25.194 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 03:24:25.671 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 03:24:26.149 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 03:24:26.627 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 03:24:27.105 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 03:24:27.582 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 03:24:28.061 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 03:24:28.539 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 03:24:29.017 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 03:24:29.494 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 03:24:29.972 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 03:24:30.035 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:24:30.035 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:24:30.040 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:24:30.041 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:24:30.041 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:24:30.041 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:24:30.042 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:24:30.042 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:24:30.042 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:24:30.042 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:24:30.042 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:24:30.042 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:24:30.042 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:24:30.043 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2260 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:24:30.043 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2260 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:24:30.043 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2260 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:24:30.043 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2260 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:24:35.044 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:24:35.045 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:24:35.047 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:24:35.047 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:24:35.047 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:24:35.048 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:24:35.056 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:24:35.056 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:24:35.056 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:24:35.057 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:24:35.057 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:24:35.058 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:24:35.058 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:24:35.059 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:24:35.059 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:24:35.059 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:24:35.059 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:24:35.059 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:24:35.059 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:24:35.061 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:24:35.061 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:24:35.061 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:24:35.061 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:24:35.061 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:24:35.061 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:24:35.061 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:24:35.061 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:24:35.063 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:24:35.063 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:24:35.063 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:24:35.063 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:24:35.063 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:24:35.063 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:24:35.063 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:24:35.063 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:24:35.066 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:24:35.066 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:24:35.066 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:24:35.066 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:24:35.066 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:24:35.066 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:24:35.066 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:24:35.066 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:24:35.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:24:35.066 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:24:35.066 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:24:35.066 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:24:35.066 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:24:35.066 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:24:35.066 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:24:35.066 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:24:35.066 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:24:35.066 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:24:35.066 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:24:35.067 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:24:35.067 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:24:35.067 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:24:35.067 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:24:35.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:24:35.067 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:24:35.067 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:24:35.067 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:24:35.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:24:35.067 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:24:35.067 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:24:35.067 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:24:35.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:24:35.067 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:24:35.067 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:24:35.067 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:24:35.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:24:35.067 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:24:35.068 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:24:35.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:24:35.068 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:24:35.068 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:24:35.068 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:24:35.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:24:35.068 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:24:35.068 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:24:35.069 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:24:35.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:24:35.069 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:24:35.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:24:35.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:24:35.069 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:24:35.069 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:24:35.069 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:24:35.069 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:24:40.073 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:24:40.073 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:24:40.075 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:24:40.075 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:24:40.076 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:24:40.076 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:24:40.085 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:24:40.086 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:24:40.086 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:24:40.087 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:24:40.087 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:24:40.092 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:24:40.092 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:24:40.092 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:24:40.092 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:24:40.092 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:24:40.092 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:24:40.093 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:24:40.093 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:24:40.096 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:24:40.096 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:24:40.096 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:24:40.096 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:24:40.096 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:24:40.096 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:24:40.096 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:24:40.097 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:24:40.099 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:24:40.099 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:24:40.099 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:24:40.099 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:24:40.099 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:24:40.099 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:24:40.100 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:24:40.100 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:24:40.103 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:24:40.103 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:24:40.103 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:24:40.103 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:24:40.103 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:24:40.103 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:24:40.103 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:24:40.103 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:24:40.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:24:40.103 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:24:40.103 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:24:40.103 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:24:40.103 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:24:40.103 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:24:40.103 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:24:40.103 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:24:40.103 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:24:40.104 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:24:40.104 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:24:40.104 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:24:40.104 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:24:40.104 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:24:40.104 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:24:40.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:24:40.104 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:24:40.104 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:24:40.104 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:24:40.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:24:40.104 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:24:40.104 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:24:40.104 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:24:40.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:24:40.104 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:24:40.104 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:24:40.104 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:24:40.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:24:40.104 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:24:40.104 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:24:40.104 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:24:40.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:24:40.105 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:24:40.105 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:24:40.105 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:24:40.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:24:40.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:24:40.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:24:40.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:24:40.108 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:24:40.589 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:24:40.629 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:24:40.630 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:24:40.632 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:24:40.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:24:40.635 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:24:40.635 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:24:40.635 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:24:40.635 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:24:40.635 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:24:40.636 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:24:40.636 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:24:40.636 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:24:41.068 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:24:41.106 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:24:41.107 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:24:41.108 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:24:41.110 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:24:41.545 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:24:42.023 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:24:42.107 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:24:42.108 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:24:42.109 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:24:42.111 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:24:42.501 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:24:42.978 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 03:24:43.108 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:24:43.109 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:24:43.110 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:24:43.112 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:24:43.456 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 03:24:43.934 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 03:24:44.110 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:24:44.110 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:24:44.111 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:24:44.113 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:24:44.411 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 03:24:44.890 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 03:24:45.110 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:24:45.111 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:24:45.111 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:24:45.114 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:24:45.368 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 03:24:45.846 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 03:24:46.324 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 03:24:46.802 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 03:24:47.279 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 03:24:47.756 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 03:24:48.234 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 03:24:48.712 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 03:24:49.187 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 03:24:49.665 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 03:24:50.143 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 03:24:50.621 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 03:24:51.099 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 03:24:51.577 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 03:24:51.684 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:24:51.684 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:24:51.691 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:24:51.691 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:24:51.691 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:24:51.691 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:24:51.696 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:24:51.696 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:24:51.697 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:24:51.697 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:24:51.697 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:24:51.697 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:24:51.697 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:24:51.697 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2475 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:24:51.698 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2475 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:24:51.698 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2475 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:24:51.698 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2475 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:24:51.698 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2475 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:24:51.698 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2475 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:24:51.698 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2475 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:24:51.698 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2475 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:24:56.693 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:24:56.694 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:24:56.696 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:24:56.697 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:24:56.697 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:24:56.698 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:24:56.703 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:24:56.704 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:24:56.704 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:24:56.704 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:24:56.704 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:24:56.706 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:24:56.706 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:24:56.707 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:24:56.707 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:24:56.707 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:24:56.707 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:24:56.707 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:24:56.707 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:24:56.709 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:24:56.709 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:24:56.709 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:24:56.709 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:24:56.709 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:24:56.710 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:24:56.710 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:24:56.710 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:24:56.712 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:24:56.712 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:24:56.712 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:24:56.712 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:24:56.712 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:24:56.712 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:24:56.712 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:24:56.712 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:24:56.715 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:24:56.715 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:24:56.715 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:24:56.715 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:24:56.715 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:24:56.715 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:24:56.715 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:24:56.715 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:24:56.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:24:56.715 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:24:56.715 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:24:56.715 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:24:56.715 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:24:56.715 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:24:56.715 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:24:56.715 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:24:56.716 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:24:56.716 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:24:56.716 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:24:56.716 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:24:56.716 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:24:56.716 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:24:56.716 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:24:56.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:24:56.716 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:24:56.716 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:24:56.716 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:24:56.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:24:56.716 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:24:56.716 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:24:56.716 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:24:56.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:24:56.716 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:24:56.716 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:24:56.716 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:24:56.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:24:56.716 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:24:56.717 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:24:56.717 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:24:56.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:24:56.718 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:24:56.718 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:24:56.718 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:24:56.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:24:56.718 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:24:56.718 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:24:56.718 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:24:56.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:24:56.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:24:56.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:24:56.718 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:24:56.718 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:24:56.718 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:24:56.718 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:25:01.722 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:25:01.722 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:25:01.724 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:25:01.726 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:25:01.728 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:25:01.732 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:25:01.744 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:25:01.745 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:25:01.745 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:25:01.746 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:25:01.746 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:25:01.747 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:25:01.748 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:25:01.748 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:25:01.748 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:25:01.748 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:25:01.748 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:25:01.748 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:25:01.748 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:25:01.749 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:25:01.749 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:25:01.749 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:25:01.749 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:25:01.750 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:25:01.750 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:25:01.750 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:25:01.750 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:25:01.751 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:25:01.751 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:25:01.751 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:25:01.751 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:25:01.751 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:25:01.751 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:25:01.751 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:25:01.751 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:25:01.753 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:25:01.753 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:25:01.753 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:25:01.753 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:25:01.753 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:25:01.753 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:25:01.753 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:25:01.753 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:25:01.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:25:01.753 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:25:01.753 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:25:01.753 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:25:01.753 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:25:01.753 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:25:01.754 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:25:01.754 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:25:01.754 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:25:01.754 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:25:01.754 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:25:01.754 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:25:01.754 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:25:01.754 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:25:01.754 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:25:01.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:25:01.754 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:25:01.754 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:25:01.754 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:25:01.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:25:01.754 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:25:01.754 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:25:01.754 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:25:01.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:25:01.754 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:25:01.754 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:25:01.754 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:25:01.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:25:01.754 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:25:01.754 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:25:01.754 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:25:01.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:25:01.754 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:25:01.754 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:25:01.754 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:25:01.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:25:01.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:25:01.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:25:01.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:25:01.758 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:25:02.239 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:25:02.268 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:25:02.268 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:25:02.269 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:25:02.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:25:02.269 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:25:02.269 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:25:02.269 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:25:02.270 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:25:02.270 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:25:02.270 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:25:02.270 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:25:02.270 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:25:02.708 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:25:02.756 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:25:02.756 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:25:02.757 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:25:02.759 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:25:03.183 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:25:03.661 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:25:03.757 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:25:03.757 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:25:03.757 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:25:03.760 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:25:04.139 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:25:04.617 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 03:25:04.759 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:25:04.759 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:25:04.759 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:25:04.761 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:25:05.096 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 03:25:05.574 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 03:25:05.759 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:25:05.759 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:25:05.760 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:25:05.762 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:25:06.052 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 03:25:06.528 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 03:25:06.760 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:25:06.760 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:25:06.760 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:25:06.763 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:25:06.998 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 03:25:07.467 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 03:25:07.942 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 03:25:08.419 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 03:25:08.897 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 03:25:09.376 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 03:25:09.854 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 03:25:10.332 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 03:25:10.810 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 03:25:11.288 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 03:25:11.766 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 03:25:12.244 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 03:25:12.721 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 03:25:13.199 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 03:25:13.677 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 03:25:14.155 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 03:25:14.632 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-09 03:25:15.110 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-09 03:25:15.588 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-09 03:25:16.066 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-09 03:25:16.544 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-09 03:25:17.022 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-09 03:25:17.500 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-09 03:25:17.978 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-09 03:25:18.456 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-09 03:25:18.934 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-09 03:25:19.412 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-09 03:25:19.890 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-09 03:25:20.367 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-09 03:25:20.845 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-09 03:25:21.323 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-09 03:25:21.801 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-09 03:25:22.280 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-09 03:25:22.294 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:25:22.294 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:25:22.300 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:25:22.301 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:25:22.301 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:25:22.301 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:25:22.304 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:25:22.304 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:25:22.304 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:25:22.304 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:25:22.304 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:25:22.304 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:25:22.304 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:25:22.304 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4392 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:25:22.304 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4392 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:25:27.304 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:25:27.305 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:25:27.307 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:25:27.309 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:25:27.311 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:25:27.314 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:25:27.325 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:25:27.325 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:25:27.326 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:25:27.326 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:25:27.326 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:25:27.328 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:25:27.328 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:25:27.329 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:25:27.329 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:25:27.329 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:25:27.329 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:25:27.329 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:25:27.329 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:25:27.330 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:25:27.330 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:25:27.331 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:25:27.331 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:25:27.331 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:25:27.331 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:25:27.331 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:25:27.331 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:25:27.332 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:25:27.332 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:25:27.332 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:25:27.332 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:25:27.332 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:25:27.332 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:25:27.332 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:25:27.332 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:25:27.334 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:25:27.334 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:25:27.334 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:25:27.334 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:25:27.334 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:25:27.334 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:25:27.334 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:25:27.335 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:25:27.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:25:27.335 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:25:27.335 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:25:27.335 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:25:27.335 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:25:27.335 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:25:27.335 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:25:27.335 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:25:27.335 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:25:27.335 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:25:27.335 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:25:27.335 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:25:27.335 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:25:27.335 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:25:27.335 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:25:27.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:25:27.335 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:25:27.335 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:25:27.335 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:25:27.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:25:27.335 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:25:27.335 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:25:27.335 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:25:27.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:25:27.335 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:25:27.335 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:25:27.335 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:25:27.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:25:27.335 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:25:27.335 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:25:27.335 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:25:27.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:25:27.336 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:25:27.336 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:25:27.336 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:25:27.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:25:27.336 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:25:27.336 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:25:27.336 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:25:27.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:25:27.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:25:27.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:25:27.337 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:25:27.337 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:25:27.337 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:25:27.337 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:25:32.341 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:25:32.341 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:25:32.343 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:25:32.343 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:25:32.343 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:25:32.344 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:25:32.352 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:25:32.353 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:25:32.353 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:25:32.354 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:25:32.354 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:25:32.356 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:25:32.356 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:25:32.356 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:25:32.357 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:25:32.357 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:25:32.357 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:25:32.357 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:25:32.357 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:25:32.358 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:25:32.359 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:25:32.359 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:25:32.359 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:25:32.359 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:25:32.359 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:25:32.359 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:25:32.359 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:25:32.361 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:25:32.361 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:25:32.361 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:25:32.361 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:25:32.361 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:25:32.361 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:25:32.361 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:25:32.361 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:25:32.363 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:25:32.363 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:25:32.363 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:25:32.363 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:25:32.363 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:25:32.363 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:25:32.363 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:25:32.364 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:25:32.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:25:32.364 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:25:32.364 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:25:32.364 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:25:32.364 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:25:32.364 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:25:32.364 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:25:32.364 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:25:32.364 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:25:32.364 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:25:32.364 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:25:32.364 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:25:32.364 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:25:32.364 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:25:32.364 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:25:32.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:25:32.364 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:25:32.364 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:25:32.364 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:25:32.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:25:32.364 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:25:32.364 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:25:32.364 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:25:32.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:25:32.364 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:25:32.364 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:25:32.364 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:25:32.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:25:32.365 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:25:32.365 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:25:32.365 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:25:32.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:25:32.365 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:25:32.365 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:25:32.365 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:25:32.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:25:32.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:25:32.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:25:32.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:25:32.369 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:25:32.849 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:25:32.887 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:25:32.889 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:25:32.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:25:32.890 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:25:33.326 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:25:33.368 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:25:33.368 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:25:33.368 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:25:33.370 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:25:33.801 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:25:34.269 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:25:34.369 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:25:34.369 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:25:34.369 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:25:34.371 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:25:34.738 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:25:35.207 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 03:25:35.370 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:25:35.370 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:25:35.370 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:25:35.372 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:25:35.681 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 03:25:36.159 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 03:25:36.371 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:25:36.371 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:25:36.372 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:25:36.374 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:25:36.636 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 03:25:37.105 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 03:25:37.373 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:25:37.373 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:25:37.373 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:25:37.375 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:25:37.574 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 03:25:38.046 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 03:25:38.521 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 03:25:38.996 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 03:25:39.474 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 03:25:39.946 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 03:25:40.425 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 03:25:40.898 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 03:25:41.374 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 03:25:41.842 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 03:25:42.312 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 03:25:42.792 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 03:25:42.904 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:25:42.904 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:25:42.904 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:25:42.904 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:25:42.909 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:25:42.910 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:25:42.910 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:25:42.910 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:25:42.910 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:25:42.910 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:25:42.910 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:25:42.911 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2271 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:25:42.911 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2271 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:25:42.911 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2271 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:25:42.911 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2271 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:25:42.911 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2271 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:25:42.911 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2271 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:25:42.911 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2271 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:25:42.911 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2271 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:25:47.906 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:25:47.906 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:25:47.909 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:25:47.909 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:25:47.909 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:25:47.909 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:25:47.917 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:25:47.919 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:25:47.919 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:25:47.919 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:25:47.919 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:25:47.924 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:25:47.924 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:25:47.925 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:25:47.925 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:25:47.925 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:25:47.925 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:25:47.925 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:25:47.925 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:25:47.928 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:25:47.928 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:25:47.928 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:25:47.929 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:25:47.929 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:25:47.929 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:25:47.929 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:25:47.929 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:25:47.932 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:25:47.932 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:25:47.932 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:25:47.932 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:25:47.932 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:25:47.932 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:25:47.932 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:25:47.932 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:25:47.936 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:25:47.936 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:25:47.936 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:25:47.936 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:25:47.936 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:25:47.936 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:25:47.936 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:25:47.936 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:25:47.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:25:47.937 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:25:47.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:25:47.937 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:25:47.937 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:25:47.937 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:25:47.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:25:47.937 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:25:47.937 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:25:47.937 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:25:47.937 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:25:47.937 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:25:47.937 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:25:47.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:25:47.937 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:25:47.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:25:47.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:25:47.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:25:47.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:25:47.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:25:47.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:25:47.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:25:47.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:25:47.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:25:47.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:25:47.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:25:47.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:25:47.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:25:47.939 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:25:47.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:25:47.939 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:25:47.939 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:25:47.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:25:47.939 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:25:47.939 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:25:47.939 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:25:47.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:25:47.939 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:25:47.939 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:25:47.940 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:25:47.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:25:47.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:25:47.940 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:25:47.940 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:25:47.940 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:25:47.940 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:25:52.944 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:25:52.944 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:25:52.946 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:25:52.947 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:25:52.947 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:25:52.947 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:25:52.962 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:25:52.964 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:25:52.964 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:25:52.964 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:25:52.964 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:25:52.968 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:25:52.969 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:25:52.969 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:25:52.969 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:25:52.969 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:25:52.970 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:25:52.970 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:25:52.970 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:25:52.971 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:25:52.971 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:25:52.972 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:25:52.972 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:25:52.972 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:25:52.972 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:25:52.972 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:25:52.972 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:25:52.974 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:25:52.974 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:25:52.974 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:25:52.974 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:25:52.975 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:25:52.975 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:25:52.975 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:25:52.975 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:25:52.977 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:25:52.977 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:25:52.977 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:25:52.977 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:25:52.977 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:25:52.977 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:25:52.977 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:25:52.978 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:25:52.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:25:52.978 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:25:52.978 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:25:52.978 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:25:52.978 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:25:52.978 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:25:52.978 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:25:52.978 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:25:52.978 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:25:52.978 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:25:52.978 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:25:52.978 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:25:52.978 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:25:52.978 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:25:52.978 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:25:52.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:25:52.978 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:25:52.978 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:25:52.978 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:25:52.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:25:52.978 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:25:52.978 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:25:52.978 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:25:52.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:25:52.979 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:25:52.979 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:25:52.979 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:25:52.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:25:52.979 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:25:52.979 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:25:52.979 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:25:52.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:25:52.979 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:25:52.979 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:25:52.979 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:25:52.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:25:52.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:25:52.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:25:52.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:25:52.983 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:25:53.463 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:25:53.492 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:25:53.492 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:25:53.493 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:25:53.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:25:53.932 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:25:53.980 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:25:53.981 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:25:53.981 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:25:53.984 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:25:54.401 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:25:54.872 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:25:54.982 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:25:54.982 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:25:54.982 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:25:54.985 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:25:55.349 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:25:55.829 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 03:25:55.982 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:25:55.983 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:25:55.983 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:25:55.986 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:25:56.309 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 03:25:56.788 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 03:25:56.985 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:25:56.985 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:25:56.985 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:25:56.988 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:25:57.267 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 03:25:57.736 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 03:25:57.986 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:25:57.986 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:25:57.986 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:25:57.989 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:25:58.205 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 03:25:58.676 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 03:25:59.152 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 03:25:59.633 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 03:26:00.112 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 03:26:00.584 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 03:26:01.064 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 03:26:01.542 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 03:26:02.018 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 03:26:02.498 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 03:26:02.977 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 03:26:03.456 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 03:26:03.934 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 03:26:04.414 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 03:26:04.883 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 03:26:05.352 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 03:26:05.506 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:26:05.507 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:26:05.507 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:26:05.507 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:26:05.507 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:26:05.507 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:26:05.507 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:26:05.507 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:26:05.507 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:26:05.507 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:26:05.507 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:26:05.507 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2687 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:26:05.507 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2687 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:26:05.507 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2687 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:26:05.507 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2687 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:26:05.507 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2687 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:26:10.511 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:26:10.511 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:26:10.513 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:26:10.514 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:26:10.515 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:26:10.515 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:26:10.524 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:26:10.525 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:26:10.525 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:26:10.525 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:26:10.525 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:26:10.527 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:26:10.527 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:26:10.527 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:26:10.528 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:26:10.528 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:26:10.528 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:26:10.528 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:26:10.528 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:26:10.530 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:26:10.530 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:26:10.530 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:26:10.530 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:26:10.530 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:26:10.530 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:26:10.530 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:26:10.530 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:26:10.532 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:26:10.532 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:26:10.532 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:26:10.532 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:26:10.532 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:26:10.532 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:26:10.532 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:26:10.532 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:26:10.535 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:26:10.535 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:26:10.535 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:26:10.535 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:26:10.535 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:26:10.535 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:26:10.535 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:26:10.535 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:26:10.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:26:10.535 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:26:10.535 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:26:10.535 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:26:10.535 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:26:10.535 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:26:10.535 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:26:10.535 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:26:10.535 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:26:10.535 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:26:10.535 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:26:10.535 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:26:10.536 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:26:10.536 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:26:10.536 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:26:10.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:26:10.536 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:26:10.536 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:26:10.536 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:26:10.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:26:10.536 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:26:10.536 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:26:10.536 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:26:10.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:26:10.536 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:26:10.536 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:26:10.536 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:26:10.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:26:10.537 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:26:10.537 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:26:10.537 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:26:10.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:26:10.537 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:26:10.537 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:26:10.537 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:26:10.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:26:10.537 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:26:10.537 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:26:10.537 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:26:10.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:26:10.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:26:10.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:26:10.537 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:26:10.537 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:26:10.537 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:26:10.537 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:26:15.540 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:26:15.540 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:26:15.542 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:26:15.543 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:26:15.543 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:26:15.544 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:26:15.555 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:26:15.555 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:26:15.555 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:26:15.556 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:26:15.556 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:26:15.558 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:26:15.558 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:26:15.558 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:26:15.558 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:26:15.559 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:26:15.559 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:26:15.559 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:26:15.559 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:26:15.560 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:26:15.561 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:26:15.561 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:26:15.561 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:26:15.561 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:26:15.561 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:26:15.561 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:26:15.561 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:26:15.562 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:26:15.562 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:26:15.563 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:26:15.563 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:26:15.563 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:26:15.563 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:26:15.563 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:26:15.563 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:26:15.565 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:26:15.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:26:15.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:26:15.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:26:15.565 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:26:15.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:26:15.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:26:15.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:26:15.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:26:15.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:26:15.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:26:15.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:26:15.565 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:26:15.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:26:15.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:26:15.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:26:15.565 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:26:15.566 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:26:15.566 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:26:15.566 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:26:15.566 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:26:15.566 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:26:15.566 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:26:15.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:26:15.566 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:26:15.566 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:26:15.566 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:26:15.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:26:15.566 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:26:15.566 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:26:15.566 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:26:15.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:26:15.566 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:26:15.566 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:26:15.566 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:26:15.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:26:15.566 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:26:15.566 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:26:15.566 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:26:15.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:26:15.566 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:26:15.566 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:26:15.566 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:26:15.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:26:15.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:26:15.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:26:15.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:26:15.570 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:26:16.055 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:26:16.090 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:26:16.093 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:26:16.095 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:26:16.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:26:16.097 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:26:16.097 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:26:16.098 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:26:16.098 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:26:16.098 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:26:16.098 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:26:16.098 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:26:16.098 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:26:16.145 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:26:16.145 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-01-09 03:26:16.146 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:26:16.146 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:26:16.533 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:26:16.568 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:26:16.569 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:26:16.569 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:26:16.570 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:26:17.006 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:26:17.475 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:26:17.569 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:26:17.569 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:26:17.570 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:26:17.572 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:26:17.950 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:26:18.429 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 03:26:18.570 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:26:18.570 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:26:18.570 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:26:18.572 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:26:18.907 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 03:26:19.385 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 03:26:19.571 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:26:19.571 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:26:19.571 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:26:19.573 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:26:19.863 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 03:26:20.341 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 03:26:20.572 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:26:20.573 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:26:20.573 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:26:20.574 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:26:20.819 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 03:26:21.297 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 03:26:21.776 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 03:26:22.254 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 03:26:22.732 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 03:26:23.210 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 03:26:23.688 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 03:26:24.150 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:26:24.151 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:26:24.151 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:26:24.156 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:26:24.156 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:26:24.157 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:26:24.157 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:26:24.158 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:26:24.158 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:26:24.158 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:26:24.158 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:26:24.158 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:26:24.158 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:26:24.158 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:26:24.158 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1837 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:26:24.158 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1837 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:26:24.158 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1837 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:26:24.158 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1837 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:26:24.158 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1837 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:26:24.158 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1837 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:26:24.158 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1837 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:26:24.158 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1837 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:26:29.161 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:26:29.161 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:26:29.163 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:26:29.163 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:26:29.163 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:26:29.164 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:26:29.173 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:26:29.173 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:26:29.173 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:26:29.174 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:26:29.174 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:26:29.176 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:26:29.176 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:26:29.176 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:26:29.176 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:26:29.176 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:26:29.176 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:26:29.177 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:26:29.177 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:26:29.178 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:26:29.178 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:26:29.178 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:26:29.178 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:26:29.178 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:26:29.178 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:26:29.178 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:26:29.178 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:26:29.180 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:26:29.180 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:26:29.180 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:26:29.180 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:26:29.180 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:26:29.180 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:26:29.180 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:26:29.180 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:26:29.183 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:26:29.183 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:26:29.183 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:26:29.183 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:26:29.183 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:26:29.184 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:26:29.184 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:26:29.184 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:26:29.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:26:29.184 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:26:29.184 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:26:29.184 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:26:29.184 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:26:29.184 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:26:29.184 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:26:29.184 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:26:29.184 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:26:29.184 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:26:29.184 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:26:29.184 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:26:29.185 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:26:29.185 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:26:29.185 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:26:29.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:26:29.185 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:26:29.185 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:26:29.185 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:26:29.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:26:29.185 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:26:29.185 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:26:29.185 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:26:29.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:26:29.185 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:26:29.185 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:26:29.185 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:26:29.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:26:29.185 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:26:29.185 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:26:29.186 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:26:29.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:26:29.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:26:29.187 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:26:29.187 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:26:29.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:26:29.187 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:26:29.187 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:26:29.187 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:26:29.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:26:29.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:26:29.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:26:29.187 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:26:29.187 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:26:29.187 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:26:29.187 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:26:34.192 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:26:34.208 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:26:34.208 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:26:34.208 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:26:34.208 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:26:34.208 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:26:34.211 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:26:34.211 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:26:34.211 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:26:34.211 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:26:34.211 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:26:34.213 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:26:34.213 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:26:34.213 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:26:34.213 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:26:34.213 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:26:34.213 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:26:34.213 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:26:34.213 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:26:34.214 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:26:34.214 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:26:34.214 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:26:34.214 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:26:34.214 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:26:34.215 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:26:34.215 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:26:34.215 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:26:34.216 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:26:34.216 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:26:34.216 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:26:34.216 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:26:34.216 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:26:34.216 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:26:34.216 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:26:34.216 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:26:34.219 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:26:34.219 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:26:34.219 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:26:34.219 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:26:34.219 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:26:34.219 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:26:34.219 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:26:34.219 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:26:34.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:26:34.219 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:26:34.219 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:26:34.219 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:26:34.219 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:26:34.219 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:26:34.219 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:26:34.219 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:26:34.219 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:26:34.219 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:26:34.219 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:26:34.219 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:26:34.219 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:26:34.219 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:26:34.219 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:26:34.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:26:34.220 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:26:34.220 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:26:34.220 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:26:34.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:26:34.220 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:26:34.220 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:26:34.220 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:26:34.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:26:34.220 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:26:34.220 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:26:34.220 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:26:34.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:26:34.220 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:26:34.220 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:26:34.220 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:26:34.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:26:34.220 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:26:34.220 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:26:34.220 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:26:34.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:26:34.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:26:34.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:26:34.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:26:34.224 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:26:34.708 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:26:34.746 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:26:34.748 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:26:34.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:26:34.751 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:26:34.755 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:26:34.755 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:26:34.755 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:26:34.756 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:26:34.756 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:26:34.757 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:26:34.757 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:26:34.757 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:26:34.799 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:26:34.799 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-01-09 03:26:34.799 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:26:34.799 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:26:35.187 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:26:35.222 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:26:35.222 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:26:35.222 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:26:35.224 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:26:35.665 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:26:36.143 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:26:36.223 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:26:36.223 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:26:36.223 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:26:36.225 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:26:36.622 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:26:37.100 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 03:26:37.224 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:26:37.224 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:26:37.225 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:26:37.226 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:26:37.578 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 03:26:38.057 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 03:26:38.225 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:26:38.225 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:26:38.225 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:26:38.227 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:26:38.535 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 03:26:39.013 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 03:26:39.229 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:26:39.229 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:26:39.229 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:26:39.229 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:26:39.492 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 03:26:39.970 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 03:26:40.448 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 03:26:40.926 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 03:26:41.405 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 03:26:41.882 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 03:26:42.361 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 03:26:42.803 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:26:42.803 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:26:42.803 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:26:42.809 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:26:42.809 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:26:42.810 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:26:42.810 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:26:42.813 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:26:42.813 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:26:42.813 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:26:42.813 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:26:42.813 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:26:42.813 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:26:42.813 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:26:42.813 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1832 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:26:42.813 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1832 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:26:42.813 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1832 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:26:42.813 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1832 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:26:42.813 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1833 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:26:42.813 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1833 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:26:42.813 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1833 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:26:42.813 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1833 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:26:42.813 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1833 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:26:42.813 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1833 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:26:42.813 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1833 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:26:42.813 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1833 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:26:47.814 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:26:47.814 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:26:47.816 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:26:47.816 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:26:47.816 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:26:47.817 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:26:47.827 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:26:47.828 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:26:47.829 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:26:47.829 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:26:47.829 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:26:47.833 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:26:47.833 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:26:47.834 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:26:47.834 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:26:47.834 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:26:47.835 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:26:47.835 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:26:47.835 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:26:47.837 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:26:47.837 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:26:47.837 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:26:47.837 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:26:47.838 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:26:47.838 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:26:47.838 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:26:47.838 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:26:47.840 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:26:47.840 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:26:47.840 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:26:47.840 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:26:47.840 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:26:47.841 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:26:47.841 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:26:47.841 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:26:47.844 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:26:47.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:26:47.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:26:47.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:26:47.844 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:26:47.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:26:47.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:26:47.845 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:26:47.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:26:47.845 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:26:47.845 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:26:47.845 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:26:47.845 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:26:47.845 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:26:47.845 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:26:47.845 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:26:47.845 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:26:47.845 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:26:47.845 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:26:47.845 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:26:47.845 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:26:47.845 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:26:47.845 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:26:47.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:26:47.845 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:26:47.845 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:26:47.845 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:26:47.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:26:47.846 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:26:47.846 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:26:47.846 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:26:47.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:26:47.846 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:26:47.846 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:26:47.846 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:26:47.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:26:47.846 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:26:47.846 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:26:47.847 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:26:47.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:26:47.847 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:26:47.847 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:26:47.847 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:26:47.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:26:47.847 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:26:47.847 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:26:47.847 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:26:47.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:26:47.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:26:47.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:26:47.847 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:26:47.847 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:26:47.847 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:26:47.847 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:26:52.854 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:26:52.854 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:26:52.854 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:26:52.854 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:26:52.854 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:26:52.855 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:26:52.862 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:26:52.864 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:26:52.865 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:26:52.865 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:26:52.865 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:26:52.869 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:26:52.869 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:26:52.870 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:26:52.870 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:26:52.870 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:26:52.870 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:26:52.871 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:26:52.871 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:26:52.873 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:26:52.873 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:26:52.873 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:26:52.873 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:26:52.873 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:26:52.874 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:26:52.874 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:26:52.874 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:26:52.875 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:26:52.876 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:26:52.876 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:26:52.876 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:26:52.876 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:26:52.876 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:26:52.876 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:26:52.876 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:26:52.879 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:26:52.879 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:26:52.879 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:26:52.879 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:26:52.879 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:26:52.879 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:26:52.879 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:26:52.879 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:26:52.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:26:52.880 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:26:52.880 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:26:52.880 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:26:52.880 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:26:52.880 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:26:52.880 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:26:52.880 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:26:52.880 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:26:52.880 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:26:52.880 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:26:52.880 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:26:52.880 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:26:52.880 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:26:52.880 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:26:52.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:26:52.880 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:26:52.880 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:26:52.880 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:26:52.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:26:52.880 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:26:52.880 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:26:52.880 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:26:52.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:26:52.880 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:26:52.881 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:26:52.881 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:26:52.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:26:52.881 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:26:52.881 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:26:52.881 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:26:52.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:26:52.881 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:26:52.881 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:26:52.881 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:26:52.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:26:52.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:26:52.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:26:52.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:26:52.885 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:26:53.368 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:26:53.403 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:26:53.404 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:26:53.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:26:53.405 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:26:53.407 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:26:53.407 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:26:53.407 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:26:53.407 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:26:53.407 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:26:53.407 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:26:53.407 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:26:53.408 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:26:53.411 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:26:53.411 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-01-09 03:26:53.411 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:26:53.411 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:26:53.846 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:26:53.883 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:26:53.883 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:26:53.884 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:26:53.886 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:26:54.323 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:26:54.801 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:26:54.885 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:26:54.885 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:26:54.885 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:26:54.888 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:26:55.279 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:26:55.758 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 03:26:55.885 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:26:55.886 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:26:55.886 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:26:55.889 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:26:56.232 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 03:26:56.701 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 03:26:56.887 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:26:56.887 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:26:56.887 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:26:56.890 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:26:57.176 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 03:26:57.655 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 03:26:57.887 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:26:57.888 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:26:57.888 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:26:57.890 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:26:58.133 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 03:26:58.611 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 03:26:59.089 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 03:26:59.567 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 03:27:00.046 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 03:27:00.524 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 03:27:00.998 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 03:27:01.415 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:27:01.415 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:27:01.415 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:27:01.420 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:27:01.420 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:27:01.420 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:27:01.420 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:27:01.421 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:27:01.421 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:27:01.421 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:27:01.421 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:27:01.421 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:27:01.421 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:27:01.421 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:27:06.425 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:27:06.425 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:27:06.428 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:27:06.428 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:27:06.428 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:27:06.428 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:27:06.441 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:27:06.442 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:27:06.442 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:27:06.443 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:27:06.443 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:27:06.447 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:27:06.447 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:27:06.448 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:27:06.448 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:27:06.448 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:27:06.448 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:27:06.449 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:27:06.449 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:27:06.451 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:27:06.451 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:27:06.451 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:27:06.451 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:27:06.451 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:27:06.451 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:27:06.452 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:27:06.452 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:27:06.453 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:27:06.453 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:27:06.453 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:27:06.453 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:27:06.454 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:27:06.454 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:27:06.454 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:27:06.454 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:27:06.456 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:27:06.456 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:27:06.456 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:27:06.456 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:27:06.457 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:27:06.457 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:27:06.457 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:27:06.457 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:27:06.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:27:06.457 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:27:06.457 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:27:06.457 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:27:06.457 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:27:06.457 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:27:06.457 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:27:06.457 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:27:06.457 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:27:06.457 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:27:06.457 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:27:06.457 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:27:06.457 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:27:06.457 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:27:06.457 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:27:06.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:27:06.458 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:27:06.458 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:27:06.458 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:27:06.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:27:06.458 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:27:06.458 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:27:06.458 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:27:06.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:27:06.458 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:27:06.458 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:27:06.458 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:27:06.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:27:06.458 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:27:06.459 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:27:06.459 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:27:06.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:27:06.459 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:27:06.459 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:27:06.459 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:27:06.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:27:06.459 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:27:06.459 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:27:06.459 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:27:06.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:27:06.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:27:06.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:27:06.459 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:27:06.459 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:27:06.459 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:27:06.459 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:27:11.467 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:27:11.467 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:27:11.468 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:27:11.468 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:27:11.468 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:27:11.468 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:27:11.475 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:27:11.476 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:27:11.477 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:27:11.477 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:27:11.477 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:27:11.480 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:27:11.480 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:27:11.481 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:27:11.481 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:27:11.481 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:27:11.482 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:27:11.482 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:27:11.482 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:27:11.484 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:27:11.484 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:27:11.484 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:27:11.484 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:27:11.484 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:27:11.485 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:27:11.485 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:27:11.485 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:27:11.487 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:27:11.487 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:27:11.487 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:27:11.487 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:27:11.487 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:27:11.487 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:27:11.487 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:27:11.487 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:27:11.490 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:27:11.490 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:27:11.490 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:27:11.490 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:27:11.490 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:27:11.490 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:27:11.490 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:27:11.490 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:27:11.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:27:11.491 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:27:11.491 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:27:11.491 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:27:11.491 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:27:11.491 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:27:11.491 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:27:11.491 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:27:11.491 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:27:11.491 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:27:11.491 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:27:11.491 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:27:11.491 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:27:11.491 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:27:11.491 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:27:11.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:27:11.491 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:27:11.491 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:27:11.491 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:27:11.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:27:11.491 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:27:11.491 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:27:11.491 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:27:11.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:27:11.491 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:27:11.491 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:27:11.491 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:27:11.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:27:11.492 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:27:11.492 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:27:11.492 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:27:11.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:27:11.492 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:27:11.492 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:27:11.492 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:27:11.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:27:11.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:27:11.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:27:11.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:27:11.496 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:27:11.981 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:27:12.016 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:27:12.017 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:27:12.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:27:12.017 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:27:12.018 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:27:12.018 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:27:12.018 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:27:12.018 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:27:12.018 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:27:12.018 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:27:12.018 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:27:12.018 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:27:12.024 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:27:12.024 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-01-09 03:27:12.025 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:27:12.025 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:27:12.458 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:27:12.494 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:27:12.494 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:27:12.494 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:27:12.497 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:27:12.937 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:27:13.415 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:27:13.495 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:27:13.496 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:27:13.496 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:27:13.498 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:27:13.893 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:27:14.372 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 03:27:14.497 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:27:14.497 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:27:14.497 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:27:14.500 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:27:14.850 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 03:27:15.328 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 03:27:15.498 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:27:15.498 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:27:15.499 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:27:15.501 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:27:15.807 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 03:27:16.285 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 03:27:16.500 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:27:16.500 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:27:16.500 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:27:16.502 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:27:16.763 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 03:27:17.242 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 03:27:17.720 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 03:27:18.198 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 03:27:18.677 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 03:27:19.155 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 03:27:19.634 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 03:27:20.030 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:27:20.030 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:27:20.030 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:27:20.033 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:27:20.033 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:27:20.033 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:27:20.033 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:27:20.036 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:27:20.037 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:27:20.037 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:27:20.037 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:27:20.037 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:27:20.037 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:27:20.037 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:27:20.037 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1823 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:27:20.038 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1823 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:27:20.038 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1823 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:27:20.038 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1823 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:27:20.038 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1823 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:27:20.038 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1823 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:27:20.038 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1823 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:27:20.038 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1823 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:27:25.038 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:27:25.038 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:27:25.040 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:27:25.041 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:27:25.041 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:27:25.042 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:27:25.050 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:27:25.051 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:27:25.051 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:27:25.051 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:27:25.051 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:27:25.054 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:27:25.054 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:27:25.054 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:27:25.054 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:27:25.054 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:27:25.055 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:27:25.055 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:27:25.055 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:27:25.058 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:27:25.058 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:27:25.059 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:27:25.059 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:27:25.059 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:27:25.059 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:27:25.060 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:27:25.060 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:27:25.063 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:27:25.063 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:27:25.063 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:27:25.063 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:27:25.063 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:27:25.063 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:27:25.063 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:27:25.063 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:27:25.068 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:27:25.068 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:27:25.068 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:27:25.068 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:27:25.068 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:27:25.068 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:27:25.069 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:27:25.069 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:27:25.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:27:25.069 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:27:25.069 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:27:25.069 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:27:25.069 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:27:25.069 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:27:25.069 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:27:25.069 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:27:25.069 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:27:25.069 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:27:25.069 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:27:25.070 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:27:25.070 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:27:25.070 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:27:25.070 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:27:25.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:27:25.070 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:27:25.070 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:27:25.070 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:27:25.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:27:25.070 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:27:25.070 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:27:25.070 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:27:25.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:27:25.072 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:27:25.072 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:27:25.072 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:27:25.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:27:25.072 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:27:25.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:27:25.072 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:27:25.072 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:27:25.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:27:25.072 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:27:25.072 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:27:25.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:27:25.072 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:27:25.072 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:27:25.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:27:25.072 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:27:25.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:27:25.072 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:27:25.073 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:27:25.073 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:27:25.073 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:27:25.073 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:27:30.079 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:27:30.079 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:27:30.079 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:27:30.079 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:27:30.079 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:27:30.079 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:27:30.091 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:27:30.093 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:27:30.093 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:27:30.093 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:27:30.093 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:27:30.097 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:27:30.097 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:27:30.097 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:27:30.097 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:27:30.097 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:27:30.097 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:27:30.098 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:27:30.098 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:27:30.100 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:27:30.100 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:27:30.101 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:27:30.101 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:27:30.101 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:27:30.101 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:27:30.102 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:27:30.102 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:27:30.103 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:27:30.103 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:27:30.103 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:27:30.103 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:27:30.104 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:27:30.104 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:27:30.104 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:27:30.104 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:27:30.106 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:27:30.107 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:27:30.107 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:27:30.107 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:27:30.107 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:27:30.107 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:27:30.107 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:27:30.107 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:27:30.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:27:30.107 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:27:30.107 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:27:30.107 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:27:30.107 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:27:30.107 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:27:30.107 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:27:30.107 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:27:30.107 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:27:30.107 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:27:30.107 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:27:30.107 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:27:30.107 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:27:30.107 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:27:30.108 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:27:30.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:27:30.108 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:27:30.108 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:27:30.108 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:27:30.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:27:30.108 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:27:30.108 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:27:30.108 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:27:30.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:27:30.108 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:27:30.108 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:27:30.108 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:27:30.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:27:30.108 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:27:30.108 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:27:30.108 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:27:30.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:27:30.108 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:27:30.108 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:27:30.108 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:27:30.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:27:30.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:27:30.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:27:30.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:27:30.112 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:27:30.595 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:27:30.640 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:27:30.642 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:27:30.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:27:30.644 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:27:30.646 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:27:30.646 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:27:30.647 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:27:30.647 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:27:30.647 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:27:30.647 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:27:30.647 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:27:30.647 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:27:30.685 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:27:30.685 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-01-09 03:27:30.685 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:27:30.686 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:27:31.073 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:27:31.110 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:27:31.111 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:27:31.111 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:27:31.114 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:27:31.551 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:27:32.030 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:27:32.112 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:27:32.112 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:27:32.112 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:27:32.115 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:27:32.508 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:27:32.986 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 03:27:33.113 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:27:33.113 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:27:33.114 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:27:33.117 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:27:33.464 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 03:27:33.942 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 03:27:34.114 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:27:34.115 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:27:34.115 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:27:34.118 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:27:34.420 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 03:27:34.898 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 03:27:35.133 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:27:35.133 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:27:35.133 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:27:35.133 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:27:35.376 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 03:27:35.851 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 03:27:36.330 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 03:27:36.802 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 03:27:37.272 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 03:27:37.751 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 03:27:38.229 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 03:27:38.707 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 03:27:39.185 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 03:27:39.663 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 03:27:40.142 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 03:27:40.620 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 03:27:41.098 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 03:27:41.576 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 03:27:42.055 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 03:27:42.534 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 03:27:43.010 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-09 03:27:43.486 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-09 03:27:43.965 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-09 03:27:44.444 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-09 03:27:44.690 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:27:44.690 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:27:44.691 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:27:44.696 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:27:44.696 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:27:44.697 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:27:44.697 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:27:44.700 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:27:44.700 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:27:44.700 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:27:44.700 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:27:44.700 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:27:44.700 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:27:44.700 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:27:44.700 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3116 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:27:44.700 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3116 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:27:49.701 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:27:49.701 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:27:49.702 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:27:49.703 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:27:49.703 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:27:49.704 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:27:49.712 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:27:49.713 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:27:49.713 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:27:49.713 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:27:49.713 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:27:49.716 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:27:49.716 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:27:49.716 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:27:49.716 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:27:49.717 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:27:49.717 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:27:49.717 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:27:49.717 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:27:49.719 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:27:49.719 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:27:49.719 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:27:49.719 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:27:49.719 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:27:49.719 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:27:49.719 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:27:49.719 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:27:49.721 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:27:49.721 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:27:49.721 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:27:49.721 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:27:49.721 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:27:49.721 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:27:49.721 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:27:49.721 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:27:49.724 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:27:49.724 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:27:49.724 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:27:49.724 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:27:49.724 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:27:49.724 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:27:49.724 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:27:49.724 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:27:49.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:27:49.724 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:27:49.724 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:27:49.724 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:27:49.724 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:27:49.724 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:27:49.724 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:27:49.724 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:27:49.724 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:27:49.724 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:27:49.724 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:27:49.724 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:27:49.724 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:27:49.725 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:27:49.725 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:27:49.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:27:49.725 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:27:49.725 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:27:49.725 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:27:49.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:27:49.725 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:27:49.725 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:27:49.725 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:27:49.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:27:49.725 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:27:49.725 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:27:49.725 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:27:49.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:27:49.725 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:27:49.726 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:27:49.726 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:27:49.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:27:49.726 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:27:49.726 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:27:49.726 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:27:49.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:27:49.726 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:27:49.726 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:27:49.726 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:27:49.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:27:49.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:27:49.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:27:49.726 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:27:49.726 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:27:49.726 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:27:49.726 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:27:54.731 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:27:54.731 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:27:54.733 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:27:54.734 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:27:54.735 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:27:54.735 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:27:54.744 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:27:54.745 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:27:54.745 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:27:54.745 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:27:54.745 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:27:54.747 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:27:54.748 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:27:54.748 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:27:54.748 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:27:54.748 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:27:54.748 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:27:54.749 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:27:54.749 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:27:54.750 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:27:54.750 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:27:54.750 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:27:54.750 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:27:54.750 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:27:54.750 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:27:54.750 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:27:54.750 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:27:54.752 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:27:54.752 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:27:54.752 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:27:54.752 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:27:54.752 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:27:54.752 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:27:54.752 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:27:54.752 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:27:54.754 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:27:54.754 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:27:54.754 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:27:54.754 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:27:54.754 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:27:54.754 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:27:54.755 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:27:54.755 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:27:54.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:27:54.755 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:27:54.755 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:27:54.755 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:27:54.755 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:27:54.755 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:27:54.755 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:27:54.755 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:27:54.755 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:27:54.755 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:27:54.755 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:27:54.755 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:27:54.755 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:27:54.755 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:27:54.755 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:27:54.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:27:54.755 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:27:54.755 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:27:54.755 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:27:54.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:27:54.755 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:27:54.755 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:27:54.755 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:27:54.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:27:54.755 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:27:54.756 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:27:54.756 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:27:54.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:27:54.756 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:27:54.756 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:27:54.756 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:27:54.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:27:54.756 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:27:54.756 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:27:54.756 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:27:54.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:27:54.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:27:54.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:27:54.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:27:54.760 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:27:55.243 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:27:55.280 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:27:55.281 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:27:55.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:27:55.282 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:27:55.284 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:27:55.284 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:27:55.284 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:27:55.285 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:27:55.285 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:27:55.285 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:27:55.285 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:27:55.285 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:27:55.333 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:27:55.333 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-01-09 03:27:55.334 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:27:55.334 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:27:55.721 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:27:55.757 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:27:55.758 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:27:55.758 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:27:55.758 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:27:56.199 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:27:56.677 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:27:56.759 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:27:56.759 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:27:56.759 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:27:56.759 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:27:57.155 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:27:57.634 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 03:27:57.759 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:27:57.760 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:27:57.760 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:27:57.760 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:27:58.112 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 03:27:58.591 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 03:27:58.761 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:27:58.761 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:27:58.761 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:27:58.761 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:27:59.069 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 03:27:59.548 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 03:27:59.762 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:27:59.762 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:27:59.762 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:27:59.762 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:28:00.026 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 03:28:00.504 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 03:28:00.982 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 03:28:01.460 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 03:28:01.939 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 03:28:02.416 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 03:28:02.895 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 03:28:03.338 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:28:03.338 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:28:03.338 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:28:03.344 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:28:03.344 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:28:03.344 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:28:03.344 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:28:03.346 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:28:03.346 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:28:03.346 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:28:03.346 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:28:03.346 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:28:03.346 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:28:03.346 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:28:03.346 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1833 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:28:03.346 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1833 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:28:03.346 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1833 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:28:03.346 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1833 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:28:03.346 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1833 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:28:03.346 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1833 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:28:03.346 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1833 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:28:03.346 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1833 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:28:08.348 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:28:08.348 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:28:08.348 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:28:08.349 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:28:08.349 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:28:08.350 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:28:08.356 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:28:08.357 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:28:08.357 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:28:08.357 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:28:08.357 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:28:08.360 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:28:08.360 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:28:08.360 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:28:08.360 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:28:08.361 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:28:08.361 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:28:08.361 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:28:08.361 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:28:08.363 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:28:08.363 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:28:08.363 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:28:08.363 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:28:08.363 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:28:08.363 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:28:08.363 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:28:08.363 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:28:08.365 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:28:08.365 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:28:08.366 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:28:08.366 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:28:08.366 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:28:08.366 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:28:08.366 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:28:08.366 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:28:08.369 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:28:08.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:28:08.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:28:08.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:28:08.369 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:28:08.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:28:08.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:28:08.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:28:08.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:28:08.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:28:08.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:28:08.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:28:08.369 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:28:08.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:28:08.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:28:08.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:28:08.369 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:28:08.369 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:28:08.369 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:28:08.370 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:28:08.370 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:28:08.370 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:28:08.370 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:28:08.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:28:08.370 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:28:08.370 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:28:08.370 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:28:08.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:28:08.370 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:28:08.370 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:28:08.370 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:28:08.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:28:08.370 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:28:08.370 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:28:08.370 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:28:08.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:28:08.370 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:28:08.372 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:28:08.372 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:28:08.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:28:08.372 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:28:08.372 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:28:08.372 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:28:08.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:28:08.372 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:28:08.372 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:28:08.372 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:28:08.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:28:08.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:28:08.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:28:08.372 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:28:08.372 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:28:08.372 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:28:08.372 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:28:13.376 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:28:13.376 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:28:13.378 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:28:13.379 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:28:13.379 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:28:13.380 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:28:13.388 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:28:13.389 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:28:13.389 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:28:13.389 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:28:13.389 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:28:13.391 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:28:13.391 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:28:13.391 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:28:13.392 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:28:13.392 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:28:13.392 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:28:13.392 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:28:13.392 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:28:13.393 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:28:13.394 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:28:13.394 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:28:13.394 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:28:13.394 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:28:13.394 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:28:13.394 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:28:13.394 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:28:13.395 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:28:13.396 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:28:13.396 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:28:13.396 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:28:13.396 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:28:13.396 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:28:13.396 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:28:13.396 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:28:13.398 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:28:13.398 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:28:13.398 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:28:13.398 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:28:13.398 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:28:13.398 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:28:13.398 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:28:13.398 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:28:13.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:28:13.398 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:28:13.398 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:28:13.398 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:28:13.398 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:28:13.399 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:28:13.399 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:28:13.399 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:28:13.399 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:28:13.399 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:28:13.399 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:28:13.399 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:28:13.399 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:28:13.399 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:28:13.399 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:28:13.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:28:13.399 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:28:13.399 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:28:13.399 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:28:13.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:28:13.399 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:28:13.399 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:28:13.399 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:28:13.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:28:13.399 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:28:13.399 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:28:13.399 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:28:13.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:28:13.399 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:28:13.399 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:28:13.399 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:28:13.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:28:13.399 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:28:13.399 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:28:13.400 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:28:13.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:28:13.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:28:13.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:28:13.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:28:13.403 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:28:13.888 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:28:13.924 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:28:13.926 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:28:13.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:28:13.927 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:28:13.929 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:28:13.929 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:28:13.930 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:28:13.930 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:28:13.930 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:28:13.930 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:28:13.930 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:28:13.930 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:28:14.365 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:28:14.402 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:28:14.402 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:28:14.402 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:28:14.402 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:28:14.843 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:28:15.321 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:28:15.403 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:28:15.403 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:28:15.403 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:28:15.403 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:28:15.800 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:28:16.278 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 03:28:16.404 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:28:16.404 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:28:16.404 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:28:16.405 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:28:16.756 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 03:28:17.234 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 03:28:17.405 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:28:17.406 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:28:17.406 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:28:17.406 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:28:17.712 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 03:28:18.190 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 03:28:18.406 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:28:18.406 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:28:18.406 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:28:18.407 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:28:18.668 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 03:28:19.146 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 03:28:19.624 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 03:28:20.103 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 03:28:20.581 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 03:28:21.058 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 03:28:21.536 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 03:28:22.014 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 03:28:22.492 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 03:28:22.970 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 03:28:23.447 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 03:28:23.916 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 03:28:23.985 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:28:23.985 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:28:23.991 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:28:23.992 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:28:23.992 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:28:23.992 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:28:23.997 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:28:23.997 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:28:23.997 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:28:23.997 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:28:23.997 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:28:23.997 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:28:23.997 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:28:23.998 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2263 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:28:23.998 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2263 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:28:23.998 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2263 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:28:23.998 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2263 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:28:23.998 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2263 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:28:28.995 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:28:28.995 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:28:28.996 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:28:28.997 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:28:28.997 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:28:28.998 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:28:29.006 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:28:29.007 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:28:29.007 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:28:29.007 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:28:29.007 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:28:29.009 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:28:29.010 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:28:29.010 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:28:29.010 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:28:29.010 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:28:29.011 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:28:29.011 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:28:29.011 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:28:29.012 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:28:29.012 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:28:29.012 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:28:29.012 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:28:29.013 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:28:29.013 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:28:29.013 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:28:29.013 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:28:29.014 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:28:29.014 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:28:29.014 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:28:29.014 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:28:29.014 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:28:29.015 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:28:29.015 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:28:29.015 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:28:29.017 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:28:29.017 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:28:29.017 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:28:29.017 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:28:29.017 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:28:29.017 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:28:29.017 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:28:29.017 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:28:29.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:28:29.017 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:28:29.017 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:28:29.017 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:28:29.017 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:28:29.017 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:28:29.018 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:28:29.018 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:28:29.018 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:28:29.018 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:28:29.018 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:28:29.018 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:28:29.018 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:28:29.018 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:28:29.018 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:28:29.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:28:29.018 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:28:29.018 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:28:29.018 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:28:29.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:28:29.018 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:28:29.018 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:28:29.018 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:28:29.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:28:29.018 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:28:29.018 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:28:29.018 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:28:29.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:28:29.018 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:28:29.018 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:28:29.018 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:28:29.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:28:29.018 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:28:29.018 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:28:29.018 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:28:29.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:28:29.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:28:29.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:28:29.019 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:28:29.019 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:28:29.019 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:28:29.019 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:28:29.019 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:28:29.019 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:28:29.019 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:28:29.019 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:28:34.024 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:28:34.024 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:28:34.026 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:28:34.028 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:28:34.030 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:28:34.034 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:28:34.042 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:28:34.042 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:28:34.042 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:28:34.043 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:28:34.043 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:28:34.044 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:28:34.044 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:28:34.044 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:28:34.044 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:28:34.045 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:28:34.045 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:28:34.045 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:28:34.045 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:28:34.046 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:28:34.046 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:28:34.046 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:28:34.046 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:28:34.046 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:28:34.046 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:28:34.046 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:28:34.046 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:28:34.048 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:28:34.048 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:28:34.048 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:28:34.048 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:28:34.048 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:28:34.048 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:28:34.048 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:28:34.048 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:28:34.049 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:28:34.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:28:34.050 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:28:34.050 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:28:34.050 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:28:34.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:28:34.050 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:28:34.050 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:28:34.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:28:34.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:28:34.050 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:28:34.050 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:28:34.050 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:28:34.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:28:34.050 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:28:34.050 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:28:34.050 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:28:34.050 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:28:34.050 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:28:34.050 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:28:34.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:28:34.050 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:28:34.050 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:28:34.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:28:34.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:28:34.050 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:28:34.050 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:28:34.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:28:34.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:28:34.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:28:34.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:28:34.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:28:34.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:28:34.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:28:34.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:28:34.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:28:34.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:28:34.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:28:34.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:28:34.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:28:34.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:28:34.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:28:34.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:28:34.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:28:34.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:28:34.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:28:34.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:28:34.055 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:28:34.539 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:28:34.577 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:28:34.577 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:28:34.578 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:28:34.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:28:34.580 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:28:34.580 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:28:34.580 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:28:34.580 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:28:34.580 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:28:34.580 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:28:34.581 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:28:34.581 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:28:34.582 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:28:34.582 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-01-09 03:28:34.582 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:28:34.582 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:28:35.017 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:28:35.053 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:28:35.075 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:28:35.076 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:28:35.076 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:28:35.495 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:28:35.974 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:28:36.076 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:28:36.077 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:28:36.077 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:28:36.077 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:28:36.452 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:28:36.931 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 03:28:37.077 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:28:37.078 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:28:37.079 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:28:37.079 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:28:37.409 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 03:28:37.888 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 03:28:38.078 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:28:38.079 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:28:38.079 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:28:38.080 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:28:38.366 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 03:28:38.835 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 03:28:39.079 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:28:39.080 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:28:39.081 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:28:39.081 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:28:39.304 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 03:28:39.775 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 03:28:40.253 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 03:28:40.731 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 03:28:41.210 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 03:28:41.687 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 03:28:42.166 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 03:28:42.645 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 03:28:43.123 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 03:28:43.601 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 03:28:44.079 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 03:28:44.557 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 03:28:45.036 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 03:28:45.514 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 03:28:45.587 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:28:45.587 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:28:45.588 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:28:45.593 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:28:45.593 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:28:45.594 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:28:45.594 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:28:45.595 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:28:45.595 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:28:45.595 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:28:45.595 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:28:45.595 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:28:45.595 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:28:45.595 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:28:45.596 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2466 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:28:45.596 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2466 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:28:45.596 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2466 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:28:45.596 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2466 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:28:45.596 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2466 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:28:45.596 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2467 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:28:45.596 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2467 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:28:45.596 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2467 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:28:45.596 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2467 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:28:45.596 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2467 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:28:45.596 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2467 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:28:45.596 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2467 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:28:45.596 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2467 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:28:50.598 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:28:50.598 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:28:50.600 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:28:50.601 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:28:50.601 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:28:50.602 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:28:50.616 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:28:50.616 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:28:50.616 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:28:50.617 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:28:50.617 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:28:50.618 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:28:50.618 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:28:50.618 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:28:50.618 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:28:50.618 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:28:50.618 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:28:50.618 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:28:50.618 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:28:50.620 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:28:50.620 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:28:50.620 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:28:50.620 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:28:50.620 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:28:50.620 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:28:50.620 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:28:50.620 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:28:50.621 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:28:50.621 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:28:50.621 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:28:50.621 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:28:50.621 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:28:50.621 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:28:50.621 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:28:50.621 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:28:50.623 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:28:50.623 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:28:50.623 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:28:50.623 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:28:50.623 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:28:50.624 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:28:50.624 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:28:50.624 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:28:50.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:28:50.624 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:28:50.624 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:28:50.624 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:28:50.624 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:28:50.624 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:28:50.624 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:28:50.624 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:28:50.624 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:28:50.624 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:28:50.624 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:28:50.624 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:28:50.624 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:28:50.624 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:28:50.624 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:28:50.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:28:50.624 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:28:50.624 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:28:50.624 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:28:50.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:28:50.624 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:28:50.624 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:28:50.624 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:28:50.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:28:50.624 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:28:50.624 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:28:50.624 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:28:50.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:28:50.624 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:28:50.624 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:28:50.624 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:28:50.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:28:50.625 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:28:50.625 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:28:50.625 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:28:50.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:28:50.625 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:28:50.625 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:28:50.625 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:28:50.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:28:50.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:28:50.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:28:50.625 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:28:50.626 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:28:50.626 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:28:50.626 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:28:55.630 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:28:55.630 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:28:55.633 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:28:55.633 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:28:55.633 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:28:55.633 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:28:55.642 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:28:55.643 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:28:55.643 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:28:55.644 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:28:55.644 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:28:55.648 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:28:55.649 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:28:55.649 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:28:55.649 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:28:55.649 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:28:55.650 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:28:55.650 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:28:55.650 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:28:55.652 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:28:55.652 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:28:55.653 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:28:55.653 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:28:55.653 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:28:55.653 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:28:55.653 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:28:55.653 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:28:55.655 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:28:55.655 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:28:55.655 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:28:55.655 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:28:55.655 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:28:55.656 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:28:55.656 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:28:55.656 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:28:55.658 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:28:55.658 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:28:55.658 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:28:55.658 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:28:55.659 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:28:55.659 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:28:55.659 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:28:55.659 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:28:55.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:28:55.659 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:28:55.659 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:28:55.659 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:28:55.659 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:28:55.659 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:28:55.659 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:28:55.659 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:28:55.659 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:28:55.659 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:28:55.659 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:28:55.659 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:28:55.659 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:28:55.659 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:28:55.660 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:28:55.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:28:55.660 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:28:55.660 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:28:55.660 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:28:55.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:28:55.660 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:28:55.660 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:28:55.660 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:28:55.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:28:55.660 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:28:55.660 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:28:55.660 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:28:55.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:28:55.660 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:28:55.660 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:28:55.660 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:28:55.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:28:55.660 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:28:55.660 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:28:55.660 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:28:55.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:28:55.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:28:55.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:28:55.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:28:55.664 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:28:56.148 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:28:56.191 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:28:56.193 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:28:56.195 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:28:56.196 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:28:56.626 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:28:56.663 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:28:56.664 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:28:56.664 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:28:56.667 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:28:57.105 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:28:57.583 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:28:57.665 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:28:57.666 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:28:57.666 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:28:57.668 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:28:58.061 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:28:58.539 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 03:28:58.667 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:28:58.667 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:28:58.667 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:28:58.670 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:28:59.017 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 03:28:59.488 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 03:28:59.669 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:28:59.669 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:28:59.669 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:28:59.672 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:28:59.956 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 03:29:00.427 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 03:29:00.670 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:29:00.671 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:29:00.671 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:29:00.673 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:29:00.906 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 03:29:01.384 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 03:29:01.862 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 03:29:02.340 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 03:29:02.819 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 03:29:03.298 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 03:29:03.779 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 03:29:04.259 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 03:29:04.736 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 03:29:05.215 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 03:29:05.693 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 03:29:06.171 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 03:29:06.205 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:29:06.205 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:29:06.205 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:29:06.205 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:29:06.206 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:29:06.206 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:29:06.206 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:29:06.206 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:29:06.206 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:29:06.206 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:29:06.206 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:29:06.206 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2253 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:29:06.206 [WARNING] transceiver.py:250 (TRX1@172.18.122.20:5700/1) RX TRXD message (ver=1 fn=2253 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:29:06.206 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2253 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:29:06.206 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2253 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:29:06.206 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2253 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:29:06.206 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2253 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:29:06.206 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2253 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:29:06.206 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2253 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:29:06.206 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2253 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:29:11.210 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:29:11.210 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:29:11.212 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:29:11.219 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:29:11.219 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:29:11.220 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:29:11.224 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:29:11.225 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:29:11.225 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:29:11.225 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:29:11.225 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:29:11.227 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:29:11.227 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:29:11.228 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:29:11.228 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:29:11.228 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:29:11.228 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:29:11.229 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:29:11.229 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:29:11.230 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:29:11.230 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:29:11.231 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:29:11.231 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:29:11.231 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:29:11.231 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:29:11.231 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:29:11.231 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:29:11.232 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:29:11.232 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:29:11.232 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:29:11.232 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:29:11.233 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:29:11.233 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:29:11.233 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:29:11.233 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:29:11.235 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:29:11.235 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:29:11.235 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:29:11.235 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:29:11.235 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:29:11.235 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:29:11.235 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:29:11.235 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:29:11.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:29:11.236 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:29:11.236 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:29:11.236 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:29:11.236 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:29:11.236 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:29:11.236 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:29:11.236 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:29:11.236 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:29:11.236 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:29:11.236 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:29:11.236 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:29:11.236 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:29:11.236 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:29:11.236 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:29:11.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:29:11.236 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:29:11.236 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:29:11.236 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:29:11.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:29:11.236 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:29:11.236 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:29:11.236 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:29:11.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:29:11.236 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:29:11.236 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:29:11.236 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:29:11.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:29:11.236 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:29:11.237 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:29:11.237 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:29:11.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:29:11.237 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:29:11.237 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:29:11.237 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:29:11.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:29:11.237 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:29:11.237 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:29:11.237 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:29:11.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:29:11.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:29:11.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:29:11.238 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:29:11.238 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:29:11.238 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:29:11.238 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:29:16.242 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:29:16.242 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:29:16.244 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:29:16.244 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:29:16.244 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:29:16.245 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:29:16.253 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:29:16.254 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:29:16.254 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:29:16.254 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:29:16.254 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:29:16.256 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:29:16.256 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:29:16.256 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:29:16.257 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:29:16.257 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:29:16.257 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:29:16.257 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:29:16.257 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:29:16.259 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:29:16.259 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:29:16.259 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:29:16.259 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:29:16.260 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:29:16.260 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:29:16.260 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:29:16.260 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:29:16.262 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:29:16.262 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:29:16.262 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:29:16.262 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:29:16.263 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:29:16.263 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:29:16.263 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:29:16.263 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:29:16.267 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:29:16.267 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:29:16.267 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:29:16.267 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:29:16.267 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:29:16.267 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:29:16.267 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:29:16.267 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:29:16.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:29:16.267 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:29:16.267 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:29:16.267 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:29:16.268 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:29:16.268 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:29:16.268 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:29:16.268 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:29:16.268 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:29:16.268 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:29:16.268 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:29:16.268 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:29:16.268 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:29:16.268 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:29:16.268 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:29:16.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:29:16.268 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:29:16.268 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:29:16.268 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:29:16.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:29:16.268 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:29:16.269 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:29:16.269 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:29:16.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:29:16.269 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:29:16.269 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:29:16.269 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:29:16.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:29:16.269 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:29:16.269 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:29:16.269 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:29:16.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:29:16.269 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:29:16.269 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:29:16.269 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:29:16.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:29:16.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:29:16.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:29:16.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:29:16.273 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:29:16.756 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:29:16.798 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:29:16.800 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:29:16.802 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:29:16.803 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:29:17.226 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:29:17.272 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:29:17.272 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:29:17.272 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:29:17.272 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:29:17.694 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:29:18.169 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:29:18.273 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:29:18.273 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:29:18.273 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:29:18.274 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:29:18.648 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:29:19.127 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 03:29:19.274 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:29:19.274 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:29:19.274 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:29:19.275 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:29:19.607 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 03:29:20.085 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 03:29:20.275 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:29:20.276 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:29:20.276 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:29:20.276 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:29:20.566 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 03:29:21.048 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 03:29:21.277 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:29:21.277 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:29:21.277 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:29:21.277 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:29:21.527 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 03:29:22.005 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 03:29:22.484 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 03:29:22.962 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 03:29:23.440 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 03:29:23.919 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 03:29:24.399 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 03:29:24.877 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 03:29:25.355 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 03:29:25.834 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 03:29:26.314 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 03:29:26.796 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 03:29:27.277 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 03:29:27.755 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 03:29:28.234 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 03:29:28.711 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 03:29:28.820 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:29:28.820 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:29:28.820 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:29:28.820 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:29:28.821 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:29:28.821 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:29:28.821 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:29:28.821 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:29:28.821 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:29:28.821 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:29:28.821 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:29:28.821 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2677 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:29:28.821 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2677 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:29:28.821 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2677 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:29:28.821 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2677 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:29:28.821 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2677 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:29:28.821 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2677 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:29:28.821 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2677 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:29:28.821 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2677 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:29:33.824 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:29:33.824 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:29:33.826 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:29:33.828 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:29:33.831 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:29:33.834 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:29:33.842 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:29:33.843 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:29:33.843 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:29:33.843 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:29:33.843 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:29:33.845 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:29:33.845 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:29:33.845 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:29:33.846 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:29:33.846 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:29:33.846 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:29:33.846 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:29:33.846 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:29:33.847 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:29:33.847 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:29:33.847 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:29:33.847 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:29:33.847 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:29:33.847 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:29:33.847 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:29:33.847 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:29:33.849 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:29:33.849 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:29:33.849 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:29:33.849 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:29:33.849 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:29:33.849 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:29:33.849 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:29:33.849 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:29:33.851 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:29:33.851 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:29:33.851 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:29:33.851 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:29:33.851 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:29:33.851 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:29:33.851 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:29:33.851 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:29:33.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:29:33.851 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:29:33.851 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:29:33.851 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:29:33.851 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:29:33.851 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:29:33.851 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:29:33.851 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:29:33.851 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:29:33.851 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:29:33.851 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:29:33.852 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:29:33.852 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:29:33.852 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:29:33.852 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:29:33.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:29:33.852 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:29:33.852 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:29:33.852 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:29:33.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:29:33.852 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:29:33.852 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:29:33.852 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:29:33.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:29:33.852 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:29:33.852 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:29:33.852 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:29:33.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:29:33.852 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:29:33.852 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:29:33.852 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:29:33.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:29:33.852 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:29:33.852 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:29:33.852 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:29:33.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:29:33.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:29:33.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:29:33.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:29:33.856 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:29:34.340 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:29:34.375 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:29:34.377 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:29:34.379 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:29:34.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:29:34.380 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:29:34.380 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:29:34.380 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:29:34.380 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:29:34.380 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:29:34.380 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:29:34.381 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:29:34.381 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:29:34.817 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:29:34.854 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:29:34.855 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:29:34.855 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:29:34.857 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:29:35.294 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:29:35.772 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:29:35.856 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:29:35.856 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:29:35.856 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:29:35.859 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:29:36.250 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:29:36.728 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 03:29:36.856 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:29:36.857 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:29:36.857 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:29:36.860 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:29:37.206 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 03:29:37.684 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 03:29:37.858 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:29:37.858 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:29:37.858 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:29:37.861 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:29:38.162 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 03:29:38.639 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 03:29:38.859 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:29:38.859 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:29:38.860 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:29:38.862 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:29:39.117 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 03:29:39.595 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 03:29:40.073 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 03:29:40.551 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 03:29:41.029 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 03:29:41.506 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 03:29:41.984 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 03:29:42.462 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 03:29:42.940 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 03:29:43.418 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 03:29:43.896 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 03:29:44.374 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 03:29:44.853 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 03:29:45.330 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 03:29:45.389 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:29:45.389 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:29:45.395 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:29:45.395 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:29:45.395 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:29:45.396 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:29:45.398 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:29:45.398 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:29:45.398 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:29:45.398 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:29:45.398 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:29:45.398 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:29:45.398 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:29:45.398 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2463 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:29:45.398 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2463 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:29:45.398 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2463 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:29:50.400 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:29:50.400 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:29:50.401 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:29:50.402 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:29:50.402 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:29:50.403 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:29:50.410 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:29:50.412 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:29:50.412 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:29:50.412 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:29:50.412 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:29:50.415 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:29:50.416 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:29:50.416 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:29:50.416 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:29:50.416 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:29:50.416 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:29:50.417 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:29:50.417 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:29:50.418 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:29:50.418 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:29:50.419 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:29:50.419 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:29:50.419 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:29:50.419 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:29:50.419 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:29:50.419 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:29:50.420 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:29:50.421 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:29:50.421 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:29:50.421 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:29:50.421 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:29:50.421 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:29:50.421 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:29:50.421 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:29:50.423 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:29:50.423 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:29:50.423 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:29:50.423 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:29:50.424 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:29:50.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:29:50.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:29:50.424 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:29:50.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:29:50.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:29:50.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:29:50.424 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:29:50.424 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:29:50.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:29:50.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:29:50.424 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:29:50.424 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:29:50.424 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:29:50.424 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:29:50.424 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:29:50.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:29:50.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:29:50.424 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:29:50.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:29:50.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:29:50.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:29:50.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:29:50.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:29:50.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:29:50.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:29:50.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:29:50.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:29:50.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:29:50.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:29:50.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:29:50.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:29:50.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:29:50.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:29:50.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:29:50.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:29:50.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:29:50.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:29:50.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:29:50.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:29:50.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:29:50.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:29:50.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:29:50.429 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:29:50.912 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:29:50.949 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:29:50.950 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:29:50.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:29:50.952 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:29:50.955 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:29:50.955 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:29:50.955 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:29:50.956 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:29:50.956 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:29:50.956 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:29:50.956 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:29:50.956 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:29:51.390 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:29:51.428 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:29:51.428 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:29:51.428 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:29:51.430 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:29:51.868 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:29:52.346 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:29:52.428 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:29:52.429 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:29:52.429 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:29:52.430 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:29:52.824 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:29:53.302 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 03:29:53.430 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:29:53.430 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:29:53.430 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:29:53.431 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:29:53.779 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 03:29:54.258 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 03:29:54.431 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:29:54.431 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:29:54.432 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:29:54.432 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:29:54.735 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 03:29:55.213 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 03:29:55.432 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:29:55.432 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:29:55.432 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:29:55.432 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:29:55.691 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 03:29:56.169 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 03:29:56.647 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 03:29:57.125 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 03:29:57.603 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 03:29:58.081 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 03:29:58.559 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 03:29:59.037 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 03:29:59.515 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 03:29:59.993 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 03:30:00.471 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 03:30:00.948 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 03:30:01.426 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 03:30:01.904 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 03:30:02.382 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 03:30:02.860 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 03:30:03.334 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-09 03:30:03.803 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-09 03:30:04.275 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-09 03:30:04.746 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-09 03:30:05.215 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-09 03:30:05.686 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-09 03:30:06.004 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:30:06.004 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:30:06.008 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:30:06.008 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:30:06.008 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:30:06.008 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:30:06.011 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:30:06.011 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:30:06.012 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:30:06.012 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:30:06.012 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:30:06.012 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:30:06.012 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:30:06.012 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3336 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:30:06.012 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3336 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:30:06.012 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3336 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:30:06.012 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3336 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:30:06.012 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3336 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:30:06.012 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3336 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:30:06.012 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3336 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:30:11.011 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:30:11.012 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:30:11.014 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:30:11.016 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:30:11.018 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:30:11.022 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:30:11.035 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:30:11.035 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:30:11.035 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:30:11.035 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:30:11.035 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:30:11.036 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:30:11.036 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:30:11.036 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:30:11.036 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:30:11.037 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:30:11.037 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:30:11.037 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:30:11.037 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:30:11.038 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:30:11.038 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:30:11.038 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:30:11.038 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:30:11.038 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:30:11.038 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:30:11.038 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:30:11.038 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:30:11.039 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:30:11.039 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:30:11.039 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:30:11.039 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:30:11.039 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:30:11.039 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:30:11.039 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:30:11.039 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:30:11.041 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:30:11.041 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:30:11.041 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:30:11.042 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:30:11.042 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:30:11.042 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:30:11.042 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:30:11.042 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:30:11.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:30:11.042 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:30:11.042 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:30:11.042 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:30:11.042 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:30:11.042 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:30:11.042 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:30:11.042 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:30:11.042 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:30:11.042 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:30:11.042 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:30:11.042 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:30:11.042 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:30:11.042 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:30:11.042 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:30:11.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:30:11.042 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:30:11.042 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:30:11.042 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:30:11.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:30:11.043 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:30:11.043 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:30:11.043 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:30:11.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:30:11.043 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:30:11.043 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:30:11.043 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:30:11.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:30:11.043 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:30:11.043 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:30:11.043 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:30:11.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:30:11.043 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:30:11.043 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:30:11.043 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:30:11.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:30:11.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:30:11.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:30:11.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:30:11.047 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:30:11.516 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:30:11.573 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:30:11.574 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:30:11.574 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:30:11.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:30:11.576 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:30:11.576 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:30:11.576 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:30:11.576 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:30:11.576 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:30:11.576 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:30:11.576 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:30:11.576 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:30:11.606 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:30:11.606 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:30:11.609 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:30:11.609 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:30:11.609 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:30:11.609 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:30:11.612 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:30:11.612 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:30:11.612 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:30:11.612 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:30:11.612 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:30:11.613 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:30:11.613 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:30:11.613 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=124 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:30:11.613 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=124 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:30:11.613 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=124 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:30:11.613 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=124 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:30:11.613 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=124 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:30:11.613 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=124 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:30:11.613 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=124 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:30:16.613 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:30:16.613 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:30:16.616 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:30:16.616 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:30:16.617 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:30:16.618 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:30:16.624 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:30:16.625 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:30:16.625 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:30:16.625 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:30:16.625 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:30:16.628 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:30:16.629 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:30:16.629 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:30:16.629 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:30:16.629 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:30:16.629 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:30:16.630 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:30:16.630 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:30:16.631 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:30:16.631 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:30:16.631 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:30:16.631 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:30:16.632 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:30:16.632 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:30:16.632 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:30:16.632 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:30:16.634 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:30:16.634 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:30:16.634 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:30:16.634 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:30:16.634 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:30:16.634 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:30:16.634 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:30:16.634 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:30:16.637 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:30:16.637 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:30:16.637 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:30:16.637 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:30:16.637 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:30:16.637 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:30:16.637 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:30:16.637 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:30:16.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:30:16.637 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:30:16.637 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:30:16.637 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:30:16.638 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:30:16.638 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:30:16.638 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:30:16.638 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:30:16.638 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:30:16.638 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:30:16.638 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:30:16.638 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:30:16.638 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:30:16.638 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:30:16.638 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:30:16.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:30:16.638 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:30:16.638 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:30:16.638 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:30:16.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:30:16.638 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:30:16.638 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:30:16.638 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:30:16.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:30:16.638 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:30:16.638 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:30:16.638 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:30:16.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:30:16.638 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:30:16.638 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:30:16.638 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:30:16.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:30:16.638 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:30:16.639 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:30:16.639 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:30:16.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:30:16.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:30:16.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:30:16.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:30:16.642 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:30:17.119 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:30:17.167 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:30:17.169 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:30:17.172 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:30:17.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:30:17.197 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:30:17.197 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:30:17.197 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:30:17.216 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:30:17.216 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:30:17.217 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:30:17.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:30:17.225 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:30:17.226 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:30:17.226 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:30:17.227 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:30:17.227 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:30:17.257 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:30:17.258 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:30:17.259 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:30:17.260 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:30:17.378 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:30:17.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:30:17.383 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:30:17.383 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:30:17.401 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:30:17.401 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:30:17.401 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:30:17.407 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:30:17.407 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:30:17.407 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:30:17.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:30:17.410 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:30:17.410 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:30:17.410 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:30:17.410 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:30:17.410 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:30:17.447 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:30:17.447 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-09 03:30:17.448 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:30:17.448 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:30:17.593 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:30:17.636 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:30:17.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:30:17.641 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:30:17.641 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:30:17.641 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:30:17.644 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:30:17.645 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:30:17.645 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:30:17.645 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:30:17.663 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:30:17.663 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:30:17.663 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:30:17.669 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:30:17.669 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:30:17.669 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:30:17.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:30:17.671 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:30:17.671 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:30:17.671 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:30:17.671 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:30:17.671 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:30:17.680 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:30:17.680 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:30:17.680 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:30:17.680 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:30:17.982 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:30:17.983 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:30:17.987 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:30:17.987 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:30:18.004 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:30:18.004 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:30:18.004 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:30:18.010 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:30:18.010 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:30:18.010 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:30:18.011 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:30:18.012 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:30:18.012 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:30:18.012 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:30:18.012 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:30:18.012 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:30:18.059 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:30:18.059 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 03:30:18.059 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:30:18.059 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:30:18.062 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:30:18.533 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:30:18.642 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:30:18.642 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:30:18.642 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:30:18.645 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:30:18.850 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:30:18.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:30:18.857 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:30:18.857 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:30:18.857 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:30:18.870 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:30:18.870 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:30:18.870 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:30:18.870 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:30:18.878 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:30:18.878 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:30:18.879 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:30:18.879 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:30:18.879 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:30:18.879 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:30:18.879 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:30:18.879 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=482 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:30:18.880 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=482 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:30:23.875 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:30:23.875 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:30:23.876 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:30:23.877 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:30:23.877 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:30:23.878 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:30:23.885 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:30:23.886 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:30:23.886 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:30:23.886 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:30:23.886 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:30:23.889 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:30:23.889 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:30:23.889 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:30:23.889 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:30:23.889 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:30:23.889 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:30:23.890 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:30:23.890 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:30:23.892 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:30:23.892 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:30:23.893 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:30:23.893 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:30:23.893 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:30:23.893 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:30:23.893 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:30:23.893 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:30:23.895 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:30:23.895 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:30:23.896 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:30:23.896 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:30:23.896 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:30:23.896 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:30:23.896 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:30:23.896 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:30:23.899 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:30:23.899 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:30:23.899 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:30:23.899 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:30:23.899 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:30:23.899 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:30:23.899 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:30:23.900 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:30:23.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:30:23.900 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:30:23.900 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:30:23.900 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:30:23.900 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:30:23.900 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:30:23.900 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:30:23.900 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:30:23.900 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:30:23.900 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:30:23.900 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:30:23.900 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:30:23.900 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:30:23.900 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:30:23.900 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:30:23.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:30:23.901 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:30:23.901 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:30:23.901 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:30:23.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:30:23.901 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:30:23.901 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:30:23.901 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:30:23.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:30:23.901 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:30:23.901 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:30:23.901 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:30:23.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:30:23.901 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:30:23.901 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:30:23.901 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:30:23.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:30:23.901 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:30:23.901 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:30:23.901 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:30:23.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:30:23.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:30:23.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:30:23.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:30:23.905 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:30:24.375 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:30:24.434 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:30:24.436 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:30:24.437 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:30:24.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:30:24.444 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:30:24.444 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:30:24.444 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:30:24.450 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:30:24.450 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:30:24.450 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:30:24.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:30:24.453 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:30:24.453 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:30:24.453 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:30:24.453 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:30:24.453 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:30:24.464 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:30:24.464 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:30:24.464 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:30:24.465 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:30:24.845 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:30:24.903 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:30:24.903 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:30:24.905 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:30:24.907 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:30:25.314 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:30:25.784 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:30:25.904 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:30:25.904 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:30:25.905 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:30:25.907 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:30:26.257 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:30:26.728 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 03:30:26.905 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:30:26.905 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:30:26.906 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:30:26.909 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:30:27.198 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 03:30:27.668 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 03:30:27.906 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:30:27.906 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:30:27.906 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:30:27.910 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:30:28.140 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 03:30:28.610 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 03:30:28.907 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:30:28.907 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:30:28.907 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:30:28.911 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:30:29.080 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 03:30:29.467 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:30:29.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:30:29.474 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:30:29.474 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:30:29.494 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:30:29.494 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:30:29.494 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:30:29.500 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:30:29.500 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:30:29.500 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:30:29.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:30:29.502 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:30:29.502 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:30:29.502 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:30:29.502 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:30:29.502 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:30:29.549 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:30:29.549 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-09 03:30:29.549 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:30:29.549 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:30:29.552 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 03:30:30.022 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 03:30:30.493 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 03:30:30.970 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 03:30:31.449 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 03:30:31.928 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 03:30:32.406 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 03:30:32.884 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 03:30:33.362 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 03:30:33.841 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 03:30:34.314 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 03:30:34.555 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:30:34.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:30:34.561 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:30:34.561 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:30:34.561 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:30:34.580 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:30:34.580 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:30:34.580 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:30:34.586 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:30:34.586 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:30:34.586 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:30:34.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:30:34.588 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:30:34.588 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:30:34.588 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:30:34.588 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:30:34.588 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:30:34.590 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:30:34.590 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:30:34.590 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:30:34.590 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:30:34.786 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 03:30:35.264 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 03:30:35.741 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 03:30:36.218 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 03:30:36.689 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-09 03:30:37.158 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-09 03:30:37.627 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-09 03:30:38.104 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-09 03:30:38.581 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-09 03:30:39.059 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-09 03:30:39.538 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-09 03:30:39.593 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:30:39.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:30:39.597 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:30:39.597 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:30:39.618 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:30:39.618 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:30:39.618 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:30:39.624 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:30:39.624 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:30:39.624 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:30:39.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:30:39.626 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:30:39.626 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:30:39.626 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:30:39.626 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:30:39.626 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:30:39.676 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:30:39.676 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 03:30:39.677 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:30:39.677 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:30:40.014 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-09 03:30:40.492 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-09 03:30:40.969 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-09 03:30:41.438 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-09 03:30:41.907 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-09 03:30:42.382 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-09 03:30:42.855 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-09 03:30:43.325 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-09 03:30:43.804 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-09 03:30:44.282 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-09 03:30:44.682 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:30:44.682 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:30:44.687 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:30:44.688 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:30:44.688 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:30:44.703 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:30:44.703 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:30:44.703 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:30:44.703 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:30:44.713 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:30:44.713 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:30:44.713 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:30:44.713 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:30:44.714 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:30:44.714 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:30:44.714 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:30:44.714 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4478 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:30:44.714 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4478 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:30:44.714 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4478 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:30:44.715 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4478 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:30:44.715 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4478 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:30:44.715 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4478 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:30:44.715 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4479 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:30:44.715 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4479 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:30:44.715 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4479 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:30:44.715 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4479 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:30:44.715 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4479 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:30:44.715 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4479 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:30:44.716 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4479 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:30:44.716 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4479 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:30:44.716 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4480 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:30:44.716 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4480 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:30:44.716 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4480 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:30:44.716 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4480 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:30:44.716 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4480 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:30:44.716 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4480 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:30:44.716 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4480 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:30:44.717 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4480 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:30:44.717 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4481 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:30:44.717 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4481 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:30:44.717 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4481 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:30:44.717 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4481 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:30:44.717 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4481 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:30:44.717 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4481 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:30:44.717 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4481 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:30:44.717 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4481 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:30:49.709 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:30:49.709 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:30:49.710 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:30:49.711 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:30:49.711 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:30:49.713 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:30:49.721 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:30:49.721 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:30:49.722 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:30:49.722 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:30:49.722 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:30:49.723 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:30:49.723 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:30:49.723 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:30:49.723 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:30:49.724 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:30:49.724 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:30:49.724 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:30:49.724 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:30:49.725 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:30:49.725 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:30:49.725 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:30:49.725 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:30:49.725 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:30:49.725 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:30:49.725 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:30:49.725 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:30:49.727 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:30:49.727 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:30:49.727 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:30:49.727 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:30:49.727 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:30:49.727 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:30:49.727 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:30:49.727 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:30:49.730 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:30:49.730 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:30:49.730 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:30:49.730 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:30:49.730 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:30:49.730 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:30:49.731 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:30:49.731 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:30:49.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:30:49.731 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:30:49.731 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:30:49.731 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:30:49.731 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:30:49.731 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:30:49.731 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:30:49.731 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:30:49.731 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:30:49.731 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:30:49.731 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:30:49.731 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:30:49.731 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:30:49.731 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:30:49.731 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:30:49.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:30:49.731 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:30:49.731 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:30:49.731 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:30:49.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:30:49.731 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:30:49.731 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:30:49.731 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:30:49.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:30:49.731 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:30:49.731 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:30:49.732 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:30:49.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:30:49.732 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:30:49.732 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:30:49.732 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:30:49.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:30:49.732 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:30:49.732 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:30:49.732 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:30:49.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:30:49.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:30:49.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:30:49.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:30:49.736 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:30:50.220 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:30:50.249 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:30:50.251 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:30:50.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:30:50.252 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:30:50.264 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:30:50.264 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:30:50.264 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:30:50.275 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:30:50.276 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:30:50.276 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:30:50.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:30:50.282 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:30:50.283 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:30:50.283 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:30:50.283 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:30:50.283 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:30:50.311 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:30:50.312 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:30:50.312 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:30:50.312 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:30:50.690 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:30:50.734 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:30:50.734 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:30:50.734 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:30:50.736 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:30:51.159 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:30:51.635 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:30:51.735 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:30:51.735 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:30:51.735 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:30:51.737 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:30:52.113 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:30:52.590 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 03:30:52.736 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:30:52.737 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:30:52.737 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:30:52.738 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:30:53.069 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 03:30:53.546 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 03:30:53.737 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:30:53.737 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:30:53.738 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:30:53.739 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:30:54.021 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 03:30:54.490 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 03:30:54.738 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:30:54.738 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:30:54.739 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:30:54.741 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:30:54.962 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 03:30:55.317 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:30:55.318 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:30:55.323 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:30:55.323 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:30:55.342 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:30:55.342 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:30:55.342 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:30:55.348 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:30:55.348 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:30:55.348 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:30:55.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:30:55.350 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:30:55.350 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:30:55.350 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:30:55.350 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:30:55.350 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:30:55.378 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:30:55.379 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-09 03:30:55.379 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:30:55.379 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:30:55.437 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 03:30:55.916 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 03:30:56.394 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 03:30:56.873 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 03:30:57.352 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 03:30:57.830 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 03:30:58.300 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 03:30:58.769 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 03:30:59.239 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 03:30:59.710 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 03:31:00.181 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 03:31:00.384 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:31:00.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:31:00.388 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:31:00.388 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:31:00.389 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:31:00.405 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:31:00.405 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:31:00.405 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:31:00.411 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:31:00.411 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:31:00.411 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:31:00.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:31:00.413 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:31:00.413 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:31:00.413 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:31:00.413 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:31:00.413 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:31:00.461 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:31:00.461 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:31:00.461 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:31:00.461 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:31:00.654 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 03:31:01.132 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 03:31:01.606 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 03:31:02.075 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 03:31:02.549 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-09 03:31:03.018 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-09 03:31:03.488 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-09 03:31:03.958 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-09 03:31:04.429 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-09 03:31:04.900 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-09 03:31:05.370 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-09 03:31:05.467 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:31:05.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:31:05.472 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:31:05.472 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:31:05.488 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:31:05.488 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:31:05.488 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:31:05.494 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:31:05.494 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:31:05.494 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:31:05.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:31:05.496 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:31:05.496 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:31:05.496 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:31:05.496 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:31:05.496 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:31:05.504 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:31:05.504 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 03:31:05.504 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:31:05.504 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:31:05.841 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-09 03:31:06.312 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-09 03:31:06.785 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-09 03:31:07.254 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-09 03:31:07.724 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-09 03:31:08.195 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-09 03:31:08.665 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-09 03:31:09.136 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-09 03:31:09.607 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-09 03:31:10.078 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-09 03:31:10.507 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:31:10.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:31:10.512 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:31:10.512 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:31:10.512 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:31:10.527 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:31:10.528 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:31:10.528 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:31:10.528 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:31:10.536 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:31:10.536 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:31:10.536 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:31:10.536 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:31:10.536 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:31:10.536 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:31:10.537 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:31:10.537 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4485 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:31:10.537 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4485 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:31:15.532 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:31:15.533 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:31:15.536 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:31:15.536 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:31:15.536 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:31:15.536 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:31:15.554 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:31:15.554 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:31:15.554 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:31:15.555 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:31:15.555 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:31:15.556 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:31:15.557 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:31:15.557 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:31:15.557 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:31:15.557 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:31:15.557 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:31:15.557 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:31:15.557 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:31:15.558 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:31:15.558 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:31:15.558 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:31:15.559 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:31:15.559 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:31:15.559 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:31:15.559 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:31:15.559 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:31:15.560 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:31:15.560 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:31:15.560 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:31:15.560 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:31:15.560 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:31:15.560 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:31:15.560 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:31:15.560 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:31:15.562 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:31:15.562 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:31:15.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:31:15.563 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:31:15.563 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:31:15.563 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:31:15.563 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:31:15.563 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:31:15.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:31:15.563 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:31:15.563 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:31:15.563 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:31:15.563 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:31:15.563 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:31:15.563 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:31:15.563 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:31:15.563 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:31:15.563 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:31:15.563 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:31:15.563 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:31:15.563 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:31:15.563 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:31:15.563 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:31:15.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:31:15.563 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:31:15.563 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:31:15.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:31:15.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:31:15.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:31:15.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:31:15.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:31:15.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:31:15.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:31:15.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:31:15.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:31:15.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:31:15.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:31:15.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:31:15.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:31:15.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:31:15.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:31:15.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:31:15.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:31:15.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:31:15.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:31:15.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:31:15.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:31:15.568 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:31:16.040 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:31:16.099 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:31:16.101 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:31:16.103 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:31:16.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:31:16.127 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:31:16.127 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:31:16.127 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:31:16.143 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:31:16.143 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:31:16.144 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:31:16.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:31:16.149 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:31:16.149 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:31:16.150 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:31:16.150 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:31:16.150 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:31:16.178 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:31:16.179 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:31:16.179 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:31:16.179 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:31:16.510 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:31:16.567 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:31:16.567 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:31:16.567 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:31:16.567 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:31:16.980 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:31:17.450 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:31:17.568 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:31:17.568 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:31:17.569 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:31:17.569 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:31:17.921 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:31:18.391 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 03:31:18.569 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:31:18.569 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:31:18.569 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:31:18.570 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:31:18.862 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 03:31:19.341 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 03:31:19.571 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:31:19.571 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:31:19.571 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:31:19.571 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:31:19.811 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 03:31:20.281 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 03:31:20.572 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:31:20.572 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:31:20.573 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:31:20.573 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:31:20.751 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 03:31:21.184 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:31:21.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:31:21.190 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:31:21.190 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:31:21.209 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:31:21.209 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:31:21.209 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:31:21.215 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:31:21.215 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:31:21.215 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:31:21.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:31:21.217 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:31:21.217 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:31:21.217 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:31:21.217 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:31:21.217 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:31:21.221 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 03:31:21.266 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:31:21.266 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-09 03:31:21.267 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:31:21.267 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:31:21.691 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 03:31:22.162 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 03:31:22.633 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 03:31:23.104 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 03:31:23.574 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 03:31:24.045 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 03:31:24.516 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 03:31:24.986 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 03:31:25.457 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 03:31:25.928 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 03:31:26.271 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:31:26.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:31:26.276 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:31:26.276 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:31:26.277 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:31:26.296 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:31:26.296 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:31:26.296 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:31:26.302 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:31:26.302 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:31:26.302 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:31:26.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:31:26.304 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:31:26.304 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:31:26.304 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:31:26.304 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:31:26.304 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:31:26.349 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:31:26.349 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:31:26.349 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:31:26.350 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:31:26.399 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 03:31:26.870 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 03:31:27.342 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 03:31:27.811 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 03:31:28.283 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-09 03:31:28.758 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-09 03:31:29.228 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-09 03:31:29.697 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-09 03:31:30.168 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-09 03:31:30.638 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-09 03:31:31.109 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-09 03:31:31.355 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:31:31.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:31:31.360 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:31:31.360 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:31:31.383 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:31:31.383 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:31:31.384 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:31:31.389 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:31:31.389 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:31:31.389 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:31:31.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:31:31.391 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:31:31.391 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:31:31.391 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:31:31.391 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:31:31.391 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:31:31.435 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:31:31.435 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 03:31:31.435 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:31:31.436 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:31:31.580 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-09 03:31:32.050 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-09 03:31:32.521 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-09 03:31:32.992 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-09 03:31:33.463 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-09 03:31:33.934 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-09 03:31:34.404 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-09 03:31:34.875 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-09 03:31:35.345 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-09 03:31:35.817 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-09 03:31:36.294 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-01-09 03:31:36.441 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:31:36.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:31:36.445 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:31:36.445 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:31:36.445 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:31:36.461 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:31:36.461 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:31:36.461 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:31:36.461 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:31:36.463 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:31:36.463 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:31:36.463 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:31:36.463 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:31:36.463 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:31:36.463 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:31:36.463 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:31:36.463 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4525 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:31:36.463 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4525 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:31:36.463 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4525 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:31:36.463 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4525 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:31:36.463 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4525 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:31:36.463 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4525 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:31:36.464 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4525 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:31:36.464 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4525 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:31:36.464 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4526 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:31:36.464 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4526 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:31:36.464 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4526 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:31:41.465 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:31:41.466 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:31:41.468 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:31:41.471 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:31:41.473 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:31:41.477 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:31:41.486 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:31:41.487 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:31:41.487 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:31:41.487 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:31:41.487 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:31:41.491 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:31:41.491 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:31:41.491 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:31:41.491 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:31:41.491 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:31:41.491 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:31:41.491 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:31:41.492 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:31:41.495 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:31:41.495 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:31:41.495 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:31:41.495 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:31:41.495 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:31:41.495 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:31:41.495 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:31:41.495 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:31:41.498 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:31:41.498 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:31:41.498 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:31:41.498 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:31:41.498 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:31:41.498 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:31:41.498 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:31:41.498 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:31:41.501 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:31:41.501 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:31:41.501 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:31:41.501 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:31:41.501 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:31:41.501 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:31:41.501 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:31:41.501 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:31:41.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:31:41.502 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:31:41.502 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:31:41.502 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:31:41.502 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:31:41.502 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:31:41.502 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:31:41.502 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:31:41.502 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:31:41.502 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:31:41.502 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:31:41.502 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:31:41.502 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:31:41.502 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:31:41.502 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:31:41.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:31:41.502 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:31:41.502 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:31:41.502 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:31:41.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:31:41.502 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:31:41.502 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:31:41.502 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:31:41.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:31:41.502 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:31:41.502 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:31:41.502 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:31:41.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:31:41.502 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:31:41.502 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:31:41.502 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:31:41.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:31:41.502 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:31:41.502 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:31:41.503 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:31:41.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:31:41.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:31:41.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:31:41.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:31:41.507 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:31:41.982 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:31:42.019 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:31:42.019 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:31:42.020 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:31:42.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:31:42.032 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:31:42.032 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:31:42.032 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:31:42.051 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:31:42.051 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:31:42.051 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:31:42.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:31:42.059 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:31:42.059 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:31:42.060 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:31:42.060 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:31:42.060 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:31:42.073 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:31:42.073 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:31:42.073 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:31:42.074 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:31:42.458 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:31:42.505 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:31:42.505 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:31:42.506 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:31:42.506 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:31:42.935 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:31:43.405 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:31:43.506 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:31:43.506 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:31:43.506 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:31:43.508 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:31:43.875 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:31:44.346 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 03:31:44.507 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:31:44.508 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:31:44.508 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:31:44.508 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:31:44.821 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 03:31:45.291 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 03:31:45.508 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:31:45.508 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:31:45.508 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:31:45.509 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:31:45.760 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 03:31:46.231 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 03:31:46.509 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:31:46.510 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:31:46.510 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:31:46.510 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:31:46.702 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 03:31:47.078 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:31:47.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:31:47.085 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:31:47.085 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:31:47.101 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:31:47.101 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:31:47.101 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:31:47.107 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:31:47.107 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:31:47.107 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:31:47.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:31:47.109 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:31:47.109 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:31:47.110 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:31:47.110 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:31:47.110 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:31:47.116 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:31:47.116 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-09 03:31:47.116 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:31:47.116 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:31:47.173 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 03:31:47.643 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 03:31:48.113 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 03:31:48.584 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 03:31:49.054 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 03:31:49.525 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 03:31:49.997 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 03:31:50.469 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 03:31:50.938 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 03:31:51.408 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 03:31:51.879 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 03:31:52.118 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:31:52.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:31:52.125 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:31:52.125 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:31:52.125 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:31:52.143 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:31:52.143 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:31:52.144 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:31:52.149 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:31:52.149 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:31:52.150 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:31:52.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:31:52.151 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:31:52.151 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:31:52.151 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:31:52.151 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:31:52.151 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:31:52.156 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:31:52.156 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:31:52.156 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:31:52.156 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:31:52.351 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 03:31:52.821 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 03:31:53.292 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 03:31:53.765 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 03:31:54.238 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-09 03:31:54.707 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-09 03:31:55.177 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-09 03:31:55.647 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-09 03:31:56.118 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-09 03:31:56.593 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-09 03:31:57.067 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-09 03:31:57.158 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:31:57.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:31:57.164 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:31:57.164 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:31:57.183 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:31:57.183 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:31:57.183 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:31:57.189 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:31:57.189 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:31:57.189 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:31:57.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:31:57.191 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:31:57.191 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:31:57.191 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:31:57.191 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:31:57.191 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:31:57.200 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:31:57.200 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 03:31:57.200 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:31:57.200 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:31:57.537 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-09 03:31:58.007 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-09 03:31:58.478 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-09 03:31:58.948 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-09 03:31:59.419 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-09 03:31:59.891 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-09 03:32:00.361 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-09 03:32:00.834 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-09 03:32:01.304 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-09 03:32:01.773 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-09 03:32:02.202 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:32:02.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:32:02.209 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:32:02.209 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:32:02.209 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:32:02.225 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:32:02.226 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:32:02.226 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:32:02.226 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:32:02.228 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:32:02.228 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:32:02.228 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:32:02.228 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:32:02.229 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:32:02.229 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:32:02.229 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:32:02.229 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4485 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:32:02.229 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4485 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:32:07.231 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:32:07.231 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:32:07.234 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:32:07.234 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:32:07.235 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:32:07.236 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:32:07.245 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:32:07.246 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:32:07.246 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:32:07.246 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:32:07.246 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:32:07.250 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:32:07.250 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:32:07.250 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:32:07.250 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:32:07.251 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:32:07.251 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:32:07.251 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:32:07.251 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:32:07.254 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:32:07.254 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:32:07.254 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:32:07.254 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:32:07.255 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:32:07.255 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:32:07.255 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:32:07.255 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:32:07.258 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:32:07.258 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:32:07.258 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:32:07.258 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:32:07.258 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:32:07.258 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:32:07.258 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:32:07.258 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:32:07.262 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:32:07.262 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:32:07.262 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:32:07.262 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:32:07.262 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:32:07.262 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:32:07.262 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:32:07.262 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:32:07.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:32:07.262 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:32:07.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:32:07.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:32:07.263 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:32:07.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:32:07.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:32:07.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:32:07.263 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:32:07.263 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:32:07.263 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:32:07.263 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:32:07.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:32:07.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:32:07.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:32:07.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:32:07.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:32:07.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:32:07.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:32:07.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:32:07.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:32:07.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:32:07.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:32:07.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:32:07.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:32:07.264 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:32:07.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:32:07.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:32:07.264 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:32:07.264 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:32:07.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:32:07.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:32:07.264 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:32:07.264 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:32:07.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:32:07.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:32:07.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:32:07.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:32:07.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:32:07.268 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:32:07.737 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:32:07.801 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:32:07.804 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:32:07.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:32:07.806 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:32:07.819 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:32:07.819 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:32:07.819 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:32:07.828 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:32:07.828 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:32:07.828 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:32:07.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:32:07.830 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:32:07.830 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:32:07.830 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:32:07.830 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:32:07.830 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:32:07.877 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:32:07.877 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:32:07.878 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:32:07.878 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:32:08.115 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:32:08.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:32:08.120 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:32:08.120 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:32:08.136 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:32:08.136 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:32:08.136 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:32:08.142 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:32:08.142 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:32:08.142 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:32:08.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:32:08.144 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:32:08.144 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:32:08.144 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:32:08.144 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:32:08.144 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:32:08.155 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:32:08.155 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-09 03:32:08.155 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:32:08.155 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:32:08.207 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:32:08.267 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:32:08.267 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:32:08.267 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:32:08.270 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:32:08.531 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:32:08.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:32:08.536 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:32:08.536 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:32:08.536 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:32:08.555 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:32:08.555 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:32:08.555 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:32:08.561 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:32:08.561 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:32:08.561 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:32:08.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:32:08.563 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:32:08.563 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:32:08.563 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:32:08.563 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:32:08.563 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:32:08.575 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:32:08.576 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:32:08.576 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:32:08.576 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:32:08.676 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:32:09.147 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:32:09.268 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:32:09.268 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:32:09.268 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:32:09.271 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:32:09.301 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:32:09.302 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:32:09.306 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:32:09.306 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:32:09.326 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:32:09.326 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:32:09.326 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:32:09.333 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:32:09.333 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:32:09.333 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:32:09.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:32:09.335 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:32:09.335 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:32:09.335 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:32:09.335 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:32:09.335 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:32:09.380 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:32:09.380 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 03:32:09.380 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:32:09.381 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:32:09.617 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:32:09.934 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:32:09.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:32:09.940 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:32:09.940 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:32:09.940 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:32:09.953 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:32:09.953 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:32:09.953 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:32:09.953 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:32:09.954 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:32:09.955 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:32:09.955 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:32:09.955 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:32:09.955 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:32:09.955 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:32:09.955 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:32:09.955 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=584 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:32:09.955 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=584 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:32:09.955 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=584 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:32:09.955 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=584 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:32:09.955 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=584 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:32:09.955 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=584 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:32:09.955 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=584 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:32:09.955 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=585 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:32:09.955 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=585 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:32:09.955 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=585 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:32:09.955 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=585 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:32:09.955 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=585 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:32:09.955 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=585 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:32:09.955 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=585 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:32:09.955 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=585 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:32:14.958 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:32:14.958 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:32:14.962 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:32:14.962 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:32:14.962 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:32:14.962 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:32:14.979 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:32:14.980 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:32:14.980 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:32:14.980 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:32:14.980 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:32:14.982 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:32:14.982 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:32:14.982 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:32:14.982 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:32:14.982 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:32:14.982 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:32:14.983 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:32:14.983 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:32:14.984 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:32:14.984 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:32:14.984 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:32:14.984 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:32:14.985 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:32:14.985 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:32:14.985 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:32:14.985 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:32:14.986 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:32:14.986 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:32:14.986 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:32:14.986 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:32:14.987 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:32:14.987 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:32:14.987 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:32:14.987 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:32:14.989 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:32:14.989 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:32:14.989 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:32:14.989 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:32:14.989 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:32:14.989 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:32:14.989 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:32:14.989 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:32:14.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:32:14.989 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:32:14.989 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:32:14.989 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:32:14.989 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:32:14.989 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:32:14.989 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:32:14.989 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:32:14.989 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:32:14.989 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:32:14.989 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:32:14.990 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:32:14.990 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:32:14.990 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:32:14.990 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:32:14.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:32:14.990 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:32:14.990 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:32:14.990 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:32:14.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:32:14.990 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:32:14.990 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:32:14.990 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:32:14.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:32:14.990 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:32:14.990 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:32:14.990 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:32:14.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:32:14.990 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:32:14.990 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:32:14.990 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:32:14.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:32:14.990 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:32:14.990 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:32:14.990 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:32:14.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:32:14.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:32:14.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:32:14.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:32:14.994 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:32:15.472 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:32:15.526 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:32:15.529 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:32:15.531 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:32:15.531 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:32:15.557 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:32:15.558 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:32:15.558 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:32:15.577 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:32:15.577 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:32:15.577 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:32:15.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:32:15.585 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:32:15.585 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:32:15.585 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:32:15.585 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:32:15.585 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:32:15.610 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:32:15.611 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:32:15.611 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:32:15.612 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:32:15.944 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:32:15.992 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:32:15.993 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:32:15.993 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:32:15.995 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:32:16.415 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:32:16.887 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:32:16.994 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:32:16.994 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:32:16.994 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:32:16.995 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:32:17.357 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:32:17.827 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 03:32:17.995 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:32:17.996 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:32:17.996 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:32:17.996 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:32:18.298 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 03:32:18.769 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 03:32:18.997 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:32:18.997 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:32:18.997 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:32:18.997 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:32:19.239 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 03:32:19.710 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 03:32:19.998 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:32:19.998 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:32:19.998 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:32:19.998 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:32:20.181 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 03:32:20.652 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 03:32:21.123 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 03:32:21.593 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 03:32:22.064 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 03:32:22.537 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 03:32:23.015 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 03:32:23.492 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 03:32:23.965 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 03:32:24.435 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 03:32:24.906 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 03:32:25.379 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 03:32:25.848 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 03:32:26.319 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 03:32:26.797 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 03:32:27.276 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 03:32:27.754 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-09 03:32:28.232 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-09 03:32:28.705 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-09 03:32:29.176 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-09 03:32:29.646 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-09 03:32:30.117 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-09 03:32:30.591 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-09 03:32:31.069 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-09 03:32:31.547 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-09 03:32:32.025 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-09 03:32:32.503 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-09 03:32:32.981 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-09 03:32:33.459 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-09 03:32:33.934 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-09 03:32:34.406 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-09 03:32:34.879 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-09 03:32:35.357 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-09 03:32:35.614 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:32:35.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:32:35.624 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:32:35.624 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:32:35.639 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:32:35.640 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:32:35.640 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:32:35.646 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:32:35.646 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:32:35.646 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:32:35.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:32:35.647 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:32:35.647 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:32:35.648 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:32:35.648 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:32:35.648 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:32:35.684 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:32:35.685 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-09 03:32:35.685 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:32:35.685 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:32:35.831 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-01-09 03:32:36.300 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-01-09 03:32:36.775 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-01-09 03:32:37.254 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-01-09 03:32:37.733 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-01-09 03:32:38.212 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-01-09 03:32:38.685 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-01-09 03:32:39.155 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-01-09 03:32:39.626 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-01-09 03:32:40.096 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-01-09 03:32:40.567 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-01-09 03:32:41.038 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-01-09 03:32:41.509 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-01-09 03:32:41.979 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-01-09 03:32:42.450 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-01-09 03:32:42.921 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-01-09 03:32:43.391 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-01-09 03:32:43.862 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-01-09 03:32:44.333 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-01-09 03:32:44.804 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-01-09 03:32:45.275 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-01-09 03:32:45.746 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-01-09 03:32:46.216 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-01-09 03:32:46.687 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-01-09 03:32:47.158 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-01-09 03:32:47.629 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-01-09 03:32:48.099 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-01-09 03:32:48.570 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-01-09 03:32:49.042 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-01-09 03:32:49.512 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-01-09 03:32:49.982 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-01-09 03:32:50.453 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-01-09 03:32:50.924 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-01-09 03:32:51.395 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-01-09 03:32:51.865 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-01-09 03:32:52.336 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-01-09 03:32:52.807 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-01-09 03:32:53.278 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-01-09 03:32:53.748 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-01-09 03:32:54.217 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-01-09 03:32:54.686 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-01-09 03:32:55.162 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-01-09 03:32:55.635 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-01-09 03:32:55.688 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:32:55.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:32:55.700 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:32:55.700 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:32:55.700 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:32:55.717 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:32:55.717 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:32:55.717 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:32:55.724 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:32:55.724 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:32:55.724 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:32:55.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:32:55.726 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:32:55.726 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:32:55.726 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:32:55.726 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:32:55.726 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:32:55.770 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:32:55.771 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:32:55.771 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:32:55.771 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:32:56.105 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-01-09 03:32:56.582 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-01-09 03:32:57.058 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-01-09 03:32:57.528 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-01-09 03:32:57.998 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-01-09 03:32:58.467 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-01-09 03:32:58.940 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-01-09 03:32:59.410 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-01-09 03:32:59.880 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-01-09 03:33:00.350 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-01-09 03:33:00.821 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-01-09 03:33:01.292 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-01-09 03:33:01.767 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-01-09 03:33:02.238 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-01-09 03:33:02.710 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-01-09 03:33:03.180 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-01-09 03:33:03.653 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-01-09 03:33:04.123 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-01-09 03:33:04.593 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-01-09 03:33:05.064 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-01-09 03:33:05.534 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-01-09 03:33:06.005 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-01-09 03:33:06.476 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-01-09 03:33:06.947 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-01-09 03:33:07.417 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-01-09 03:33:07.888 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-01-09 03:33:08.359 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-01-09 03:33:08.830 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-01-09 03:33:09.300 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-01-09 03:33:09.771 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-01-09 03:33:10.242 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-01-09 03:33:10.717 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-01-09 03:33:11.187 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-01-09 03:33:11.657 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-01-09 03:33:12.127 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-01-09 03:33:12.598 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-01-09 03:33:13.068 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-01-09 03:33:13.539 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-01-09 03:33:14.013 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-01-09 03:33:14.485 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-01-09 03:33:14.954 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-01-09 03:33:15.424 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-01-09 03:33:15.773 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:33:15.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:33:15.783 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:33:15.784 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:33:15.799 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:33:15.799 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:33:15.799 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:33:15.805 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:33:15.805 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:33:15.805 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:33:15.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:33:15.807 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:33:15.807 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:33:15.807 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:33:15.807 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:33:15.807 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:33:15.842 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:33:15.842 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 03:33:15.842 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:33:15.843 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:33:15.894 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-01-09 03:33:16.364 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-01-09 03:33:16.835 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-01-09 03:33:17.306 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-01-09 03:33:17.777 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-01-09 03:33:18.248 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-01-09 03:33:18.719 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-01-09 03:33:19.190 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-01-09 03:33:19.660 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-01-09 03:33:20.133 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-01-09 03:33:20.602 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-01-09 03:33:21.073 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-01-09 03:33:21.543 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-01-09 03:33:22.014 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-01-09 03:33:22.488 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-01-09 03:33:22.957 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-01-09 03:33:23.427 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-01-09 03:33:23.897 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-01-09 03:33:24.368 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-01-09 03:33:24.841 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-01-09 03:33:25.319 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-01-09 03:33:25.797 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-01-09 03:33:26.275 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-01-09 03:33:26.754 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-01-09 03:33:27.232 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-01-09 03:33:27.710 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-01-09 03:33:28.183 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-01-09 03:33:28.655 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-01-09 03:33:29.132 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-01-09 03:33:29.610 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-01-09 03:33:30.086 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-01-09 03:33:30.564 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-01-09 03:33:31.041 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-01-09 03:33:31.511 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-01-09 03:33:31.980 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-01-09 03:33:32.450 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-01-09 03:33:32.921 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-01-09 03:33:33.391 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-01-09 03:33:33.862 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-01-09 03:33:34.333 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-01-09 03:33:34.804 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-01-09 03:33:35.275 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-01-09 03:33:35.746 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-01-09 03:33:35.845 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:33:35.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:33:35.857 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:33:35.857 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:33:35.857 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:33:35.870 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:33:35.871 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:33:35.871 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:33:35.871 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:33:35.874 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:33:35.875 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:33:35.875 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:33:35.875 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:33:35.875 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:33:35.875 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:33:35.875 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:33:35.875 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=17471 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:33:35.875 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=17471 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:33:40.885 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:33:40.885 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:33:40.885 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:33:40.885 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:33:40.886 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:33:40.886 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:33:40.904 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:33:40.905 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:33:40.905 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:33:40.905 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:33:40.905 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:33:40.907 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:33:40.907 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:33:40.908 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:33:40.908 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:33:40.908 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:33:40.908 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:33:40.908 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:33:40.908 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:33:40.910 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:33:40.910 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:33:40.910 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:33:40.910 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:33:40.910 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:33:40.910 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:33:40.910 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:33:40.910 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:33:40.912 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:33:40.912 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:33:40.912 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:33:40.912 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:33:40.913 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:33:40.913 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:33:40.913 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:33:40.913 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:33:40.916 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:33:40.916 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:33:40.916 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:33:40.916 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:33:40.916 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:33:40.916 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:33:40.916 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:33:40.916 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:33:40.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:33:40.916 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:33:40.916 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:33:40.916 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:33:40.916 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:33:40.916 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:33:40.916 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:33:40.916 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:33:40.916 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:33:40.916 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:33:40.916 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:33:40.917 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:33:40.917 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:33:40.917 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:33:40.917 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:33:40.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:33:40.917 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:33:40.917 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:33:40.917 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:33:40.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:33:40.917 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:33:40.917 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:33:40.917 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:33:40.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:33:40.917 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:33:40.917 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:33:40.917 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:33:40.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:33:40.917 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:33:40.917 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:33:40.917 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:33:40.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:33:40.918 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:33:40.919 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:33:40.919 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:33:40.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:33:40.919 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:33:40.919 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:33:40.919 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:33:40.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:33:40.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:33:40.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:33:40.919 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:33:40.919 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:33:40.919 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:33:40.919 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:33:45.933 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:33:45.933 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:33:45.933 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:33:45.933 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:33:45.933 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:33:45.934 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:33:45.952 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:33:45.953 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:33:45.953 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:33:45.953 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:33:45.953 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:33:45.955 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:33:45.955 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:33:45.955 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:33:45.955 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:33:45.955 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:33:45.955 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:33:45.956 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:33:45.956 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:33:45.957 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:33:45.957 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:33:45.957 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:33:45.958 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:33:45.958 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:33:45.958 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:33:45.958 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:33:45.958 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:33:45.959 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:33:45.959 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:33:45.959 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:33:45.959 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:33:45.959 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:33:45.959 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:33:45.959 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:33:45.959 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:33:45.961 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:33:45.961 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:33:45.962 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:33:45.962 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:33:45.962 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:33:45.962 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:33:45.962 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:33:45.962 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:33:45.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:33:45.962 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:33:45.962 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:33:45.962 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:33:45.962 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:33:45.962 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:33:45.962 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:33:45.962 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:33:45.962 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:33:45.962 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:33:45.962 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:33:45.962 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:33:45.962 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:33:45.962 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:33:45.962 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:33:45.963 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:33:45.963 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:33:45.963 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:33:45.963 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:33:45.963 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:33:45.963 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:33:45.963 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:33:45.963 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:33:45.963 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:33:45.963 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:33:45.963 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:33:45.963 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:33:45.963 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:33:45.963 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:33:45.963 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:33:45.963 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:33:45.963 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:33:45.963 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:33:45.963 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:33:45.963 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:33:45.963 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:33:45.963 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:33:45.963 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:33:45.963 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:33:45.967 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:33:46.443 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:33:46.478 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:33:46.479 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:33:46.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:33:46.480 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:33:46.495 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:33:46.495 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:33:46.496 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:33:46.506 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:33:46.506 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:33:46.506 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:33:46.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:33:46.511 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:33:46.511 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:33:46.511 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:33:46.511 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:33:46.511 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:33:46.535 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:33:46.535 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:33:46.535 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:33:46.535 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:33:46.738 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:33:46.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:33:46.745 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:33:46.745 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:33:46.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:33:46.762 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:33:46.762 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:33:46.762 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:33:46.763 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:33:46.763 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:33:46.763 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:33:46.763 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:33:46.763 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:33:46.767 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:33:46.767 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:33:46.767 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:33:46.767 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:33:46.913 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:33:46.965 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:33:46.965 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:33:46.965 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:33:46.966 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:33:46.972 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:33:46.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:33:46.976 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:33:46.977 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:33:46.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:33:46.990 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:33:46.990 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:33:46.990 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:33:46.991 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:33:46.991 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:33:46.991 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:33:46.991 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:33:46.991 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:33:46.998 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:33:46.998 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:33:46.998 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:33:46.998 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:33:47.194 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:33:47.195 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:33:47.201 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:33:47.201 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:33:47.218 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:33:47.218 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:33:47.218 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:33:47.224 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:33:47.224 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:33:47.224 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:33:47.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:33:47.227 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:33:47.227 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:33:47.227 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:33:47.227 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:33:47.227 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:33:47.234 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:33:47.234 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-09 03:33:47.234 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:33:47.234 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:33:47.383 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:33:47.512 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:33:47.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:33:47.518 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:33:47.518 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:33:47.518 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:33:47.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:33:47.535 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:33:47.535 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:33:47.535 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:33:47.537 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:33:47.537 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:33:47.537 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:33:47.537 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:33:47.537 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:33:47.563 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:33:47.563 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-09 03:33:47.563 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:33:47.564 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:33:47.837 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:33:47.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:33:47.842 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:33:47.842 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:33:47.843 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:33:47.853 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:33:47.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:33:47.859 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:33:47.859 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:33:47.859 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:33:47.861 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:33:47.861 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:33:47.861 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:33:47.861 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:33:47.861 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:33:47.898 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:33:47.898 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-09 03:33:47.899 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:33:47.899 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:33:47.966 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:33:47.966 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:33:47.966 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:33:47.967 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:33:48.197 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:33:48.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:33:48.201 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:33:48.201 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:33:48.201 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:33:48.220 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:33:48.220 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:33:48.220 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:33:48.226 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:33:48.227 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:33:48.227 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:33:48.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:33:48.229 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:33:48.229 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:33:48.229 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:33:48.229 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:33:48.229 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:33:48.270 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:33:48.270 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:33:48.271 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:33:48.271 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:33:48.323 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:33:48.801 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 03:33:48.967 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:33:48.967 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:33:48.967 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:33:48.967 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:33:49.275 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 03:33:49.751 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 03:33:49.968 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:33:49.968 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:33:49.969 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:33:49.969 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:33:50.221 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 03:33:50.690 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 03:33:50.844 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:33:50.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:33:50.849 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:33:50.850 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:33:50.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:33:50.866 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:33:50.866 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:33:50.866 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:33:50.868 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:33:50.868 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:33:50.868 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:33:50.868 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:33:50.868 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:33:50.869 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:33:50.869 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:33:50.869 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:33:50.869 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:33:50.970 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:33:50.970 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:33:50.970 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:33:50.970 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:33:51.160 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 03:33:51.631 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 03:33:52.103 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 03:33:52.573 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 03:33:53.043 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 03:33:53.433 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:33:53.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:33:53.440 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:33:53.440 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:33:53.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:33:53.455 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:33:53.455 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:33:53.455 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:33:53.456 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:33:53.457 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:33:53.457 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:33:53.457 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:33:53.457 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:33:53.458 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:33:53.458 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:33:53.458 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:33:53.459 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:33:53.514 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 03:33:53.985 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 03:33:54.459 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 03:33:54.934 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 03:33:55.404 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 03:33:55.874 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 03:33:56.027 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:33:56.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:33:56.032 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:33:56.033 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:33:56.050 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:33:56.050 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:33:56.051 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:33:56.057 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:33:56.057 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:33:56.057 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:33:56.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:33:56.059 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:33:56.059 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:33:56.059 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:33:56.059 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:33:56.059 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:33:56.107 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:33:56.107 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 03:33:56.107 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:33:56.108 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:33:56.345 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 03:33:56.814 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 03:33:57.285 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 03:33:57.756 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 03:33:58.226 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 03:33:58.697 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-09 03:33:58.779 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:33:58.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:33:58.784 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:33:58.785 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:33:58.785 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:33:58.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:33:58.802 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:33:58.802 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:33:58.802 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:33:58.803 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:33:58.803 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:33:58.803 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:33:58.803 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:33:58.803 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:33:58.833 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:33:58.833 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 03:33:58.834 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:33:58.834 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:33:59.167 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-09 03:33:59.638 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-09 03:34:00.109 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-09 03:34:00.580 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-09 03:34:01.051 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-09 03:34:01.522 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-09 03:34:01.603 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:34:01.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:34:01.609 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:34:01.609 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:34:01.609 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:34:01.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:34:01.629 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:34:01.629 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:34:01.629 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:34:01.631 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:34:01.631 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:34:01.631 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:34:01.631 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:34:01.631 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:34:01.659 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:34:01.659 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 03:34:01.660 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:34:01.660 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:34:01.993 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-09 03:34:02.463 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-09 03:34:02.934 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-09 03:34:03.405 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-09 03:34:03.876 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-09 03:34:04.351 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-09 03:34:04.434 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:34:04.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:34:04.440 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:34:04.440 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:34:04.440 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:34:04.455 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:34:04.455 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:34:04.456 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:34:04.456 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:34:04.465 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:34:04.465 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:34:04.465 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:34:04.466 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:34:04.466 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:34:04.466 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:34:04.466 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:34:04.466 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4001 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:34:04.466 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4001 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:34:04.467 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4001 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:34:04.467 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4002 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:34:04.467 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4002 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:34:04.467 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4002 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:34:04.467 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4002 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:34:04.467 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4002 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:34:04.467 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4002 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:34:04.467 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4002 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:34:04.467 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4002 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:34:04.468 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4003 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:34:04.468 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4003 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:34:04.468 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4003 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:34:04.468 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4003 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:34:04.468 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4003 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:34:04.468 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4003 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:34:04.468 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4003 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:34:04.468 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4003 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:34:04.468 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4004 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:34:04.468 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4004 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:34:04.469 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4004 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:34:04.469 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4004 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:34:04.469 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4004 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:34:04.469 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4004 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:34:04.469 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4004 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:34:04.469 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4004 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:34:09.460 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:34:09.460 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:34:09.461 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:34:09.462 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:34:09.462 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:34:09.463 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:34:09.471 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:34:09.472 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:34:09.472 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:34:09.472 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:34:09.472 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:34:09.475 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:34:09.475 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:34:09.475 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:34:09.475 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:34:09.475 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:34:09.476 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:34:09.476 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:34:09.476 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:34:09.478 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:34:09.479 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:34:09.479 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:34:09.479 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:34:09.479 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:34:09.479 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:34:09.479 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:34:09.479 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:34:09.481 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:34:09.482 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:34:09.482 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:34:09.482 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:34:09.482 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:34:09.482 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:34:09.482 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:34:09.482 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:34:09.485 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:34:09.485 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:34:09.485 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:34:09.485 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:34:09.485 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:34:09.485 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:34:09.485 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:34:09.485 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:34:09.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:34:09.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:34:09.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:34:09.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:34:09.486 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:34:09.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:34:09.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:34:09.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:34:09.486 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:34:09.486 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:34:09.486 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:34:09.486 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:34:09.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:34:09.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:34:09.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:34:09.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:34:09.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:34:09.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:34:09.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:34:09.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:34:09.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:34:09.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:34:09.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:34:09.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:34:09.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:34:09.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:34:09.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:34:09.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:34:09.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:34:09.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:34:09.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:34:09.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:34:09.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:34:09.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:34:09.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:34:09.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:34:09.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:34:09.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:34:09.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:34:09.491 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:34:09.961 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:34:10.021 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:34:10.024 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:34:10.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:34:10.026 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:34:10.048 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:34:10.048 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:34:10.049 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:34:10.065 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:34:10.065 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:34:10.065 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:34:10.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:34:10.069 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:34:10.069 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:34:10.069 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:34:10.069 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:34:10.069 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:34:10.100 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:34:10.100 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:34:10.100 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:34:10.101 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:34:10.431 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:34:10.489 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:34:10.489 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:34:10.489 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:34:10.490 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:34:10.902 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:34:11.375 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:34:11.489 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:34:11.490 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:34:11.490 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:34:11.490 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:34:11.849 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:34:12.319 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 03:34:12.490 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:34:12.491 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:34:12.491 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:34:12.491 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:34:12.789 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 03:34:13.229 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:34:13.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:34:13.235 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:34:13.236 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:34:13.254 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:34:13.254 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:34:13.254 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:34:13.259 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 03:34:13.260 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:34:13.260 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:34:13.260 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:34:13.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:34:13.263 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:34:13.263 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:34:13.263 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:34:13.263 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:34:13.263 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:34:13.303 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:34:13.303 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-09 03:34:13.304 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:34:13.304 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:34:13.492 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:34:13.492 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:34:13.492 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:34:13.493 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:34:13.729 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 03:34:14.200 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 03:34:14.493 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:34:14.493 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:34:14.493 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:34:14.493 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:34:14.671 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 03:34:15.142 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 03:34:15.613 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 03:34:16.084 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 03:34:16.497 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:34:16.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:34:16.502 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:34:16.502 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:34:16.503 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:34:16.521 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:34:16.521 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:34:16.522 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:34:16.527 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:34:16.527 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:34:16.528 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:34:16.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:34:16.530 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:34:16.530 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:34:16.530 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:34:16.530 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:34:16.530 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:34:16.551 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:34:16.552 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:34:16.552 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:34:16.552 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:34:16.554 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 03:34:17.025 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 03:34:17.497 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 03:34:17.967 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 03:34:18.438 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 03:34:18.908 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 03:34:19.380 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 03:34:19.779 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:34:19.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:34:19.785 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:34:19.786 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:34:19.803 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:34:19.803 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:34:19.803 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:34:19.809 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:34:19.809 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:34:19.809 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:34:19.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:34:19.811 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:34:19.811 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:34:19.811 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:34:19.811 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:34:19.811 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:34:19.849 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:34:19.849 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 03:34:19.850 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:34:19.850 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:34:19.854 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 03:34:20.324 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 03:34:20.793 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 03:34:21.264 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 03:34:21.734 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 03:34:22.209 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-09 03:34:22.685 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-09 03:34:23.008 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:34:23.010 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:34:23.014 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:34:23.015 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:34:23.015 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:34:23.030 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:34:23.030 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:34:23.031 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:34:23.031 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:34:23.039 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:34:23.039 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:34:23.039 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:34:23.039 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:34:23.039 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:34:23.039 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:34:23.040 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:34:23.040 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2931 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:34:23.040 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2931 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:34:23.040 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2931 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:34:23.040 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2932 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:34:23.041 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2932 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:34:28.039 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:34:28.039 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:34:28.040 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:34:28.040 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:34:28.040 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:34:28.040 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:34:28.056 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:34:28.058 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:34:28.058 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:34:28.058 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:34:28.058 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:34:28.061 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:34:28.061 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:34:28.061 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:34:28.061 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:34:28.061 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:34:28.061 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:34:28.061 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:34:28.061 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:34:28.063 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:34:28.063 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:34:28.063 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:34:28.063 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:34:28.064 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:34:28.064 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:34:28.064 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:34:28.064 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:34:28.065 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:34:28.065 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:34:28.065 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:34:28.065 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:34:28.065 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:34:28.066 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:34:28.066 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:34:28.066 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:34:28.068 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:34:28.068 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:34:28.068 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:34:28.068 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:34:28.068 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:34:28.068 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:34:28.068 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:34:28.068 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:34:28.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:34:28.068 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:34:28.068 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:34:28.068 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:34:28.068 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:34:28.068 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:34:28.068 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:34:28.068 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:34:28.068 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:34:28.068 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:34:28.068 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:34:28.069 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:34:28.069 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:34:28.069 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:34:28.069 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:34:28.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:34:28.069 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:34:28.069 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:34:28.069 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:34:28.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:34:28.069 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:34:28.069 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:34:28.069 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:34:28.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:34:28.069 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:34:28.069 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:34:28.069 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:34:28.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:34:28.069 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:34:28.069 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:34:28.069 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:34:28.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:34:28.069 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:34:28.069 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:34:28.069 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:34:28.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:34:28.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:34:28.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:34:28.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:34:28.073 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:34:28.551 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:34:28.596 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:34:28.598 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:34:28.600 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:34:28.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:34:28.626 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:34:28.627 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:34:28.627 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:34:28.647 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:34:28.648 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:34:28.648 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:34:28.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:34:28.654 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:34:28.654 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:34:28.654 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:34:28.654 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:34:28.654 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:34:28.690 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:34:28.691 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:34:28.691 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:34:28.692 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:34:29.026 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:34:29.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:34:29.029 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:34:29.031 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:34:29.031 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:34:29.048 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:34:29.048 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:34:29.048 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:34:29.055 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:34:29.055 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:34:29.055 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:34:29.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:34:29.057 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:34:29.057 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:34:29.057 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:34:29.057 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:34:29.057 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:34:29.071 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:34:29.071 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:34:29.072 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:34:29.072 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:34:29.073 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-09 03:34:29.073 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:34:29.073 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:34:29.074 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:34:29.498 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:34:29.549 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:34:29.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:34:29.554 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:34:29.554 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:34:29.554 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:34:29.573 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:34:29.573 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:34:29.573 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:34:29.579 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:34:29.579 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:34:29.579 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:34:29.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:34:29.581 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:34:29.581 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:34:29.581 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:34:29.581 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:34:29.581 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:34:29.583 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:34:29.583 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:34:29.583 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:34:29.583 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:34:29.967 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:34:30.071 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:34:30.071 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:34:30.073 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:34:30.074 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:34:30.438 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:34:30.909 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 03:34:31.072 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:34:31.073 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:34:31.074 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:34:31.075 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:34:31.388 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 03:34:31.865 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 03:34:32.073 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:34:32.074 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:34:32.075 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:34:32.075 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:34:32.343 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 03:34:32.499 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:34:32.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:34:32.504 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:34:32.505 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:34:32.525 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:34:32.525 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:34:32.525 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:34:32.530 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:34:32.531 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:34:32.531 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:34:32.531 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:34:32.532 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:34:32.532 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:34:32.533 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:34:32.533 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:34:32.533 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:34:32.578 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:34:32.578 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 03:34:32.578 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:34:32.579 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:34:32.815 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 03:34:33.074 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:34:33.075 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:34:33.076 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:34:33.076 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:34:33.286 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 03:34:33.757 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 03:34:34.228 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 03:34:34.698 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 03:34:35.169 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 03:34:35.486 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:34:35.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:34:35.492 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:34:35.492 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:34:35.492 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:34:35.506 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:34:35.506 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:34:35.507 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:34:35.507 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:34:35.509 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:34:35.509 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:34:35.509 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:34:35.509 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:34:35.509 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:34:35.509 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:34:35.509 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:34:35.509 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1604 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:34:35.509 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1604 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:34:40.514 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:34:40.514 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:34:40.514 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:34:40.514 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:34:40.514 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:34:40.514 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:34:40.532 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:34:40.533 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:34:40.533 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:34:40.533 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:34:40.533 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:34:40.535 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:34:40.536 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:34:40.536 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:34:40.536 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:34:40.536 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:34:40.536 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:34:40.536 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:34:40.536 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:34:40.539 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:34:40.539 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:34:40.539 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:34:40.539 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:34:40.539 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:34:40.539 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:34:40.540 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:34:40.540 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:34:40.541 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:34:40.541 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:34:40.542 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:34:40.542 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:34:40.542 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:34:40.542 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:34:40.542 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:34:40.542 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:34:40.544 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:34:40.544 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:34:40.544 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:34:40.544 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:34:40.544 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:34:40.544 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:34:40.544 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:34:40.545 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:34:40.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:34:40.545 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:34:40.545 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:34:40.545 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:34:40.545 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:34:40.545 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:34:40.545 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:34:40.545 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:34:40.545 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:34:40.545 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:34:40.545 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:34:40.545 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:34:40.545 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:34:40.545 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:34:40.545 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:34:40.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:34:40.545 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:34:40.545 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:34:40.545 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:34:40.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:34:40.545 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:34:40.545 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:34:40.545 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:34:40.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:34:40.545 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:34:40.545 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:34:40.546 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:34:40.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:34:40.546 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:34:40.546 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:34:40.546 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:34:40.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:34:40.546 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:34:40.546 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:34:40.546 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:34:40.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:34:40.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:34:40.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:34:40.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:34:40.550 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:34:41.023 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:34:41.077 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:34:41.079 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:34:41.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:34:41.080 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:34:41.097 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:34:41.098 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:34:41.098 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:34:41.115 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:34:41.115 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:34:41.115 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:34:41.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:34:41.121 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:34:41.122 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:34:41.122 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:34:41.122 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:34:41.122 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:34:41.162 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:34:41.163 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:34:41.163 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:34:41.164 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:34:41.493 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:34:41.548 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:34:41.548 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:34:41.548 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:34:41.550 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:34:41.962 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:34:42.432 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:34:42.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:34:42.457 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:34:42.461 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:34:42.461 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:34:42.475 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:34:42.475 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:34:42.475 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:34:42.482 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:34:42.482 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:34:42.482 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:34:42.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:34:42.484 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:34:42.484 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:34:42.484 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:34:42.484 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:34:42.484 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:34:42.524 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:34:42.524 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-09 03:34:42.525 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:34:42.525 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:34:42.549 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:34:42.550 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:34:42.550 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:34:42.551 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:34:42.905 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:34:43.375 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 03:34:43.550 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:34:43.550 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:34:43.551 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:34:43.552 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:34:43.845 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 03:34:44.315 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 03:34:44.551 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:34:44.551 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:34:44.552 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:34:44.554 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:34:44.637 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:34:44.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:34:44.641 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:34:44.641 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:34:44.641 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:34:44.660 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:34:44.660 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:34:44.660 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:34:44.666 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:34:44.666 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:34:44.666 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:34:44.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:34:44.668 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:34:44.668 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:34:44.668 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:34:44.668 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:34:44.668 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:34:44.686 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:34:44.686 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:34:44.687 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:34:44.687 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:34:44.786 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 03:34:45.257 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 03:34:45.552 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:34:45.552 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:34:45.553 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:34:45.555 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:34:45.728 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 03:34:46.198 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 03:34:46.669 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 03:34:47.142 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 03:34:47.612 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 03:34:48.082 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 03:34:48.556 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 03:34:49.035 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 03:34:49.498 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:34:49.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:34:49.502 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:34:49.502 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:34:49.512 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 03:34:49.520 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:34:49.520 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:34:49.520 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:34:49.526 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:34:49.526 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:34:49.526 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:34:49.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:34:49.528 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:34:49.528 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:34:49.528 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:34:49.528 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:34:49.528 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:34:49.561 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:34:49.561 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 03:34:49.561 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:34:49.561 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:34:49.982 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 03:34:50.451 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 03:34:50.923 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 03:34:51.392 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 03:34:51.863 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 03:34:52.334 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 03:34:52.805 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 03:34:53.280 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-09 03:34:53.749 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-09 03:34:54.219 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-09 03:34:54.689 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-09 03:34:55.160 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-09 03:34:55.631 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-09 03:34:56.101 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-09 03:34:56.580 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-09 03:34:57.058 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-09 03:34:57.533 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-09 03:34:58.003 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-09 03:34:58.474 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-09 03:34:58.952 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-09 03:34:59.430 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-09 03:34:59.900 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-09 03:35:00.371 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-09 03:35:00.840 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-09 03:35:01.309 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-01-09 03:35:01.782 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-01-09 03:35:02.261 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-01-09 03:35:02.739 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-01-09 03:35:03.217 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-01-09 03:35:03.696 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-01-09 03:35:04.174 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-01-09 03:35:04.652 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-01-09 03:35:05.131 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-01-09 03:35:05.610 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-01-09 03:35:06.088 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-01-09 03:35:06.557 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-01-09 03:35:07.027 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-01-09 03:35:07.497 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-01-09 03:35:07.968 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-01-09 03:35:08.438 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-01-09 03:35:08.909 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-01-09 03:35:09.381 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-01-09 03:35:09.523 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:35:09.523 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:35:09.523 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:35:09.530 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:35:09.530 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:35:09.530 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:35:09.530 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:35:09.538 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:35:09.538 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:35:09.538 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:35:09.538 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:35:09.538 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:35:09.538 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:35:09.539 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:35:09.539 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=6256 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:35:09.539 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=6256 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:35:14.535 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:35:14.535 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:35:14.537 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:35:14.537 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:35:14.538 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:35:14.539 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:35:14.548 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:35:14.548 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:35:14.548 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:35:14.549 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:35:14.549 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:35:14.550 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:35:14.551 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:35:14.551 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:35:14.551 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:35:14.551 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:35:14.551 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:35:14.551 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:35:14.551 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:35:14.553 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:35:14.553 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:35:14.553 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:35:14.553 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:35:14.553 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:35:14.553 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:35:14.553 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:35:14.553 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:35:14.555 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:35:14.555 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:35:14.555 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:35:14.555 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:35:14.555 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:35:14.555 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:35:14.555 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:35:14.555 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:35:14.557 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:35:14.557 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:35:14.557 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:35:14.557 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:35:14.557 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:35:14.557 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:35:14.557 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:35:14.557 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:35:14.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:35:14.558 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:35:14.558 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:35:14.558 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:35:14.558 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:35:14.558 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:35:14.558 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:35:14.558 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:35:14.558 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:35:14.558 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:35:14.558 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:35:14.558 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:35:14.558 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:35:14.558 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:35:14.558 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:35:14.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:35:14.558 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:35:14.558 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:35:14.558 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:35:14.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:35:14.558 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:35:14.558 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:35:14.558 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:35:14.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:35:14.558 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:35:14.558 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:35:14.558 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:35:14.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:35:14.558 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:35:14.558 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:35:14.558 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:35:14.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:35:14.559 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:35:14.559 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:35:14.559 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:35:14.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:35:14.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:35:14.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:35:14.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:35:14.563 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:35:15.039 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:35:15.087 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:35:15.089 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:35:15.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:35:15.090 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:35:15.112 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:35:15.112 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:35:15.112 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:35:15.121 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:35:15.121 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:35:15.121 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:35:15.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:35:15.123 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:35:15.123 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:35:15.123 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:35:15.123 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:35:15.123 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:35:15.128 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:35:15.128 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:35:15.129 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:35:15.129 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:35:15.510 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:35:15.560 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:35:15.560 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:35:15.561 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:35:15.561 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:35:15.730 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:35:15.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:35:15.735 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:35:15.735 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:35:15.753 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:35:15.753 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:35:15.753 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:35:15.759 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:35:15.759 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:35:15.760 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:35:15.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:35:15.761 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:35:15.762 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:35:15.762 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:35:15.762 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:35:15.762 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:35:15.786 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:35:15.786 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-09 03:35:15.787 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:35:15.787 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:35:15.980 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:35:16.449 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:35:16.561 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:35:16.562 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:35:16.562 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:35:16.562 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:35:16.709 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:35:16.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:35:16.715 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:35:16.715 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:35:16.715 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:35:16.732 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:35:16.732 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:35:16.732 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:35:16.739 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:35:16.739 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:35:16.739 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:35:16.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:35:16.741 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:35:16.741 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:35:16.741 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:35:16.741 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:35:16.741 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:35:16.776 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:35:16.776 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:35:16.776 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:35:16.777 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:35:16.919 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:35:17.392 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 03:35:17.563 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:35:17.563 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:35:17.563 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:35:17.564 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:35:17.863 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 03:35:18.332 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 03:35:18.565 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:35:18.565 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:35:18.565 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:35:18.565 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:35:18.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:35:18.722 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:35:18.725 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:35:18.725 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:35:18.741 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:35:18.741 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:35:18.741 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:35:18.747 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:35:18.747 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:35:18.747 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:35:18.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:35:18.749 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:35:18.749 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:35:18.749 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:35:18.749 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:35:18.749 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:35:18.801 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:35:18.801 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 03:35:18.801 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:35:18.801 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:35:18.802 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 03:35:19.273 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 03:35:19.566 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:35:19.566 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:35:19.566 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:35:19.567 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:35:19.744 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 03:35:20.214 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 03:35:20.686 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 03:35:21.156 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 03:35:21.627 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 03:35:22.098 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 03:35:22.569 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 03:35:23.039 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 03:35:23.511 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 03:35:23.981 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 03:35:24.451 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 03:35:24.922 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 03:35:25.394 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 03:35:25.864 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 03:35:26.335 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 03:35:26.805 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 03:35:27.276 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-09 03:35:27.747 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-09 03:35:28.218 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-09 03:35:28.688 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-09 03:35:29.159 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-09 03:35:29.630 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-09 03:35:30.101 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-09 03:35:30.572 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-09 03:35:31.042 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-09 03:35:31.513 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-09 03:35:31.983 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-09 03:35:32.455 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-09 03:35:32.925 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-09 03:35:33.396 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-09 03:35:33.867 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-09 03:35:34.338 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-09 03:35:34.813 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-09 03:35:35.283 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-01-09 03:35:35.753 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-01-09 03:35:36.223 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-01-09 03:35:36.693 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-01-09 03:35:37.163 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-01-09 03:35:37.634 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-01-09 03:35:38.107 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-01-09 03:35:38.577 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-01-09 03:35:38.744 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:35:38.745 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:35:38.745 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:35:38.749 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:35:38.749 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:35:38.749 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:35:38.749 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:35:38.751 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:35:38.751 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:35:38.751 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:35:38.751 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:35:38.751 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:35:38.751 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:35:38.751 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:35:38.751 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=5241 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:35:38.751 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=5241 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:35:43.754 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:35:43.754 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:35:43.756 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:35:43.759 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:35:43.762 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:35:43.765 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:35:43.777 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:35:43.777 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:35:43.778 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:35:43.778 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:35:43.778 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:35:43.779 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:35:43.779 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:35:43.779 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:35:43.779 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:35:43.780 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:35:43.780 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:35:43.780 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:35:43.780 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:35:43.781 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:35:43.781 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:35:43.781 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:35:43.781 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:35:43.781 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:35:43.782 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:35:43.782 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:35:43.782 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:35:43.783 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:35:43.783 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:35:43.783 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:35:43.783 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:35:43.783 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:35:43.783 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:35:43.783 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:35:43.783 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:35:43.785 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:35:43.785 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:35:43.785 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:35:43.785 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:35:43.785 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:35:43.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:35:43.786 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:35:43.786 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:35:43.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:35:43.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:35:43.786 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:35:43.786 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:35:43.786 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:35:43.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:35:43.786 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:35:43.786 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:35:43.786 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:35:43.786 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:35:43.786 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:35:43.786 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:35:43.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:35:43.786 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:35:43.786 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:35:43.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:35:43.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:35:43.786 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:35:43.786 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:35:43.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:35:43.787 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:35:43.787 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:35:43.787 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:35:43.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:35:43.787 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:35:43.787 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:35:43.787 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:35:43.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:35:43.787 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:35:43.787 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:35:43.787 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:35:43.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:35:43.787 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:35:43.787 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:35:43.787 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:35:43.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:35:43.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:35:43.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:35:43.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:35:43.791 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:35:44.260 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:35:44.320 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:35:44.323 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:35:44.325 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:35:44.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:35:44.349 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:35:44.349 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:35:44.350 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:35:44.374 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:35:44.374 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:35:44.374 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:35:44.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:35:44.378 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:35:44.378 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:35:44.378 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:35:44.378 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:35:44.378 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:35:44.399 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:35:44.399 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:35:44.400 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:35:44.401 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:35:44.731 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:35:44.788 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:35:44.789 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:35:44.790 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:35:44.791 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:35:45.201 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:35:45.671 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:35:45.789 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:35:45.789 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:35:45.791 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:35:45.792 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:35:46.142 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:35:46.612 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 03:35:46.790 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:35:46.790 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:35:46.791 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:35:46.793 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:35:46.830 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:35:46.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:35:46.835 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:35:46.835 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:35:46.851 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:35:46.851 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:35:46.851 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:35:46.858 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:35:46.858 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:35:46.858 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:35:46.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:35:46.860 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:35:46.860 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:35:46.860 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:35:46.860 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:35:46.860 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:35:46.891 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:35:46.891 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-09 03:35:46.891 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:35:46.891 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:35:47.082 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 03:35:47.553 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 03:35:47.791 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:35:47.792 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:35:47.792 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:35:47.795 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:35:48.023 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 03:35:48.494 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 03:35:48.793 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:35:48.793 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:35:48.793 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:35:48.796 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:35:48.965 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 03:35:49.436 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 03:35:49.573 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:35:49.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:35:49.579 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:35:49.579 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:35:49.579 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:35:49.596 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:35:49.597 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:35:49.597 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:35:49.603 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:35:49.603 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:35:49.603 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:35:49.603 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:35:49.604 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:35:49.604 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:35:49.604 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:35:49.604 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:35:49.604 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:35:49.616 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:35:49.616 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:35:49.616 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:35:49.617 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:35:49.907 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 03:35:50.377 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 03:35:50.848 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 03:35:51.319 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 03:35:51.791 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 03:35:52.261 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 03:35:52.731 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 03:35:52.886 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:35:52.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:35:52.891 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:35:52.891 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:35:52.911 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:35:52.911 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:35:52.911 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:35:52.917 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:35:52.917 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:35:52.917 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:35:52.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:35:52.919 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:35:52.919 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:35:52.919 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:35:52.920 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:35:52.920 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:35:52.966 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:35:52.966 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 03:35:52.966 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:35:52.966 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:35:53.202 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 03:35:53.673 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 03:35:54.143 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 03:35:54.615 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 03:35:55.085 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 03:35:55.556 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 03:35:56.026 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 03:35:56.499 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-09 03:35:56.968 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-09 03:35:57.439 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-09 03:35:57.910 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-09 03:35:58.380 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-09 03:35:58.851 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-09 03:35:59.322 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-09 03:35:59.793 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-09 03:36:00.263 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-09 03:36:00.735 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-09 03:36:01.205 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-09 03:36:01.676 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-09 03:36:02.146 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-09 03:36:02.617 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-09 03:36:03.088 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-09 03:36:03.564 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-09 03:36:04.037 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-09 03:36:04.507 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-01-09 03:36:04.977 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-01-09 03:36:05.448 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-01-09 03:36:05.919 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-01-09 03:36:06.389 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-01-09 03:36:06.860 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-01-09 03:36:07.334 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-01-09 03:36:07.804 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-01-09 03:36:08.273 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-01-09 03:36:08.743 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-01-09 03:36:09.214 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-01-09 03:36:09.685 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-01-09 03:36:10.159 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-01-09 03:36:10.629 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-01-09 03:36:11.098 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-01-09 03:36:11.569 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-01-09 03:36:12.039 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-01-09 03:36:12.512 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-01-09 03:36:12.914 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:36:12.914 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:36:12.915 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:36:12.918 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:36:12.918 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:36:12.919 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:36:12.919 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:36:12.924 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:36:12.924 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:36:12.924 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:36:12.924 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:36:12.925 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:36:12.925 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:36:12.925 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:36:12.925 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=6312 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:36:12.926 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=6312 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:36:17.923 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:36:17.923 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:36:17.926 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:36:17.933 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:36:17.933 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:36:17.934 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:36:17.954 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:36:17.955 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:36:17.955 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:36:17.955 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:36:17.955 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:36:17.958 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:36:17.958 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:36:17.959 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:36:17.959 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:36:17.959 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:36:17.959 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:36:17.959 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:36:17.959 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:36:17.961 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:36:17.961 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:36:17.961 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:36:17.961 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:36:17.962 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:36:17.962 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:36:17.962 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:36:17.962 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:36:17.964 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:36:17.964 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:36:17.964 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:36:17.964 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:36:17.964 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:36:17.964 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:36:17.964 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:36:17.964 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:36:17.967 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:36:17.967 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:36:17.967 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:36:17.967 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:36:17.967 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:36:17.967 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:36:17.967 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:36:17.967 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:36:17.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:36:17.967 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:36:17.967 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:36:17.967 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:36:17.968 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:36:17.968 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:36:17.968 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:36:17.968 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:36:17.968 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:36:17.968 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:36:17.968 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:36:17.968 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:36:17.968 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:36:17.968 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:36:17.968 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:36:17.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:36:17.968 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:36:17.968 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:36:17.968 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:36:17.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:36:17.968 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:36:17.968 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:36:17.968 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:36:17.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:36:17.968 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:36:17.968 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:36:17.968 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:36:17.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:36:17.968 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:36:17.968 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:36:17.968 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:36:17.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:36:17.969 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:36:17.969 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:36:17.969 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:36:17.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:36:17.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:36:17.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:36:17.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:36:17.973 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:36:18.441 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:36:18.499 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:36:18.500 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:36:18.501 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:36:18.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:36:18.517 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:36:18.517 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:36:18.518 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:36:18.538 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:36:18.538 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:36:18.539 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:36:18.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:36:18.548 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:36:18.549 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:36:18.549 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:36:18.549 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:36:18.549 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:36:18.579 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:36:18.579 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:36:18.580 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:36:18.580 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:36:18.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:36:18.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:36:18.801 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:36:18.801 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:36:18.818 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:36:18.818 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:36:18.818 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:36:18.824 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:36:18.824 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:36:18.825 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:36:18.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:36:18.827 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:36:18.827 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:36:18.828 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:36:18.828 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:36:18.828 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:36:18.863 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:36:18.863 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-09 03:36:18.863 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:36:18.863 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:36:18.911 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:36:18.971 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:36:18.971 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:36:18.971 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:36:18.973 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:36:19.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:36:19.194 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:36:19.197 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:36:19.197 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:36:19.198 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:36:19.217 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:36:19.217 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:36:19.217 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:36:19.223 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:36:19.223 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:36:19.223 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:36:19.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:36:19.225 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:36:19.225 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:36:19.225 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:36:19.225 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:36:19.225 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:36:19.232 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:36:19.232 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:36:19.232 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:36:19.232 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:36:19.380 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:36:19.770 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:36:19.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:36:19.775 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:36:19.776 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:36:19.791 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:36:19.791 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:36:19.792 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:36:19.797 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:36:19.797 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:36:19.797 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:36:19.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:36:19.799 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:36:19.799 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:36:19.799 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:36:19.799 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:36:19.799 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:36:19.850 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:36:19.850 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 03:36:19.851 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:36:19.851 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:36:19.851 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:36:19.971 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:36:19.972 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:36:19.972 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:36:19.974 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:36:20.321 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:36:20.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:36:20.405 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:36:20.407 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:36:20.408 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:36:20.408 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:36:20.420 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:36:20.420 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:36:20.420 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:36:20.420 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:36:20.422 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:36:20.422 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:36:20.422 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:36:20.422 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:36:20.422 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:36:20.422 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:36:20.422 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:36:20.422 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=533 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:36:20.422 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=533 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:36:20.422 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=533 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:36:25.433 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:36:25.433 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:36:25.434 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:36:25.434 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:36:25.434 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:36:25.434 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:36:25.452 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:36:25.453 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:36:25.453 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:36:25.453 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:36:25.453 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:36:25.457 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:36:25.457 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:36:25.457 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:36:25.457 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:36:25.457 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:36:25.457 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:36:25.457 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:36:25.457 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:36:25.459 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:36:25.459 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:36:25.459 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:36:25.459 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:36:25.459 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:36:25.460 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:36:25.460 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:36:25.460 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:36:25.461 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:36:25.461 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:36:25.462 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:36:25.462 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:36:25.462 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:36:25.462 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:36:25.462 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:36:25.462 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:36:25.464 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:36:25.464 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:36:25.464 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:36:25.464 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:36:25.464 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:36:25.464 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:36:25.465 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:36:25.465 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:36:25.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:36:25.465 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:36:25.465 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:36:25.465 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:36:25.465 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:36:25.465 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:36:25.465 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:36:25.465 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:36:25.465 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:36:25.465 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:36:25.465 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:36:25.465 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:36:25.465 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:36:25.465 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:36:25.465 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:36:25.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:36:25.465 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:36:25.465 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:36:25.465 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:36:25.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:36:25.465 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:36:25.465 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:36:25.465 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:36:25.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:36:25.466 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:36:25.466 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:36:25.466 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:36:25.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:36:25.466 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:36:25.466 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:36:25.466 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:36:25.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:36:25.466 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:36:25.466 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:36:25.466 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:36:25.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:36:25.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:36:25.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:36:25.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:36:25.470 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:36:25.944 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:36:25.998 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:36:26.000 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:36:26.002 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:36:26.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:36:26.020 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:36:26.020 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:36:26.020 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:36:26.037 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:36:26.037 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:36:26.037 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:36:26.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:36:26.043 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:36:26.043 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:36:26.043 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:36:26.044 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:36:26.044 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:36:26.082 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:36:26.083 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:36:26.084 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:36:26.084 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:36:26.414 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:36:26.468 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:36:26.469 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:36:26.469 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:36:26.471 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:36:26.884 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:36:27.353 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:36:27.470 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:36:27.470 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:36:27.470 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:36:27.472 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:36:27.827 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:36:28.301 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 03:36:28.471 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:36:28.471 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:36:28.471 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:36:28.472 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:36:28.771 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 03:36:29.241 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 03:36:29.472 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:36:29.472 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:36:29.472 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:36:29.474 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:36:29.712 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 03:36:30.182 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 03:36:30.473 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:36:30.473 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:36:30.474 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:36:30.475 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:36:30.652 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 03:36:31.123 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 03:36:31.594 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 03:36:32.064 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 03:36:32.535 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 03:36:33.006 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 03:36:33.480 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 03:36:33.953 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 03:36:34.423 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 03:36:34.893 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 03:36:35.363 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 03:36:35.834 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 03:36:36.304 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 03:36:36.775 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 03:36:37.254 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 03:36:37.732 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 03:36:38.209 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-09 03:36:38.682 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-09 03:36:39.160 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-09 03:36:39.639 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-09 03:36:40.116 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-09 03:36:40.587 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-09 03:36:41.058 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-09 03:36:41.534 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-09 03:36:42.009 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-09 03:36:42.486 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-09 03:36:42.964 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-09 03:36:43.442 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-09 03:36:43.919 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-09 03:36:44.398 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-09 03:36:44.876 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-09 03:36:45.354 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-09 03:36:45.832 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-09 03:36:46.310 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-01-09 03:36:46.787 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-01-09 03:36:47.256 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-01-09 03:36:47.726 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-01-09 03:36:48.199 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-01-09 03:36:48.673 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-01-09 03:36:49.148 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-01-09 03:36:49.626 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-01-09 03:36:50.099 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-01-09 03:36:50.569 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-01-09 03:36:51.042 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-01-09 03:36:51.512 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-01-09 03:36:51.982 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-01-09 03:36:52.452 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-01-09 03:36:52.923 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-01-09 03:36:53.394 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-01-09 03:36:53.868 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-01-09 03:36:54.341 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-01-09 03:36:54.814 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-01-09 03:36:55.285 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-01-09 03:36:55.755 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-01-09 03:36:56.226 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-01-09 03:36:56.696 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-01-09 03:36:57.167 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-01-09 03:36:57.641 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-01-09 03:36:58.115 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-01-09 03:36:58.586 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-01-09 03:36:59.037 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:36:59.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:36:59.052 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:36:59.052 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:36:59.056 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-01-09 03:36:59.064 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:36:59.064 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:36:59.064 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:36:59.071 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:36:59.071 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:36:59.071 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:36:59.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:36:59.073 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:36:59.073 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:36:59.073 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:36:59.073 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:36:59.073 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:36:59.099 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:36:59.099 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-09 03:36:59.099 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:36:59.100 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:36:59.526 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-01-09 03:36:59.996 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-01-09 03:37:00.467 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-01-09 03:37:00.938 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-01-09 03:37:01.409 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-01-09 03:37:01.880 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-01-09 03:37:02.350 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-01-09 03:37:02.821 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-01-09 03:37:03.292 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-01-09 03:37:03.762 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-01-09 03:37:04.234 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-01-09 03:37:04.706 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-01-09 03:37:05.176 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-01-09 03:37:05.645 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-01-09 03:37:06.116 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-01-09 03:37:06.587 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-01-09 03:37:07.058 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-01-09 03:37:07.528 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-01-09 03:37:07.999 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-01-09 03:37:08.470 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-01-09 03:37:08.941 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-01-09 03:37:09.411 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-01-09 03:37:09.882 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-01-09 03:37:10.353 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-01-09 03:37:10.824 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-01-09 03:37:11.295 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-01-09 03:37:11.766 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-01-09 03:37:12.237 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-01-09 03:37:12.707 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-01-09 03:37:13.178 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-01-09 03:37:13.657 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-01-09 03:37:14.134 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-01-09 03:37:14.607 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-01-09 03:37:15.077 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-01-09 03:37:15.545 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-01-09 03:37:16.015 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-01-09 03:37:16.486 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-01-09 03:37:16.962 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-01-09 03:37:17.432 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-01-09 03:37:17.901 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-01-09 03:37:18.371 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-01-09 03:37:18.843 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-01-09 03:37:19.313 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-01-09 03:37:19.784 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-01-09 03:37:20.255 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-01-09 03:37:20.726 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-01-09 03:37:21.196 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-01-09 03:37:21.667 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-01-09 03:37:22.138 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-01-09 03:37:22.609 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-01-09 03:37:23.078 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-01-09 03:37:23.547 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-01-09 03:37:24.017 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-01-09 03:37:24.487 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-01-09 03:37:24.958 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-01-09 03:37:25.429 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-01-09 03:37:25.899 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-01-09 03:37:26.370 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-01-09 03:37:26.842 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-01-09 03:37:27.312 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-01-09 03:37:27.782 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-01-09 03:37:28.253 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-01-09 03:37:28.724 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-01-09 03:37:29.196 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-01-09 03:37:29.667 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-01-09 03:37:30.137 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-01-09 03:37:30.607 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-01-09 03:37:31.078 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-01-09 03:37:31.548 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-01-09 03:37:32.020 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-01-09 03:37:32.490 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-01-09 03:37:32.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:37:32.631 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:37:32.642 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:37:32.642 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:37:32.642 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:37:32.656 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:37:32.656 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:37:32.656 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:37:32.662 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:37:32.662 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:37:32.662 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:37:32.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:37:32.664 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:37:32.664 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:37:32.664 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:37:32.664 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:37:32.664 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:37:32.670 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:37:32.670 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:37:32.670 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:37:32.670 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:37:32.961 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-01-09 03:37:33.432 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-01-09 03:37:33.902 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-01-09 03:37:34.378 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-01-09 03:37:34.851 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-01-09 03:37:35.346 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-01-09 03:37:35.815 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-01-09 03:37:36.284 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-01-09 03:37:36.755 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-01-09 03:37:37.230 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-01-09 03:37:37.709 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-01-09 03:37:38.186 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-01-09 03:37:38.659 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-01-09 03:37:39.131 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-01-09 03:37:39.600 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-01-09 03:37:40.076 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-01-09 03:37:40.545 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-01-09 03:37:41.014 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-01-09 03:37:41.486 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-01-09 03:37:41.962 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-01-09 03:37:42.432 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-01-09 03:37:42.901 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-01-09 03:37:43.375 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-01-09 03:37:43.853 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-01-09 03:37:44.325 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-01-09 03:37:44.796 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-01-09 03:37:45.267 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-01-09 03:37:45.742 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-01-09 03:37:46.212 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-01-09 03:37:46.681 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2026-01-09 03:37:47.158 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2026-01-09 03:37:47.636 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2026-01-09 03:37:48.114 [DEBUG] clck_gen.py:113 IND CLOCK 17850
2026-01-09 03:37:48.591 [DEBUG] clck_gen.py:113 IND CLOCK 17952
2026-01-09 03:37:49.069 [DEBUG] clck_gen.py:113 IND CLOCK 18054
2026-01-09 03:37:49.547 [DEBUG] clck_gen.py:113 IND CLOCK 18156
2026-01-09 03:37:50.025 [DEBUG] clck_gen.py:113 IND CLOCK 18258
2026-01-09 03:37:50.495 [DEBUG] clck_gen.py:113 IND CLOCK 18360
2026-01-09 03:37:50.965 [DEBUG] clck_gen.py:113 IND CLOCK 18462
2026-01-09 03:37:51.434 [DEBUG] clck_gen.py:113 IND CLOCK 18564
2026-01-09 03:37:51.904 [DEBUG] clck_gen.py:113 IND CLOCK 18666
2026-01-09 03:37:52.380 [DEBUG] clck_gen.py:113 IND CLOCK 18768
2026-01-09 03:37:52.849 [DEBUG] clck_gen.py:113 IND CLOCK 18870
2026-01-09 03:37:53.318 [DEBUG] clck_gen.py:113 IND CLOCK 18972
2026-01-09 03:37:53.789 [DEBUG] clck_gen.py:113 IND CLOCK 19074
2026-01-09 03:37:54.264 [DEBUG] clck_gen.py:113 IND CLOCK 19176
2026-01-09 03:37:54.741 [DEBUG] clck_gen.py:113 IND CLOCK 19278
2026-01-09 03:37:55.218 [DEBUG] clck_gen.py:113 IND CLOCK 19380
2026-01-09 03:37:55.691 [DEBUG] clck_gen.py:113 IND CLOCK 19482
2026-01-09 03:37:56.161 [DEBUG] clck_gen.py:113 IND CLOCK 19584
2026-01-09 03:37:56.633 [DEBUG] clck_gen.py:113 IND CLOCK 19686
2026-01-09 03:37:57.103 [DEBUG] clck_gen.py:113 IND CLOCK 19788
2026-01-09 03:37:57.574 [DEBUG] clck_gen.py:113 IND CLOCK 19890
2026-01-09 03:37:58.044 [DEBUG] clck_gen.py:113 IND CLOCK 19992
2026-01-09 03:37:58.515 [DEBUG] clck_gen.py:113 IND CLOCK 20094
2026-01-09 03:37:58.986 [DEBUG] clck_gen.py:113 IND CLOCK 20196
2026-01-09 03:37:59.457 [DEBUG] clck_gen.py:113 IND CLOCK 20298
2026-01-09 03:37:59.928 [DEBUG] clck_gen.py:113 IND CLOCK 20400
2026-01-09 03:38:00.398 [DEBUG] clck_gen.py:113 IND CLOCK 20502
2026-01-09 03:38:00.869 [DEBUG] clck_gen.py:113 IND CLOCK 20604
2026-01-09 03:38:01.340 [DEBUG] clck_gen.py:113 IND CLOCK 20706
2026-01-09 03:38:01.811 [DEBUG] clck_gen.py:113 IND CLOCK 20808
2026-01-09 03:38:02.281 [DEBUG] clck_gen.py:113 IND CLOCK 20910
2026-01-09 03:38:02.752 [DEBUG] clck_gen.py:113 IND CLOCK 21012
2026-01-09 03:38:03.223 [DEBUG] clck_gen.py:113 IND CLOCK 21114
2026-01-09 03:38:03.694 [DEBUG] clck_gen.py:113 IND CLOCK 21216
2026-01-09 03:38:04.164 [DEBUG] clck_gen.py:113 IND CLOCK 21318
2026-01-09 03:38:04.635 [DEBUG] clck_gen.py:113 IND CLOCK 21420
2026-01-09 03:38:05.106 [DEBUG] clck_gen.py:113 IND CLOCK 21522
2026-01-09 03:38:05.578 [DEBUG] clck_gen.py:113 IND CLOCK 21624
2026-01-09 03:38:06.057 [DEBUG] clck_gen.py:113 IND CLOCK 21726
2026-01-09 03:38:06.534 [DEBUG] clck_gen.py:113 IND CLOCK 21828
2026-01-09 03:38:07.004 [DEBUG] clck_gen.py:113 IND CLOCK 21930
2026-01-09 03:38:07.473 [DEBUG] clck_gen.py:113 IND CLOCK 22032
2026-01-09 03:38:07.831 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:38:07.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:38:07.846 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:38:07.847 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:38:07.864 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:38:07.864 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:38:07.864 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:38:07.870 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:38:07.870 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:38:07.870 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:38:07.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:38:07.872 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:38:07.872 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:38:07.872 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:38:07.872 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:38:07.872 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:38:07.890 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:38:07.890 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 03:38:07.890 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:38:07.891 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:38:07.943 [DEBUG] clck_gen.py:113 IND CLOCK 22134
2026-01-09 03:38:08.413 [DEBUG] clck_gen.py:113 IND CLOCK 22236
2026-01-09 03:38:08.891 [DEBUG] clck_gen.py:113 IND CLOCK 22338
2026-01-09 03:38:09.361 [DEBUG] clck_gen.py:113 IND CLOCK 22440
2026-01-09 03:38:09.830 [DEBUG] clck_gen.py:113 IND CLOCK 22542
2026-01-09 03:38:10.300 [DEBUG] clck_gen.py:113 IND CLOCK 22644
2026-01-09 03:38:10.770 [DEBUG] clck_gen.py:113 IND CLOCK 22746
2026-01-09 03:38:11.241 [DEBUG] clck_gen.py:113 IND CLOCK 22848
2026-01-09 03:38:11.712 [DEBUG] clck_gen.py:113 IND CLOCK 22950
2026-01-09 03:38:12.183 [DEBUG] clck_gen.py:113 IND CLOCK 23052
2026-01-09 03:38:12.262 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:38:12.262 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:38:12.262 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:38:12.268 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:38:12.268 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:38:12.268 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:38:12.268 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:38:12.276 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:38:12.276 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:38:12.277 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:38:12.277 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:38:12.277 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:38:12.277 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:38:12.277 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:38:12.277 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=23072 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:38:12.278 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=23072 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:38:17.273 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:38:17.273 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:38:17.276 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:38:17.278 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:38:17.281 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:38:17.285 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:38:17.300 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:38:17.301 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:38:17.301 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:38:17.301 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:38:17.301 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:38:17.304 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:38:17.304 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:38:17.304 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:38:17.304 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:38:17.304 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:38:17.305 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:38:17.305 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:38:17.305 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:38:17.307 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:38:17.307 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:38:17.307 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:38:17.307 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:38:17.307 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:38:17.307 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:38:17.308 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:38:17.308 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:38:17.310 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:38:17.310 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:38:17.310 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:38:17.310 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:38:17.311 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:38:17.311 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:38:17.311 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:38:17.311 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:38:17.315 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:38:17.315 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:38:17.315 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:38:17.315 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:38:17.315 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:38:17.315 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:38:17.316 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:38:17.316 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:38:17.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:38:17.316 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:38:17.316 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:38:17.316 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:38:17.316 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:38:17.316 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:38:17.316 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:38:17.316 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:38:17.316 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:38:17.316 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:38:17.316 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:38:17.316 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:38:17.316 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:38:17.317 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:38:17.317 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:38:17.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:38:17.317 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:38:17.317 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:38:17.317 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:38:17.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:38:17.317 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:38:17.317 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:38:17.317 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:38:17.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:38:17.317 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:38:17.317 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:38:17.317 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:38:17.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:38:17.317 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:38:17.317 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:38:17.317 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:38:17.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:38:17.318 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:38:17.318 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:38:17.318 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:38:17.318 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:38:17.319 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:38:17.319 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:38:17.319 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:38:17.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:38:17.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:38:17.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:38:17.319 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:38:17.319 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:38:17.319 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:38:17.319 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:38:22.327 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:38:22.327 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:38:22.327 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:38:22.327 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:38:22.327 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:38:22.327 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:38:22.346 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:38:22.347 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:38:22.347 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:38:22.347 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:38:22.347 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:38:22.351 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:38:22.351 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:38:22.351 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:38:22.351 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:38:22.351 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:38:22.351 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:38:22.351 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:38:22.351 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:38:22.354 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:38:22.354 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:38:22.355 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:38:22.355 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:38:22.355 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:38:22.355 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:38:22.355 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:38:22.355 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:38:22.357 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:38:22.357 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:38:22.357 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:38:22.358 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:38:22.358 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:38:22.358 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:38:22.358 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:38:22.358 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:38:22.361 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:38:22.361 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:38:22.361 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:38:22.361 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:38:22.361 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:38:22.361 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:38:22.361 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:38:22.361 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:38:22.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:38:22.361 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:38:22.361 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:38:22.361 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:38:22.361 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:38:22.361 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:38:22.361 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:38:22.361 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:38:22.361 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:38:22.361 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:38:22.361 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:38:22.362 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:38:22.362 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:38:22.362 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:38:22.362 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:38:22.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:38:22.362 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:38:22.362 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:38:22.362 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:38:22.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:38:22.362 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:38:22.362 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:38:22.362 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:38:22.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:38:22.362 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:38:22.362 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:38:22.362 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:38:22.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:38:22.362 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:38:22.362 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:38:22.362 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:38:22.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:38:22.362 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:38:22.362 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:38:22.362 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:38:22.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:38:22.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:38:22.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:38:22.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:38:22.366 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:38:22.836 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:38:22.891 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:38:22.894 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:38:22.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:38:22.897 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:38:22.919 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:38:22.919 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:38:22.920 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:38:22.934 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:38:22.934 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:38:22.935 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:38:22.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:38:22.939 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:38:22.939 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:38:22.939 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:38:22.939 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:38:22.939 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:38:22.975 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:38:22.975 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:38:22.975 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:38:22.976 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:38:23.309 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:38:23.364 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:38:23.364 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:38:23.365 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:38:23.367 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:38:23.783 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:38:24.255 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:38:24.365 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:38:24.365 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:38:24.365 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:38:24.368 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:38:24.420 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:38:24.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:38:24.425 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:38:24.425 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:38:24.443 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:38:24.443 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:38:24.443 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:38:24.449 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:38:24.449 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:38:24.449 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:38:24.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:38:24.451 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:38:24.451 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:38:24.451 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:38:24.451 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:38:24.451 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:38:24.491 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:38:24.491 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-09 03:38:24.492 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:38:24.492 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:38:24.725 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:38:25.194 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 03:38:25.366 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:38:25.366 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:38:25.366 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:38:25.368 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:38:25.664 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 03:38:26.135 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 03:38:26.367 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:38:26.367 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:38:26.367 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:38:26.369 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:38:26.608 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 03:38:26.792 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:38:26.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:38:26.799 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:38:26.799 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:38:26.799 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:38:26.818 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:38:26.818 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:38:26.818 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:38:26.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:38:26.824 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:38:26.824 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:38:26.824 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:38:26.825 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:38:26.826 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:38:26.826 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:38:26.826 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:38:26.826 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:38:26.837 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:38:26.837 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:38:26.837 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:38:26.837 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:38:27.077 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 03:38:27.368 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:38:27.369 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:38:27.369 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:38:27.370 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:38:27.548 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 03:38:28.023 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 03:38:28.492 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 03:38:28.962 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 03:38:29.432 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 03:38:29.903 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 03:38:30.293 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:38:30.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:38:30.299 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:38:30.299 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:38:30.315 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:38:30.315 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:38:30.315 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:38:30.321 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:38:30.321 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:38:30.322 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:38:30.322 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:38:30.323 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:38:30.323 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:38:30.323 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:38:30.323 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:38:30.323 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:38:30.371 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:38:30.372 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 03:38:30.372 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:38:30.372 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:38:30.376 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 03:38:30.846 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 03:38:31.321 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 03:38:31.404 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:38:31.404 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:38:31.405 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:38:31.411 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:38:31.411 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:38:31.411 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:38:31.411 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:38:31.419 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:38:31.419 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:38:31.419 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:38:31.419 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:38:31.419 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:38:31.419 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:38:31.420 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:38:31.420 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1959 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:38:31.420 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1959 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:38:36.415 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:38:36.416 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:38:36.418 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:38:36.421 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:38:36.424 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:38:36.428 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:38:36.439 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:38:36.440 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:38:36.440 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:38:36.440 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:38:36.440 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:38:36.441 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:38:36.442 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:38:36.442 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:38:36.442 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:38:36.442 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:38:36.442 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:38:36.442 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:38:36.442 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:38:36.443 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:38:36.443 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:38:36.443 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:38:36.443 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:38:36.443 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:38:36.443 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:38:36.443 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:38:36.443 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:38:36.445 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:38:36.445 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:38:36.445 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:38:36.445 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:38:36.445 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:38:36.445 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:38:36.445 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:38:36.445 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:38:36.447 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:38:36.447 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:38:36.447 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:38:36.447 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:38:36.447 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:38:36.447 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:38:36.447 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:38:36.448 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:38:36.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:38:36.448 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:38:36.448 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:38:36.448 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:38:36.448 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:38:36.448 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:38:36.448 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:38:36.448 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:38:36.448 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:38:36.448 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:38:36.448 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:38:36.448 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:38:36.448 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:38:36.448 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:38:36.448 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:38:36.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:38:36.448 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:38:36.448 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:38:36.448 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:38:36.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:38:36.448 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:38:36.448 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:38:36.448 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:38:36.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:38:36.448 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:38:36.448 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:38:36.448 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:38:36.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:38:36.448 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:38:36.449 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:38:36.449 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:38:36.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:38:36.449 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:38:36.449 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:38:36.449 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:38:36.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:38:36.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:38:36.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:38:36.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:38:36.453 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:38:36.923 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:38:36.980 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:38:36.982 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:38:36.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:38:36.985 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:38:37.005 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:38:37.005 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:38:37.005 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:38:37.013 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:38:37.013 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:38:37.013 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:38:37.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:38:37.016 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:38:37.016 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:38:37.016 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:38:37.016 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:38:37.016 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:38:37.061 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:38:37.062 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:38:37.063 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:38:37.063 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:38:37.392 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:38:37.451 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:38:37.451 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:38:37.451 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:38:37.453 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:38:37.862 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:38:38.332 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:38:38.451 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:38:38.452 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:38:38.452 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:38:38.455 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:38:38.808 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:38:39.280 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 03:38:39.452 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:38:39.452 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:38:39.453 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:38:39.455 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:38:39.752 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 03:38:40.230 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 03:38:40.453 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:38:40.454 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:38:40.454 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:38:40.456 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:38:40.708 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 03:38:41.186 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 03:38:41.454 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:38:41.455 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:38:41.455 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:38:41.457 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:38:41.664 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 03:38:42.141 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 03:38:42.619 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 03:38:43.094 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 03:38:43.562 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 03:38:44.038 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 03:38:44.516 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 03:38:44.992 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 03:38:45.464 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 03:38:45.935 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 03:38:46.406 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 03:38:46.877 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 03:38:47.347 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 03:38:47.818 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 03:38:48.289 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 03:38:48.760 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 03:38:49.230 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-09 03:38:49.701 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-09 03:38:50.172 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-09 03:38:50.643 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-09 03:38:51.113 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-09 03:38:51.584 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-09 03:38:52.055 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-09 03:38:52.348 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:38:52.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:38:52.354 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:38:52.354 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:38:52.372 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:38:52.372 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:38:52.372 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:38:52.378 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:38:52.378 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:38:52.378 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:38:52.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:38:52.380 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:38:52.380 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:38:52.380 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:38:52.380 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:38:52.380 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:38:52.428 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:38:52.428 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-09 03:38:52.428 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:38:52.429 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:38:52.526 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-09 03:38:52.997 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-09 03:38:53.467 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-09 03:38:53.938 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-09 03:38:54.415 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-09 03:38:54.893 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-09 03:38:55.372 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-09 03:38:55.850 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-09 03:38:56.329 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-09 03:38:56.806 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-09 03:38:57.275 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-01-09 03:38:57.744 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-01-09 03:38:58.215 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-01-09 03:38:58.686 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-01-09 03:38:59.157 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-01-09 03:38:59.628 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-01-09 03:39:00.098 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-01-09 03:39:00.569 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-01-09 03:39:01.040 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-01-09 03:39:01.511 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-01-09 03:39:01.982 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-01-09 03:39:02.452 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-01-09 03:39:02.923 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-01-09 03:39:03.394 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-01-09 03:39:03.865 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-01-09 03:39:04.336 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-01-09 03:39:04.806 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-01-09 03:39:05.277 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-01-09 03:39:05.748 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-01-09 03:39:06.218 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-01-09 03:39:06.689 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-01-09 03:39:07.160 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-01-09 03:39:07.508 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:39:07.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:39:07.514 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:39:07.514 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:39:07.514 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:39:07.534 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:39:07.534 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:39:07.534 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:39:07.540 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:39:07.540 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:39:07.540 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:39:07.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:39:07.542 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:39:07.542 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:39:07.542 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:39:07.542 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:39:07.542 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:39:07.578 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:39:07.578 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:39:07.579 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:39:07.579 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:39:07.631 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-01-09 03:39:08.102 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-01-09 03:39:08.574 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-01-09 03:39:09.052 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-01-09 03:39:09.530 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-01-09 03:39:10.008 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-01-09 03:39:10.494 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-01-09 03:39:10.972 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-01-09 03:39:11.450 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-01-09 03:39:11.925 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-01-09 03:39:12.394 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-01-09 03:39:12.864 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-01-09 03:39:13.343 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-01-09 03:39:13.816 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-01-09 03:39:14.288 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-01-09 03:39:14.757 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-01-09 03:39:15.228 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-01-09 03:39:15.698 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-01-09 03:39:16.169 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-01-09 03:39:16.640 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-01-09 03:39:17.111 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-01-09 03:39:17.582 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-01-09 03:39:18.053 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-01-09 03:39:18.532 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-01-09 03:39:19.004 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-01-09 03:39:19.475 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-01-09 03:39:19.946 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-01-09 03:39:20.417 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-01-09 03:39:20.888 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-01-09 03:39:21.358 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-01-09 03:39:21.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:39:21.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:39:21.802 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:39:21.802 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:39:21.816 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:39:21.816 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:39:21.817 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:39:21.822 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:39:21.822 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:39:21.822 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:39:21.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:39:21.825 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:39:21.825 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:39:21.825 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:39:21.825 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:39:21.825 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:39:21.829 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-01-09 03:39:21.873 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:39:21.873 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 03:39:21.874 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:39:21.874 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:39:22.299 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-01-09 03:39:22.770 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-01-09 03:39:23.241 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-01-09 03:39:23.712 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-01-09 03:39:24.183 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-01-09 03:39:24.575 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:39:24.576 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:39:24.576 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:39:24.580 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:39:24.580 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:39:24.580 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:39:24.580 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:39:24.581 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:39:24.581 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:39:24.581 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:39:24.581 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:39:24.581 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:39:24.581 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:39:24.581 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:39:24.582 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=10390 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:39:24.582 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=10390 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:39:29.584 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:39:29.584 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:39:29.586 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:39:29.586 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:39:29.587 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:39:29.588 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:39:29.593 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:39:29.594 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:39:29.594 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:39:29.595 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:39:29.595 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:39:29.597 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:39:29.597 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:39:29.597 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:39:29.597 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:39:29.598 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:39:29.598 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:39:29.598 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:39:29.598 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:39:29.600 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:39:29.600 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:39:29.600 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:39:29.600 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:39:29.600 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:39:29.600 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:39:29.601 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:39:29.601 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:39:29.602 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:39:29.603 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:39:29.603 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:39:29.603 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:39:29.603 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:39:29.603 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:39:29.603 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:39:29.603 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:39:29.605 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:39:29.605 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:39:29.605 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:39:29.605 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:39:29.606 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:39:29.606 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:39:29.606 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:39:29.606 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:39:29.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:39:29.606 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:39:29.606 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:39:29.606 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:39:29.606 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:39:29.606 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:39:29.606 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:39:29.606 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:39:29.606 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:39:29.606 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:39:29.606 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:39:29.606 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:39:29.606 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:39:29.606 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:39:29.606 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:39:29.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:39:29.606 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:39:29.607 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:39:29.607 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:39:29.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:39:29.607 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:39:29.607 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:39:29.607 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:39:29.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:39:29.607 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:39:29.607 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:39:29.607 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:39:29.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:39:29.607 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:39:29.607 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:39:29.607 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:39:29.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:39:29.607 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:39:29.607 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:39:29.607 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:39:29.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:39:29.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:39:29.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:39:29.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:39:29.611 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:39:30.095 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:39:30.132 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:39:30.134 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:39:30.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:39:30.137 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:39:30.158 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:39:30.159 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:39:30.159 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:39:30.174 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:39:30.175 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:39:30.175 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:39:30.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:39:30.181 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:39:30.181 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:39:30.181 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:39:30.181 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:39:30.181 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:39:30.186 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:39:30.186 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:39:30.186 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:39:30.187 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:39:30.568 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:39:30.609 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:39:30.609 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:39:30.609 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:39:30.610 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:39:31.043 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:39:31.521 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:39:31.610 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:39:31.610 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:39:31.611 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:39:31.611 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:39:31.998 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:39:32.468 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 03:39:32.610 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:39:32.611 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:39:32.611 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:39:32.611 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:39:32.938 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 03:39:33.408 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 03:39:33.612 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:39:33.612 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:39:33.612 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:39:33.612 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:39:33.878 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 03:39:34.349 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 03:39:34.613 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:39:34.613 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:39:34.613 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:39:34.613 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:39:34.825 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 03:39:35.303 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 03:39:35.775 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 03:39:36.250 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 03:39:36.722 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 03:39:37.198 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 03:39:37.668 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 03:39:38.137 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 03:39:38.607 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 03:39:39.078 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 03:39:39.548 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 03:39:40.019 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 03:39:40.214 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:39:40.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:39:40.220 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:39:40.220 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:39:40.237 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:39:40.237 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:39:40.237 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:39:40.244 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:39:40.244 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:39:40.244 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:39:40.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:39:40.245 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:39:40.245 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:39:40.245 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:39:40.246 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:39:40.246 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:39:40.250 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:39:40.250 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-09 03:39:40.250 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:39:40.250 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:39:40.490 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 03:39:40.960 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 03:39:41.431 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 03:39:41.902 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 03:39:42.373 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-09 03:39:42.852 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-09 03:39:43.330 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-09 03:39:43.799 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-09 03:39:44.269 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-09 03:39:44.739 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-09 03:39:45.209 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-09 03:39:45.680 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-09 03:39:46.151 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-09 03:39:46.622 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-09 03:39:47.093 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-09 03:39:47.563 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-09 03:39:48.034 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-09 03:39:48.505 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-09 03:39:48.976 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-09 03:39:49.447 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-09 03:39:49.918 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-09 03:39:50.389 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-01-09 03:39:50.544 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:39:50.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:39:50.547 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:39:50.547 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:39:50.547 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:39:50.556 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:39:50.556 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:39:50.556 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:39:50.561 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:39:50.562 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:39:50.562 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:39:50.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:39:50.563 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:39:50.563 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:39:50.563 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:39:50.563 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:39:50.563 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:39:50.568 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:39:50.568 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:39:50.568 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:39:50.568 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:39:50.859 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-01-09 03:39:51.333 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-01-09 03:39:51.811 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-01-09 03:39:52.288 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-01-09 03:39:52.766 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-01-09 03:39:53.244 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-01-09 03:39:53.721 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-01-09 03:39:54.199 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-01-09 03:39:54.672 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-01-09 03:39:55.142 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-01-09 03:39:55.620 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-01-09 03:39:56.098 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-01-09 03:39:56.566 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-01-09 03:39:57.036 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-01-09 03:39:57.507 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-01-09 03:39:57.545 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:39:57.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:39:57.550 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:39:57.550 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:39:57.567 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:39:57.567 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:39:57.567 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:39:57.573 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:39:57.573 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:39:57.573 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:39:57.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:39:57.575 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:39:57.575 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:39:57.575 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:39:57.575 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:39:57.575 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:39:57.596 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:39:57.596 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 03:39:57.597 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:39:57.597 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:39:57.978 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-01-09 03:39:58.450 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-01-09 03:39:58.922 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-01-09 03:39:59.401 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-01-09 03:39:59.880 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-01-09 03:40:00.358 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-01-09 03:40:00.836 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-01-09 03:40:01.315 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-01-09 03:40:01.794 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-01-09 03:40:02.269 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-01-09 03:40:02.738 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-01-09 03:40:03.208 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-01-09 03:40:03.678 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-01-09 03:40:04.149 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-01-09 03:40:04.620 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-01-09 03:40:05.095 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-01-09 03:40:05.574 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-01-09 03:40:06.053 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-01-09 03:40:06.531 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-01-09 03:40:07.010 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-01-09 03:40:07.488 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-01-09 03:40:07.966 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-01-09 03:40:08.444 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-01-09 03:40:08.920 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-01-09 03:40:09.389 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-01-09 03:40:09.858 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-01-09 03:40:10.329 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-01-09 03:40:10.799 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-01-09 03:40:11.270 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-01-09 03:40:11.741 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-01-09 03:40:12.212 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-01-09 03:40:12.682 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-01-09 03:40:13.157 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-01-09 03:40:13.626 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-01-09 03:40:14.095 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-01-09 03:40:14.565 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-01-09 03:40:15.039 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-01-09 03:40:15.518 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-01-09 03:40:15.996 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-01-09 03:40:16.475 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-01-09 03:40:16.953 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-01-09 03:40:17.431 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-01-09 03:40:17.571 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:40:17.571 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:40:17.571 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:40:17.575 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:40:17.575 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:40:17.575 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:40:17.575 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:40:17.577 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:40:17.577 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:40:17.577 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:40:17.577 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:40:17.577 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:40:17.577 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:40:17.577 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:40:17.577 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=10334 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:40:17.577 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=10334 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:40:17.577 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=10335 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:40:17.577 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=10335 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:40:17.577 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=10335 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:40:17.577 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=10335 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:40:17.577 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=10335 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:40:17.577 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=10335 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:40:17.577 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=10335 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:40:17.577 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=10335 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:40:22.579 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:40:22.579 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:40:22.581 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:40:22.582 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:40:22.583 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:40:22.585 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:40:22.598 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:40:22.599 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:40:22.599 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:40:22.599 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:40:22.599 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:40:22.602 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:40:22.602 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:40:22.602 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:40:22.602 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:40:22.602 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:40:22.602 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:40:22.602 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:40:22.602 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:40:22.604 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:40:22.604 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:40:22.604 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:40:22.604 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:40:22.604 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:40:22.604 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:40:22.604 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:40:22.604 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:40:22.606 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:40:22.606 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:40:22.606 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:40:22.606 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:40:22.607 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:40:22.607 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:40:22.607 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:40:22.607 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:40:22.609 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:40:22.609 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:40:22.609 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:40:22.609 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:40:22.609 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:40:22.609 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:40:22.609 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:40:22.609 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:40:22.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:40:22.609 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:40:22.609 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:40:22.609 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:40:22.609 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:40:22.609 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:40:22.609 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:40:22.610 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:40:22.610 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:40:22.610 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:40:22.610 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:40:22.610 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:40:22.610 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:40:22.610 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:40:22.610 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:40:22.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:40:22.610 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:40:22.610 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:40:22.610 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:40:22.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:40:22.610 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:40:22.610 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:40:22.610 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:40:22.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:40:22.610 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:40:22.610 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:40:22.610 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:40:22.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:40:22.610 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:40:22.610 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:40:22.610 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:40:22.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:40:22.610 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:40:22.610 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:40:22.610 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:40:22.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:40:22.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:40:22.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:40:22.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:40:22.614 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:40:23.092 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:40:23.129 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:40:23.131 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:40:23.131 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:40:23.132 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:40:23.150 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:40:23.150 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:40:23.151 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:40:23.162 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:40:23.162 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:40:23.162 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:40:23.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:40:23.166 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:40:23.166 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:40:23.166 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:40:23.166 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:40:23.166 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:40:23.184 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:40:23.184 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:40:23.184 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:40:23.184 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:40:23.487 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:40:23.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:40:23.489 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:40:23.489 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:40:23.497 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:40:23.497 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:40:23.497 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:40:23.503 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:40:23.503 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:40:23.503 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:40:23.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:40:23.505 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:40:23.505 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:40:23.505 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:40:23.506 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:40:23.506 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:40:23.509 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:40:23.509 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-09 03:40:23.509 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:40:23.509 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:40:23.562 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:40:23.613 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:40:23.614 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:40:23.614 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:40:23.617 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:40:24.006 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:40:24.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:40:24.011 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:40:24.011 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:40:24.011 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:40:24.029 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:40:24.029 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:40:24.029 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:40:24.032 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:40:24.035 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:40:24.035 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:40:24.035 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:40:24.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:40:24.037 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:40:24.037 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:40:24.037 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:40:24.037 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:40:24.037 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:40:24.075 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:40:24.075 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:40:24.075 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:40:24.075 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:40:24.503 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:40:24.615 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:40:24.615 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:40:24.615 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:40:24.618 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:40:24.891 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:40:24.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:40:24.896 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:40:24.897 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:40:24.915 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:40:24.915 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:40:24.915 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:40:24.921 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:40:24.921 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:40:24.922 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:40:24.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:40:24.924 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:40:24.924 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:40:24.924 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:40:24.924 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:40:24.924 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:40:24.970 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:40:24.971 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 03:40:24.971 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:40:24.971 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:40:24.980 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:40:25.449 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 03:40:25.616 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:40:25.617 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:40:25.617 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:40:25.620 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:40:25.926 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 03:40:26.405 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 03:40:26.618 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:40:26.618 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:40:26.618 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:40:26.622 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:40:26.883 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 03:40:27.362 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 03:40:27.619 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:40:27.620 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:40:27.620 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:40:27.623 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:40:27.841 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 03:40:28.319 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 03:40:28.797 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 03:40:29.011 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:40:29.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:40:29.016 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:40:29.016 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:40:29.016 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:40:29.026 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:40:29.026 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:40:29.026 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:40:29.026 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:40:29.028 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:40:29.028 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:40:29.028 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:40:29.028 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:40:29.028 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:40:29.028 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:40:29.028 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:40:29.028 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1378 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:40:29.028 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1378 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:40:29.028 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1378 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:40:29.028 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1378 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:40:29.028 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1378 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:40:29.028 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1378 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:40:29.028 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1378 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:40:29.028 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=1378 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:40:34.031 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:40:34.032 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:40:34.033 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:40:34.033 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:40:34.034 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:40:34.034 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:40:34.043 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:40:34.044 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:40:34.044 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:40:34.044 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:40:34.044 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:40:34.046 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:40:34.047 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:40:34.047 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:40:34.047 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:40:34.047 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:40:34.047 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:40:34.048 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:40:34.048 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:40:34.049 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:40:34.049 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:40:34.049 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:40:34.049 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:40:34.049 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:40:34.049 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:40:34.049 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:40:34.049 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:40:34.051 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:40:34.051 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:40:34.051 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:40:34.051 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:40:34.051 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:40:34.051 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:40:34.051 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:40:34.051 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:40:34.053 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:40:34.053 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:40:34.053 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:40:34.053 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:40:34.053 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:40:34.053 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:40:34.054 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:40:34.054 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:40:34.054 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:40:34.054 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:40:34.054 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:40:34.054 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:40:34.054 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:40:34.054 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:40:34.054 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:40:34.054 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:40:34.054 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:40:34.054 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:40:34.054 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:40:34.054 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:40:34.054 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:40:34.054 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:40:34.054 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:40:34.054 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:40:34.054 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:40:34.054 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:40:34.054 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:40:34.054 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:40:34.054 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:40:34.054 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:40:34.054 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:40:34.054 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:40:34.054 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:40:34.054 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:40:34.054 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:40:34.054 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:40:34.055 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:40:34.055 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:40:34.055 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:40:34.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:40:34.055 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:40:34.055 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:40:34.055 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:40:34.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:40:34.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:40:34.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:40:34.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:40:34.059 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:40:34.544 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:40:34.580 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:40:34.583 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:40:34.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:40:34.584 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:40:34.604 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:40:34.604 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:40:34.604 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:40:34.617 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:40:34.618 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:40:34.618 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:40:34.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:40:34.622 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:40:34.623 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:40:34.623 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:40:34.623 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:40:34.623 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:40:34.635 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:40:34.635 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:40:34.635 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:40:34.636 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:40:35.014 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:40:35.057 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:40:35.057 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:40:35.058 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:40:35.060 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:40:35.483 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:40:35.955 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:40:36.058 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:40:36.059 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:40:36.059 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:40:36.060 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:40:36.426 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:40:36.896 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 03:40:37.059 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:40:37.060 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:40:37.060 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:40:37.061 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:40:37.366 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 03:40:37.837 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 03:40:37.856 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:40:37.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:40:37.860 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:40:37.861 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:40:37.878 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:40:37.878 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:40:37.878 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:40:37.884 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:40:37.884 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:40:37.884 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:40:37.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:40:37.886 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:40:37.886 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:40:37.886 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:40:37.886 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:40:37.886 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:40:37.926 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:40:37.927 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-09 03:40:37.927 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:40:37.927 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:40:38.061 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:40:38.061 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:40:38.062 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:40:38.062 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:40:38.308 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 03:40:38.778 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 03:40:39.063 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:40:39.063 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:40:39.063 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:40:39.063 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:40:39.248 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 03:40:39.719 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 03:40:40.190 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 03:40:40.661 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 03:40:41.132 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 03:40:41.253 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:40:41.255 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:40:41.259 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:40:41.259 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:40:41.259 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:40:41.276 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:40:41.276 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:40:41.276 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:40:41.282 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:40:41.282 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:40:41.282 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:40:41.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:40:41.284 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:40:41.284 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:40:41.284 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:40:41.284 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:40:41.284 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:40:41.313 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:40:41.313 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:40:41.313 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:40:41.313 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:40:41.602 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 03:40:42.073 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 03:40:42.544 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 03:40:43.015 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 03:40:43.485 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 03:40:43.956 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 03:40:44.427 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 03:40:44.816 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:40:44.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:40:44.821 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:40:44.821 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:40:44.837 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:40:44.838 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:40:44.838 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:40:44.844 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:40:44.844 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:40:44.844 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:40:44.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:40:44.846 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:40:44.846 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:40:44.846 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:40:44.846 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:40:44.846 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:40:44.896 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:40:44.896 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 03:40:44.896 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:40:44.896 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:40:44.898 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 03:40:45.368 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 03:40:45.839 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 03:40:46.310 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 03:40:46.781 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-09 03:40:47.251 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-09 03:40:47.722 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-09 03:40:48.193 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-09 03:40:48.664 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-09 03:40:49.134 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-09 03:40:49.216 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:40:49.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:40:49.222 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:40:49.222 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:40:49.222 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:40:49.238 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:40:49.238 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:40:49.238 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:40:49.238 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:40:49.239 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:40:49.239 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:40:49.239 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:40:49.239 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:40:49.239 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:40:49.239 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:40:49.239 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:40:49.239 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3289 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:40:49.239 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3289 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:40:49.240 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3289 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:40:49.240 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3289 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:40:49.240 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3289 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:40:49.240 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3289 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:40:49.240 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3289 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:40:49.240 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3289 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:40:54.240 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:40:54.240 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:40:54.241 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:40:54.242 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:40:54.243 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:40:54.244 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:40:54.250 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:40:54.251 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:40:54.251 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:40:54.251 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:40:54.251 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:40:54.252 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:40:54.253 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:40:54.253 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:40:54.253 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:40:54.253 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:40:54.253 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:40:54.253 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:40:54.253 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:40:54.254 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:40:54.254 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:40:54.254 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:40:54.254 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:40:54.255 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:40:54.255 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:40:54.255 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:40:54.255 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:40:54.256 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:40:54.256 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:40:54.256 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:40:54.256 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:40:54.256 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:40:54.256 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:40:54.257 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:40:54.257 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:40:54.259 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:40:54.259 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:40:54.259 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:40:54.259 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:40:54.259 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:40:54.259 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:40:54.259 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:40:54.259 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:40:54.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:40:54.260 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:40:54.260 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:40:54.260 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:40:54.260 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:40:54.260 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:40:54.260 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:40:54.260 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:40:54.260 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:40:54.260 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:40:54.260 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:40:54.260 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:40:54.260 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:40:54.260 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:40:54.260 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:40:54.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:40:54.260 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:40:54.260 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:40:54.260 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:40:54.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:40:54.260 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:40:54.260 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:40:54.260 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:40:54.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:40:54.260 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:40:54.260 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:40:54.260 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:40:54.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:40:54.260 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:40:54.260 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:40:54.260 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:40:54.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:40:54.261 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:40:54.261 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:40:54.261 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:40:54.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:40:54.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:40:54.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:40:54.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:40:54.264 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:40:54.743 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:40:54.784 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:40:54.784 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:40:54.784 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:40:54.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:40:54.798 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:40:54.798 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:40:54.798 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:40:54.815 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:40:54.815 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:40:54.815 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:40:54.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:40:54.822 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:40:54.822 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:40:54.822 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:40:54.823 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:40:54.823 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:40:54.835 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:40:54.836 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:40:54.836 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:40:54.836 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:40:55.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:40:55.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:40:55.205 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:40:55.205 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:40:55.218 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:40:55.223 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:40:55.223 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:40:55.223 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:40:55.229 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:40:55.229 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:40:55.229 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:40:55.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:40:55.231 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:40:55.231 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:40:55.231 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:40:55.231 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:40:55.231 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:40:55.260 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:40:55.260 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-09 03:40:55.260 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:40:55.260 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:40:55.263 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:40:55.263 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:40:55.263 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:40:55.263 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:40:55.687 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:40:55.860 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:40:55.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:40:55.865 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:40:55.866 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:40:55.866 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:40:55.887 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:40:55.887 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:40:55.887 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:40:55.893 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:40:55.893 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:40:55.893 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:40:55.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:40:55.895 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:40:55.895 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:40:55.895 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:40:55.895 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:40:55.895 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:40:55.917 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:40:55.917 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:40:55.917 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:40:55.917 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:40:56.158 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:40:56.265 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:40:56.265 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:40:56.265 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:40:56.265 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:40:56.632 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:40:57.024 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:40:57.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:40:57.031 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:40:57.031 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:40:57.049 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:40:57.049 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:40:57.049 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:40:57.054 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:40:57.054 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:40:57.055 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:40:57.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:40:57.056 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:40:57.056 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:40:57.056 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:40:57.056 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:40:57.056 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:40:57.102 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 03:40:57.105 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:40:57.106 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 03:40:57.106 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:40:57.106 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:40:57.265 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:40:57.266 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:40:57.266 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:40:57.266 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:40:57.574 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 03:40:58.053 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 03:40:58.266 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:40:58.267 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:40:58.267 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:40:58.267 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:40:58.532 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 03:40:59.011 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 03:40:59.267 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:40:59.268 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:40:59.268 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:40:59.268 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:40:59.490 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 03:40:59.969 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 03:41:00.447 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 03:41:00.921 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 03:41:01.390 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 03:41:01.862 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 03:41:02.340 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 03:41:02.814 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 03:41:03.287 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 03:41:03.760 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 03:41:04.231 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 03:41:04.701 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 03:41:05.172 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 03:41:05.643 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 03:41:06.113 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 03:41:06.584 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 03:41:07.055 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-09 03:41:07.526 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-09 03:41:08.000 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-09 03:41:08.473 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-09 03:41:08.944 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-09 03:41:09.414 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-09 03:41:09.885 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-09 03:41:10.355 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-09 03:41:10.826 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-09 03:41:11.300 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-09 03:41:11.778 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-09 03:41:12.256 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-09 03:41:12.735 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-09 03:41:13.214 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-09 03:41:13.693 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-09 03:41:14.172 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-09 03:41:14.646 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-09 03:41:15.115 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-01-09 03:41:15.585 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-01-09 03:41:16.063 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-01-09 03:41:16.540 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-01-09 03:41:17.012 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-01-09 03:41:17.053 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:41:17.053 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:41:17.053 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:41:17.060 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:41:17.061 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:41:17.061 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:41:17.061 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:41:17.068 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:41:17.068 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:41:17.068 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:41:17.068 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:41:17.068 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:41:17.068 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:41:17.068 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:41:17.069 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4909 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:41:17.069 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=4909 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:41:22.063 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:41:22.063 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:41:22.065 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:41:22.068 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:41:22.070 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:41:22.075 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:41:22.087 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:41:22.088 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:41:22.088 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:41:22.088 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:41:22.088 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:41:22.090 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:41:22.090 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:41:22.090 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:41:22.090 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:41:22.090 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:41:22.090 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:41:22.090 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:41:22.090 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:41:22.092 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:41:22.092 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:41:22.092 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:41:22.092 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:41:22.092 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:41:22.092 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:41:22.093 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:41:22.093 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:41:22.094 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:41:22.094 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:41:22.094 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:41:22.094 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:41:22.094 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:41:22.094 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:41:22.094 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:41:22.094 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:41:22.097 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:41:22.097 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:41:22.097 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:41:22.097 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:41:22.097 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:41:22.097 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:41:22.097 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:41:22.097 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:41:22.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:41:22.097 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:41:22.097 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:41:22.097 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:41:22.097 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:41:22.097 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:41:22.097 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:41:22.097 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:41:22.097 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:41:22.097 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:41:22.097 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:41:22.097 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:41:22.097 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:41:22.098 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:41:22.098 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:41:22.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:41:22.098 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:41:22.098 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:41:22.098 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:41:22.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:41:22.098 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:41:22.098 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:41:22.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:41:22.098 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:41:22.098 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:41:22.098 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:41:22.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:41:22.098 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:41:22.098 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:41:22.098 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:41:22.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:41:22.098 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:41:22.098 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:41:22.098 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:41:22.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:41:22.098 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:41:22.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:41:22.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:41:22.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:41:22.102 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:41:22.579 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:41:22.627 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:41:22.628 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:41:22.629 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:41:22.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:41:22.645 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:41:22.645 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:41:22.646 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:41:22.666 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:41:22.666 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:41:22.667 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:41:22.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:41:22.672 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:41:22.672 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:41:22.672 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:41:22.672 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:41:22.672 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:41:22.718 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:41:22.718 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:41:22.719 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:41:22.719 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:41:23.050 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:41:23.100 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:41:23.100 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:41:23.100 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:41:23.101 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:41:23.519 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:41:23.989 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:41:24.101 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:41:24.101 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:41:24.101 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:41:24.101 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:41:24.459 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:41:24.930 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 03:41:25.101 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:41:25.102 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:41:25.102 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:41:25.102 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:41:25.409 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 03:41:25.561 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:41:25.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:41:25.567 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:41:25.567 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:41:25.583 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:41:25.584 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:41:25.584 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:41:25.591 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:41:25.591 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:41:25.591 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:41:25.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:41:25.593 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:41:25.593 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:41:25.593 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:41:25.593 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:41:25.593 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:41:25.644 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:41:25.644 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-09 03:41:25.644 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:41:25.645 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:41:25.881 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 03:41:26.102 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:41:26.102 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:41:26.103 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:41:26.103 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:41:26.352 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 03:41:26.822 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 03:41:27.103 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:41:27.104 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:41:27.104 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:41:27.104 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:41:27.293 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 03:41:27.768 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 03:41:28.242 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 03:41:28.712 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 03:41:29.182 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 03:41:29.671 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 03:41:30.144 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 03:41:30.206 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:41:30.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:41:30.211 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:41:30.211 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:41:30.212 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:41:30.228 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:41:30.228 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:41:30.228 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:41:30.235 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:41:30.235 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:41:30.235 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:41:30.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:41:30.237 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:41:30.237 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:41:30.237 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:41:30.237 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:41:30.237 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:41:30.280 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:41:30.281 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:41:30.281 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:41:30.281 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:41:30.614 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 03:41:31.086 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 03:41:31.562 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 03:41:32.031 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 03:41:32.501 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 03:41:32.971 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 03:41:33.448 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 03:41:33.921 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 03:41:34.393 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 03:41:34.871 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-09 03:41:35.350 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-09 03:41:35.827 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-09 03:41:36.304 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-09 03:41:36.773 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-09 03:41:36.926 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:41:36.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:41:36.930 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:41:36.930 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:41:36.949 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:41:36.949 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:41:36.949 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:41:36.956 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:41:36.956 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:41:36.956 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:41:36.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:41:36.958 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:41:36.958 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:41:36.958 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:41:36.958 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:41:36.958 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:41:37.005 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:41:37.005 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 03:41:37.005 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:41:37.005 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:41:37.243 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-09 03:41:37.717 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-09 03:41:37.801 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:41:37.801 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:41:37.801 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:41:37.805 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:41:37.805 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:41:37.805 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:41:37.805 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:41:37.807 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:41:37.807 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:41:37.807 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:41:37.807 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:41:37.807 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:41:37.807 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:41:37.807 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:41:37.807 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3387 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:41:37.807 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3387 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:41:37.807 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3387 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:41:37.807 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3387 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:41:37.807 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3387 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:41:37.807 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3387 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:41:42.809 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:41:42.809 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:41:42.812 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:41:42.815 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:41:42.817 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:41:42.821 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:41:42.836 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:41:42.837 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:41:42.837 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:41:42.838 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:41:42.838 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:41:42.841 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:41:42.841 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:41:42.841 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:41:42.841 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:41:42.842 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:41:42.842 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:41:42.842 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:41:42.842 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:41:42.845 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:41:42.845 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:41:42.845 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:41:42.845 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:41:42.845 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:41:42.845 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:41:42.846 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:41:42.846 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:41:42.849 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:41:42.849 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:41:42.849 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:41:42.849 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:41:42.849 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:41:42.849 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:41:42.850 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:41:42.850 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:41:42.854 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:41:42.854 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:41:42.854 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:41:42.854 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:41:42.854 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:41:42.854 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:41:42.854 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:41:42.855 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:41:42.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:41:42.855 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:41:42.855 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:41:42.855 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:41:42.855 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:41:42.855 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:41:42.855 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:41:42.855 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:41:42.855 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:41:42.855 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:41:42.855 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:41:42.855 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:41:42.855 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:41:42.855 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:41:42.855 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:41:42.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:41:42.856 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:41:42.856 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:41:42.856 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:41:42.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:41:42.856 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:41:42.856 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:41:42.856 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:41:42.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:41:42.856 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:41:42.856 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:41:42.856 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:41:42.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:41:42.856 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:41:42.856 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:41:42.856 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:41:42.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:41:42.856 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:41:42.856 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:41:42.856 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:41:42.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:41:42.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:41:42.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:41:42.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:41:42.860 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:41:43.337 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:41:43.395 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:41:43.397 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:41:43.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:41:43.398 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:41:43.418 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:41:43.419 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:41:43.419 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:41:43.434 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:41:43.434 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:41:43.434 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:41:43.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:41:43.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:41:43.438 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:41:43.438 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:41:43.438 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:41:43.438 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:41:43.476 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:41:43.476 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:41:43.477 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:41:43.477 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:41:43.814 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:41:43.858 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:41:43.859 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:41:43.860 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:41:43.862 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:41:44.290 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:41:44.760 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:41:44.860 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:41:44.860 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:41:44.860 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:41:44.863 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:41:45.221 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:41:45.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:41:45.227 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:41:45.228 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:41:45.230 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:41:45.247 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:41:45.247 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:41:45.248 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:41:45.254 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:41:45.254 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:41:45.255 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:41:45.255 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:41:45.256 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:41:45.256 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:41:45.256 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:41:45.257 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:41:45.257 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:41:45.271 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:41:45.271 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-09 03:41:45.271 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:41:45.271 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:41:45.700 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 03:41:45.861 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:41:45.861 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:41:45.861 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:41:45.864 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:41:46.170 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 03:41:46.641 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 03:41:46.862 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:41:46.862 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:41:46.862 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:41:46.865 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:41:47.113 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 03:41:47.585 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 03:41:47.863 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:41:47.864 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:41:47.864 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:41:47.866 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:41:48.020 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:41:48.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:41:48.025 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:41:48.025 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:41:48.025 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:41:48.044 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:41:48.044 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:41:48.044 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:41:48.051 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:41:48.051 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:41:48.051 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:41:48.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:41:48.053 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:41:48.053 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:41:48.053 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:41:48.053 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:41:48.053 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:41:48.055 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 03:41:48.098 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:41:48.099 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:41:48.100 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:41:48.100 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:41:48.524 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 03:41:48.995 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 03:41:49.473 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 03:41:49.952 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 03:41:50.429 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 03:41:50.907 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 03:41:51.385 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 03:41:51.858 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 03:41:52.331 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 03:41:52.483 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:41:52.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:41:52.488 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:41:52.488 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:41:52.505 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:41:52.505 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:41:52.505 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:41:52.512 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:41:52.512 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:41:52.512 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:41:52.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:41:52.514 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:41:52.514 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:41:52.514 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:41:52.514 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:41:52.514 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:41:52.562 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.122.22:6700) Recv SETFH cmd
2026-01-09 03:41:52.562 [INFO] transceiver.py:201 (MS@172.18.122.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-09 03:41:52.562 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:41:52.563 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:41:52.804 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 03:41:53.273 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 03:41:53.743 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 03:41:54.213 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 03:41:54.685 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 03:41:54.768 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:41:54.768 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:41:54.768 [INFO] transceiver.py:205 (MS@172.18.122.22:6700) Frequency hopping disabled
2026-01-09 03:41:54.770 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:41:54.770 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:41:54.770 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:41:54.770 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:41:54.771 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:41:54.771 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:41:54.771 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:41:54.771 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:41:54.771 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:41:54.772 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:41:54.772 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:41:54.772 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2571 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:41:54.772 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=2571 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:41:59.775 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:41:59.775 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:41:59.777 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:41:59.777 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:41:59.778 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:41:59.778 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:41:59.791 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:41:59.792 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:41:59.792 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:41:59.792 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:41:59.792 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:41:59.794 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:41:59.794 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:41:59.794 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:41:59.794 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:41:59.794 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:41:59.795 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:41:59.795 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:41:59.795 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:41:59.797 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:41:59.797 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:41:59.797 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:41:59.797 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:41:59.797 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:41:59.797 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:41:59.797 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:41:59.797 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:41:59.799 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:41:59.799 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:41:59.799 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:41:59.799 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:41:59.799 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:41:59.799 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:41:59.799 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:41:59.799 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:41:59.802 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:41:59.802 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:41:59.802 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:41:59.802 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:41:59.802 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:41:59.802 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:41:59.802 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:41:59.802 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:41:59.802 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:41:59.802 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:41:59.802 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:41:59.802 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:41:59.802 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:41:59.802 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:41:59.802 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:41:59.802 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:41:59.802 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:41:59.802 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:41:59.802 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:41:59.802 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:41:59.803 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:41:59.803 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:41:59.803 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:41:59.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:41:59.803 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:41:59.803 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:41:59.803 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:41:59.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:41:59.803 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:41:59.803 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:41:59.803 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:41:59.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:41:59.803 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:41:59.803 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:41:59.803 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:41:59.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:41:59.803 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:41:59.803 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:41:59.803 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:41:59.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:41:59.803 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:41:59.803 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:41:59.803 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:41:59.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:41:59.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:41:59.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:41:59.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:41:59.807 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:42:00.284 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:42:00.330 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:42:00.332 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:42:00.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:00.334 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:42:00.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:00.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:00.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:00.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:00.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:00.753 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:42:00.807 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:42:00.807 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:42:00.807 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:42:00.807 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:42:01.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:01.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:01.040 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:01.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:01.226 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:42:01.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:01.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:01.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:01.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:01.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:01.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:01.693 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:42:01.694 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:42:01.694 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:42:01.694 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:42:01.695 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:42:01.696 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:42:01.696 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:42:01.696 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:42:01.696 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:42:01.696 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:42:01.696 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:42:01.696 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=408 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:42:01.696 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=408 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:42:01.696 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=408 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:42:01.696 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=408 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:42:01.696 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=408 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:42:01.696 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=408 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:42:01.696 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=408 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:42:01.696 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=409 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:42:01.696 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=409 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:42:01.696 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=409 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:42:01.696 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=409 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:42:01.696 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=409 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:42:01.696 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=409 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:42:01.696 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=409 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:42:01.696 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=409 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:42:06.698 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:42:06.698 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:42:06.700 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:42:06.701 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:42:06.701 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:42:06.702 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:42:06.710 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:42:06.712 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:42:06.712 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:42:06.712 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:42:06.712 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:42:06.716 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:42:06.716 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:42:06.716 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:42:06.716 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:42:06.717 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:42:06.717 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:42:06.717 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:42:06.717 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:42:06.720 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:42:06.720 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:42:06.720 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:42:06.720 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:42:06.721 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:42:06.721 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:42:06.721 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:42:06.721 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:42:06.723 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:42:06.723 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:42:06.724 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:42:06.724 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:42:06.724 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:42:06.724 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:42:06.724 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:42:06.724 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:42:06.727 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:42:06.727 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:42:06.727 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:42:06.727 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:42:06.727 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:42:06.727 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:42:06.728 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:42:06.728 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:42:06.728 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:42:06.728 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:42:06.728 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:42:06.728 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:42:06.728 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:42:06.728 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:42:06.728 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:42:06.728 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:42:06.728 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:42:06.728 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:42:06.728 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:42:06.728 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:42:06.728 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:42:06.728 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:42:06.728 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:42:06.728 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:42:06.728 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:42:06.728 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:42:06.728 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:42:06.728 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:42:06.728 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:42:06.728 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:42:06.729 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:42:06.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:42:06.729 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:42:06.729 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:42:06.729 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:42:06.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:42:06.729 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:42:06.729 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:42:06.729 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:42:06.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:42:06.729 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:42:06.729 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:42:06.729 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:42:06.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:42:06.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:42:06.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:42:06.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:42:06.733 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:42:07.209 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:42:07.261 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:42:07.263 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:42:07.265 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:42:07.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:07.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:07.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:07.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:07.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:07.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:07.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:07.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:07.603 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:07.620 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:07.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:07.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:07.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:07.682 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:42:07.731 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:42:07.732 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:42:07.732 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:42:07.732 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:42:07.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:07.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:07.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:07.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:07.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:07.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:07.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:07.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:08.152 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:42:08.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:08.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:08.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:08.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:08.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:08.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:08.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:08.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:08.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:08.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:08.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:08.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:08.614 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:42:08.615 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:42:08.615 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:42:08.615 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:42:08.624 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:42:08.625 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:42:08.625 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:42:08.625 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:42:08.625 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:42:08.625 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:42:08.625 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:42:08.626 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:42:08.626 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=407 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:42:08.626 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=407 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:42:08.626 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=407 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:42:08.626 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=407 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:42:08.626 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=407 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:42:08.627 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=407 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:42:08.627 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=408 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:42:08.627 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=408 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:42:08.627 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=408 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:42:08.627 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=408 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:42:08.627 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=408 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:42:08.627 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=408 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:42:08.627 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=408 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:42:08.627 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=408 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:42:08.628 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=409 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:42:08.628 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=409 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:42:08.628 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=409 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:42:08.628 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=409 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:42:08.628 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=409 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:42:08.628 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=409 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:42:08.628 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=409 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:42:08.628 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=409 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:42:08.628 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=410 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:42:08.629 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=410 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:42:08.629 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=410 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:42:08.629 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=410 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:42:08.629 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=410 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:42:08.629 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=410 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:42:08.629 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=410 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:42:08.629 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=410 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:42:13.620 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:42:13.620 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:42:13.623 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:42:13.623 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:42:13.624 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:42:13.625 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:42:13.634 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:42:13.635 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:42:13.635 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:42:13.635 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:42:13.635 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:42:13.638 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:42:13.638 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:42:13.638 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:42:13.638 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:42:13.638 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:42:13.639 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:42:13.639 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:42:13.639 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:42:13.640 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:42:13.641 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:42:13.641 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:42:13.641 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:42:13.641 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:42:13.641 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:42:13.642 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:42:13.642 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:42:13.643 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:42:13.643 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:42:13.643 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:42:13.643 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:42:13.644 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:42:13.644 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:42:13.644 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:42:13.644 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:42:13.647 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:42:13.647 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:42:13.647 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:42:13.647 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:42:13.647 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:42:13.647 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:42:13.647 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:42:13.647 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:42:13.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:42:13.647 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:42:13.647 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:42:13.647 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:42:13.647 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:42:13.648 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:42:13.648 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:42:13.648 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:42:13.648 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:42:13.648 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:42:13.648 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:42:13.648 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:42:13.648 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:42:13.648 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:42:13.648 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:42:13.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:42:13.648 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:42:13.648 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:42:13.648 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:42:13.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:42:13.648 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:42:13.648 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:42:13.648 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:42:13.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:42:13.648 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:42:13.648 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:42:13.648 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:42:13.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:42:13.648 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:42:13.648 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:42:13.649 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:42:13.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:42:13.649 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:42:13.649 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:42:13.649 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:42:13.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:42:13.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:42:13.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:42:13.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:42:13.653 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:42:14.126 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:42:14.183 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:42:14.185 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:42:14.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:14.186 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:42:14.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:14.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:14.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:14.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:14.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:14.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:14.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:14.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:14.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:14.596 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:42:14.651 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:42:14.651 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:42:14.651 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:42:14.652 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:42:14.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:14.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:14.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:14.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:14.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:14.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:15.065 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:42:15.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:15.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:15.194 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:15.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:15.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:15.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:15.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:15.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:15.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:15.535 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:42:15.545 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:42:15.545 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:42:15.545 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:42:15.545 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:42:15.548 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:42:15.549 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:42:15.549 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:42:15.549 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:42:15.549 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:42:15.549 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:42:15.549 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:42:15.550 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=412 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:42:15.550 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=412 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:42:20.550 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:42:20.550 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:42:20.552 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:42:20.552 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:42:20.553 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:42:20.553 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:42:20.564 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:42:20.565 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:42:20.565 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:42:20.565 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:42:20.566 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:42:20.568 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:42:20.569 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:42:20.569 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:42:20.569 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:42:20.569 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:42:20.569 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:42:20.569 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:42:20.569 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:42:20.571 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:42:20.571 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:42:20.571 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:42:20.571 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:42:20.571 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:42:20.571 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:42:20.571 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:42:20.571 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:42:20.573 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:42:20.573 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:42:20.573 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:42:20.573 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:42:20.573 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:42:20.573 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:42:20.573 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:42:20.573 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:42:20.576 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:42:20.576 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:42:20.576 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:42:20.576 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:42:20.576 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:42:20.576 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:42:20.576 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:42:20.576 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:42:20.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:42:20.576 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:42:20.576 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:42:20.576 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:42:20.576 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:42:20.576 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:42:20.576 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:42:20.576 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:42:20.576 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:42:20.576 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:42:20.576 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:42:20.577 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:42:20.577 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:42:20.577 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:42:20.577 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:42:20.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:42:20.577 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:42:20.577 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:42:20.577 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:42:20.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:42:20.577 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:42:20.577 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:42:20.577 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:42:20.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:42:20.577 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:42:20.577 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:42:20.577 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:42:20.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:42:20.577 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:42:20.577 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:42:20.577 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:42:20.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:42:20.578 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:42:20.578 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:42:20.578 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:42:20.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:42:20.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:42:20.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:42:20.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:42:20.581 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:42:21.063 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:42:21.103 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:42:21.104 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:42:21.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:21.105 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:42:21.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:21.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:21.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:21.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:21.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:21.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:21.532 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:42:21.580 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:42:21.581 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:42:21.581 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:42:21.584 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:42:21.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:21.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:21.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:21.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:22.002 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:42:22.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:22.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:22.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:22.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:22.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:22.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:22.450 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:42:22.450 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:42:22.450 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:42:22.450 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:42:22.453 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:42:22.453 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:42:22.453 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:42:22.453 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:42:22.453 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:42:22.453 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:42:22.453 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:42:22.453 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=405 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:42:22.453 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=405 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:42:27.458 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:42:27.458 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:42:27.458 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:42:27.458 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:42:27.458 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:42:27.458 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:42:27.466 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:42:27.467 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:42:27.467 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:42:27.467 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:42:27.467 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:42:27.470 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:42:27.470 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:42:27.470 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:42:27.471 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:42:27.471 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:42:27.471 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:42:27.471 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:42:27.471 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:42:27.474 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:42:27.474 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:42:27.474 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:42:27.474 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:42:27.474 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:42:27.474 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:42:27.474 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:42:27.474 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:42:27.477 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:42:27.477 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:42:27.477 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:42:27.477 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:42:27.477 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:42:27.477 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:42:27.477 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:42:27.477 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:42:27.481 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:42:27.481 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:42:27.481 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:42:27.481 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:42:27.481 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:42:27.481 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:42:27.481 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:42:27.481 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:42:27.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:42:27.482 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:42:27.482 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:42:27.482 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:42:27.482 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:42:27.482 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:42:27.482 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:42:27.482 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:42:27.482 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:42:27.482 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:42:27.482 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:42:27.482 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:42:27.482 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:42:27.482 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:42:27.482 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:42:27.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:42:27.482 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:42:27.482 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:42:27.482 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:42:27.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:42:27.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:42:27.483 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:42:27.483 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:42:27.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:42:27.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:42:27.483 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:42:27.483 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:42:27.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:42:27.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:42:27.483 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:42:27.483 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:42:27.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:42:27.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:42:27.483 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:42:27.483 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:42:27.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:42:27.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:42:27.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:42:27.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:42:27.487 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:42:27.966 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:42:28.013 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:42:28.015 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:42:28.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:28.018 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:42:28.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:42:28.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:28.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:28.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:28.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:28.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:28.441 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:42:28.486 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:42:28.486 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:42:28.486 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:42:28.488 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:42:28.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:28.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:28.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:28.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:28.910 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:42:29.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:29.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:29.035 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:29.040 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:29.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:29.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:29.360 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:42:29.361 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:42:29.361 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:42:29.361 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:42:29.368 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:42:29.369 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:42:29.369 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:42:29.369 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:42:29.369 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:42:29.369 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:42:29.369 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:42:29.370 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=405 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:42:29.370 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=405 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:42:34.369 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:42:34.369 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:42:34.370 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:42:34.370 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:42:34.370 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:42:34.370 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:42:34.386 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:42:34.386 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:42:34.386 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:42:34.387 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:42:34.387 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:42:34.388 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:42:34.389 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:42:34.389 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:42:34.389 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:42:34.389 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:42:34.389 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:42:34.389 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:42:34.389 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:42:34.391 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:42:34.391 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:42:34.391 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:42:34.391 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:42:34.391 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:42:34.391 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:42:34.391 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:42:34.391 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:42:34.393 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:42:34.393 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:42:34.393 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:42:34.393 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:42:34.393 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:42:34.393 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:42:34.393 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:42:34.393 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:42:34.395 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:42:34.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:42:34.395 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:42:34.395 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:42:34.395 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:42:34.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:42:34.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:42:34.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:42:34.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:42:34.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:42:34.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:42:34.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:42:34.396 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:42:34.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:42:34.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:42:34.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:42:34.396 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:42:34.396 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:42:34.396 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:42:34.396 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:42:34.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:42:34.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:42:34.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:42:34.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:42:34.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:42:34.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:42:34.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:42:34.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:42:34.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:42:34.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:42:34.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:42:34.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:42:34.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:42:34.397 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:42:34.397 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:42:34.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:42:34.397 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:42:34.397 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:42:34.397 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:42:34.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:42:34.397 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:42:34.397 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:42:34.397 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:42:34.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:42:34.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:42:34.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:42:34.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:42:34.401 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:42:34.878 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:42:34.941 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:42:34.943 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:42:34.945 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:42:34.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:34.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:42:34.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:34.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:34.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:34.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:35.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:35.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:35.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:35.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:35.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:35.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:35.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:35.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:35.349 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:42:35.399 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:42:35.399 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:42:35.399 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:42:35.399 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:42:35.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:35.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:35.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:35.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:35.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:35.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:35.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:35.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:35.818 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:42:35.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:35.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:35.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:35.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:35.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:35.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:35.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:35.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:36.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:36.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:36.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:36.289 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:42:36.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:36.309 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:42:36.309 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:42:36.309 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:42:36.310 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:42:36.317 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:42:36.317 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:42:36.318 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:42:36.318 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:42:36.318 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:42:36.318 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:42:36.318 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:42:36.319 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=414 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:42:36.326 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=414 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:42:41.314 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:42:41.314 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:42:41.323 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:42:41.324 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:42:41.324 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:42:41.324 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:42:41.342 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:42:41.343 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:42:41.343 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:42:41.343 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:42:41.343 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:42:41.346 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:42:41.346 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:42:41.346 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:42:41.346 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:42:41.346 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:42:41.346 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:42:41.347 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:42:41.347 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:42:41.349 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:42:41.349 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:42:41.349 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:42:41.349 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:42:41.349 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:42:41.349 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:42:41.349 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:42:41.349 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:42:41.351 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:42:41.351 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:42:41.351 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:42:41.351 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:42:41.351 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:42:41.351 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:42:41.351 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:42:41.351 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:42:41.353 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:42:41.353 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:42:41.353 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:42:41.353 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:42:41.353 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:42:41.354 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:42:41.354 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:42:41.354 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:42:41.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:42:41.354 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:42:41.354 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:42:41.354 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:42:41.354 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:42:41.354 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:42:41.354 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:42:41.354 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:42:41.354 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:42:41.354 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:42:41.354 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:42:41.354 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:42:41.354 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:42:41.354 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:42:41.354 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:42:41.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:42:41.354 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:42:41.354 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:42:41.354 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:42:41.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:42:41.354 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:42:41.354 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:42:41.355 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:42:41.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:42:41.355 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:42:41.355 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:42:41.355 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:42:41.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:42:41.355 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:42:41.355 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:42:41.355 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:42:41.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:42:41.355 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:42:41.355 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:42:41.355 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:42:41.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:42:41.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:42:41.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:42:41.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:42:41.359 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:42:41.830 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:42:41.885 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:42:41.887 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:42:41.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:41.889 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:42:41.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:42:41.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:41.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:41.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:42.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:42.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:42.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:42.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:42.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:42.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:42.300 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:42:42.357 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:42:42.357 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:42:42.358 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:42:42.359 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:42:42.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:42.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:42.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:42.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:42.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:42.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:42.769 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:42:42.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:42.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:42.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:42.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:42.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:42.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:43.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:43.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:43.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:43.240 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:42:43.240 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:42:43.240 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:42:43.240 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:42:43.243 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:42:43.250 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:42:43.250 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:42:43.251 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:42:43.251 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:42:43.251 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:42:43.251 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:42:43.251 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:42:43.251 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=409 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:42:43.252 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=409 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:42:43.252 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=409 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:42:43.252 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=409 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:42:43.252 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=410 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:42:43.252 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=410 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:42:43.252 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=410 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:42:43.252 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=410 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:42:43.252 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=410 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:42:43.253 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=410 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:42:43.253 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=410 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:42:43.253 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=410 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:42:43.253 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=411 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:42:43.253 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=411 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:42:43.253 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=411 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:42:43.253 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=411 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:42:43.253 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=411 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:42:43.253 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=411 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:42:43.253 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=411 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:42:43.254 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=411 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:42:43.254 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=412 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:42:43.254 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=412 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:42:43.254 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=412 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:42:43.254 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=412 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:42:43.254 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=412 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:42:43.254 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=412 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:42:43.254 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=412 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:42:43.254 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=412 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:42:43.255 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=413 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:42:43.255 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=413 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:42:43.255 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=413 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:42:43.255 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=413 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:42:43.255 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=413 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:42:43.255 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=413 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:42:43.255 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=413 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:42:43.255 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=413 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:42:48.245 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:42:48.245 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:42:48.248 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:42:48.248 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:42:48.248 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:42:48.248 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:42:48.265 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:42:48.266 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:42:48.266 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:42:48.266 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:42:48.267 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:42:48.268 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:42:48.269 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:42:48.269 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:42:48.269 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:42:48.269 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:42:48.269 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:42:48.269 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:42:48.270 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:42:48.271 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:42:48.271 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:42:48.271 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:42:48.271 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:42:48.271 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:42:48.271 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:42:48.271 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:42:48.271 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:42:48.273 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:42:48.273 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:42:48.273 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:42:48.273 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:42:48.273 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:42:48.273 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:42:48.273 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:42:48.273 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:42:48.276 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:42:48.276 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:42:48.276 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:42:48.276 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:42:48.276 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:42:48.276 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:42:48.276 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:42:48.276 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:42:48.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:42:48.276 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:42:48.276 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:42:48.276 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:42:48.276 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:42:48.276 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:42:48.276 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:42:48.276 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:42:48.276 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:42:48.276 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:42:48.276 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:42:48.276 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:42:48.276 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:42:48.276 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:42:48.276 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:42:48.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:42:48.277 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:42:48.277 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:42:48.277 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:42:48.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:42:48.277 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:42:48.277 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:42:48.277 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:42:48.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:42:48.277 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:42:48.277 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:42:48.277 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:42:48.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:42:48.277 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:42:48.277 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:42:48.277 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:42:48.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:42:48.277 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:42:48.277 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:42:48.277 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:42:48.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:42:48.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:42:48.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:42:48.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:42:48.281 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:42:48.764 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:42:48.803 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:42:48.805 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:42:48.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:48.806 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:42:48.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:48.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:48.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:48.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:48.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:48.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:48.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:48.835 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:48.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:48.839 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:48.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:48.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:48.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:48.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:48.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:48.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:48.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:48.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:48.863 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:48.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:48.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:48.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:48.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:48.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:48.871 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:42:48.871 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:42:48.871 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:42:48.871 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:42:48.873 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:42:48.873 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:42:48.873 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:42:48.873 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:42:48.873 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:42:48.873 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:42:48.873 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:42:48.873 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=127 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:42:48.873 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=127 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:42:48.873 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=127 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:42:48.873 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=127 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:42:48.873 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=127 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:42:48.873 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=127 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:42:48.873 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=127 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:42:48.873 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=127 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:42:53.876 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:42:53.876 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:42:53.878 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:42:53.878 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:42:53.879 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:42:53.880 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:42:53.885 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:42:53.886 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:42:53.886 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:42:53.886 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:42:53.886 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:42:53.888 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:42:53.888 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:42:53.888 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:42:53.888 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:42:53.888 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:42:53.888 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:42:53.888 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:42:53.888 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:42:53.890 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:42:53.890 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:42:53.891 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:42:53.891 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:42:53.891 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:42:53.891 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:42:53.891 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:42:53.891 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:42:53.893 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:42:53.893 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:42:53.893 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:42:53.893 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:42:53.893 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:42:53.893 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:42:53.893 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:42:53.893 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:42:53.896 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:42:53.896 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:42:53.896 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:42:53.896 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:42:53.896 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:42:53.896 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:42:53.896 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:42:53.896 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:42:53.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:42:53.896 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:42:53.897 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:42:53.897 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:42:53.897 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:42:53.897 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:42:53.897 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:42:53.897 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:42:53.897 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:42:53.897 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:42:53.897 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:42:53.897 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:42:53.897 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:42:53.897 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:42:53.897 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:42:53.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:42:53.897 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:42:53.897 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:42:53.897 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:42:53.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:42:53.897 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:42:53.897 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:42:53.897 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:42:53.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:42:53.897 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:42:53.897 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:42:53.897 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:42:53.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:42:53.898 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:42:53.898 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:42:53.898 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:42:53.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:42:53.898 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:42:53.898 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:42:53.898 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:42:53.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:42:53.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:42:53.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:42:53.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:42:53.902 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:42:54.375 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:42:54.432 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:42:54.433 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:42:54.434 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:42:54.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:54.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:54.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:54.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:54.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:54.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:54.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:54.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:54.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:54.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:54.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:54.462 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:54.463 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:54.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:54.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:54.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:54.474 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:54.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:54.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:54.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:54.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:54.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:54.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:54.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:54.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:54.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:54.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:54.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:54.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:54.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:54.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:54.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:54.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:54.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:54.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:54.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:54.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:54.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:54.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:54.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:54.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:54.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:54.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:54.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:54.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:54.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:54.531 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:54.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:54.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:42:54.535 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:42:54.535 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:42:54.535 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:42:54.536 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:42:54.537 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:42:54.537 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:42:54.537 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:42:54.537 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:42:54.537 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:42:54.537 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:42:54.537 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:42:54.537 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=139 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:42:54.537 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=139 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:42:54.537 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=139 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:42:54.537 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=139 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:42:54.537 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=139 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:42:54.537 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=139 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:42:54.537 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=139 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:42:59.548 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:42:59.548 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:42:59.549 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:42:59.549 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:42:59.549 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:42:59.549 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:42:59.568 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:42:59.569 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:42:59.569 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:42:59.569 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:42:59.569 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:42:59.572 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:42:59.572 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:42:59.572 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:42:59.572 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:42:59.572 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:42:59.572 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:42:59.573 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:42:59.573 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:42:59.575 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:42:59.575 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:42:59.575 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:42:59.575 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:42:59.575 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:42:59.575 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:42:59.576 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:42:59.576 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:42:59.578 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:42:59.578 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:42:59.578 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:42:59.578 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:42:59.578 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:42:59.578 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:42:59.578 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:42:59.578 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:42:59.581 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:42:59.581 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:42:59.581 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:42:59.581 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:42:59.581 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:42:59.581 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:42:59.581 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:42:59.581 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:42:59.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:42:59.581 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:42:59.581 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:42:59.582 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:42:59.582 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:42:59.582 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:42:59.582 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:42:59.582 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:42:59.582 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:42:59.582 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:42:59.582 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:42:59.582 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:42:59.582 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:42:59.582 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:42:59.582 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:42:59.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:42:59.582 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:42:59.582 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:42:59.582 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:42:59.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:42:59.582 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:42:59.582 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:42:59.582 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:42:59.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:42:59.582 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:42:59.582 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:42:59.582 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:42:59.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:42:59.583 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:42:59.583 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:42:59.583 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:42:59.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:42:59.583 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:42:59.583 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:42:59.583 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:42:59.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:42:59.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:42:59.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:42:59.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:42:59.587 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:43:00.055 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:43:00.112 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:43:00.113 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:43:00.115 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:43:00.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:00.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:00.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:00.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:00.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:00.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:00.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:00.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:00.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:00.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:00.165 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:00.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:00.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:00.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:00.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:00.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:00.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:00.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:00.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:00.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:00.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:00.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:00.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:00.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:00.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:00.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:00.194 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:00.195 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:00.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:00.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:00.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:00.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:00.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:00.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:00.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:00.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:00.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:00.217 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:43:00.217 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:43:00.217 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:43:00.217 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:43:00.218 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:43:00.218 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:43:00.218 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:43:00.218 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:43:00.218 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:43:00.218 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:43:00.218 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:43:00.219 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=139 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:43:00.219 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=139 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:43:00.219 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=139 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:43:00.219 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=139 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:43:00.219 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=139 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:43:00.219 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=139 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:43:00.219 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=139 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:43:00.219 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=139 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:43:05.221 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:43:05.222 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:43:05.231 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:43:05.231 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:43:05.231 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:43:05.232 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:43:05.250 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:43:05.251 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:43:05.251 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:43:05.251 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:43:05.251 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:43:05.254 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:43:05.254 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:43:05.255 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:43:05.255 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:43:05.255 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:43:05.255 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:43:05.255 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:43:05.255 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:43:05.258 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:43:05.258 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:43:05.258 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:43:05.258 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:43:05.258 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:43:05.258 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:43:05.258 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:43:05.258 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:43:05.260 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:43:05.260 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:43:05.260 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:43:05.260 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:43:05.260 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:43:05.260 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:43:05.260 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:43:05.260 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:43:05.262 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:43:05.262 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:43:05.262 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:43:05.262 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:43:05.262 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:43:05.262 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:43:05.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:43:05.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:43:05.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:43:05.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:43:05.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:43:05.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:43:05.263 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:43:05.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:43:05.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:43:05.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:43:05.263 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:43:05.263 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:43:05.263 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:43:05.263 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:43:05.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:43:05.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:43:05.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:43:05.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:43:05.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:43:05.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:43:05.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:43:05.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:43:05.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:43:05.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:43:05.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:43:05.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:43:05.264 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:43:05.264 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:43:05.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:43:05.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:43:05.264 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:43:05.264 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:43:05.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:43:05.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:43:05.264 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:43:05.264 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:43:05.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:43:05.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:43:05.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:43:05.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:43:05.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:43:05.268 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:43:05.745 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:43:05.783 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:43:05.784 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:43:05.785 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:43:05.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:05.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:05.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:05.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:05.813 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:05.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:05.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:05.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:05.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:05.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:05.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:05.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:05.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:05.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:05.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:05.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:05.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:05.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:05.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:05.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:05.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:05.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:05.863 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:05.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:05.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:05.867 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:43:05.867 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:43:05.867 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:43:05.867 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:43:05.869 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:43:05.869 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:43:05.869 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:43:05.869 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:43:05.869 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:43:05.869 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:43:05.869 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:43:10.872 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:43:10.872 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:43:10.875 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:43:10.875 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:43:10.876 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:43:10.877 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:43:10.890 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:43:10.891 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:43:10.891 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:43:10.892 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:43:10.892 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:43:10.895 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:43:10.895 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:43:10.895 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:43:10.895 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:43:10.895 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:43:10.895 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:43:10.895 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:43:10.895 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:43:10.898 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:43:10.898 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:43:10.898 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:43:10.898 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:43:10.899 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:43:10.899 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:43:10.899 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:43:10.899 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:43:10.901 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:43:10.901 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:43:10.901 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:43:10.901 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:43:10.901 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:43:10.901 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:43:10.902 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:43:10.902 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:43:10.905 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:43:10.905 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:43:10.905 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:43:10.905 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:43:10.905 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:43:10.905 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:43:10.905 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:43:10.905 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:43:10.905 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:43:10.905 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:43:10.905 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:43:10.905 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:43:10.905 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:43:10.905 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:43:10.905 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:43:10.905 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:43:10.906 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:43:10.906 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:43:10.906 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:43:10.906 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:43:10.906 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:43:10.906 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:43:10.906 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:43:10.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:43:10.906 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:43:10.906 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:43:10.906 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:43:10.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:43:10.906 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:43:10.906 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:43:10.906 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:43:10.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:43:10.906 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:43:10.906 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:43:10.906 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:43:10.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:43:10.907 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:43:10.907 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:43:10.907 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:43:10.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:43:10.907 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:43:10.907 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:43:10.907 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:43:10.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:43:10.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:43:10.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:43:10.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:43:10.911 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:43:11.387 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:43:11.432 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:43:11.433 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:43:11.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:11.435 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:43:11.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:43:11.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:11.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:11.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:11.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:11.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:11.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:11.462 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:11.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:11.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:11.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:11.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:11.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:11.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:11.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:11.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:11.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:11.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:11.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:11.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:11.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:11.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:11.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:11.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:11.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:11.500 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:43:11.500 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:43:11.500 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:43:11.500 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:43:11.502 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:43:11.502 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:43:11.502 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:43:11.502 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:43:11.502 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:43:11.502 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:43:11.502 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:43:16.504 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:43:16.505 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:43:16.507 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:43:16.510 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:43:16.512 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:43:16.516 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:43:16.530 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:43:16.531 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:43:16.531 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:43:16.531 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:43:16.531 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:43:16.533 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:43:16.533 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:43:16.533 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:43:16.533 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:43:16.533 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:43:16.533 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:43:16.533 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:43:16.533 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:43:16.535 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:43:16.535 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:43:16.535 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:43:16.535 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:43:16.535 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:43:16.536 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:43:16.536 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:43:16.536 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:43:16.537 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:43:16.537 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:43:16.537 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:43:16.537 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:43:16.537 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:43:16.537 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:43:16.538 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:43:16.538 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:43:16.540 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:43:16.540 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:43:16.540 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:43:16.540 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:43:16.540 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:43:16.540 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:43:16.540 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:43:16.540 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:43:16.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:43:16.540 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:43:16.540 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:43:16.540 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:43:16.540 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:43:16.540 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:43:16.540 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:43:16.540 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:43:16.540 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:43:16.540 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:43:16.541 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:43:16.541 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:43:16.541 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:43:16.541 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:43:16.541 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:43:16.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:43:16.541 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:43:16.541 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:43:16.541 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:43:16.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:43:16.541 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:43:16.541 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:43:16.541 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:43:16.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:43:16.541 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:43:16.541 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:43:16.541 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:43:16.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:43:16.541 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:43:16.541 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:43:16.541 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:43:16.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:43:16.541 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:43:16.541 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:43:16.541 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:43:16.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:43:16.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:43:16.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:43:16.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:43:16.545 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:43:17.014 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:43:17.067 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:43:17.070 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:43:17.071 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:43:17.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:17.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:43:17.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:17.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:17.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:17.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:17.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:17.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:17.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:17.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:17.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:17.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:17.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:17.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:17.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:17.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:17.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:17.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:17.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:17.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:17.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:17.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:17.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:17.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:17.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:17.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:17.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:17.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:17.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:17.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:17.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:17.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:17.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:17.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:17.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:17.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:17.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:17.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:17.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:17.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:17.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:17.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:17.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:17.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:17.165 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:17.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:17.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:17.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:17.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:17.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:17.175 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:43:17.176 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:43:17.176 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:43:17.176 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:43:17.177 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:43:17.177 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:43:17.177 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:43:17.177 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:43:17.177 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:43:17.177 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:43:17.177 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:43:17.177 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=139 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:43:17.177 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=139 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:43:17.177 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=139 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:43:17.177 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=139 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:43:17.177 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=139 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:43:17.177 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=139 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:43:17.177 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=139 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:43:17.177 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=139 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:43:22.184 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:43:22.184 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:43:22.184 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:43:22.184 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:43:22.184 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:43:22.184 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:43:22.201 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:43:22.202 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:43:22.202 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:43:22.202 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:43:22.202 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:43:22.206 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:43:22.206 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:43:22.206 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:43:22.206 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:43:22.206 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:43:22.206 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:43:22.207 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:43:22.207 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:43:22.209 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:43:22.210 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:43:22.210 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:43:22.210 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:43:22.210 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:43:22.210 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:43:22.210 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:43:22.210 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:43:22.212 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:43:22.212 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:43:22.213 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:43:22.213 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:43:22.213 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:43:22.213 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:43:22.213 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:43:22.213 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:43:22.216 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:43:22.216 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:43:22.216 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:43:22.217 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:43:22.217 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:43:22.217 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:43:22.217 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:43:22.217 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:43:22.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:43:22.217 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:43:22.217 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:43:22.217 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:43:22.217 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:43:22.217 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:43:22.217 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:43:22.217 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:43:22.217 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:43:22.217 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:43:22.217 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:43:22.217 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:43:22.218 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:43:22.218 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:43:22.218 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:43:22.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:43:22.218 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:43:22.218 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:43:22.218 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:43:22.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:43:22.218 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:43:22.218 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:43:22.218 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:43:22.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:43:22.218 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:43:22.218 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:43:22.218 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:43:22.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:43:22.218 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:43:22.218 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:43:22.218 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:43:22.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:43:22.218 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:43:22.218 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:43:22.218 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:43:22.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:43:22.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:43:22.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:43:22.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:43:22.222 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:43:22.701 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:43:22.754 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:43:22.757 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:43:22.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:22.759 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:43:22.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:43:22.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:22.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:22.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:22.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:22.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:22.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:22.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:22.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:22.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:22.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:22.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:22.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:22.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:22.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:22.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:22.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:22.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:22.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:22.820 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:22.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:22.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:22.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:22.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:22.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:22.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:22.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:22.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:22.839 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:22.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:22.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:22.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:22.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:22.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:22.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:22.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:22.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:22.853 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:43:22.853 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:43:22.853 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:43:22.853 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:43:22.854 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:43:22.854 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:43:22.854 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:43:22.854 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:43:22.854 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:43:22.854 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:43:22.854 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:43:22.854 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=137 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:43:22.854 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=137 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:43:22.854 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=137 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:43:22.854 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=137 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:43:22.854 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=137 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:43:22.854 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=137 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:43:22.854 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=137 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:43:22.854 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=137 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:43:27.857 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:43:27.857 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:43:27.860 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:43:27.860 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:43:27.861 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:43:27.861 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:43:27.871 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:43:27.872 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:43:27.872 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:43:27.872 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:43:27.872 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:43:27.875 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:43:27.875 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:43:27.875 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:43:27.875 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:43:27.875 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:43:27.876 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:43:27.876 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:43:27.876 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:43:27.877 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:43:27.877 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:43:27.878 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:43:27.878 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:43:27.878 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:43:27.878 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:43:27.878 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:43:27.878 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:43:27.879 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:43:27.879 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:43:27.880 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:43:27.880 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:43:27.880 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:43:27.880 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:43:27.880 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:43:27.880 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:43:27.882 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:43:27.882 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:43:27.882 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:43:27.882 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:43:27.882 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:43:27.882 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:43:27.882 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:43:27.882 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:43:27.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:43:27.883 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:43:27.883 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:43:27.883 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:43:27.883 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:43:27.883 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:43:27.883 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:43:27.883 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:43:27.883 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:43:27.883 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:43:27.883 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:43:27.883 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:43:27.883 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:43:27.883 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:43:27.883 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:43:27.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:43:27.883 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:43:27.883 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:43:27.883 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:43:27.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:43:27.883 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:43:27.883 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:43:27.883 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:43:27.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:43:27.883 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:43:27.883 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:43:27.883 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:43:27.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:43:27.883 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:43:27.884 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:43:27.884 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:43:27.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:43:27.884 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:43:27.884 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:43:27.884 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:43:27.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:43:27.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:43:27.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:43:27.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:43:27.888 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:43:28.356 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:43:28.414 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:43:28.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:28.417 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:43:28.418 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:43:28.420 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:43:28.420 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:43:28.420 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:43:28.420 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:43:28.421 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:43:28.421 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:43:28.421 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:43:28.421 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:43:28.826 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:43:28.886 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:43:28.887 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:43:28.887 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:43:28.888 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:43:29.295 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:43:29.769 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:43:29.888 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:43:29.888 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:43:29.888 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:43:29.888 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:43:30.238 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:43:30.708 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 03:43:30.889 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:43:30.890 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:43:30.890 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:43:30.890 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:43:31.179 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 03:43:31.653 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 03:43:31.862 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:43:31.862 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:43:31.870 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:43:31.870 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:43:31.870 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:43:31.870 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:43:31.877 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:43:31.877 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:43:31.877 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:43:31.877 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:43:31.877 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:43:31.877 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:43:31.878 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:43:31.878 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=865 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:43:31.878 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=865 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:43:36.873 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:43:36.873 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:43:36.876 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:43:36.876 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:43:36.876 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:43:36.876 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:43:36.889 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:43:36.890 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:43:36.890 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:43:36.890 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:43:36.890 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:43:36.893 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:43:36.894 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:43:36.894 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:43:36.894 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:43:36.894 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:43:36.894 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:43:36.894 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:43:36.894 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:43:36.896 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:43:36.897 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:43:36.897 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:43:36.897 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:43:36.897 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:43:36.897 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:43:36.897 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:43:36.897 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:43:36.899 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:43:36.899 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:43:36.899 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:43:36.899 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:43:36.899 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:43:36.899 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:43:36.899 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:43:36.899 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:43:36.901 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:43:36.901 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:43:36.901 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:43:36.901 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:43:36.901 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:43:36.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:43:36.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:43:36.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:43:36.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:43:36.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:43:36.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:43:36.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:43:36.902 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:43:36.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:43:36.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:43:36.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:43:36.902 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:43:36.902 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:43:36.902 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:43:36.902 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:43:36.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:43:36.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:43:36.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:43:36.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:43:36.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:43:36.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:43:36.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:43:36.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:43:36.903 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:43:36.903 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:43:36.903 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:43:36.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:43:36.903 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:43:36.903 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:43:36.903 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:43:36.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:43:36.903 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:43:36.903 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:43:36.903 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:43:36.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:43:36.903 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:43:36.903 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:43:36.903 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:43:36.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:43:36.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:43:36.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:43:36.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:43:36.907 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:43:37.384 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:43:37.416 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:43:37.416 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:43:37.416 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:43:37.417 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:37.424 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:43:37.424 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:43:37.424 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:43:37.426 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:43:37.426 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:43:37.426 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:43:37.426 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:43:37.426 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:43:37.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD HANDOVER
2026-01-09 03:43:37.488 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:43:37.488 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:43:37.488 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:43:37.489 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:43:37.854 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:43:37.905 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:43:37.905 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:43:37.905 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:43:37.906 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:43:37.973 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:43:37.973 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:43:37.973 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:43:37.974 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:43:37.974 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:43:37.974 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:43:37.975 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:43:37.975 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:43:37.975 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:43:37.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:37.992 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:43:37.992 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:43:38.004 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:43:38.004 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:43:38.004 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:43:38.004 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:43:38.008 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:43:38.008 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:43:38.008 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:43:38.008 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:43:38.008 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:43:38.008 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:43:38.008 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:43:38.008 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=238 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:43:38.008 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=238 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:43:43.008 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:43:43.008 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:43:43.011 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:43:43.011 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:43:43.012 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:43:43.013 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:43:43.023 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:43:43.023 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:43:43.024 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:43:43.024 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:43:43.024 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:43:43.026 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:43:43.026 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:43:43.026 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:43:43.026 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:43:43.026 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:43:43.026 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:43:43.026 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:43:43.026 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:43:43.028 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:43:43.028 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:43:43.028 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:43:43.028 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:43:43.029 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:43:43.029 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:43:43.029 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:43:43.029 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:43:43.030 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:43:43.031 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:43:43.031 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:43:43.031 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:43:43.031 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:43:43.031 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:43:43.031 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:43:43.031 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:43:43.033 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:43:43.033 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:43:43.034 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:43:43.034 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:43:43.034 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:43:43.034 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:43:43.034 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:43:43.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:43:43.034 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:43:43.034 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:43:43.034 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:43:43.034 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:43:43.034 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:43:43.034 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:43:43.034 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:43:43.034 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:43:43.034 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:43:43.034 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:43:43.034 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:43:43.034 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:43:43.034 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:43:43.035 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:43:43.035 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:43:43.035 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:43:43.035 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:43:43.035 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:43:43.035 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:43:43.035 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:43:43.035 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:43:43.035 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:43:43.035 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:43:43.035 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:43:43.035 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:43:43.035 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:43:43.035 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:43:43.035 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:43:43.035 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:43:43.035 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:43:43.035 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:43:43.035 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:43:43.035 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:43:43.035 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:43:43.035 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:43:43.035 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:43:43.035 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:43:43.035 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:43:43.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:43:43.039 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:43:43.514 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:43:43.558 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:43:43.560 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:43:43.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:43.561 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:43:43.572 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:43:43.572 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:43:43.572 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:43:43.575 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:43:43.575 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:43:43.576 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:43:43.576 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:43:43.576 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:43:43.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD HANDOVER
2026-01-09 03:43:43.619 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:43:43.619 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:43:43.619 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:43:43.619 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:43:43.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:43.747 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:43:43.748 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:43:43.748 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:43:43.748 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:43:43.748 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:43:43.748 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:43:43.748 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:43:43.749 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:43:43.749 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:43:43.986 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:43:44.037 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:43:44.037 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:43:44.038 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:43:44.038 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:43:44.457 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:43:44.928 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:43:45.037 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:43:45.038 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:43:45.039 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:43:45.039 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:43:45.398 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:43:45.870 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-09 03:43:46.038 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:43:46.039 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:43:46.039 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:43:46.039 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:43:46.340 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-09 03:43:46.811 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-09 03:43:47.040 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:43:47.040 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:43:47.040 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:43:47.041 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:43:47.282 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-09 03:43:47.752 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-09 03:43:48.041 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:43:48.041 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:43:48.042 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:43:48.042 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:43:48.224 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-09 03:43:48.702 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-09 03:43:49.174 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-09 03:43:49.646 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-09 03:43:50.121 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-09 03:43:50.599 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-09 03:43:51.076 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-09 03:43:51.549 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-09 03:43:52.019 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-09 03:43:52.494 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-09 03:43:52.968 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-09 03:43:53.437 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-09 03:43:53.910 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-09 03:43:54.381 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-09 03:43:54.850 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-09 03:43:55.320 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-09 03:43:55.791 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-09 03:43:56.266 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-09 03:43:56.744 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-09 03:43:57.223 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-09 03:43:57.692 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-09 03:43:58.161 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-09 03:43:58.632 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-09 03:43:58.928 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:43:58.928 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:43:58.928 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:43:58.929 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:43:58.949 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:43:58.949 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:43:58.949 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:43:58.949 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:43:58.949 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:43:58.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:43:58.956 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:43:58.956 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:43:58.961 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:43:58.961 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:43:58.962 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:43:58.962 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:43:58.966 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:43:58.966 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:43:58.966 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:43:58.966 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:43:58.966 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:43:58.966 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:43:58.966 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:43:58.966 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3439 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:43:58.966 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3439 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:43:58.966 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3439 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:43:58.966 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3439 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:43:58.966 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3439 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:43:58.966 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3440 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:43:58.966 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3440 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:43:58.966 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3440 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:43:58.966 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3440 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:43:58.966 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3440 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:43:58.966 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3440 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:43:58.966 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3440 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:43:58.966 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=3440 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:44:03.966 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:44:03.966 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:44:03.968 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:44:03.968 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:44:03.969 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:44:03.970 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:44:03.977 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:44:03.978 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:44:03.978 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:44:03.978 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:44:03.978 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:44:03.981 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:44:03.981 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:44:03.982 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:44:03.982 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:44:03.982 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:44:03.982 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:44:03.982 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:44:03.982 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:44:03.985 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:44:03.985 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:44:03.985 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:44:03.985 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:44:03.986 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:44:03.986 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:44:03.986 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:44:03.986 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:44:03.988 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:44:03.988 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:44:03.988 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:44:03.988 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:44:03.989 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:44:03.989 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:44:03.989 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:44:03.989 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:44:03.992 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:44:03.992 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:44:03.992 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:44:03.992 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:44:03.992 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:44:03.992 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:44:03.992 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:44:03.993 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:44:03.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:44:03.993 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:44:03.993 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:44:03.993 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:44:03.993 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:44:03.993 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:44:03.993 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:44:03.993 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:44:03.993 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:44:03.993 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:44:03.993 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:44:03.993 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:44:03.993 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:44:03.993 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:44:03.993 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:44:03.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:44:03.994 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:44:03.994 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:44:03.994 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:44:03.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:44:03.994 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:44:03.994 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:44:03.994 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:44:03.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:44:03.994 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:44:03.994 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:44:03.994 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:44:03.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:44:03.994 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:44:03.994 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:44:03.994 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:44:03.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:44:03.994 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:44:03.994 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:44:03.994 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:44:03.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:44:03.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:44:03.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:44:03.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:44:03.998 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:44:04.467 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:44:04.524 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:44:04.524 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:44:04.526 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:44:04.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:44:04.546 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:44:04.546 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:44:04.546 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:44:04.551 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:44:04.551 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:44:04.552 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:44:04.552 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:44:04.552 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:44:04.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD HANDOVER
2026-01-09 03:44:04.567 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:44:04.567 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:44:04.567 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:44:04.567 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:44:04.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:44:04.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD HANDOVER
2026-01-09 03:44:04.861 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:44:04.861 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:44:04.861 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:44:04.862 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:44:04.862 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:44:04.862 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:44:04.862 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:44:04.862 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:44:04.862 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:44:04.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:44:04.888 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:44:04.888 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:44:04.898 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:44:04.899 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:44:04.899 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:44:04.899 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:44:04.906 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:44:04.907 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:44:04.907 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:44:04.907 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:44:04.907 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:44:04.907 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:44:04.908 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:44:04.908 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=197 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:44:04.908 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=197 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:44:09.903 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:44:09.904 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:44:09.905 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:44:09.905 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:44:09.906 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:44:09.907 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:44:09.911 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:44:09.912 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:44:09.912 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:44:09.912 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:44:09.912 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:44:09.914 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:44:09.914 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:44:09.914 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:44:09.914 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:44:09.914 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:44:09.914 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:44:09.914 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:44:09.914 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:44:09.916 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:44:09.916 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:44:09.917 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:44:09.917 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:44:09.917 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:44:09.917 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:44:09.917 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:44:09.917 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:44:09.919 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:44:09.919 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:44:09.919 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:44:09.919 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:44:09.919 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:44:09.919 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:44:09.919 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:44:09.919 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:44:09.922 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:44:09.922 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:44:09.922 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:44:09.922 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:44:09.922 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:44:09.922 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:44:09.922 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:44:09.922 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:44:09.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:44:09.922 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:44:09.922 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:44:09.923 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:44:09.923 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:44:09.923 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:44:09.923 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:44:09.923 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:44:09.923 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:44:09.923 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:44:09.923 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:44:09.923 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:44:09.923 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:44:09.923 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:44:09.923 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:44:09.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:44:09.923 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:44:09.923 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:44:09.923 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:44:09.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:44:09.923 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:44:09.923 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:44:09.923 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:44:09.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:44:09.923 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:44:09.924 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:44:09.924 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:44:09.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:44:09.924 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:44:09.924 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:44:09.924 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:44:09.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:44:09.924 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:44:09.924 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:44:09.924 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:44:09.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:44:09.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:44:09.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:44:09.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:44:09.928 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-09 03:44:10.396 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-09 03:44:10.450 [DEBUG] fake_trx.py:273 (BTS@172.18.122.20:5700) Recv FAKE_TOA cmd
2026-01-09 03:44:10.452 [DEBUG] fake_trx.py:292 (BTS@172.18.122.20:5700) Recv FAKE_RSSI cmd
2026-01-09 03:44:10.454 [DEBUG] fake_trx.py:317 (BTS@172.18.122.20:5700) Recv FAKE_CI cmd
2026-01-09 03:44:10.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:44:10.476 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:44:10.476 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:44:10.476 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:44:10.479 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:44:10.479 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:44:10.479 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:44:10.479 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:44:10.479 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:44:10.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD HANDOVER
2026-01-09 03:44:10.494 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:44:10.495 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:44:10.495 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:44:10.495 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:44:10.866 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-09 03:44:10.925 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:44:10.926 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:44:10.927 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:44:10.928 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:44:11.336 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-09 03:44:11.806 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-09 03:44:11.927 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:44:11.927 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:44:11.928 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:44:11.929 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:44:12.276 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-09 03:44:12.504 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:44:12.505 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:44:12.505 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:44:12.505 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD ECHO
2026-01-09 03:44:12.524 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.122.22:6700) Ignore CMD SETSLOT
2026-01-09 03:44:12.524 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.122.22:6700) Recv RXTUNE cmd
2026-01-09 03:44:12.524 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.122.22:6700) Recv TXTUNE cmd
2026-01-09 03:44:12.524 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.122.22:6700) Recv POWERON CMD
2026-01-09 03:44:12.524 [INFO] ctrl_if_trx.py:109 (MS@172.18.122.22:6700) Starting transceiver...
2026-01-09 03:44:12.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD NOHANDOVER
2026-01-09 03:44:12.558 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.122.22:6700) Recv POWEROFF cmd
2026-01-09 03:44:12.558 [INFO] ctrl_if_trx.py:117 (MS@172.18.122.22:6700) Stopping transceiver...
2026-01-09 03:44:12.568 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.122.20:5700) Recv SETPOWER cmd
2026-01-09 03:44:12.569 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.122.20:5700/1) Recv SETPOWER cmd
2026-01-09 03:44:12.569 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.122.20:5700/2) Recv SETPOWER cmd
2026-01-09 03:44:12.569 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.122.20:5700/3) Recv SETPOWER cmd
2026-01-09 03:44:12.571 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:44:12.571 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:44:12.571 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:44:12.571 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:44:12.571 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:44:12.571 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:44:12.571 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:44:12.571 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=575 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:44:12.571 [WARNING] transceiver.py:250 (BTS@172.18.122.20:5700) RX TRXD message (ver=1 fn=575 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-09 03:44:17.571 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:44:17.571 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:44:17.571 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:44:17.572 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:44:17.572 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:44:17.573 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:44:17.577 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:44:17.577 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:44:17.577 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:44:17.577 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:44:17.577 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:44:17.578 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:44:17.578 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:44:17.578 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:44:17.578 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:44:17.578 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:44:17.578 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:44:17.578 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:44:17.578 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:44:17.579 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:44:17.579 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:44:17.580 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:44:17.580 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:44:17.580 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:44:17.580 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:44:17.580 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:44:17.580 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:44:17.581 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:44:17.581 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:44:17.581 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:44:17.581 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:44:17.581 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:44:17.581 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:44:17.581 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:44:17.581 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:44:17.583 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:44:17.583 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:44:17.583 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:44:17.583 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:44:17.583 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:44:17.583 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:44:17.583 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:44:17.583 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:44:17.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:44:17.583 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:44:17.583 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:44:17.583 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:44:17.583 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:44:17.583 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:44:17.583 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:44:17.583 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:44:17.584 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:44:17.584 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:44:17.584 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:44:17.584 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:44:17.584 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:44:17.584 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:44:17.584 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:44:17.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:44:17.584 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:44:17.584 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:44:17.584 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:44:17.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:44:17.584 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:44:17.584 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:44:17.584 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:44:17.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:44:17.584 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:44:17.584 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:44:17.584 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:44:17.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:44:17.584 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:44:17.584 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:44:17.584 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:44:17.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:44:17.584 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:44:17.584 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:44:17.584 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:44:17.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:44:17.585 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:44:17.585 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:44:17.585 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:44:17.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:44:17.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:44:17.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:44:17.585 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:44:17.585 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:44:17.585 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:44:17.585 [INFO] transceiver.py:239 Stopping clock generator
2026-01-09 03:44:22.587 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:44:22.587 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:44:22.588 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:44:22.589 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:44:22.590 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:44:22.591 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:44:22.596 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:44:22.596 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:44:22.596 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.122.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:44:22.596 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.122.20:5700) Recv SETFORMAT cmd
2026-01-09 03:44:22.596 [INFO] ctrl_if_trx.py:201 (BTS@172.18.122.20:5700) TRXD header version 1 -> 1
2026-01-09 03:44:22.598 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.122.20:5700/1) Recv RXTUNE cmd
2026-01-09 03:44:22.598 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.122.20:5700/1) Recv TXTUNE cmd
2026-01-09 03:44:22.598 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:44:22.598 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.122.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:44:22.598 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:44:22.598 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.122.20:5700/1) Recv NOMTXPOWER cmd
2026-01-09 03:44:22.598 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.122.20:5700/1) Recv SETFORMAT cmd
2026-01-09 03:44:22.598 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.122.20:5700/1) TRXD header version 1 -> 1
2026-01-09 03:44:22.600 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.122.20:5700/2) Recv RXTUNE cmd
2026-01-09 03:44:22.600 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.122.20:5700/2) Recv TXTUNE cmd
2026-01-09 03:44:22.600 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:44:22.600 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.122.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:44:22.600 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:44:22.600 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.122.20:5700/2) Recv NOMTXPOWER cmd
2026-01-09 03:44:22.600 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.122.20:5700/2) Recv SETFORMAT cmd
2026-01-09 03:44:22.600 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.122.20:5700/2) TRXD header version 1 -> 1
2026-01-09 03:44:22.602 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.122.20:5700/3) Recv RXTUNE cmd
2026-01-09 03:44:22.602 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.122.20:5700/3) Recv TXTUNE cmd
2026-01-09 03:44:22.602 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:44:22.602 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.122.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-09 03:44:22.602 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:44:22.602 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.122.20:5700/3) Recv NOMTXPOWER cmd
2026-01-09 03:44:22.603 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.122.20:5700/3) Recv SETFORMAT cmd
2026-01-09 03:44:22.603 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.122.20:5700/3) TRXD header version 1 -> 1
2026-01-09 03:44:22.605 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.122.20:5700) Recv RXTUNE cmd
2026-01-09 03:44:22.605 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETTSC
2026-01-09 03:44:22.605 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETTSC
2026-01-09 03:44:22.605 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETTSC
2026-01-09 03:44:22.605 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.122.20:5700) Recv TXTUNE cmd
2026-01-09 03:44:22.605 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETRXGAIN
2026-01-09 03:44:22.605 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETRXGAIN
2026-01-09 03:44:22.606 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETRXGAIN
2026-01-09 03:44:22.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETTSC
2026-01-09 03:44:22.606 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:44:22.606 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:44:22.606 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:44:22.606 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.122.20:5700) Recv NOMTXPOWER cmd
2026-01-09 03:44:22.606 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:44:22.606 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:44:22.606 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:44:22.606 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.122.20:5700) Recv POWERON CMD
2026-01-09 03:44:22.606 [INFO] ctrl_if_trx.py:109 (BTS@172.18.122.20:5700) Starting transceiver...
2026-01-09 03:44:22.606 [INFO] transceiver.py:236 Starting clock generator
2026-01-09 03:44:22.606 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-09 03:44:22.606 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:44:22.606 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:44:22.606 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:44:22.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETRXGAIN
2026-01-09 03:44:22.606 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:44:22.606 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:44:22.606 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:44:22.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:44:22.606 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:44:22.606 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:44:22.606 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:44:22.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:44:22.606 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:44:22.607 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:44:22.607 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:44:22.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:44:22.607 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:44:22.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:44:22.608 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:44:22.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:44:22.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.122.20:5700/1) Ignore CMD SETSLOT
2026-01-09 03:44:22.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.122.20:5700/2) Ignore CMD SETSLOT
2026-01-09 03:44:22.608 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.122.20:5700/3) Ignore CMD SETSLOT
2026-01-09 03:44:22.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:44:22.608 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.122.20:5700/1) Recv RFMUTE cmd
2026-01-09 03:44:22.608 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.122.20:5700/2) Recv RFMUTE cmd
2026-01-09 03:44:22.608 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.122.20:5700/3) Recv RFMUTE cmd
2026-01-09 03:44:22.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:44:22.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:44:22.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.122.20:5700) Ignore CMD SETSLOT
2026-01-09 03:44:22.608 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.122.20:5700) Recv RFMUTE cmd
2026-01-09 03:44:22.608 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.122.20:5700) Recv POWEROFF cmd
2026-01-09 03:44:22.608 [INFO] ctrl_if_trx.py:117 (BTS@172.18.122.20:5700) Stopping transceiver...
2026-01-09 03:44:22.608 [INFO] transceiver.py:239 Stopping clock generator